Method for manufacturing semiconductor device and semiconductor device

Abstract

The present invention discloses a method for fabricating a semiconductor device and a semiconductor device. The method includes sequentially disposing a mask layer and a photoresist layer above a target layer; forming a first incision in the photoresist layer to form a first exposed region in the mask layer; forming a mask layer blocking region in the first exposed region of the mask layer through a reaction; forming a second incision in the photoresist layer to form a second exposed region in the mask layer; and etching the target layer based on the mask layer blocking region and the second exposed region to form a plurality of contact openings in the target layer. The contact openings formed by the method of the present invention have a simple process flow and improve process efficiency.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor devices, and in particular to a method for manufacturing a semiconductor device and a semiconductor device. Background Art

[0002] The conventional method for manufacturing semiconductor devices generally involves first forming a line pattern on a photoresist layer and then forming a cut pattern. Figures 1(a)-(g) show schematic diagrams of a conventional method for manufacturing semiconductor devices. The specific manufacturing steps include: as shown in Figure 1(a), S1, forming a hard mask layer 110, a bottom photoresist layer 121, a second intermediate photoresist layer 122a, a first intermediate photoresist layer 122b, and a first top photoresist layer 123a in sequence above the target layer 100. It is understood that the target layer 100 may include: a substrate layer 101, a first dielectric layer 102, an etch stop layer 103, and a second dielectric layer 104 arranged in sequence. An active region (not shown) may be provided in the substrate layer. A gate region 105 is provided above the substrate layer 101 and in the first dielectric layer 102. The substrate layer 101 is in physical contact with the etch stop layer 103, and any number of intervening layers may be provided between the substrate layer 101 and the etch stop layer 103. As shown in Figures 1(b) and 1(c), S2, a first cut pattern A is formed in the first top photoresist layer 123a and transferred to the first intermediate photoresist layer 122b by etching. As shown in Figure 1(d), S3, a patterned second top photoresist layer 123b is formed above the first intermediate photoresist layer 122b to cover a portion of the first intermediate photoresist layer 122b. As shown in Figure 1(e), S4, a second cut pattern B is formed in the second intermediate photoresist layer based on the patterned second top photoresist layer and the patterned first intermediate photoresist layer. As shown in Figure 1(f), S5, the second cut pattern B is transferred to the bottom photoresist layer 121 based on the patterned second intermediate photoresist layer, forming a bottom cut in the bottom photoresist layer 121. As shown in FIG. 1( g ), S6 , the hard mask layer 110 and the target layer 100 are etched based on the patterned underlying photoresist layer 121 to form a plurality of contact openings 130 in the target layer 100 .

[0003] The existing technology involves many photoresist layer steps, and the entire process requires at least two intermediate photoresist layers. Moreover, since contact openings in normal chips are generally designed based on regional usage, the contact openings are unevenly distributed. As a result, the distribution of the photoresist openings required for forming the contact openings is also uneven (i.e., the distribution of the cuts after patterning the first and second intermediate photoresist layers is uneven). In addition, since the intermediate photoresist layer is generally made of a relatively soft material, when the bottom cut is formed based on the patterned second intermediate photoresist layer, the sidewalls of the bottom cut in the sparse area are easily deformed and distorted, resulting in an increased etching amount of the target layer and a tapered contact opening profile (as shown in Figures 1(f) and (g)). This causes dimensional deviations and significantly shortens the distance between the contact opening and the gate, affecting the performance of the semiconductor device.

[0004] Therefore, a method that can solve the above problems is needed. Summary of the Invention

[0005] The main purpose of this application is to propose a method for manufacturing a semiconductor device, aiming to simplify the process steps of forming contact openings.

[0006] To achieve the above objectives, the present application proposes a method for manufacturing a semiconductor device, the method comprising:

[0007] A mask layer and a photoresist layer are sequentially arranged above the target layer;

[0008] forming a plurality of first cutouts in the photoresist layer to form a plurality of first exposed areas in the mask layer;

[0009] forming a plurality of mask layer blocking regions in the plurality of first exposed regions of the mask layer by reaction;

[0010] forming a plurality of second cutouts in the photoresist layer to form a plurality of second exposed areas in the mask layer;

[0011] The target layer is etched according to the plurality of mask layer blocking regions and the plurality of second exposed regions to form a plurality of contact openings around the gate region of the target layer.

[0012] In this embodiment, multiple mask layer blocking regions are first formed in the mask layer, and then multiple second cuts are formed in the photoresist layer to form second exposed regions in the mask layer. Subsequently, the target layer is etched based on the multiple mask layer blocking regions and the multiple second exposed regions to form multiple contact openings around the gate region of the target layer. This greatly simplifies the process steps for forming the contact openings and improves process efficiency.

[0013] In one embodiment, the photoresist layer includes: a first top photoresist layer, a middle photoresist layer, and a bottom photoresist layer sequentially disposed on the mask layer, and forming a plurality of first cuts in the photoresist layer includes:

[0014] Disposing a plurality of first incision patterns on the first top photoresist layer;

[0015] The top photoresist layer, the middle photoresist layer and the bottom photoresist layer are etched along the first cut patterns to form a plurality of first cuts in the middle photoresist layer and the bottom photoresist layer and remove the first top photoresist layer.

[0016] In this embodiment, since the photoresist layer only includes a first top photoresist layer, an intermediate photoresist layer, and a bottom photoresist layer, the number of intermediate photoresist layers is reduced compared to the prior art. This greatly simplifies the process steps for forming the contact openings, improving process efficiency. Furthermore, since there is no second intermediate photoresist layer, the problem of deformation and distortion of the bottom cutout sidewalls in sparse areas when forming the bottom cutout based on the patterned second intermediate photoresist layer is avoided.

[0017] In one embodiment, before forming a plurality of second cuts in the photoresist layer, the method further includes:

[0018] Filling the first cutouts with photoresist material to form a second top photoresist layer on the middle photoresist layer.

[0019] In one embodiment, forming a plurality of second cuts in the photoresist layer includes:

[0020] Uniformly disposing a plurality of second incision patterns on the second top photoresist layer;

[0021] The second top photoresist layer, the middle photoresist layer and the bottom photoresist layer are etched along the second cut patterns to uniformly form a plurality of second cuts in the middle photoresist layer and the bottom photoresist layer.

[0022] In this embodiment, multiple uniform second cuts are formed in this manner to form multiple second exposed areas in the mask layer. Subsequently, the target layer is etched based on the multiple mask layer blocking areas and the multiple second exposed areas to uniformly form multiple contact openings around the gate region of the target layer. Because the multiple uniform second cuts are formed, multiple contact openings can also be uniformly formed around the gate region. This results in vertical sidewalls for the contact openings, resolving the issue in prior art where the tapered sidewalls of the contact openings shorten the gap between the contact opening and the gate, impacting the performance of the semiconductor device.

[0023] In one embodiment, the first incision and the second incision partially cross and overlap.

[0024] In one embodiment, the second cutout portion is in a strip shape.

[0025] In one embodiment, the first cutout portion is island-shaped.

[0026] In one embodiment, the method further includes: filling the contact opening with a conductive material.

[0027] In one embodiment, the reaction includes: a chemical or physical reaction, wherein the chemical or physical reaction includes a carbonization reaction, an oxidation reaction, a nitridation reaction, or doping.

[0028] In one embodiment, the reaction is carried out in at least one of the following ways:

[0029] 1) The mask layer is made of tungsten, and a corresponding carbon-tungsten compound is formed through the carbonization reaction;

[0030] 2) The mask layer is made of tungsten, and a tungsten-carbon material is formed by the carbon doping;

[0031] 3) The mask layer is made of titanium, and titanium oxide is formed through the oxidation reaction;

[0032] 4) The mask layer is made of titanium, and titanium nitride is formed through the nitridation reaction;

[0033] 5) The mask layer is made of titanium nitride, and titanium oxide is formed through the oxidation reaction.

[0034] In one embodiment, the target layer includes a substrate layer and a dielectric layer disposed in sequence, the contact opening penetrates the dielectric layer and extends to the substrate layer, and the gate region is disposed on the substrate layer and within the dielectric layer.

[0035] In one embodiment, the material of the mask layer includes one or more of the following: titanium, titanium nitride, tantalum, tantalum nitride, tungsten, tungsten carbide, silicon nitride, boron nitride, and silicon carbide.

[0036] The present application also provides a semiconductor device, which is manufactured using the above-mentioned manufacturing method. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying any creative work.

[0038] 1(a)-(g) are schematic diagrams showing a method for manufacturing a semiconductor device in the prior art;

[0039] 2( a )-( j ) are schematic diagrams illustrating a method for manufacturing a semiconductor device according to an embodiment of the present application.

[0040] Description of Figure Numbers:

[0041]

[0042]

[0043] The purpose, features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0044] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0045] It should be noted that if the embodiments of the present application involve directional indications (such as up, down, left, right, front, back, etc.), such directional indications are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0046] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present application, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the fact that they can be implemented by ordinary technicians in this field. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by this application.

[0047] The formation of contact openings herein requires some patterning processes to pattern contact openings for forming conductive features in a target layer 100 of a semiconductor device. For example, contact openings that can be connected to metal layers in a semiconductor device, such as contact openings for forming source / drain contacts or gate contacts, can be formed through a patterning process. According to some embodiments, a pattern can be transferred to a hard mask layer using photoetching and a patterned four-layer photoresist design. Subsequently, a conductive material can be filled in the contact openings of the target layer to define the conductive features. Some conductive features can have a fine pitch, or some cuts can have a fine pitch.

[0048] The following is a method for manufacturing a semiconductor device specifically used in this application.

[0049] 2( a )-( i ) are schematic diagrams illustrating a method for manufacturing a semiconductor device according to an embodiment of the present application.

[0050] As shown in FIG. 2( a ), a mask layer 110 and a photoresist layer 120 are sequentially disposed above the target layer 100 .

[0051] A mask layer 110 (e.g., a hard mask layer) is formed over the target layer 100. The hard mask layer 110 may be made of a material including a metal and / or a metalloid. The metal may be titanium nitride, titanium, tantalum nitride, tantalum, a metal-doped carbide (e.g., tungsten carbide), or the like. The metalloid may be silicon nitride, boron nitride, silicon carbide, or the like.

[0052] It should be understood that the target layer 100 may include: a substrate layer 101, a first dielectric layer 102, an etch stop layer 103, and a second dielectric layer 104, which are arranged in sequence. The substrate layer may include an active region (not shown). A gate region 105 is provided above the substrate layer and in the first dielectric layer 102. The substrate layer 101 is in physical contact with the etch stop layer 103, and any number of intervening layers may be provided between the substrate layer 101 and the etch stop layer 103. These intervening layers may include other dielectric layers, and these intervening layers may include contact plugs, conductive lines, and / or vias, or may include one or more adjustment layers (e.g., an etch stop layer, an adhesive layer, etc.), combinations thereof, and the like. The first dielectric layer 102 may be formed of an oxide such as silicon oxide, phospho-silicate glass (PSG), boro-silicate glass (BSG), boron-doped phospho-silicate glass (BPSG), undoped silicate glass (USG), tetraethoxysilane (TEOS) oxide, or the like. The formation method includes chemical vapor deposition (CVD), flow chemical vapor deposition (FCVD), spin coating, or the like.

[0053] The photoresist layer 120 may include a bottom photoresist layer 121 , a middle photoresist layer 122 and a first top photoresist layer 123 a .

[0054] As shown in FIG2( b ), a plurality of first incision patterns A are formed on the first top photoresist layer 123 a. The first top photoresist layer 123 a is etched along the plurality of first incision patterns to transfer the plurality of first incision patterns A to the intermediate photoresist layer 122, and the first top photoresist layer 123 a is removed. It should be noted that the process of forming the first incision patterns is similar to that of the prior art. However, because the first incision patterns are primarily intended to form scattered sheet-like / island-like blocking regions of the mask layer, their dimensional precision requirements are not high, and therefore, they do not affect the subsequent formation of the second incisions.

[0055] As shown in FIG. 2( c ), the intermediate photoresist layer 122 and the bottom photoresist layer 121 are etched along the first cutout patterns on the intermediate photoresist layer 122 to form a plurality of first cutouts 120 a in the intermediate photoresist layer 122 and the bottom photoresist layer 121 , thereby forming a plurality of first exposed regions in the mask layer 110 .

[0056] As shown in FIG2(d), a plurality of mask layer blocking regions 111 are formed in the plurality of first exposed regions of the mask layer 110 through reaction. It is understood that the reaction may be a chemical or physical reaction, and the chemical or physical reaction may include carbonization, oxidation, nitridation, or doping.

[0057] The mask layer material after the reaction conversion must have a high selectivity ratio with the original mask layer material. Specifically, in the carburization reaction, the mask layer can be made of tungsten, and the corresponding carbon tungsten compound is formed through the carburization reaction; in the oxidation reaction, the mask layer can be made of titanium nitride and / or titanium, and converted into titanium oxide through oxidation; in the nitridation reaction, the mask layer can be made of titanium, and converted into titanium nitride through nitridation; in the doping reaction, the mask layer can be made of tungsten doped with carbon. The doping method has the advantage of being easily adjustable, for example, 80% tungsten and 20% carbon, or 90% tungsten and 10% carbon, etc. Preferably, the materials of the blocking area and non-blocking area of ​​the mask layer are titanium oxide and titanium nitride, respectively.

[0058] As shown in FIG. 2( e ), a photoresist material is filled into the plurality of first cutouts 120 a to form a second top photoresist layer 123 b on the plurality of first cutouts 120 a and the intermediate photoresist layer 122 .

[0059] As shown in FIG. 2( f ), a plurality of second cut patterns B are uniformly disposed in the second top photoresist layer 123 b , and the second top photoresist layer 123 b is etched along the plurality of second cut patterns B to transfer the plurality of second cut patterns to the intermediate photoresist layer 122 .

[0060] As shown in FIG2(g), the middle photoresist layer 122 and the bottom photoresist layer 121 are etched along the multiple second incision patterns B on the middle photoresist layer 122, and multiple second incisions 120b are uniformly formed on the middle photoresist layer 122 and the bottom photoresist layer 121 to form multiple second exposed areas in the mask layer. At the same time, the second top photoresist layer 123b and the photoresist material filled in the multiple first incisions 120a are removed, and the blocking area of ​​the mask layer is exposed.

[0061] As shown in FIG. 2( h ), the mask layer and the first dielectric layer are etched according to the plurality of second exposed regions and the blocking regions of the mask layer.

[0062] In the present application, multiple second cuts are uniformly formed on the middle photoresist layer 122 and the bottom photoresist layer 121 to form multiple second exposure areas in the mask layer, so that the mask layer and the target layer are subsequently etched according to the multiple mask layer blocking areas and the multiple second exposure areas to form multiple contact openings in the target layer.

[0063] Because the mask layer blocking regions are pre-set in the mask layer, the etching rates of the materials in the blocking regions and the non-blocking regions of the mask layer are inconsistent. As a result, when the mask layer is etched according to the multiple second cuts, the blocking regions of the mask layer do not form corresponding openings, and the non-blocking regions are patterned accordingly according to the multiple second cuts, thereby completing the preset pattern of the subsequent conductive components. Moreover, because the cuts formed in the photoresist layer are evenly distributed, for example, comparing Figures 1(e) and 2(f), the sidewalls of the cuts formed in the mask layer according to the photoresist layer pattern can be vertical, that is, the sidewalls of the contact openings formed are vertical, which solves the problem in the prior art that the sidewalls of the contact openings have a tapered profile, resulting in a shortened gap between the contact opening and the gate, which affects the performance of the semiconductor device.

[0064] As shown in FIG. 2( i ), the target layer is further etched along the patterned mask layer and the first dielectric layer to form a plurality of contact openings 130 in the target layer.

[0065] As shown in FIG. 2( j ), a conductive material is deposited within the plurality of contact openings 130 of the target layer and over the devices forming the contact openings, and the mask layer is removed by planarization to expose the first dielectric layer and form conductive features 131 .

[0066] It should be understood that, as shown in FIG. 1( f ) and ( g ), the sidewalls of the openings in the photoresist layer and the contact opening 130 formed in the target layer in the prior art are deformed and twisted (eg, tapered).

[0067] As shown in FIG. 2( g )-( i ), the sidewalls formed by the opening of the photoresist layer and the contact opening 130 formed in the target layer are vertical straight surfaces.

[0068] The technical solution provided in this application is to first form multiple incision patterns (first incision patterns) and then form a line pattern (second incision pattern), so that when the mask layer and the target layer are etched along the line pattern, the side wall plane of the formed contact opening can be made vertical, thereby avoiding deformation and distortion of the side wall.

[0069] The above description is merely an optional embodiment of the present application and does not limit the patent scope of the present application. Any equivalent structural transformation made by using the contents of the present application specification and drawings under the application concept of the present application, or directly / indirectly applied in other related technical fields, is included in the patent protection scope of the present application.

Claims

1. A method for manufacturing a semiconductor device, characterized in that: The production method comprises: A mask layer and a photoresist layer are sequentially arranged above the target layer; forming a plurality of first cutouts in the photoresist layer to form a plurality of first exposed areas in the mask layer; forming a plurality of mask layer blocking regions in the first exposed region of the mask layer by reaction, wherein the mask layer blocking regions extend from a surface of the mask layer to a certain depth within the mask layer, and a material of the mask layer blocking regions has a different etching rate from a material of the mask layer; uniformly forming a plurality of second cutouts in the photoresist layer to form a plurality of second exposed areas in the mask layer; The target layer is etched according to the plurality of mask layer blocking regions and the plurality of second exposed regions to form a plurality of contact openings in the target layer, wherein the contact openings are not formed in regions of the target layer below the mask layer blocking regions.

2. The production method according to claim 1, characterized in that The photoresist layer includes: a first top photoresist layer, a middle photoresist layer, and a bottom photoresist layer sequentially arranged on the mask layer, and forming a plurality of first cuts in the photoresist layer includes: Disposing a plurality of first incision patterns on the first top photoresist layer; The first top photoresist layer, the middle photoresist layer and the bottom photoresist layer are etched along the first cut patterns to form a plurality of first cuts in the middle photoresist layer and the bottom photoresist layer and remove the first top photoresist layer.

3. The production method according to claim 2, characterized in that: Before forming a plurality of second cuts in the photoresist layer, the method further includes: Filling the first cutout with a photoresist material to form a second top photoresist layer on the middle photoresist layer.

4. The production method according to claim 3, characterized in that: Forming a plurality of second cuts in the photoresist layer comprises: Disposing a plurality of second incision patterns on the second top photoresist layer; The second top photoresist layer, the middle photoresist layer and the bottom photoresist layer are etched along the second cut patterns to uniformly form a plurality of second cuts in the middle photoresist layer and the bottom photoresist layer.

5. The production method according to any one of claims 1 to 4, characterized in that: The first incision and the second incision partially cross and overlap.

6. The production method according to any one of claims 1 to 4, characterized in that: The second cutout portion is in a strip shape.

7. The production method according to any one of claims 1 to 4, characterized in that: The first cutout portion is in an island shape.

8. The production method according to any one of claims 1 to 4, characterized in that: The reaction includes: a chemical or physical reaction, wherein the chemical reaction includes a carbonization reaction, an oxidation reaction or a nitridation reaction, and the physical reaction includes doping.

9. The production method according to claim 8, characterized in that: The reaction adopts at least one of the following methods: 1) The mask layer is made of tungsten, and a corresponding carbon-tungsten compound is formed through the carbonization reaction; 2) The mask layer is made of tungsten and is doped with carbon to form a tungsten-carbon material; 3) The mask layer is made of titanium, and titanium oxide is formed through the oxidation reaction; 4) The mask layer is made of titanium, and titanium nitride is formed through the nitridation reaction; 5) The mask layer is made of titanium nitride, and titanium oxide is formed through the oxidation reaction.

10. A semiconductor device, characterized in that: The semiconductor device is manufactured using the manufacturing method according to any one of claims 1 to 9.

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