Power consumption adjustment method and device, storage medium, processor and electronic device

Abstract

Embodiments of the present application disclose a power consumption adjustment method, device, storage medium, processor and electronic device, wherein the power consumption adjustment method comprises: determining a delay requirement of task processing according to a current use scenario; determining a system load within a preset time length with a current time as an end time; determining a corresponding power consumption mode according to the delay requirement and the system load; and adjusting voltage and frequency of a processor according to the power consumption mode to adjust power consumption of the processor. The embodiments of the present application automatically adjust voltage and frequency of the processor according to the power consumption mode determined according to the delay requirement and the system load, and automatically adjust power consumption of the processor by automatically adjusting voltage and frequency of the processor, thereby effectively reducing power consumption of the processor on the premise of ensuring normal operation of the processor.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronics, and in particular to a power consumption adjustment method and device, a storage medium, a processor and an electronic device. BACKGROUND

[0002] A processor is the operation core and control core of a product, and the performance of the processor directly affects the performance of the product. In today's booming development of processor products, the performance of the processor has become an important indicator for people to measure the quality of products. With the improvement of the performance requirements of related products, improving the performance of the processor has become the direction of efforts for designers.

[0003] At present, designers use various advanced technologies to design processors to improve their performance. However, with the improvement of the performance of the processor, its power consumption also significantly increases. SUMMARY

[0004] Embodiments of the present application provide a power consumption adjustment method and device, a storage medium, a processor and an electronic device, which can reduce the power consumption of the processor.

[0005] Embodiments of the present application provide a power consumption adjustment method, wherein the power consumption adjustment method comprises:

[0006] determining a delay requirement of task processing according to a current use scenario;

[0007] determining a system load within a preset time length with a current time as an ending time;

[0008] determining a corresponding power consumption mode according to the delay requirement and the system load;

[0009] adjusting the voltage and frequency of the processor according to the power consumption mode to adjust the power consumption of the processor.

[0010] Embodiments of the present application also provide a power consumption adjustment device, wherein the power consumption adjustment device comprises:

[0011] a delay determination module configured to determine a delay requirement of task processing according to a current use scenario;

[0012] a load determination module configured to determine a system load within a preset time length with a current time as an ending time;

[0013] a power consumption determination module configured to determine a corresponding power consumption mode according to the delay requirement and the system load;

[0014] a power consumption adjustment module configured to adjust the voltage and frequency of the processor according to the power consumption mode to adjust the power consumption of the processor.

[0015] The embodiment of the present application further provides a storage medium, wherein the storage medium stores a computer program, and when the computer program runs on a computer, the computer is caused to execute the steps in any power consumption adjustment method provided by the embodiment of the present application.

[0016] The embodiment of the present application further provides a processor for executing the steps in any power consumption adjustment method provided by the embodiment of the present application.

[0017] The embodiment of the present application further provides an electronic device, wherein the electronic device comprises a processor and a memory, the memory stores a computer program, and the processor executes the steps in any power consumption adjustment method provided by the embodiment of the present application by calling the computer program stored in the memory.

[0018] In the embodiment of the present application, first, the delay requirement of task processing is determined according to the current use scenario; the system load in a preset time length with the current time as the end time is determined; then the corresponding power consumption mode is determined according to the delay requirement and the system load; and further, the voltage and frequency of the processor are adjusted according to the power consumption mode. The voltage and frequency of the processor are automatically adjusted according to the power consumption mode determined according to the delay requirement and the system load, the power consumption of the processor is automatically adjusted by automatically adjusting the voltage and frequency of the processor, and thus the power consumption of the processor is effectively reduced on the premise of ensuring the normal work of the processor. BRIEF DESCRIPTION OF DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0020] Figure 1 The first flowchart of the power consumption adjustment method provided by the embodiment of the present application.

[0021] Figure 2 The processor cache diagram provided by the embodiment of the present application.

[0022] Figure 3 The second flowchart of the power consumption adjustment method provided by the embodiment of the present application.

[0023] Figure 4 The third flowchart of the power consumption adjustment method provided by the embodiment of the present application.

[0024] Figure 5 The working flowchart of the temperature arbitration module provided by the embodiment of the present application.

[0025] Figure 6 The first structural schematic diagram of the power consumption adjustment device provided by the embodiment of the present application is shown.

[0026] Figure 7 The second structural schematic diagram of the power consumption adjustment device provided by the embodiment of the present application is shown.

[0027] Figure 8 The first structural schematic diagram of the electronic device provided by the embodiment of the present application is shown.

[0028] Figure 9 The second structural schematic diagram of the electronic device provided by the embodiment of the present application is shown.

[0029] Figure 10 The structural schematic diagram of the integrated circuit chip provided by the embodiment of the present application is shown. DETAILED DESCRIPTION

[0030] The technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all the embodiments obtained by a person skilled in the art without creative effort belong to the scope of protection of the present application.

[0031] The terms “first”, “second”, “third”, and the like (if any) in the specification and claims of the present application and the above drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or a chronological sequence. It should be understood that the objects thus described can be interchanged under appropriate circumstances. In addition, the terms “include” and “have” and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, or device, processor, electronic device, system including a series of steps, or a series of modules or units, does not necessarily limit to the clearly listed steps or modules and units, but can also include steps or modules and units not clearly listed, and can also include other steps or modules and units inherent to the process, method, device, processor, electronic device, or system.

[0032] The embodiment of the present application provides a power consumption adjustment method, which can be applied to a processor. The execution subject of the power consumption adjustment method can be a power consumption adjustment device provided by the embodiment of the present application, or a processor integrated with the power consumption adjustment device. The power consumption adjustment device can be realized in the form of hardware or software. The processor can be configured in an electronic device such as a smart phone, a tablet computer, a palm computer, a notebook computer, or a desktop computer, or can be configured on an integrated circuit chip.

[0033] Please refer to Figure 1 ,Figure 1 A first flowchart of a power consumption adjustment method provided by an embodiment of the present application. The execution subject of the power consumption adjustment method can be a power consumption adjustment apparatus provided by an embodiment of the present application, or a processor integrated with the power consumption adjustment apparatus. The power consumption adjustment method provided by an embodiment of the present application can include the following steps:

[0034] 110, determining a latency requirement of task processing according to a current use scenario.

[0035] In order to adjust the power consumption of a processor while ensuring the performance of the processor, factors affecting the performance or power consumption of the processor need to be counted. Latency is an important factor affecting the performance of the processor.

[0036] Latency, also referred to as clock delay, refers to the delay between input data and output results (results of the data after a series of processing). For example, the data is valid after 1 or more clocks relative to a certain clock start position. Latency is measured in clocks and determines the response speed of signal processing.

[0037] Latency requirement refers to how much latency a processor needs to respond to signal processing in a certain use scenario. The latency requirement of a system is determined by the use scenario of the system. Different use scenarios correspond to different tasks, and different tasks require different latency requirements. However, the use scenarios of a system are various. In an embodiment, the current use scenario is obtained in real time, and the latency requirement of task processing is determined according to the current use scenario.

[0038] For example, a user opens an application program. In order to ensure the performance and avoid lag, the application program needs to be opened in a very short time. Therefore, for the use scenario of "opening an application program", the processor needs to respond quickly and requires low latency. If the user is reading an e-book and has not turned the page, the speed of the processor does not affect the user's reading. Therefore, for the use scenario of "reading an e-book", low latency is not required.

[0039] The current use scenario is polled at intervals, and the latency requirement of task processing is determined according to the current use scenario. The faster the response speed is required in a use scenario, the lower the latency requirement is.

[0040] In an embodiment, if it is found that multiple use scenarios are included at a certain moment after polling, the delay requirement is determined according to the use scenario with the lowest current delay requirement. For example, the screen can be in a split-screen display state, the user reads an e-book in a first split-screen display area, and opens a new application in a second split-screen display area. At this time, both the use scenario of "reading an e-book" and the use scenario of "opening an application" are included, and it is determined that the delay requirement is the low delay requirement corresponding to the use scenario of "opening an application", so that the user can normally read the e-book and the application can be quickly opened.

[0041] 120, determining a system load in a preset time length ending at the current moment.

[0042] The system load (workload) refers to the total number of processes currently being executed by the processor and waiting to be executed by the processor, and is an important indicator reflecting the busy degree of the system. Since the processor will cause power consumption when executing a process, the system load is an important factor affecting the power consumption of the processor. The greater the system load, the greater the power consumption caused.

[0043] The system load determined in the embodiments of the present application is the system load in a period of time. The period of time can be a preset time length ending at the current moment. For convenience of description, the preset time length ending at the current moment will be referred to as the preset time period below.

[0044] The system load in the preset time period is determined, that is, the total number of processes executed by the processor and waiting to be executed at the current time in the preset time length is determined.

[0045] In an embodiment, the system load can be calculated by increasing a signal counter on the hardware. For example, if the load of the processor in the preset time period needs to be estimated, a performance monitor can be added inside the hardware processor to estimate the system load. For example, when the processor accesses the cache, a counter can be used to count the access times of the processor, the access times of the cache in the preset time period are obtained, an access count value in the preset time period is obtained, and the system load in the preset time period is obtained according to the access count value in the preset time period.

[0046] For example, the system load in the preset time period is related to the access frequency of the processor to the processor cache in the preset time period.

[0047] The processor cache is a temporary memory located between the processor and the memory, and its capacity is much smaller than that of the memory but the exchange speed is much faster than that of the memory. The data in the cache is a small part of the memory, but this small part is the data to be accessed by the processor in a short time. When the processor calls a large amount of data, the data can be called from the cache first, thereby speeding up the reading speed.

[0048] Please refer to Figure 2 , Figure 2 The processor cache schematic diagram provided by the embodiment of the application shows the data exchange process between the processor and the cache and between the cache and the memory. According to the data reading order and the closeness to the processor, the processor cache can be divided into a first-level cache, a second-level cache, and a third-level cache for some processors. All the data stored in each level of cache is part of the next level of cache. When the processor reads a data, it first searches the first-level cache, and if not found, searches the second-level cache, and if still not found, searches the third-level cache or the memory. The first-level cache is the most important part of the entire processor cache architecture, and 80% of the total data amount can be found in the first-level cache. The data exchange speed between the processor and the first-level cache is the fastest among the various data exchange modes.

[0049] The first-level cache is divided into a first-level instruction cache and a first-level data cache. The first-level data cache is used to store data, and the first-level instruction cache is used to decode the instructions for executing the data. Both can be accessed by the processor at the same time.

[0050] In an embodiment, the access times of the counter to the first-level instruction cache and the data cache in a preset time period can be obtained to obtain the access count value of the preset time period, and the system load of the preset time period can be obtained according to the access count value of the preset time period.

[0051] In an embodiment, the load can also be calculated according to the ratio of the idle time and the working time of the processor. For example, if the processor works all the time in a preset time period, the load at this time can be considered as 1, and if the processor works only 50% of the time in a preset time period, the load at this time can be considered as 0.5. That is, the step of determining the system load of the preset time period can include:

[0052] The idle time length and the working time length of the processor in the preset time period are obtained. The idle time length is the time length during which the processor is in an idle state, and the working time length is the time length during which the processor is in a working state. When the processor processes a task, the processor is in a working state, and when the processor finishes processing a task and has not received the next task, the processor is in an idle state.

[0053] The ratio of the idle time length and the working time length is calculated.

[0054] The system load of the preset time period is determined according to the ratio of the idle time length and the working time length.

[0055] 130, the corresponding power consumption mode is determined according to the delay requirement and the system load.

[0056] After the delay requirement and the system load of the preset time period are determined, the corresponding power consumption mode can be determined by looking up a table. The table can be a first mapping table of the power consumption mode and the delay requirement, the system load, which is defined in advance.

[0057] Please refer to Table 1, which is a schematic diagram of the first mapping table provided by the embodiment of the present application.

[0058] Power consumption mode Latency requirements, system load Voltage Frequency S1 L1, W1 V1 P1 S2 L2, W2 V2 P2 S3 L3, W3 V3 P3 S4 L4, W4 V4 P4

[0059] Table 1

[0060] Four power consumption modes, S1, S2, S3 and S4, are shown in Table 1, each of which corresponds to a combination of a delay requirement and a system load. The power consumption mode S1 corresponds to the delay requirement L1 and the system load W1, the power consumption mode S2 corresponds to the delay requirement L2 and the system load W2, the power consumption mode S3 corresponds to the delay requirement L3 and the system load W3, and the power consumption mode S4 corresponds to the delay requirement L4 and the system load W4.

[0061] It should be noted that L1, W1, etc. can not be a specific value, but an interval. L1, L2, L3 and L4 are delay intervals, and W1, W2, W3 and W4 are load intervals. When the delay requirement is in the delay interval L1 and the system load of the preset time period is in the load interval W1, the corresponding power consumption mode S1 is determined. When the delay requirement is in the delay interval L2 and the system load of the preset time period is in the load interval W2, the corresponding power consumption mode S2 is determined. Similarly, the corresponding power consumption mode can be determined.

[0062] That is, the step of determining the corresponding power consumption mode according to the delay requirement and the system load of the preset time period can include:

[0063] determining the delay interval in which the delay requirement is located;

[0064] determining the load interval in which the system load is located;

[0065] obtaining a preset first mapping table, which contains the corresponding relationship between the power consumption mode and the delay interval and the load interval;

[0066] determining the power consumption mode corresponding to the delay interval and the load interval according to the corresponding relationship.

[0067] In an embodiment, the first mapping table is obtained by training. The voltage and frequency of the processor under different delay requirements and system loads can be collected in advance, the power consumption of the processor under different delay requirements and system loads is determined according to the voltage and frequency of the processor, and the delay interval and the load interval corresponding to the divided power consumption modes are determined according to the amount of power consumption.

[0068] 140. Adjust the processor's voltage and frequency according to the power consumption mode to regulate the processor's power consumption.

[0069] Based on the training results, appropriate voltages and frequencies can be set for different power consumption modes. When a certain power consumption mode is determined to be used, the voltage and frequency corresponding to that power consumption mode are obtained, and the processor's voltage and frequency are adjusted to match the voltage and frequency of that power consumption mode.

[0070] Please refer to Table 1. According to Table 1, when the latency requirement is in the latency range L1 and the system load is in the load range W1, the corresponding power consumption mode is determined to be S1, the processor voltage is adjusted to V1, and the processor frequency is adjusted to P1; when the latency requirement is in the latency range L2 and the system load is in the load range W2, the corresponding power consumption mode is determined to be S2, the processor voltage is adjusted to V1, and the processor frequency is adjusted to P1; and so on.

[0071] In one embodiment, the processor has different voltage and frequency levels. When the processor's voltage and frequency are adjusted to the voltage and frequency corresponding to the power consumption mode, the PMU can be controlled by software to switch the processor to the corresponding voltage and frequency level. That is, the voltage and frequency (voltage and frequency corresponding to each power consumption mode) in the first mapping table are not arbitrarily set values, but correspond to the processor's voltage and frequency levels, thus facilitating adjustment. For example, V1 to V4 in Table 1 above can be the processor's voltage levels, and P1 to P4 can be the processor's frequency levels.

[0072] Since the power consumption of a processor changes with voltage and frequency, higher voltage or higher frequency means higher power consumption. Therefore, by adjusting the voltage and frequency of the processor, the power consumption of the processor can be regulated.

[0073] It should be noted that the power consumption mode and the adjusted voltage and frequency determined in this application embodiment are not fixed, but will change in real time according to the current actual situation. In one embodiment, the usage scenario and system load within a preset time period are polled in real time at regular intervals to switch to different power consumption modes as needed. This preset time period can be 1 second or shorter. For example, if a user is reading an e-book one second and then opens a video application to watch a video the next second, the processor will detect through real-time polling that the current usage scenario and system load have changed compared to the previous preset time period, and thus switch the power consumption mode from S1 to S2 to balance performance and power consumption.

[0074] In an embodiment, the power consumption adjustment method provided by the present application can be implemented in a hardware manner, i.e., the processor mentioned above can refer to a hardware accelerated processor. The hardware accelerated processor adopts a hardware acceleration technology, and distributes a very large amount of work to a special hardware to process so as to reduce the workload of the central processor. Implementing the power consumption adjustment method provided by the embodiment of the present application in a hardware manner can realize high-speed power consumption adjustment processing.

[0075] According to the method described in the previous embodiment, the following is further described in detail.

[0076] Please refer to Figure 3 , Figure 3 The second flowchart of the power consumption adjustment method provided by the embodiment of the present application. The power consumption adjustment method can be applied to the processor provided by the embodiment of the present application, and the power consumption adjustment method provided by the embodiment of the present application can include the following steps:

[0077] 201, obtaining the temperature of the processor.

[0078] In order to adjust the power consumption of the processor while ensuring the performance of the processor, it is necessary to count the factors that affect the performance or power consumption of the processor. The temperature is an important factor that affects the performance and power consumption of the processor.

[0079] The processor has a temperature limit. Within the normal use temperature, the performance of the processor can be normally played, and when the temperature is too high, the processor may be forced to shut down, affecting the use. Therefore, the real-time temperature of the processor is obtained through the temperature sensor, and it is determined whether to adjust the voltage and frequency of the processor according to the temperature.

[0080] 202, determining whether the temperature of the processor is less than the temperature threshold. If yes, go to step 203. If no, go to step 210.

[0081] The pre-set temperature threshold is obtained, and it is determined whether the temperature of the processor is less than the temperature threshold. Only when the temperature of the processor is less than the temperature threshold, the power consumption mode is determined according to the delay requirement and the system load, and the voltage and frequency of the processor are adjusted accordingly. When the temperature of the processor is greater than or equal to the pre-set threshold, the voltage and frequency of the processor are adjusted according to the temperature of the processor.

[0082] 203, determining the delay requirement of task processing according to the current use scenario.

[0083] The delay is also an important factor affecting the performance of the processor.

[0084] Latency is the delay of a clock, which refers to the time delay between input data and output result (the result of the data after a series of processing). The latency is in clock units, which determines the response speed of signal processing.

[0085] The latency requirement refers to how much latency the processor needs to respond to signal processing in a certain use scenario. The latency requirement of the system is determined by the use scenario of the system. Different use scenarios correspond to different tasks, and the latency requirement of task processing is different. The use scenarios of the system are various. In an embodiment, the current use scenario needs to be obtained in real time when the temperature is less than the temperature threshold, and the latency requirement of task processing is determined according to the current use scenario.

[0086] For example, the user opens a certain application program. In order to ensure the performance and avoid lag, the application program needs to be opened in a very short time. Therefore, for the use scenario of "opening an application program", the processor needs to respond quickly and requires low latency in a very short time. If the user is reading an e-book and has not turned the page, the speed of the processor response does not affect the user's reading. At this time, for the use scenario of "reading an e-book", low latency is not required.

[0087] The current use scenario is polled every certain period of time, and the latency requirement of task processing is determined according to the current use scenario. The faster the response speed is required in the use scenario, the lower the latency requirement is.

[0088] In an embodiment, if it is found that there are multiple use scenarios at a certain moment after polling, the latency requirement is determined according to the use scenario with the lowest current latency requirement. For example, the screen may be in a split-screen display state, the user reads an e-book in the first split-screen display area, and opens a new application in the second split-screen display area. At this time, the current use scenario includes both "reading an e-book" and "opening an application program". Therefore, it is determined that the latency requirement is the low latency requirement corresponding to the use scenario of "opening an application program", so that the user can normally read the e-book and the application program can be quickly opened.

[0089] 204、Determine the system load within a preset time length ending at the current time.

[0090] The system load refers to the total number of processes currently being executed by the processor and waiting to be executed by the processor, which is an important indicator reflecting the busy degree of the system. Since the processor will cause power consumption when executing the process, the system load is an important factor affecting the power consumption of the processor. The greater the system load, the greater the power consumption.

[0091] The system load determined in the embodiments of the present application is the system load in a period of time. The period of time can be a preset time length ending at the current time, also referred to as a preset time period. The system load in the preset time period is determined, i.e., the total number of processes executed by the processor in the preset time length and waiting to be executed at the current time is determined.

[0092] In an embodiment, the system load can be calculated by increasing a signal counter on hardware, such as the load of the processor in the preset time period needs to be speculated, a performance monitor can be added inside the hardware processor to speculate the system load. For example, when the processor accesses the cache, a counter can be used to count the access times of the processor, the access times of the cache in the preset time period are obtained, an access count value in the preset time period is obtained, and the system load in the preset time period is obtained according to the access count value in the preset time period.

[0093] For example, the system load in the preset time period is related to the access frequency of the processor to the processor cache in the preset time period.

[0094] The processor cache is a temporary memory between the processor and the memory, and its capacity is much smaller than that of the memory but the exchange speed is much faster than that of the memory. The data in the cache is a small part of the memory, but this small part is the data to be accessed by the processor in a short time. When the processor calls a large amount of data, the data can be called from the cache first, thereby speeding up the reading speed.

[0095] Please refer to Figure 2 , Figure 2 The processor cache diagram provided in the embodiments of the present application shows the data exchange process between the processor and the cache and between the cache and the memory. According to the data reading order and the closeness to the processor, the processor cache can be divided into a first-level cache, a second-level cache, and a third-level cache for some processors. All the data stored in each level of cache is a part of the next level of cache. When the processor reads a data, it is first searched in the first-level cache, if not found, it is searched in the second-level cache, if still not found, it is searched in the third-level cache or the memory. The first-level cache is the most important part of the entire processor cache architecture, and 80% of the total data amount can be found in the first-level cache. The data exchange speed between the processor and the first-level cache is the fastest among the various data exchange modes.

[0096] The first-level cache is divided into a first-level instruction cache and a first-level data cache. The first-level data cache is used to store data, and the first-level instruction cache is used to decode the instructions for executing the data, and both of them can be accessed by the processor at the same time.

[0097] In an embodiment, the access count value of the preset time period can be obtained by counting the number of accesses to the instruction cache and the data cache of the first level by the counter in the preset time period, and the system load of the preset time period can be obtained according to the access count value of the preset time period.

[0098] In an embodiment, the load can also be calculated according to the ratio of the idle time and the working time of the processor. For example, if the processor is working all the time in the preset time period, the load at this time can be considered as 1, and if the processor is working only 50% of the time in the preset time period, the load at this time can be considered as 0.5. That is, the step of determining the system load of the preset time period can include:

[0099] obtaining the idle time and the working time of the processor in the preset time period, the idle time being the time length during which the processor is in an idle state, and the working time being the time length during which the processor is in a working state, the processor being in the working state when processing a task, and the processor being in the idle state when processing a task and not receiving a next task;

[0100] calculating the ratio of the idle time and the working time;

[0101] determining the system load of the preset time period according to the ratio of the idle time and the working time.

[0102] 205, determining the delay interval in which the delay requirement is located.

[0103] 206, determining the load interval in which the system load is located.

[0104] 207, obtaining a preset first mapping table, the first mapping table including the correspondence between the power consumption mode and the delay interval and the load interval.

[0105] After the delay requirement and the system load of the preset time period are determined, the corresponding power consumption mode can be determined by looking up the table. The table can be a first mapping table of the power consumption mode and the delay requirement and the system load, which is defined in advance.

[0106] In an embodiment, the first mapping table is obtained by training. The voltage and the frequency of the processor under different delay requirements and system loads can be collected in advance, the power consumption of the processor under different delay requirements and system loads can be determined according to the voltage and the frequency of the processor, a plurality of power consumption modes can be divided according to the amount of power consumption, and the corresponding delay interval and load interval for the divided plurality of power consumption modes can be determined, thereby obtaining the correspondence between the power consumption mode and the delay interval and the load interval.

[0107] It should be noted that the delay requirement and the system load included in the first mapping table can not be a specific value, but can be corresponded in the form of an interval.

[0108] 208、According to the corresponding relationship, the power consumption mode corresponding to the delay interval and the load interval is determined.

[0109] Please continue to refer to the first mapping table shown in Table 1. According to the corresponding relationship in the first mapping table, when the delay requirement is in the delay interval L1 and the system load is in the load interval W1, the corresponding power consumption mode S1 is determined; when the delay requirement is in the delay interval L2 and the system load is in the load interval W2, the corresponding power consumption mode S2 is determined; and so on.

[0110] 209、According to the temperature of the processor, the corresponding power consumption mode is determined.

[0111] When the temperature of the processor is greater than or equal to the temperature threshold, the second mapping table is obtained. The second mapping table is different from the first mapping table, and the second mapping table reflects the corresponding relationship between the temperature and the power consumption mode. Please refer to Table 2, which is a schematic diagram of the second mapping table provided by the embodiment of the present application.

[0112] Table 2, which is a schematic diagram of the second mapping table provided by the embodiment of the present application.

[0113] Power consumption mode Temperature Voltage Frequency S5 T1 V5 P5 S6 T2 V6 P6 S7 T3 V7 P7

[0114] Table 2

[0115] In Table 2, the power consumption modes corresponding to three temperatures and the voltages and frequencies under different power consumption modes are shown. The power consumption mode corresponding to the temperature T1 is S5, the corresponding voltage is V5, and the frequency is P5. The power consumption mode corresponding to the temperature T2 is S6, the corresponding voltage is V6, and the frequency is P6. The power consumption mode corresponding to the temperature T3 is S7, the corresponding voltage is V7, and the frequency is P7.

[0116] It should be noted that T1, T2, and T3 can not be specific numerical values, but intervals. When the temperature of the processor is greater than or equal to the temperature threshold, if the temperature interval in which the temperature of the processor is located is T1, the corresponding power consumption mode S5 is determined; if the temperature interval in which the temperature of the processor is located is T2, the corresponding power consumption mode S6 is determined; and if the temperature interval in which the temperature of the processor is located is T3, the corresponding power consumption mode S7 is determined.

[0117] 210、According to the power consumption mode, the voltage and frequency of the processor are adjusted to adjust the power consumption of the processor.

[0118] According to the training result, appropriate voltages and frequencies can also be set for different power consumption modes. When a certain power consumption mode is determined to be used, the voltage and frequency corresponding to the power consumption mode are obtained, and the voltage and frequency of the processor are adjusted to the voltage and frequency corresponding to the power consumption mode.

[0119] Please refer to Table 1 and Table 2. According to the first mapping table provided by Table 1, when the delay requirement is in delay interval L1 and the system load is in load interval W1, the corresponding power consumption mode S1 is determined, the voltage of the processor is adjusted to V1, and the frequency of the processor is adjusted to P1; when the delay requirement is in delay interval L2 and the system load is in load interval W2, the corresponding power consumption mode S2 is determined, the voltage of the processor is adjusted to V2, and the frequency of the processor is adjusted to P2; and so on.

[0120] According to the second mapping table provided by Table 2, when the temperature is in temperature interval T1, the corresponding power consumption mode S5 is determined, the voltage of the processor is adjusted to V5, and the frequency of the processor is adjusted to P5; when the temperature is in temperature interval T2, the corresponding power consumption mode S6 is determined, the voltage of the processor is adjusted to V6, and the frequency of the processor is adjusted to P6; when the temperature is in temperature interval T3, the corresponding power consumption mode S7 is determined, the voltage of the processor is adjusted to V7, and the frequency of the processor is adjusted to P7.

[0121] The second mapping table provided by Table 2 can be preset by the developer according to the learning and training results of the learning algorithm. To generate the second mapping table, the learning algorithm can be used to evaluate the influence of different voltages and different frequencies on the performance of the processor when the temperature is constant, so as to find appropriate voltages and frequencies for different temperatures. When setting the second mapping table, the temperatures greater than or equal to the temperature threshold are divided into temperature intervals, and appropriate voltages and frequencies are set for each temperature interval. When the voltage and the frequency of the processor are adjusted according to the temperature, the performance of the processor is not affected, and the power consumption is reduced as much as possible.

[0122] In an embodiment, the processor has different voltage levels and frequency levels. When the voltage and the frequency of the processor are adjusted to the voltage and the frequency corresponding to the power consumption mode, the PMU can be controlled by software to switch the processor to the corresponding voltage level and frequency level. That is, the voltages and the frequencies (the voltages and the frequencies corresponding to each power consumption mode) in the first mapping table and the second mapping table are not randomly set values, but correspond to the voltage levels and the frequency levels of the processor, so as to facilitate adjustment. V1 to V4 in Table 1 and V5 to V7 in Table 2 above can be voltage levels of the processor, and P1 to P4 in Table 1 and P5 to P7 in Table 2 above can be frequency levels of the processor.

[0123] Since the power consumption of the processor changes with the change of the voltage and the frequency, the higher the voltage or the higher the frequency, the higher the power consumption of the processor. Therefore, by adjusting the voltage and the frequency of the processor, the power consumption of the processor can be adjusted.

[0124] Please refer to Figure 4 ,Figure 4 A third flowchart of the power consumption adjustment method provided by the embodiments of the present application is shown.

[0125] In an embodiment, the power consumption adjustment method provided by the embodiments of the present application is applied to a hardware acceleration processor, and cooperates with a host processor to adjust the voltage and power of the processor.

[0126] The host processor first identifies the current use scenario. Since the calculation involved in the identification of the scenario is relatively complex, this step can be performed in the host processor. After the host processor identifies the current use scenario, it informs the hardware acceleration processor of the use scenarios through data transmission with the hardware acceleration processor. The delay determination module in the hardware acceleration processor determines the delay requirement of the task processing according to the current use scenario, and the load determination module determines the system load within a preset time period ending at the current time. The two modules jointly initiate a switching request of the voltage and frequency to the power management module. The power management module includes a power consumption determination module and a power consumption adjustment module. The power consumption determination module receives the switching request of the voltage and frequency, determines the corresponding power consumption mode according to the delay requirement determined by the delay determination module and the system load determined by the load determination module, and sends the determined power consumption mode to the power consumption adjustment module. The power consumption adjustment module adjusts the voltage and frequency of the processor according to the power consumption mode to adjust the power consumption of the processor.

[0127] Please refer to Figure 5 , Figure 5 A working flowchart of the temperature arbitration module provided by the embodiments of the present application is shown.

[0128] In addition to the above-mentioned modules, the hardware acceleration processor can also include a temperature arbitration module. The working mode of the temperature arbitration module is as follows: the temperature acquisition system acquires the temperature of the processor according to the parameter change of the temperature sensor, and inputs the acquired temperature of the processor into the temperature arbitration module. After the temperature arbitration module obtains the temperature of the processor, it judges whether the temperature of the processor is less than a temperature threshold, and transmits the judgment result to the power management module. The power management module determines the adjustment mode of the voltage and frequency according to the judgment result of the temperature.

[0129] The adjustment mode of the voltage and frequency is different when the judgment result of the temperature is different. When the temperature of the processor is less than the temperature threshold, the voltage and frequency of the processor are adjusted according to the delay requirement and the system load. When the temperature of the processor is greater than or equal to the temperature threshold, the voltage and frequency of the processor are adjusted according to the temperature. The specific adjustment mode is described in the foregoing embodiments, which will not be described here.

[0130] From the above, the power consumption adjustment method provided by the embodiment of the present application first determines the delay requirement of task processing according to the current use scenario; determines the system load in a preset time length with the current time as the ending time; then determines the corresponding power consumption mode according to the delay requirement and the system load; and further adjusts the voltage and frequency of the processor according to the power consumption mode to adjust the power consumption of the processor. The embodiment of the present application automatically adjusts the voltage and frequency of the processor according to the power consumption mode determined according to the delay requirement and the system load, and realizes the automatic adjustment of the power consumption of the processor through the automatic adjustment of the voltage and frequency of the processor, thereby effectively reducing the power consumption of the processor on the premise of ensuring the normal operation of the processor. Moreover, the temperature condition can be added, and the voltage and frequency of the processor are adjusted from three angles of the system load, the delay requirement and the temperature, thereby achieving the optimal use of system resources and the maximum saving of power consumption.

[0131] The embodiment of the present application also provides a power consumption adjustment device. Please refer to Figure 6 , Figure 6 The first structure diagram of the power consumption adjustment device provided by the embodiment of the present application. Wherein the power consumption adjustment device 300 can be applied to a processor, and the power consumption adjustment device 300 comprises a delay determination module 301, a load determination module 302, a power consumption determination module 303 and a power consumption adjustment module 304, as follows:

[0132] The delay determination module 301 is used for determining the delay requirement of task processing according to the current use scenario;

[0133] The load determination module 302 is used for determining the system load in a preset time length with the current time as the ending time;

[0134] The power consumption determination module 303 is used for determining the corresponding power consumption mode according to the delay requirement and the system load;

[0135] The power consumption adjustment module 304 is used for adjusting the voltage and frequency of the processor according to the power consumption mode to adjust the power consumption of the processor.

[0136] In an embodiment, when determining the system load in a preset time length with the current time as the ending time, the load determination module 302 can be used for:

[0137] Counting the access times of the processor when the processor accesses the cache;

[0138] Obtaining the access times of the processor to the cache in a preset time length with the current time as the ending time to obtain an access count value;

[0139] Obtaining the system load in a preset time length with the current time as the ending time according to the access count value.

[0140] In an embodiment, when determining the system load in a preset time length with the current time as the end time, the load determination module 302 can be configured to:

[0141] obtain the idle time length and the working time length of the processor in the preset time length with the current time as the end time, the idle time length being the time length during which the processor is in an idle state, and the working time length being the time length during which the processor is in a working state, the processor being in the working state when the processor is processing a task, and the processor being in the idle state when the processor has finished processing a task and has not received a next task;

[0142] calculate the ratio of the idle time length and the working time length;

[0143] determine the system load in the preset time length with the current time as the end time according to the ratio of the idle time length and the working time length.

[0144] In an embodiment, when determining the corresponding power consumption mode according to the delay requirement and the system load, the power consumption determination module 303 can be configured to:

[0145] determine the delay interval in which the delay requirement is located;

[0146] determine the load interval in which the system load is located;

[0147] obtain a preset first mapping table, the first mapping table containing the corresponding relationship between the power consumption mode and the delay interval and the load interval;

[0148] determine the power consumption mode corresponding to the delay interval and the load interval according to the corresponding relationship.

[0149] In an embodiment, the first mapping table further includes the voltage and the frequency corresponding to the pre-set power consumption mode, and when adjusting the voltage and the frequency of the processor according to the power consumption mode, the power consumption adjustment module 304 can be configured to:

[0150] obtain the voltage and the frequency corresponding to the power consumption mode;

[0151] adjust the voltage and the frequency of the processor to the voltage and the frequency corresponding to the power consumption mode.

[0152] Please refer to Figure 7 , Figure 7 for the second structural diagram of the power consumption adjustment device 300 provided by the embodiments of the present application. In an embodiment, the power consumption adjustment device 300 further includes a temperature arbitration module 305, and the temperature arbitration module 305 is configured to:

[0153] obtain the temperature of the processor;

[0154] determine whether the temperature of the processor is less than a temperature threshold.

[0155] When the corresponding power consumption mode is determined according to the delay requirement and the system load, the power consumption determination module 303 can be used to:

[0156] When the temperature of the processor is less than the temperature threshold, the corresponding power consumption mode is determined according to the delay requirement and the system load.

[0157] When the temperature of the processor is greater than or equal to the temperature threshold, the corresponding power consumption mode is determined according to the temperature of the processor.

[0158] The specific implementation of each module can refer to the foregoing embodiments, which will not be described here.

[0159] As can be seen from the above, the power consumption adjustment device provided in the embodiments of the present application first determines the delay requirement of task processing according to the current use scenario by the delay determination module 301; determines the system load in a preset time period ending at the current time by the load determination module 302; then determines the corresponding power consumption mode according to the delay requirement and the system load by the power consumption determination module 303; and further adjusts the voltage and frequency of the processor according to the power consumption mode by the power consumption adjustment module 304 to adjust the power consumption of the processor. The embodiments of the present application automatically adjust the voltage and frequency of the processor according to the power consumption mode determined according to the delay requirement and the system load, and automatically adjust the power consumption of the processor by automatically adjusting the voltage and frequency of the processor, so as to effectively reduce the power consumption of the processor on the premise of ensuring the normal operation of the processor.

[0160] The embodiments of the present application also provide an electronic device. The electronic device can be a smart phone, a tablet computer, a game device, an AR (Augmented Reality) device, a car, a vehicle peripheral obstacle detection device, an audio playing device, a video playing device, a notebook, a desktop computing device, a wearable device such as a watch, glasses, a helmet, an electronic bracelet, an electronic necklace, an electronic clothing, and the like.

[0161] Reference Figure 8 , Figure 8 The first structure schematic diagram of the electronic device 400 provided in the embodiments of the present application is shown. The electronic device 400 includes a processor 401 and a memory 402. The memory stores a computer program, and the processor executes the steps in any power consumption adjustment method provided in the embodiments of the present application by calling the computer program stored in the memory. The processor 401 is electrically connected with the memory 402.

[0162] The processor 401 is the control center of the electronic device 400, and connects each part of the entire electronic device through various interfaces and lines, and executes various functions of the electronic device and processes data by running or calling the computer program stored in the memory 402 and calling the data stored in the memory 402, so as to monitor the entire electronic device.

[0163] In this embodiment, the processor 401 in the electronic device 400 can load the instructions corresponding to the processes of one or more computer programs into the memory 402 and run the computer programs stored in the memory 402 by the processor 401 according to the steps in the power consumption adjustment method described above, so as to implement the steps in the power consumption adjustment method described above, for example:

[0164] determine the delay requirement of the task processing according to the current use scenario;

[0165] determine the system load within a preset time length ending at the current time;

[0166] determine the corresponding power consumption mode according to the delay requirement and the system load;

[0167] adjust the voltage and frequency of the processor according to the power consumption mode to adjust the power consumption of the processor.

[0168] Please continue to refer to Figure 9 , Figure 9 The second structural schematic diagram of the electronic device 400 provided in the embodiments of the present application is shown. The electronic device 400 further includes a display screen 403, a control circuit 404, an input unit 405, a sensor 406, and a power supply 407. The processor 401 is electrically connected to the display screen 403, the control circuit 404, the input unit 405, the sensor 406, and the power supply 407, respectively.

[0169] The display screen 403 can be used to display information input by a user or provided to the user and various graphical user interfaces of the electronic device, which can be composed of images, texts, icons, videos, and any combination thereof.

[0170] The control circuit 404 is electrically connected to the display screen 403 and is used to control the display screen 403 to display information.

[0171] The input unit 405 can be used to receive inputted digital, character information, or user feature information (such as a fingerprint), and generate keyboard, mouse, joystick, optical, or trackball signal inputs related to user settings and function controls. For example, the input unit 405 can include a touch sensing module.

[0172] The sensor 406 is used to collect information of the electronic device itself or information of a user or external environment information. For example, the sensor 406 can include a distance sensor, a magnetic field sensor, a light sensor, an acceleration sensor, a fingerprint sensor, a Hall sensor, a position sensor, a gyroscope, an inertial sensor, a posture sensor, a barometer, a heart rate sensor, and the like.

[0173] The power supply 407 is configured to supply power to various components of the electronic device 400. In some embodiments, the power supply 407 can be logically connected to the processor 401 through a power management system, so that the power management system can be used to manage charging, discharging, power consumption management, and the like.

[0174] Although Figure 8 and Figure 9 not shown in FIG. 4, the electronic device 400 can further include a camera, a Bluetooth module, and the like, which will not be described herein.

[0175] In the present embodiment, the processor 401 in the electronic device 400 can load the instructions corresponding to the processes of one or more computer programs into the memory 402 according to the steps in the above-described translation method, and execute the computer programs stored in the memory 402 by the processor 401, so as to implement the steps in the above-described power consumption adjustment method, for example:

[0176] determining the delay requirement of the task processing according to the current use scenario;

[0177] determining the system load within a preset time period ending at the current time;

[0178] determining the corresponding power consumption mode according to the delay requirement and the system load;

[0179] adjusting the voltage and frequency of the processor according to the power consumption mode, so as to adjust the power consumption of the processor.

[0180] In an embodiment, when determining the corresponding power consumption mode according to the delay requirement and the system load, the processor 401 performs the following steps:

[0181] determining the delay interval in which the delay requirement is located;

[0182] determining the load interval in which the system load is located;

[0183] obtaining a preset first mapping table, the first mapping table containing the correspondence between the power consumption mode and the delay interval and the load interval;

[0184] determining the power consumption mode corresponding to the delay interval and the load interval according to the correspondence.

[0185] In an embodiment, the first mapping table further includes the voltage and frequency corresponding to the pre-set power consumption mode, and when adjusting the voltage and frequency of the processor according to the power consumption mode, the processor 401 performs the following steps:

[0186] obtaining the voltage and frequency corresponding to the power consumption mode;

[0187] adjusting the voltage and frequency of the processor to the voltage and frequency corresponding to the power consumption mode.

[0188] In an embodiment, the processor 401 further performs the following steps:

[0189] Obtaining the temperature of the processor.

[0190] In determining the corresponding power consumption mode according to the delay requirement and the system load, the processor 401 performs the following steps:

[0191] When the temperature of the processor is less than the temperature threshold, determining the corresponding power consumption mode according to the delay requirement and the system load.

[0192] Wherein, when the temperature of the processor is greater than or equal to the temperature threshold, determining the corresponding power consumption mode according to the temperature of the processor.

[0193] In an embodiment, in determining the system load in a preset time length with the current time as the end time, the processor 401 performs the following steps:

[0194] Counting the number of accesses to the processor when the processor accesses the cache;

[0195] Obtaining the number of accesses to the cache in a preset time length with the current time as the end time, to obtain an access count value;

[0196] Obtaining the system load in a preset time length with the current time as the end time according to the access count value.

[0197] In an embodiment, in determining the system load in a preset time length with the current time as the end time, the processor 401 performs the following steps:

[0198] Obtaining the idle time length and the working time length of the processor in a preset time length with the current time as the end time, the idle time length being the time length during which the processor is in an idle state, and the working time length being the time length during which the processor is in a working state, the processor being in the working state when the processor processes a task, and the processor being in the idle state when the processor has finished processing a task and has not yet received a next task;

[0199] Calculating the ratio of the idle time length to the working time length;

[0200] Determining the system load in a preset time length with the current time as the end time according to the ratio of the idle time length to the working time length.

[0201] From the above, the embodiment of the present application provides an electronic device, and the processor in the electronic device performs the following steps: firstly, determining the delay requirement of task processing according to the current use scenario; determining the system load within a preset time length with the current time as the end time; then, determining the corresponding power consumption mode according to the delay requirement and the system load; and further, adjusting the voltage and frequency of the processor according to the power consumption mode to adjust the power consumption of the processor. The embodiment of the present application automatically adjusts the voltage and frequency of the processor according to the power consumption mode determined according to the delay requirement and the system load, and automatically adjusts the power consumption of the processor by automatically adjusting the voltage and frequency of the processor, so as to effectively reduce the power consumption of the processor on the premise of ensuring the normal work of the processor.

[0202] The embodiment of the present application also provides an integrated circuit chip. The integrated circuit chip can be used in a smart phone, a tablet computer, a game device, an AR (Augmented Reality) device, a car, a vehicle peripheral obstacle detection device, an audio playing device, a video playing device, a notebook computer, a desktop computing device, a wearable device such as a watch, glasses, a helmet, an electronic bracelet, an electronic necklace and the like.

[0203] In an embodiment, the integrated circuit chip provided by the embodiment of the present application adopts a hardware acceleration technology, and distributes a very large amount of work to a special hardware to process to reduce the workload of the central processor. The processor provided by the embodiment of the present application can be integrated in such an integrated circuit chip, and the power consumption adjustment method provided by the embodiment of the present application is implemented in a hardware acceleration manner, so that high-speed power consumption adjustment processing can be achieved.

[0204] Reference Figure 10 , Figure 10 The structure schematic diagram of the integrated circuit chip 500 provided by the embodiment of the present application is shown in FIG. 1. The integrated circuit chip 500 includes a processor 501 and a power consumption adjustment device 300. The processor 501 is electrically connected with the power consumption adjustment device 300.

[0205] The processor 501 is the control center of the integrated circuit chip 500, and connects each part of the integrated circuit chip through various interfaces and lines.

[0206] In the embodiment, the power consumption adjustment device 300 can be responsible for implementing the steps in the power consumption adjustment method described above, so as to adjust the power consumption of the processor 501, for example:

[0207] determining the delay requirement of task processing according to the current use scenario;

[0208] determining the system load within a preset time length with the current time as the end time;

[0209] determining the corresponding power consumption mode according to the delay requirement and the system load;

[0210] The voltage and frequency of the processor are adjusted according to the power consumption mode, so as to adjust the power consumption of the processor.

[0211] The processor provided in the embodiments of the present application can be applied to the integrated circuit chip or the electronic device provided in the embodiments of the present application, and is responsible for implementing the steps in the power consumption adjustment method, for example:

[0212] determining the delay requirement of the task processing according to the current use scenario;

[0213] determining the system load within a preset time length ending at the current time;

[0214] determining the corresponding power consumption mode according to the delay requirement and the system load;

[0215] The voltage and frequency of the processor are adjusted according to the power consumption mode, so as to adjust the power consumption of the processor.

[0216] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, device or computer program product. Therefore, the embodiments of the present application can adopt a completely hardware embodiment, a completely software embodiment or an embodiment combining software and hardware aspects.

[0217] That is, when implementing the steps in the power consumption adjustment method, the processor provided in the embodiments of the present application can be implemented in a hardware manner, a software manner or a combination of the two. For example, the processor can be a main processor in an electronic device, and the steps in the power consumption adjustment method are implemented by calling a computer program in a memory of the electronic device. Alternatively, the processor can also be a hardware acceleration processor in an integrated circuit chip, and the steps in the power consumption adjustment method are implemented in a hardware manner by using hardware acceleration technology.

[0218] It should be noted that those skilled in the art can understand that all or part of the steps in the various methods of the above embodiments, if implemented in the form of a software function module and sold or used as an independent product, can be completed by a computer program instructing related hardware, and the computer program can be stored in a computer readable storage medium, including but not limited to: read only memory (ROM, Read Only Memory), random access memory (RAM, Random Access Memory), magnetic disk or optical disk, etc.

[0219] That is, the embodiments of the present application also provide a storage medium, and the storage medium stores a computer program. When the computer program runs on a computer, the computer executes the power consumption adjustment method of any one of the above embodiments.

[0220] For example, in some embodiments, when the computer program runs on the computer, the computer executes the following steps:

[0221] determine a delay requirement of the task processing according to a current use scenario;

[0222] determine a system load within a preset time length ending at a current time;

[0223] determine a corresponding power consumption mode according to the delay requirement and the system load;

[0224] adjust a voltage and a frequency of the processor according to the power consumption mode, so as to adjust power consumption of the processor.

[0225] In the above embodiments, the description of each embodiment has its own focus, and the parts not described in detail in a certain embodiment can be referred to the detailed description of the translation method above, which will not be described here.

[0226] The power consumption adjustment method, device, storage medium, processor and electronic device provided by the embodiments of the present application are described in detail above. The principles and implementation modes of the present application are described by applying specific examples in this paper, and the above embodiment description is only used to help understand the method and its core idea of the present application; at the same time, for those skilled in the art, according to the idea of the present application, the specific implementation mode and application range will be changed; in conclusion, the content of the specification should not be understood as a limitation of the present application.

Claims

1. A power consumption adjustment method, characterized by, The method comprises the following steps: determining the delay requirement of task processing according to the current use scenario; determining the system load within a preset time period ending at the current time, wherein the number of times of accessing the processor to the cache is counted when the processor accesses the cache; the number of times of accessing the cache by the processor within a preset time period ending at the current time is obtained, wherein the cache comprises a level one cache and a level two cache, the level one cache comprises a level one instruction cache and a level one data cache, the number of times of accessing the level one instruction cache and the level one data cache within a preset time period ending at the current time is obtained, and an access count value is obtained; the system load within a preset time period ending at the current time is determined according to the access count value; determining the corresponding power consumption mode according to the delay requirement and the system load; adjusting the voltage and frequency of the processor according to the power consumption mode to adjust the power consumption of the processor.

2. The power consumption adjustment method of claim 1, wherein, The method of determining the corresponding power consumption mode according to the delay requirement and the system load comprises the following steps: determining the delay interval in which the delay requirement is located; determining the load interval in which the system load is located; obtaining a preset first mapping table, wherein the first mapping table comprises the corresponding relationship between the power consumption mode and the delay interval and the load interval; determining the power consumption mode corresponding to the delay interval and the load interval according to the corresponding relationship.

3. The power consumption adjustment method of claim 2, wherein, The first mapping table further comprises the voltage and frequency corresponding to the pre-set power consumption mode, and the method of adjusting the voltage and frequency of the processor according to the power consumption mode comprises the following steps: obtaining the voltage and frequency corresponding to the power consumption mode; adjusting the voltage and frequency of the processor to the voltage and frequency corresponding to the power consumption mode.

4. The power consumption adjustment method of claim 1, wherein, The method of determining the corresponding power consumption mode according to the delay requirement and the system load comprises the following steps: when the temperature of the processor is less than a temperature threshold, determining the corresponding power consumption mode according to the delay requirement and the system load.

5. The power consumption adjustment method of claim 4, wherein, The method further comprises the following steps: when the temperature of the processor is greater than or equal to a temperature threshold, determining the corresponding power consumption mode according to the temperature of the processor.

6. The power consumption adjustment method of claim 1, wherein, The method of determining the system load within a preset time period ending at the current time comprises the following steps: obtaining the idle time length and the working time length of the processor within a preset time period ending at the current time, wherein the idle time length is the time length during which the processor is in an idle state, and the working time length is the time length during which the processor is in a working state; when the processor processes a task, the processor is in a working state; when the processor has finished processing a task and has not received a next task, the processor is in an idle state; calculating the ratio of the idle time length to the working time length; determining the system load within a preset time period ending at the current time according to the ratio of the idle time length to the working time length.

7. A power consumption adjusting apparatus characterized by comprising: The device comprises: a delay determination module configured to determine the delay requirement of task processing according to the current use scenario; a load determination module configured to determine the system load within a preset time period ending at the current time. The power consumption determination module is configured to determine a corresponding power consumption mode according to the delay requirement and the system load, wherein the number of times of accessing the processor is counted when the processor accesses the cache; the number of times of accessing the cache within a preset time period ending at the current time is obtained, wherein the cache comprises a first-level cache and a second-level cache, the first-level cache comprises a first-level instruction cache and a first-level data cache, the number of times of accessing the first-level instruction cache and the first-level data cache within the preset time period ending at the current time is obtained, and an access count value is obtained; and the system load within the preset time period ending at the current time is obtained according to the access count value. The power consumption adjustment module is configured to adjust the voltage and the frequency of the processor according to the power consumption mode, so as to adjust the power consumption of the processor.

8. A storage medium, characterized by The storage medium stores a computer program, and when the computer program runs on a computer, the computer is caused to execute the steps in the power consumption adjustment method according to any one of claims 1 to 6. 9.A processor configured to execute the steps in the power consumption adjustment method according to any one of claims 1 to 6.

10. An electronic device, comprising: Comprise: A processor and a memory, wherein the memory stores a computer program, and the processor executes the steps in the power consumption adjustment method according to any one of claims 1 to 6 by invoking the computer program stored in the memory.

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