A display module and a display device

By setting data signals and driving methods of different frequencies in the display panel, combined with the combination of QD-LED and Micro-LED, the problem of not being able to take into account the display characteristics of different types of sub-pixels when driving the display panel, improving the display quality and luminous efficiency, and saving power consumption.

CN115240587BActive Publication Date: 2025-07-29SHANGHAI TIANMA MICRO ELECTRONICS CO LTD
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Patent Information

Application Number
CN202210967505.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-08-12
Publication Date
2025-07-29
Estimated Expiration
2042-08-12

AI Technical Summary

Technical Problem

In the prior art, the display characteristics of different types of sub-pixels cannot be taken into account when driving the display panel, resulting in low luminous efficiency of some sub-pixels, which affects the display effect.

Method used

In the same frame display screen of the display panel, the first sub-pixel and the second sub-pixel are arranged to receive data signals of different frequencies, and use different driving chips and driving methods, combining the combination of QD-LED and Micro-LED, and adjust the luminous area and the duration of the luminous phase to match the respective display characteristics.

Benefits of technology

Improve the display quality and luminous efficiency of the display panel, save power consumption and reduce usage costs.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiments of the present application provide a display module and a display device. The display module includes a display panel, and the display panel includes a plurality of sub-pixels, and the plurality of sub-pixels include a first sub-pixel and a second sub-pixel; in the same frame display image of the display panel, the data writing frequency of the first sub-pixel is a first frequency, and the data writing frequency of the second sub-pixel is a second frequency; wherein, one of the first frequency and the second frequency is greater than the other. In the present application, setting the different frequencies at which the first sub-pixel and the second sub-pixel receive data signals is beneficial to realizing the refined control of the first sub-pixel and the second sub-pixel, so that when driving the display panel to emit light, the display characteristics of the first sub-pixel and the second sub-pixel can be taken into account, and the display quality of the display panel can be improved.
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Description

Technical Field

[0001] The present application relates to the field of display technologies, and in particular, to a display module and a display device. Background Art

[0002] With the continuous improvement of users' requirements for display experience, how to improve the display quality of a display panel has become the focus of research by major manufacturers.

[0003] Currently, in order to balance the service life and display quality of a display panel, different types of sub-pixels are usually set in the display panel. However, in the prior art, when driving the display panel to emit light, the display characteristics of different types of sub-pixels cannot be balanced, resulting in a lower luminous efficiency of some sub-pixels and affecting the display effect of the display panel.

[0004] Content of the Application

[0005] In view of this, embodiments of the present application provide a display module and a display device to solve the above problems.

[0006] In a first aspect, an embodiment of the present application provides a display module, including a display panel. The display panel includes a plurality of sub-pixels, and the plurality of sub-pixels include a first sub-pixel and a second sub-pixel. In the same frame of display image of the display panel, the data writing frequency of the first sub-pixel is a first frequency, and the data writing frequency of the second sub-pixel is a second frequency. Wherein, one of the first frequency and the second frequency is greater than the other.

[0007] In an implementation manner of the first aspect, the display module further includes a first type of driving chip and a second type of driving chip. Wherein, the first type of driving chip is used to provide a data signal with the first frequency to the first sub-pixel, and the second type of driving chip is used to provide a data signal with the second frequency to the second sub-pixel.

[0008] In an implementation manner of the first aspect, the light-emitting color of the first sub-pixel includes red and / or green, and the light-emitting color of the second sub-pixel is blue.

[0009] In an implementation manner of the first aspect, the first sub-pixel includes a quantum dot light-emitting diode, and the second sub-pixel includes a micro light-emitting diode.

[0010] In an implementation manner of the first aspect, the light-emitting area of the second sub-pixel is larger than the light-emitting area of the first sub-pixel.

[0011] In an implementation manner of the first aspect, in the same frame of display image of the display panel, the second frequency is greater than the first frequency.

[0012] In an implementation of the first aspect, in one frame of the display screen of the display panel, the sub-pixels include multiple light-emitting stages; wherein, in the same frame of the display screen of the display panel, the durations of different light-emitting stages of the first sub-pixel are the same, and the durations of at least some different light-emitting stages of the second sub-pixel are different.

[0013] In an implementation of the first aspect, in the same frame of the display screen of the display panel, the light-emitting stages of the first sub-pixel overlap with the light-emitting stages of the second sub-pixel.

[0014] In an implementation of the first aspect, the display panel further includes multiple shift register units, and the multiple shift register units include a first shift register unit and a second shift register unit; the first shift register unit is electrically connected to the first type of driving chip and the first sub-pixels, and the first type of driving chip controls the first shift register unit to transmit scan signals to the first sub-pixels; the second shift register unit is electrically connected to the second type of driving chip and the second sub-pixels, and the second type of driving chip controls the second shift register unit to transmit scan signals to the second sub-pixels.

[0015] In an implementation of the first aspect, the first type of driving chip and the second type of driving chip are arranged along the first direction, and the first type of driving chip and the second type of driving chip are located on opposite sides of the display panel.

[0016] In an implementation of the first aspect, the display panel includes a display area and a non-display area, and the non-display area surrounds the display area; the non-display area includes a first area and a second area arranged along the second direction, the first area and the second area are located on opposite sides of the display area, and the second direction intersects with the first direction; the first shift register unit and the second shift register unit are respectively located in the first area and the second area; or both the first area and the second area include the first shift register unit and the second shift register unit.

[0017] In an implementation of the first aspect, the first type of driving chip transmits data signals to the first sub-pixels through the first data line, and the first data line extends along the first direction; wherein, the first sub-pixels arranged along the first direction are electrically connected to the same first data line, and at least some of the first sub-pixels with different light-emitting colors are arranged along the first direction.

[0018] In a second aspect, an embodiment of the present application provides a display device, including the display module provided in the first aspect.

[0019] In the embodiments of the present application, by setting different frequencies for the first sub-pixel and the second sub-pixel to receive data signals, a driving method matching their display characteristics can be provided according to the display characteristics of the first sub-pixel and the second sub-pixel, which is beneficial to realizing fine control of the first sub-pixel and the second sub-pixel. Thus, when driving the display panel to emit light, the display characteristics of the first sub-pixel and the second sub-pixel can be taken into account, improving the light-emitting efficiency of the first sub-pixel and the second sub-pixel, and further improving the display quality of the display panel.

[0020] In addition, realizing fine control of the first sub-pixel and the second sub-pixel can also save power consumption and reduce the usage cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0022] Figure 1 Schematic diagram of a display module provided by an embodiment of the present application;

[0023] Figure 2 Schematic diagram of a first type of driving chip related to the present application providing data signals;

[0024] Figure 3 Schematic diagram of a second type of driving chip related to the present application providing data signals;

[0025] Figure 4 Schematic diagram of another display module provided by an embodiment of the present application;

[0026] Figure 5 For Figure 2 A timing diagram of the first pixel circuit shown;

[0027] Figure 6 For Figure 3 A timing diagram of the second pixel circuit shown;

[0028] Figure 7 A comparison diagram of the light-emitting stages of a first sub-pixel and a second sub-pixel provided by an embodiment of the present application;

[0029] Figure 8 Another comparison diagram of the light-emitting stages of a first sub-pixel and a second sub-pixel provided by an embodiment of the present application;

[0030] Figure 9 Another comparison diagram of the light-emitting stages of a first sub-pixel and a second sub-pixel provided by an embodiment of the present application;

[0031] Figure 10 Another contrast diagram of the light-emitting phases of the first sub-pixel and the second sub-pixel provided by the embodiment of the present application;

[0032] Figure 11 Another schematic diagram of a display module provided by the embodiment of the present application;

[0033] Figure 12 A schematic diagram of a first shift register unit transmitting a scan signal related to the present application;

[0034] Figure 13 A schematic diagram of a second shift register unit transmitting a scan signal related to the present application;

[0035] Figure 14 Another schematic diagram of a display module provided by the embodiment of the present application;

[0036] Figure 15 Another schematic diagram of a display module provided by the embodiment of the present application;

[0037] Figure 16 A schematic diagram of a display device provided by the embodiment of the present application. Detailed implementation manners

[0038] In order to better understand the technical solution of the present application, the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0039] It should be clear that the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts belong to the scope of protection of the present application.

[0040] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms of "a", "the" and "said" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0041] It should be understood that the term " / and / " used herein is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " herein generally represents an "or" relationship between the associated objects before and after.

[0042] In the description of this specification, it should be understood that words such as "substantially", "approximately", "about", "around", "roughly", and "generally" described in the claims and embodiments of this application refer to values that can be generally recognized within a reasonable process operation range or tolerance range, rather than an exact value.

[0043] It should be understood that although terms such as first and second may be used in the embodiments of this application to describe directions, sub-pixels, driving chips, shift register units, etc., these directions, sub-pixels, driving chips, shift register units, etc. should not be limited to these terms. These terms are only used to distinguish directions, sub-pixels, driving chips, shift register units, etc. from each other. For example, without departing from the scope of the embodiments of this application, the first direction may also be referred to as the second direction, and similarly, the second direction may also be referred to as the first direction.

[0044] Through careful and in-depth research, the applicant of this case has provided a solution to the problems existing in the prior art.

[0045] Figure 1 Schematic diagram of a display module provided for the embodiments of this application.

[0046] The embodiments of this application provide a display module 100, as Figure 1 shown, the display module 100 includes a display panel 001, and the display panel 001 includes a plurality of sub-pixels 01, and the plurality of sub-pixels 01 include a first sub-pixel 11 and a second sub-pixel 12.

[0047] In the same frame display image of the display panel 001, the data writing frequency of the first sub-pixel 11 is the first frequency, and the data writing frequency of the second sub-pixel 12 is the second frequency. Among them, one of the first frequency and the second frequency is greater than the other.

[0048] That is to say, in the same frame display image of the display panel 001, the first sub-pixel 11 and the second sub-pixel 12 receive data signals at different frequencies.

[0049] It should be noted that in one frame display image of the display panel 001, the sub-pixel with the lower data writing frequency among the first sub-pixel 11 and the second sub-pixel 12 may write the data signal only once.

[0050] With the development of display technology, different regions of the display panel 001 often undertake different functions, and different sub-pixels 01 undertake different display requirements. In the embodiments of the present application, the first sub-pixel 11 and the second sub-pixel 12 adopt different designs, and the frequencies at which the first sub-pixel 11 and the second sub-pixel 12 receive data signals are set differently, which is conducive to realizing fine control of the first sub-pixel 11 and the second sub-pixel 12. Thus, when driving the display panel 001 to emit light, the display characteristics of the first sub-pixel 11 and the second sub-pixel 12 can be taken into account, the luminous efficiency of the first sub-pixel 11 and the second sub-pixel 12 can be improved, and further the display quality of the display panel 001 can be improved.

[0051] In addition, realizing fine control of the first sub-pixel 11 and the second sub-pixel 12 can also save power consumption and reduce usage costs.

[0052] Figure 2 Schematic diagram for providing data signals for a first type of driving chip related to the present application Figure 3 Schematic diagram for providing data signals for a second type of driving chip related to the present application.

[0053] Please continue to refer to Figure 1 , in an embodiment of the present application, the display module 100 further includes a first type of driving chip PA and a second type of driving chip PB. Among them, the first type of driving chip PA is used to provide a data signal with a first frequency to the first sub-pixel 11, and the second type of driving chip PB is used to provide a data signal with a second frequency to the second sub-pixel 12.

[0054] Specifically, in combination with Figure 1 and Figure 2 as shown, the first sub-pixel 11 includes a first pixel circuit 111 and a first light-emitting element 112. The display module 100 includes a first data line DL1, the first data line DL1 is electrically connected to the first type of driving chip PA and the first pixel circuit 111, and the first type of driving chip PA transmits a data signal Vdata with a first frequency to the first pixel circuit 111 through the first data line DL1.

[0055] In combination with Figure 1 and Figure 3 as shown, the second sub-pixel 12 includes a second pixel circuit 121 and a second light-emitting element 122. The display module 100 includes a second data line DL2, the second data line DL2 is electrically connected to the second type of driving chip PB and the second pixel circuit 121, and the second type of driving chip PB transmits a data signal Vdata with a second frequency to the second pixel circuit 121 through the second data line DL2.

[0056] Optionally, the first pixel circuit 111 is a pixel circuit driven by Pulse Amplitude Modulation (PAM), and the second pixel circuit 121 is a pixel circuit driven by Pulse Width Modulation (PWM) and PAM.

[0057] In the embodiments of the present application, setting the first type of driving chip PA and the second type of driving chip PB to provide data signals with different frequencies to the first sub-pixel 11 and the second sub-pixel 12 respectively is beneficial to reducing the design difficulty of providing data signals with different frequencies and simplifying the manufacturing difficulty of the display module 100.

[0058] In an embodiment of the present application, the light-emitting color of the first sub-pixel 11 includes red and / or green, and the light-emitting color of the second sub-pixel 12 is blue. That is, in the display panel 001, the first sub-pixel 11 may only include red sub-pixels, may only include green sub-pixels, or may include both red sub-pixels and green sub-pixels; the second sub-pixel 12 may be a blue sub-pixel.

[0059] Optionally, the first sub-pixel 11 includes Quantum Dot Light Emitting Diodes (QD-LEDs), and the second sub-pixel 12 includes Micro Light Emitting Diodes (Micro-LEDs).

[0060] That is to say, the first light-emitting element 112 included in the first sub-pixel 11 may be a QD-LED, and the QD-LED may emit red light or green light. The second light-emitting element 122 included in the second sub-pixel 12 may be a Micro-LED, and the Micro-LED may emit blue light.

[0061] It should be noted that in some other embodiments, the first sub-pixel 11 may further include an Organic Light Emitting Diode (OLED).

[0062] In the related art, Micro-LEDs have the advantages of low power consumption, high brightness, high color saturation, high response speed, and long lifespan. However, there are certain display problems with the red or green light emitted by Micro-LEDs.

[0063] Specifically, the efficiency of Micro-LEDs in emitting red light is relatively low, and during operation, as the temperature increases, its luminous efficiency will drop sharply. The green light emitted by Micro-LEDs will have an offset of the light peak position at low brightness, which is likely to cause color deviation in the display panel.

[0064] At present, the use of QD-LED can solve the problems of red and green light in Micro-LED. Moreover, due to the characteristics of the inorganic light-emitting layer of QD-LED itself, its working life is even higher than that of Organic Light Emitting Diode (OLED). However, the life of QD-LED used to emit blue light is shorter.

[0065] Therefore, in the embodiment of the present application, the first sub-pixel 11 is set to emit red light and / or green light, and the second sub-pixel 12 is set to emit blue light. The combination of QD-LED and Micro-LED for display is beneficial to improving the display effect and service life of the display panel 001.

[0066] At the same time, the driving methods matching the display characteristics of the first sub-pixel 11 and the second sub-pixel 12 respectively are beneficial to making the luminous efficiencies of the first sub-pixel 11 and the second sub-pixel 12 reach the best state, and further improving the display quality.

[0067] In an embodiment of the present application, in the same frame display screen of the display panel 001, the second frequency is greater than the first frequency. That is, the data writing frequency of the second sub-pixel 12 is greater than the data writing frequency of the first sub-pixel 11.

[0068] As can be seen from the above analysis, the first sub-pixel 11 may include QD-LED, and the second sub-pixel 12 may include Micro-LED. The display characteristics of Micro-LED are related to its driving frequency. When the driving frequency of Micro-LED is relatively high, its luminous efficiency is relatively high; while QD-LED does not require high-frequency driving, and its luminous efficiency can reach a relatively high level.

[0069] Therefore, in the embodiment of the present application, the data writing frequency of the second sub-pixel 12 is set to be greater than the data writing frequency of the first sub-pixel 11, and the driving methods matching the display characteristics of the first sub-pixel 11 and the second sub-pixel 12 respectively are beneficial to making the luminous efficiencies of the first sub-pixel 11 and the second sub-pixel 12 reach the best state, and improving the display quality.

[0070] Figure 4 It is a schematic diagram of another display module provided by the embodiment of the present application.

[0071] As Figure 4 shown, in an embodiment of the present application, the light-emitting area of the second sub-pixel 12 is greater than the light-emitting area of the first sub-pixel 11. That is, the Micro-LED in the second sub-pixel 12 can be set larger relative to the QD-LED in the first sub-pixel 11.

[0072] According to the light-emitting characteristics of Micro-LED and QD-LED, the light-emitting efficiency of the first sub-pixel 11 is greater than that of the second sub-pixel 12. Therefore, in the embodiments of the present application, the light-emitting area of the second sub-pixel 12 is set to be relatively large, which is beneficial to further improving the light-emitting efficiency of the second sub-pixel 12, making the light-emitting efficiencies of the first sub-pixel 11 and the second sub-pixel 12 tend to be consistent, thereby further improving the display effect of the display panel 001.

[0073] Figure 5 As Figure 2 shown in a timing diagram of the first pixel circuit, Figure 6 As Figure 3 shown in a timing diagram of the second pixel circuit.

[0074] In an embodiment of the present application, in a frame of display image of the display panel 001, the first pixel circuit 111 in the first sub-pixel 11 may receive a data signal only once, and the second pixel circuit 121 in the second sub-pixel 12 may receive the data signal multiple times.

[0075] Combined with Figure 5 and Figure 6 shown, in a frame of display image F1 of the display panel 001, the sub-pixel 01 may include multiple light-emitting stages t3. Among them, in the same frame of display image F1 of the display panel 001, the durations of different light-emitting stages t3 of the first sub-pixel 11 are the same, and the durations of at least some different light-emitting stages t3 of the second sub-pixel 12 are different.

[0076] It should be noted that Figure 5 and Figure 6 only show the case where a frame of display image F1 includes three light-emitting stages t3. In some other embodiments, a frame of display image F1 may also include other numbers of light-emitting stages t3.

[0077] In the embodiments of the present application, the first sub-pixel 11 receives a data signal once in a frame of display image, and the durations of different light-emitting stages t3 in a frame of display image are the same, so its brightness in different light-emitting stages t3 is the same, which is beneficial to reducing the flicker of the first sub-pixel 11 and improving the display quality of the first sub-pixel 11.

[0078] The second sub-pixel 12 can receive data signals multiple times in a frame of display screen. Thus, the Micro-LEDs included therein can receive different driving currents at least in some different light-emitting stages t3 in a frame of display screen, which is beneficial to improving the light-emitting efficiency of the Micro-LEDs, that is, improving the light-emitting efficiency of the second sub-pixel 12. In addition, by setting the durations of at least some different light-emitting stages t3 of the second sub-pixel 12 in a frame of display screen F1 to be different, it is beneficial to flexibly adjust the light-emitting brightness in different light-emitting stages t3 to meet the display requirements in different situations.

[0079] To more clearly illustrate the technical solution of the embodiments of the present application, the following combines Figure 2 and Figure 5 to describe Figure 2 the working process of the first pixel circuit shown as follows:

[0080] As Figure 2 shown, the first pixel circuit 111 includes a driving transistor Md for providing a driving current to the first light-emitting element 112. In addition, the first pixel circuit 111 further includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, and a sixth transistor M6.

[0081] Among them, the source of the first transistor M1 is electrically connected to the reset signal line SL1, the drain is electrically connected to the gate of the driving transistor Md, and the gate is electrically connected to the first scan line S1; the source of the second transistor M2 is electrically connected to the first data line DL1, the drain is electrically connected to the source of the driving transistor Md, and the gate is electrically connected to the second scan line S2; the source of the third transistor M3 is electrically connected to the drain of the driving transistor Md, the drain is electrically connected to the gate of the driving transistor Md, and the gate is electrically connected to the second scan line S2; the source of the fourth transistor M4 is electrically connected to the power supply voltage signal line DY1, the drain is electrically connected to the source of the driving transistor Md, and the gate is electrically connected to the light-emitting control signal line EM; the source of the fifth transistor M5 is electrically connected to the drain of the driving transistor Md, the drain is electrically connected to the first pole of the first light-emitting element 112, and the gate is electrically connected to the light-emitting control signal line EM; the source of the sixth transistor M6 is electrically connected to the reset signal line SL1, the drain is electrically connected to the first pole of the first light-emitting element 112, and the gate is electrically connected to the first scan line S1.

[0082] It should be noted that the following takes the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 as P-type transistors as an example for description.

[0083] In a frame of display screen of the display panel 001, the working process of the first pixel circuit 111 includes a reset stage t1, a data writing stage t2, and a light-emitting stage t3.

[0084] In the reset stage t1, the first scan line S1 transmits an enable signal, i.e., a low-level signal, and the first transistor M1 and the sixth transistor M6 are turned on; the second scan line S2 and the emission control signal line EM transmit a disable signal, i.e., a high-level signal, and the second transistor M2, the third transistor M3, the fourth transistor M4, and the fifth transistor M5 are turned off. At the same time, the reset signal line SL1 transmits a reset voltage Vref, and the reset voltage Vref is transmitted to the gate of the driving transistor Td through the turned-on first transistor M1, completing the reset of the gate of the driving transistor Md. The reset voltage Vref resets the first pole of the first light-emitting element 112 through the turned-on sixth transistor M6. Optionally, the first light-emitting element 112 is a quantum dot light-emitting diode, and the reset voltage Vref resets the anode of the quantum dot light-emitting diode through the turned-on sixth transistor M6.

[0085] In the data writing stage t2, the second scan line S2 transmits an enable signal, i.e., a low-level signal, and the second transistor M2 and the third transistor M3 are turned on; the first scan line S1 and the emission control signal line EM transmit a disable signal, i.e., a high-level signal, and the first transistor M1, the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 are turned off. At the same time, the first type of driving chip PA transmits a data voltage Vdata to the first data line DL1. At the starting point of the data writing stage t2, the gate potential of the driving transistor Md is the reset voltage Vref, the source potential of the driving transistor Md is the data voltage Vdata, and the potential difference between the source and the gate of the driving transistor Md is (Vdata - Vref). Since the potential difference between the two is greater than 0, the driving transistor Md is turned on, and the data voltage Vdata is transmitted to the gate of the driving transistor Md through the turned-on driving transistor Md and the turned-on third transistor M3, causing the gate potential of the driving transistor Md to gradually increase. When the gate potential of the driving transistor Md is equal to (Vdata - |Vth|), the driving transistor Md is turned off. Here, Vth is the threshold voltage of the driving transistor Md.

[0086] In the emission stage t3, the first scan line S1 and the second scan line S2 transmit a disable signal, i.e., a high-level signal, and the first transistor M1, the second transistor M2, the third transistor M3, and the sixth transistor M6 are turned off; the emission control signal line EM transmits an enable signal, i.e., a low-level signal, and the fourth transistor M4 and the fifth transistor M5 are turned on. At the same time, the power supply voltage signal line DY1 transmits a power supply voltage VDD, i.e., the potential of the source of the driving transistor Md is the power supply voltage VDD. Since the potential of the power supply voltage VDD is greater than the potential of the data voltage Vdata, the driving transistor Md generates a driving current and transmits it to the first light-emitting element 112 through the fifth transistor M5, controlling the first light-emitting element 112 to emit light.

[0087] Figure 3 The difference between the second pixel circuit 121 shown and Figure 2 the first pixel circuit shown is that: the source of the second transistor M2 in the second pixel circuit 121 is electrically connected to the second data line DL2, and in the data writing stage t2, the second pixel circuit 121 receives the data voltage Vdata transmitted by the second type of driving chip PB to it.

[0088] In one frame of the display screen of the display panel 001, as Figure 5 shown, the first pixel circuit 111 can execute multiple light emitting stages t3. The first pixel circuit 111 only performs a data writing stage t2 once before the first light emitting stage t3, that is, the first sub-pixel 11 only receives a data signal once in one frame of the display screen. The first pixel circuit 111 can be a pixel circuit driven by PAM. As Figure 6 shown, the second pixel circuit 121 can execute the same number of light emitting stages t3 as the first pixel circuit 111. Before each light emitting stage t3, the second pixel circuit 121 performs a reset stage t1 and a data writing stage t2 once, and in different data writing stages t2, the data voltage Vdata transmitted by the second type of driving chip PB can be different. The second pixel circuit 121 can be a pixel circuit jointly driven by PAM and PWM.

[0089] It should be noted that the embodiments of the present application only give examples where the structures of the first pixel circuit 111 and the second pixel circuit 121 are the same. In some other embodiments, the structure of the second pixel circuit 121 can be different from that of the first pixel circuit 111, and the second pixel circuit 121 can include more transistors relative to the first pixel circuit 111.

[0090] Figure 7 This is a control diagram of the light emitting stages of the first sub-pixel and the second sub-pixel provided by the embodiments of the present application, Figure 8 This is another control diagram of the light emitting stages of the first sub-pixel and the second sub-pixel provided by the embodiments of the present application, Figure 9 This is another control diagram of the light emitting stages of the first sub-pixel and the second sub-pixel provided by the embodiments of the present application, Figure 10 This is another control diagram of the light emitting stages of the first sub-pixel and the second sub-pixel provided by the embodiments of the present application.

[0091] In an embodiment of the present application, as Figures 7 - 10As shown, in the same frame display screen F1 of the display panel 001, the light-emitting stage t3 of the first sub-pixel 11 overlaps with the light-emitting stage t3 of the second sub-pixel 12. That is, the time period during which the light-emitting control signal line EM transmits an enable signal (such as a low-level signal) in the first sub-pixel 11 overlaps with the time period during which the light-emitting control signal line EM transmits an enable signal (such as a low-level signal) in the second sub-pixel 12.

[0092] Optionally, as Figure 7 shown, in the same frame display screen F1 of the display panel 001, the light-emitting stage t3 of the first sub-pixel 11 covers the light-emitting stage t3 of the second sub-pixel 12.

[0093] Optionally, as Figure 8 shown, in the same frame display screen F1 of the display panel 001, the light-emitting stage t3 of the second sub-pixel 12 covers the light-emitting stage t3 of the first sub-pixel 11.

[0094] Optionally, as Figure 9 and Figure 10 shown, in the same frame display screen F1 of the display panel 001, a partial time period in the light-emitting stage t3 of the first sub-pixel 11 overlaps with a partial time period in the light-emitting stage t3 of the second sub-pixel 12.

[0095] In the embodiment of the present application, by setting the light-emitting stage t3 of the first sub-pixel 11 to overlap with that of the second sub-pixel 12, when the display panel 001 performs full-color display, it is beneficial to ensure the display effect of the display panel 001.

[0096] Figure 11 is a schematic diagram of another display module provided by the embodiment of the present application, Figure 12 is a schematic diagram of a first shift register unit transmitting a scan signal related to the present application, Figure 13 is a schematic diagram of a second shift register unit transmitting a scan signal related to the present application.

[0097] In an embodiment of the present application, as Figure 11 shown, the display panel 001 further includes a plurality of shift register units 02, and the plurality of shift register units 02 include a first shift register unit 21 and a second shift register unit 22.

[0098] The first shift register unit 21 is electrically connected to the first type of driving chip PA and the first sub-pixel 11, and the first type of driving chip PA controls the first shift register unit 21 to transmit a scan signal to the first sub-pixel 11.

[0099] Specifically, as Figure 12As shown in the figure, the first shift register unit 21 is electrically connected to the first scan line S1, the second scan line S2, and the emission control signal line EM to which the first pixel circuit 111 is electrically connected. The first shift register unit 21 can transmit scan signals to the first pixel circuit 111 through the first scan line S1, the second scan line S2, and the emission control signal line EM to drive the first pixel circuit 111 to operate.

[0100] The second shift register unit 22 is electrically connected to the second type of driving chip PB and the second sub-pixel 12. The second type of driving chip PB controls the second shift register unit 22 to transmit scan signals to the second sub-pixel 12.

[0101] Specifically, as Figure 13 shown in the figure, the second shift register unit 22 is electrically connected to the first scan line S1, the second scan line S2, and the emission control signal line EM to which the second pixel circuit 121 is electrically connected. The second shift register unit 22 can transmit scan signals to the second pixel circuit 121 through the first scan line S1, the second scan line S2, and the emission control signal line EM to drive the second pixel circuit 121 to operate.

[0102] Among them, the circuit structures of the first shift register unit 21 and the second shift register unit 22 can be the same, which is beneficial to simplifying the manufacturing process of the display panel 001 and reducing the manufacturing difficulty.

[0103] In the embodiment of the present application, setting the first type of driving chip PA to control the first shift register unit 21 to transmit scan signals to the first sub-pixel 11 and the second type of driving chip PB to control the second shift register unit 22 to transmit scan signals to the second sub-pixel 12 is beneficial to ensuring that driving methods matching their display characteristics can be respectively adopted for the first sub-pixel 11 and the second sub-pixel 12, so that the luminous efficiencies of the first sub-pixel 11 and the second sub-pixel 12 both reach the optimal state, and the display quality of the display panel 001 is improved.

[0104] It should be noted that in some other embodiments, the circuit structures of the first shift register unit 21 and the second shift register unit 22 can be different, and the second shift register unit 22 can include more components than the first shift register unit 21.

[0105] In an embodiment of the present application, please continue to refer to Figure 1 and Figure 11 , the first type of driving chip PA and the second type of driving chip PB are arranged along the first direction X, and the first type of driving chip PA and the second type of driving chip PB are located on opposite sides of the display panel 001.

[0106] The embodiments of the present application can provide a relatively large routing space for the first type of driving chip PA and the second type of driving chip PB, which is convenient for routing and helps reduce the mutual interference between the routing of the first type of driving chip PA and the second type of driving chip PB.

[0107] Figure 14 It is a schematic diagram of another display module provided by the embodiments of the present application.

[0108] In an embodiment of the present application, as shown in Figure 11 and Figure 14 , the display panel 001 includes a display area AA and a non-display area BB. The first sub-pixel 11 and the second sub-pixel 12 are located in the display area AA, and the non-display area BB surrounds the display area AA.

[0109] The non-display area BB includes a first area B1 and a second area B2 arranged along the second direction Y. The first area B1 and the second area B2 are located on opposite sides of the display area AA, and the second direction Y intersects with the first direction X. The first direction X can be the column direction in the display module 100, and the second direction Y can be the row direction in the display module 100.

[0110] Among them, the first shift register unit 21 and the second shift register unit 22 are respectively located in the first area B1 and the second area B2; or both the first area B1 and the second area B2 include the first shift register unit 21 and the second shift register unit 22.

[0111] Specifically, when both the first sub-pixel 11 and the second sub-pixel 12 are single-sided driven, as shown in Figure 11 , the first shift register unit 21 and the second shift register unit 22 are respectively located in the first area B1 and the second area B2.

[0112] When both the first sub-pixel 11 and the second sub-pixel 12 are double-sided driven, as shown in Figure 14 , both the first area B1 and the second area B2 include the first shift register unit 21 and the second shift register unit 22.

[0113] In the embodiments of the present application, the first shift register unit 21 and the second shift register unit 22 can be located on different sides of the display area AA from the first type of driving chip PA and the second type of driving chip PB, which is beneficial to facilitating the routing of the first shift register unit 21 and the second shift register unit 22 and reducing the mutual interference between the routing of the first shift register unit 21 and the second shift register unit 22 and the routing of the first type of driving chip PA and the second type of driving chip PB.

[0114] It should be noted that when one of the first sub-pixel 11 and the second sub-pixel 12 is bilaterally driven and the other is unidirectionally driven, one of the first region B1 and the second region B2 may include the first shift register unit 21 and the second shift register unit 22, and the other includes the first shift register unit 21 or the second shift register unit 22.

[0115] Furthermore, when the first shift register unit 21 and the second shift register unit 22 are located on the same side of the display area AA, and the circuit structure of the second shift register unit 22 includes more components relative to the first shift register unit 21, the second shift register unit 22 may be located on the side of the first shift register unit 21 away from the display area AA to facilitate providing a larger routing space for the second shift register unit 22 and reducing the manufacturing difficulty of the display panel 001.

[0116] Figure 15 It is a schematic diagram of another display module provided by an embodiment of the present application.

[0117] As Figure 15 shown, to ensure the full-color display of the display panel 001, the first sub-pixel 11 may include a first color sub-pixel 11A and a second color sub-pixel 11B with different emission colors.

[0118] Optionally, the first color sub-pixel 11A is a red sub-pixel, and the second color sub-pixel 11B is a green sub-pixel.

[0119] In an embodiment of the present application, the first type of driving chip PA transmits data signals to the first sub-pixel 11 through the first data line DL1, and the first data line DL1 extends along the first direction X.

[0120] Among them, the first sub-pixels 11 arranged along the first direction X are electrically connected to the same first data line DL1, and at least some of the first sub-pixels 11 with different emission colors are arranged along the first direction X. That is, at least some of the first color sub-pixels 11A and the second color sub-pixels 11B can share the same first data line DL1.

[0121] In the embodiment of the present application, the first sub-pixels 11 with different emission colors are arranged along the first direction X, and the first sub-pixels 11 arranged along the first direction X are electrically connected to the same first data line DL1, so that at least some of the first sub-pixels 11 with different emission colors can share the same first data line DL1, which is beneficial to reducing the number of first data lines DL1 in the display module 100, and thus beneficial to saving the ports for connecting the first type of driving chip PA and the first data line DL1.

[0122] For example, Figure 15 the first type of driving chip PA in the shown display module 100 relative toFigure 1 The first type of driving chip PA in the display module 100 shown can save the ports connected to the first data line DL1.

[0123] Figure 16 Schematic diagram of a display device provided by an embodiment of the present application.

[0124] As Figure 16 As shown, an embodiment of the present application provides a display device 200, including the display module 100 provided by the above embodiment. The display device 200 provided by the embodiment of the present application may be a mobile phone. In addition, it may also be an electronic device such as a computer or a television.

[0125] In the display device 200, the first sub-pixel 11 and the second sub-pixel 12 adopt different designs, and the frequencies at which the first sub-pixel 11 and the second sub-pixel 12 receive data signals are set differently, which is beneficial to realizing fine control of the first sub-pixel 11 and the second sub-pixel 12. Thus, when driving the display panel 001 to emit light, the display characteristics of the first sub-pixel 11 and the second sub-pixel 12 can be taken into account, the luminous efficiency of the first sub-pixel 11 and the second sub-pixel 12 can be improved, and further the display quality of the display panel 001 can be improved.

[0126] In addition, realizing fine control of the first sub-pixel 11 and the second sub-pixel 12 can also save power consumption and reduce usage costs.

[0127] The above are only the preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included within the scope of protection of the present application.

Claims

1. A display module, characterized in that, It includes a display panel, and the display panel includes a plurality of sub-pixels, among which the plurality of sub-pixels include a first sub-pixel and a second sub-pixel; In the same frame display image of the display panel, the data writing frequency of the first sub-pixel is a first frequency, and the data writing frequency of the second sub-pixel is a second frequency; wherein, one of the first frequency and the second frequency is greater than the other; The light-emitting color of the first sub-pixel includes red and / or green, and the light-emitting color of the second sub-pixel is blue; The first sub-pixel includes a quantum dot light-emitting diode, and the second sub-pixel includes a micro light-emitting diode. In the same frame display image of the display panel, the second frequency is greater than the first frequency.

2. The display module according to claim 1, wherein The display module further includes a first type of driving chip and a second type of driving chip; wherein, the first type of driving chip is used to provide a data signal with a first frequency to the first sub-pixel, and the second type of driving chip is used to provide a data signal with a second frequency to the second sub-pixel.

3. The display module according to claim 1, wherein The light-emitting area of the second sub-pixel is larger than that of the first sub-pixel.

4. The display module according to claim 1, wherein In a frame display image of the display panel, the sub-pixel includes a plurality of light-emitting stages; Wherein, in the same frame display image of the display panel, the durations of different light-emitting stages of the first sub-pixel are the same, and the durations of at least some different light-emitting stages of the second sub-pixel are different.

5. The display module according to claim 4, wherein In the same frame display image of the display panel, the light-emitting stage of the first sub-pixel overlaps with the light-emitting stage of the second sub-pixel.

6. The display module according to claim 2, wherein The display panel further includes a plurality of shift register units, among which the plurality of shift register units include a first shift register unit and a second shift register unit; The first shift register unit is electrically connected to the first type of driving chip and the first sub-pixel, and the first type of driving chip controls the first shift register unit to transmit a scanning signal to the first sub-pixel; The second shift register unit is electrically connected to the second type of driving chip and the second sub-pixel, and the second type of driving chip controls the second shift register unit to transmit a scanning signal to the second sub-pixel.

7. The display module according to claim 6, wherein The first type of driving chip and the second type of driving chip are arranged along a first direction, and the first type of driving chip and the second type of driving chip are located on opposite sides of the display panel.

8. The display module according to claim 7, wherein The display panel includes a display area and a non-display area, and the non-display area surrounds the display area; the non-display area includes a first area and a second area arranged along a second direction, the first area and the second area are located on opposite sides of the display area, and the second direction intersects with the first direction; The first shift register unit and the second shift register unit are respectively located in the first area and the second area; or both the first area and the second area include the first shift register unit and the second shift register unit.

9. The display module according to claim 2, wherein The first type of driving chip transmits a data signal to the first sub-pixel through a first data line, and the first data line extends in a first direction; wherein, the first sub-pixels arranged along the first direction are electrically connected to the same first data line, and at least some of the first sub-pixels with different emission colors are arranged along the first direction.

10. A display device, characterized in that, A display module includes the display module according to any one of claims 1-9.

Citation Information

Patent Citations

  • Display panel and display device

    CN114863863A