Semiconductor device

Abstract

The semiconductor device disclosed in this specification includes a first semiconductor element, a first conductor plate, a first insulating layer, and a conductor circuit pattern. The first semiconductor element has one surface provided with a first electrode and a second electrode, and another surface located on the opposite side of the one surface. The first conductor plate has a first surface facing the one surface of the first semiconductor element, and is electrically connected to the first electrode of the first semiconductor element on the first surface. The first insulating layer is provided on the first surface of the first conductor plate and covers a part of the first surface. The conductor circuit pattern is provided on the first insulating layer. The conductor circuit pattern has at least one first conductor line electrically connected to the first semiconductor element, and at least one first conductor line includes a conductor line electrically connected to the second electrode.

Description

Technical Field

[0001] The technology disclosed by the present invention relates to semiconductor devices. Background Art

[0002] A semiconductor device is disclosed in Japanese Unexamined Patent Application Publication No. 2016 - 46497. The semiconductor device includes a semiconductor element having a first electrode and a second electrode provided on one surface, and a conductor plate facing one surface of the semiconductor element and electrically connected to the first electrode of the semiconductor element. A metal wire is connected to the second electrode of the semiconductor element. Summary of the Invention

[0003] Problems to be Solved by the Invention

[0004] In the above semiconductor device, the first electrode and the second electrode are provided on the same surface of the semiconductor element, and two different conductor components are respectively connected to the first electrode and the second electrode. In such a configuration, it is necessary to ensure electrical insulation between the two conductor components, so for example, the semiconductor device may be enlarged. This specification provides a new configuration for a semiconductor device in which a semiconductor element has two electrodes on the same surface.

[0005] Means for Solving the Problems

[0006] The semiconductor device disclosed in this specification includes a first semiconductor element, a first conductor plate, a first insulating layer, and a conductor circuit pattern. The first semiconductor element has one surface provided with a first electrode and a second electrode and another surface located on the opposite side of the one surface. The first conductor plate has a first surface facing the one surface of the first semiconductor element, and is electrically connected to the first electrode of the first semiconductor element on the first surface. The first insulating layer is provided on the first surface of the first conductor plate and covers a part of the first surface. The conductor circuit pattern is provided on the first insulating layer. The conductor circuit pattern has at least one first conductor line electrically connected to the first semiconductor element; at least one first conductor line includes a conductor line electrically connected to the second electrode.

[0007] In the above semiconductor device, the conductor circuit pattern is provided on the first surface of the first conductor plate with the first insulating layer interposed therebetween. Also, the first electrode of the first semiconductor element is electrically connected to the first surface of the first conductor plate, and the second electrode of the first semiconductor element is electrically connected to the first conductor line of the conductor circuit pattern. According to such a structure, the first conductor plate electrically connected to the first electrode and the first conductor line electrically connected to the second electrode are insulated by the first insulating layer interposed therebetween. Thus, an unwanted contact between the first conductor plate and the first conductor line is prevented, so for example, it is not necessary to provide a large distance between the two, and the useless enlargement of the semiconductor device can be suppressed. Brief Description of the Drawings

[0008] Figure 1 It is a plan view showing the appearance of the semiconductor device 10 of Embodiment 1.

[0009] Figure 2 is Figure 1 A cross-sectional view taken along line II-II, showing the internal structure of the semiconductor device 10. Only the outer shape of the encapsulant 11 is illustrated.

[0010] Figure 3 It is a plan view of the lower surface 30b of the second insulating circuit board 30.

[0011] Figure 4 It is a plan view of the upper surface 20a of the first insulating circuit board 20.

[0012] Figure 5 It is a plan view of the lower surface of the first semiconductor element 12.

[0013] Figure 6 is Figure 2 A cross-sectional view taken along line VI-VI. The encapsulant 11 is illustrated by a dashed line.

[0014] Figure 7 It is an electronic circuit diagram showing the structure of the semiconductor device 10.

[0015] Figure 8 It is a cross-sectional view showing the internal structure of the semiconductor device 10A of Modification 1. Among them, regarding the encapsulant 11, the hatching is omitted for clarity of illustration. Regarding Figures 9 to 11 , Figure 18 , Figure 19 's encapsulant 11 is also illustrated in the same way as Figure 8 .

[0016] Figure 9 It is a cross-sectional view showing the internal structure of the semiconductor device 10B of Modification 2.

[0017] Figure 10 It is a cross-sectional view showing the internal structure of the semiconductor device 10C of Modification 3.

[0018] Figure 11 It is a cross-sectional view showing the internal structure of the semiconductor device 10D of Modification 4.

[0019] Figure 12 (a) to (d) are cross-sectional views for explaining the first process in the manufacturing method of the semiconductor device 10. Figure 12 (a) shows the process of preparing the first insulating circuit board 20. Figure 12 (b) shows the process of forming the resin layer 50 on the first inner conductor plate 24 of the first insulating circuit board 20. Figure 12Step (c) represents the step of exposing the formed resin layer 50. Figure 12 Step (d) represents the step of developing the exposed resin layer 50.

[0020] Figure 13 Steps (a) to (e) are cross-sectional views illustrating the second step in the manufacturing method of the semiconductor device 10. Figure 13 Step (a) represents the step of forming a seed layer 52 on the first insulating layer 26 formed in the first step. Figure 13 Step (b) represents the step of forming a patterned resist layer 54 on the seed layer 52. Figure 13 Step (c) represents the step of forming a plating layer 56 on the seed layer 52 covered with the resist layer 54. Figure 13 Step (d) represents the step of removing the resist layer 54 from the seed layer 52. Figure 13 Step (e) represents the step of removing the seed layer 52.

[0021] Figure 14 Steps (a) to (b) are cross-sectional views illustrating a modified example of the second step in the manufacturing method of the semiconductor device 10. Figure 14 Step (a) represents the first reflow step. Figure 14 Step (b) represents the second reflow step.

[0022] Figure 15 Steps (a) to (c) are cross-sectional views illustrating a modified example of the second step in the manufacturing method of the semiconductor device 10. Figure 15 Step (a) represents the step of forming a patterned resist layer 55 on the first insulating layer 26 formed in the first step. Figure 15 Step (b) represents the step of forming a plating layer 57 on the first insulating layer 26 covered with the resist layer 55. Figure 15 Step (c) represents the step of removing the resist layer 55 from the first insulating layer 26.

[0023] Figure 16 It is a cross-sectional view showing the internal structure of the semiconductor device 10E of Modified Example 5. This cross-sectional view shows a cross-section of the semiconductor device 10E perpendicular to the thickness direction.

[0024] Figure 17 It is a cross-sectional view showing the internal structure of the semiconductor device 10F of Modified Example 6. This cross-sectional view shows a cross-section of the semiconductor device 10F perpendicular to the thickness direction.

[0025] Figure 18 It is a cross-sectional view showing the internal structure of the semiconductor device 100 of Example 2.

[0026] Figure 19 is Figure 18 a cross-sectional view taken along line XIX - XIX.

[0027] Figure 20 It is a plan view of the lower surface 30b of the second insulating circuit board 30 of Example 2.

[0028] Figure 21 It is a plan view of the upper surface 20a of the first insulating circuit board 20 of Example 2.

[0029] Figure 22 It is Figure 18 a cross-sectional view taken along line XXII - XXII of

[0030] Figure 23 It is an electronic circuit diagram showing the structure of the semiconductor device 100.

[0031] Figure 24 It is a plan view of the lower surface 30b of the second insulating circuit board 30 in another embodiment of Example 2.

[0032] Figure 25 It is a plan view of the upper surface 20a of the first insulating circuit board 20 in another embodiment of Example 2.

[0033] Figure 26 It is a cross-sectional view showing the internal structure of another embodiment of Example 2. Detailed implementation mode

[0034] In one embodiment of the present technology, the thickness of the conductor circuit pattern can be smaller than the thickness of the first conductor plate. If the thickness of the conductor circuit pattern is small, it is easy to form a precise conductor circuit pattern by layout processing such as etching, for example.

[0035] In one embodiment of the present technology, the semiconductor device may further include a first connection terminal electrically connected to the first conductor line. In one example, the first connection terminal may be joined to the first conductor line via a conductive bonding layer such as a solder layer, for example. Alternatively, the first connection terminal may also be connected to the first conductor line via a flexible and conductive connection member such as a wire. By using a flexible connection member, relative displacement between the first connection terminal and the first conductor line accompanied by thermal deformation, for example, can be tolerated. Here, a connection member such as a wire can be made of a metal material such as copper, for example.

[0036] In addition to the above structure, the first conductor line may have one end electrically connected to the first semiconductor element and the other end electrically connected to the first connection terminal. In this case, it may be that the width dimension of the other end of the first conductor line is larger than the width dimension of one end of the first conductor line. According to such a structure, it is possible to easily connect the first connection terminal to the first conductor line even when the size of the first semiconductor element is relatively small.

[0037] In one embodiment of the present technology, at least one of the above-described first conductor lines may include two conductor lines parallel to each other, and the two parallel conductor lines may be electrically connected to the first semiconductor element at one end, respectively. In this case, the distance between the centers of the other ends of the two parallel conductor lines may be larger than the distance between the centers of the one ends of the two parallel conductor lines. According to such a structure, one ends of the two conductor lines can be connected to the first semiconductor element with a relatively small size, and other components can be easily connected to the other ends of the two conductor lines.

[0038] In one embodiment of the present technology, the first insulating layer may have an opening exposing the first surface of the first conductor plate, and the first electrode of the first semiconductor element may pass through the opening of the first insulating layer and be joined to the first surface of the first conductor plate. According to such a structure, it is possible to prevent the first electrode from being joined across a desired area on the first conductor plate. Therefore, it is possible to reduce the short circuit between the first electrode and the second electrode caused by such joining.

[0039] In one embodiment of the present technology, the first electrode may be a power electrode of the first semiconductor element, and the second electrode may be a signal electrode of the first semiconductor element. In this case, although not particularly limited, a vertical structure power semiconductor element can be used for the first semiconductor element.

[0040] In one embodiment of the present technology, the semiconductor device may further include an insulating cover that locally covers the first conductor line. According to such a structure, it is possible to prevent the first conductor line from being accidentally short-circuited with other components.

[0041] In one embodiment of the present technology, on the first insulating layer of the first conductor plate, a mark for positioning the first semiconductor element may be provided at a position corresponding to the periphery of the first semiconductor element. According to such a structure, during the manufacture of the semiconductor device, the first semiconductor element can be accurately positioned on the first conductor plate. The specific structure of the mark is not particularly limited, and the mark can be configured, for example, to be recognizable by image processing.

[0042] In an embodiment of the present technology, the semiconductor device may further include an electronic component located on the first insulating layer. In this case, the conductor circuit pattern may further have at least one conductor line connected to the electronic component. According to such a structure, any electronic component can be implanted into the semiconductor device using the remaining area on the first insulating layer. In one example, the electronic component may include a thermistor. According to such a structure, the temperature of the first semiconductor element can be measured relatively accurately. For example, since there is no need to provide a temperature sensor for the first semiconductor element, the first semiconductor element can be made relatively smaller or the active area of the first semiconductor element can be increased accordingly. Alternatively, as another embodiment, the electronic component may be a drive circuit for driving the first semiconductor element.

[0043] In an embodiment of the present technology, the semiconductor device may further include an insulator substrate provided with a first conductor plate. The insulator substrate referred to in this specification is a plate-like component made of an insulator. The insulator substrate can be made of, for example, a ceramic material. The first conductor plate and the insulator substrate may be a part of a so-called DBC (Direct Bonded Copper) substrate, a DBA (Direct Bonded Aluminum) substrate, or an AMB substrate. The AMB substrate referred to here generally refers to an insulating circuit substrate manufactured using active metal brazing, and examples thereof may include an active metal brazed copper circuit substrate.

[0044] In an embodiment of the present technology, the semiconductor device may further include a second conductor plate having a second surface facing the other surface of the first semiconductor element. In addition, the first semiconductor element preferably further has a third electrode provided on the other surface and electrically connected to the second surface of the second conductor plate. According to such a structure, the heat generated by the first semiconductor element is transferred to the first conductor plate and the second conductor plate located on both sides thereof, so the temperature rise of the first semiconductor element is effectively suppressed.

[0045] In an embodiment of the present technology, the semiconductor device may further include a second insulating layer provided on the second surface of the second conductor plate and covering a part of the second surface. According to such a structure, it is possible to prevent the second conductor plate from being accidentally short-circuited with the first conductor plate or other components.

[0046] In an embodiment of the present technology, the semiconductor device may further include a first connection terminal electrically connected to the first conductor line. In this case, one end portion of the first connection terminal may be located between the first conductor line and the second insulating layer and joined to the first conductor line. Further, a pad provided integrally or separately with the first connection terminal may be disposed between one end portion of the first connection terminal and the second insulating layer. According to such a structure, positioning in the stacking direction of the semiconductor device between the first conductor plate and the second conductor plate can be accurately performed without using a jig by the pad provided between one end portion of the first connection terminal and the second insulating layer.

[0047] In addition to the above structure, the semiconductor device may further include a conductor film provided on the second insulating layer. Further, the pad may be joined to the conductor film via a joining layer. According to such a structure, the first connection terminal is fixed to the first conductor plate and fixed to the second conductor plate via the pad. Therefore, changes in the relative position and posture of the first connection terminal in the first conductor plate and the second conductor plate are suppressed.

[0048] In an embodiment of the present technology, the semiconductor device may further include a second semiconductor element having one surface provided with a fourth electrode and a fifth electrode and another surface located on the opposite side of the fifth surface. Further, the first surface of the first conductor plate may face one surface of the second semiconductor element and be electrically connected to the fourth electrode of the second semiconductor element. Further, the conductor circuit pattern may further include at least one second conductor line electrically connected to the second semiconductor element. Further, at least one second conductor line may include a conductor line electrically connected to the fifth electrode. In this way, the semiconductor device may have two or more semiconductor elements, and these semiconductor elements may be connected in parallel to each other.

[0049] In an embodiment of the present technology, at least a part of the second conductor line may be common to at least a part of the first conductor line. In this case, the first conductor line may branch or merge from the middle of the second conductor line, and the second conductor line may branch or merge from the middle of the first conductor line. According to such a structure, one or more conductor lines can be made common between the first semiconductor element and the second semiconductor element, and the structure of the conductor circuit pattern can be made relatively simple corresponding to the number of semiconductor elements. Thereby, for example, miniaturization of the semiconductor device can be achieved. At this time, the common conductor line can transmit a common control signal (for example, a gate drive signal) to the first semiconductor element and the second semiconductor element, for example.

[0050] In an embodiment of the present technology, the semiconductor device may further include a second semiconductor element, a third conductor plate, a fourth conductor plate, a third insulating layer, a connection component, and a second conductor circuit pattern. The second semiconductor element may have one surface provided with a fourth electrode and a fifth electrode, and another surface located on the opposite side of the one surface and provided with a sixth electrode. The third conductor plate may have a third surface facing the one surface of the second semiconductor element, and be electrically connected to the fourth electrode of the second semiconductor element on the third surface. The fourth conductor plate may have a fourth surface facing the other surface of the first semiconductor element, and be electrically connected to the sixth electrode of the second semiconductor element on the fourth surface. The connection component may be located between the first conductor plate and the fourth conductor plate, and electrically connect the first conductor plate and the fourth conductor plate. The third insulating layer may be provided on the third surface of the third conductor plate to cover a part of the third surface. The second conductor circuit pattern may be provided on the third insulating layer. In this case, the second conductor circuit pattern may have at least one second conductor line electrically connected to the second semiconductor element. At least one second conductor line may include a conductor line electrically connected to the fifth electrode. Thus, the semiconductor device may have two or more semiconductor elements, and these semiconductor elements are connected in series with each other.

[0051] In addition to the above structure, the semiconductor device may further include an insulator substrate provided with the first conductor plate and the third conductor plate. Alternatively or in addition, the semiconductor device may further include another insulator substrate provided with the second conductor plate and the fourth conductor plate.

[0052] Embodiment

[0053] (Embodiment 1)

[0054] Refer to Figures 1 to 7 The semiconductor device 10 of Embodiment 1 will be described. The semiconductor device 10 is used for, for example, a power control device of an electric vehicle, and can constitute at least a part of a power conversion circuit such as a converter and an inverter. The electric vehicle described here generally refers to an automobile having a motor for driving wheels, such as an electric vehicle charged by external power, a hybrid vehicle having an engine in addition to the motor, and a fuel cell vehicle powered by a fuel cell.

[0055] As Figures 1 to 7As shown, the semiconductor device 10 includes a first semiconductor element 12 and a sealing body 11. The sealing body 11 is made of an insulating material. In one example, the sealing body 11 can be formed of, for example, epoxy resin. The sealing body 11 generally has a plate shape and has an upper surface 11a and a lower surface 11b located on the side opposite to the upper surface 11a. In addition, the sealing body 11 has a first side surface 11c, a second side surface 11d, a first end surface 11e, and a second end surface 11f, and these four surfaces extend between the upper surface 11a and the lower surface 11b. The first side surface 11c and the second side surface 11d are located on opposite sides of each other, and the first end surface 11e and the second end surface 11f are located on opposite sides of each other.

[0056] The semiconductor device 10 includes a plurality of connection terminals 14, 15, 18 whose other ends protrude from the sealing body 11. One end of each of the plurality of connection terminals 14, 15, 18 is electrically connected to the first semiconductor element 12 inside the sealing body 11. The plurality of connection terminals 14, 15, 18 include a first power terminal 14, a second power terminal 15, and a plurality of first signal terminals 18. The first power terminal 14 and the second power terminal 15 protrude from the first end surface 11e of the sealing body 11, and each of the first signal terminals 18 protrudes from the second end surface 11f of the sealing body 11. The first power terminal 14 can be connected to the positive electrode of an external DC power supply, and the second power terminal 15 can be connected to the negative electrode of an external DC power supply. The first signal terminals 18 are connected to an external device such as a control substrate, for example, to control the first semiconductor element 12. In addition, each of the connection terminals 14, 15, 18 is formed of a conductive material such as copper or other metal materials, for example.

[0057] As Figure 2 , Figure 5 shown, the first semiconductor element 12 is a power semiconductor element and has a semiconductor substrate 12a and a plurality of electrodes 12b, 12c, 12d. Among the plurality of electrodes 12b, 12c, 12d, there are included a collector electrode 12b connected to a power circuit, an emitter electrode 12c, and a plurality of signal electrodes 12d connected to a signal circuit. The first semiconductor element 12 is a switching element and can conduct and disconnect between the collector electrode 12b and the emitter electrode 12c. Although not particularly limited, the first semiconductor element 12 is a vertical structure power semiconductor element, the collector electrode 12b is located on the upper surface side of the semiconductor substrate 12a, and the emitter electrode 12c and the plurality of signal electrodes 12d are located on the lower surface side of the semiconductor substrate 12a. Here, the emitter electrode 12c and the signal electrode 12d are examples of the first electrode and the second electrode, respectively, in the technology disclosed in this specification, and the collector electrode 12b is an example of the third electrode in the technology disclosed in this specification.

[0058] Although not particularly limited, as Figure 7As shown, the first semiconductor element 12 in this embodiment is an RC-IGBT (Reverse Conducting-Insulated Gate Bipolar Transistor). Thus, the first semiconductor element 12 has an IGBT structure 12e and a diode structure 12f connected in parallel with the IGBT structure 12e. The collector electrode 12b is connected to the collector of the IGBT structure 12e, the emitter electrode 12c is connected to the emitter of the IGBT structure 12e, and the signal electrode 12d is connected to the gate of the IGBT structure 12e. The collector electrode 12b is connected to the cathode of the diode structure 12f, and the emitter electrode 12c is connected to the anode of the diode structure 12f. Additionally, as another embodiment, the first semiconductor element 12 may have a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) structure. In this case, the first semiconductor element 12 may have a drain electrode and a source electrode instead of the collector electrode 12b and the emitter electrode 12c. The drain electrode may be connected to the drain of the MOSFET structure, and the source electrode may be connected to the source of the MOSFET structure. Further, in this case, the signal electrode 12d may be connected to the gate of the MOSFET structure.

[0059] The specific structure of the first semiconductor element 12 is not particularly limited, and various semiconductor elements can be used for the first semiconductor element 12. There is also no particular limitation on the material of the semiconductor substrate 12a constituting the first semiconductor element 12. For example, various semiconductor materials such as silicon (Si), silicon carbide (SiC), or gallium nitride (GaN) can be used.

[0060] As Figure 2 As shown, the semiconductor device 10 includes a first insulating circuit board 20 and a second insulating circuit board 30. The two insulating circuit boards 20 and 30 face each other with the first semiconductor element 12 interposed therebetween. The first insulating circuit board 20 has an upper surface 20a located inside the encapsulant 11 and a lower surface 20b located on the opposite side of the upper surface 20a. The first insulating circuit board 20 faces the lower surface of the first semiconductor element 12 on the upper surface 20a and is joined to the emitter electrode 12c of the first semiconductor element 12 via a solder layer 40. The second insulating circuit board 30 has a lower surface 30b located inside the encapsulant 11 and an upper surface 30a located on the opposite side of the lower surface 30b. The second insulating circuit board 30 faces the upper surface of the first semiconductor element 12 on the lower surface 30b and is joined to the collector electrode 12b of the first semiconductor element 12 via a solder layer 42. Thus, the first insulating circuit board 20 and the second insulating circuit board 30 are electrically and thermally connected to the first semiconductor element 12 inside the encapsulant 11 and constitute a part of the power circuit.

[0061] The first insulating circuit board 20 has a first ceramic substrate 22. The first ceramic substrate 22 is a plate-shaped member made of ceramic, which is an insulator. On the upper surface of the first ceramic substrate 22, a first inner conductor plate 24 is provided, and on the lower surface of the first ceramic substrate 22, a first outer conductor plate 28 is provided. The first inner conductor plate 24 and the first outer conductor plate 28 are made of a conductor material. The first inner conductor plate 24 and the first outer conductor plate 28 are electrically insulated by the ceramic substrate 22. The first inner conductor plate 24 is joined to the emitter electrode 12c of the first semiconductor element 12 via a solder layer 40. Thus, the first insulating circuit board 20 is electrically connected to the emitter electrode 12c of the first semiconductor element 12 at the first inner conductor plate 24.

[0062] The second insulating circuit board 30 has a second ceramic substrate 32. The second ceramic substrate 32 is a plate-shaped member made of ceramic, which is an insulator. On the upper surface of the second ceramic substrate 32, a second outer conductor plate 38 is provided, and on the lower surface of the second ceramic substrate 32, a second inner conductor plate 34 is provided. The second inner conductor plate 34 and the second outer conductor plate 38 are made of a conductor material. The second inner conductor plate 34 and the second outer conductor plate 38 are electrically insulated by the second ceramic substrate 32. The second inner conductor plate 34 is joined to the collector electrode 12b of the first semiconductor element 12 via a solder layer 42. Thus, the second insulating circuit board 30 is electrically connected to the collector electrode 12b of the first semiconductor element 12 at the second inner conductor plate 34.

[0063] In addition, the upper surface 30a of the second insulating circuit board 30 (i.e., the second outer conductor plate 38) is exposed in the upper surface 11a of the encapsulant 11, and the lower surface 20b of the first insulating circuit board 20 (i.e., the first outer conductor plate 28) is exposed in the lower surface 11b of the encapsulant 11. Thus, the two insulating circuit boards 20 and 30 also function as heat dissipation plates for dissipating the heat generated by the first semiconductor element 12 on the two surfaces 11a and 11b of the encapsulant 11.

[0064] As Figure 2 、 Figure 3As shown, a second insulating layer 36 is provided on the second inner conductor plate 34 of the second insulating circuit board 30. The second insulating layer 36 covers a part of the second inner conductor plate 34. In one example, the second insulating layer 36 has an opening 36a that exposes the second inner conductor plate 34. Accordingly, the collector electrode 12b of the first semiconductor element 12 passes through the opening 36a of the second insulating layer 36 and is joined to the second inner conductor plate 34 via a solder layer 42. In addition, one end portion of the first power terminal 14 is joined to the second inner conductor plate 34 via a solder layer 44. Although not particularly limited, the second insulating layer 36 may be provided on the second inner conductor plate 34 at a portion other than the joining region.

[0065] As Figure 2 , Figure 4 and Figure 6 shown, a first insulating layer 26 is provided on the first inner conductor plate 24 of the first insulating circuit board 20. The first insulating layer 26 covers a part of the first inner conductor plate 24. In one example, the first insulating layer 26 has an opening 26a that exposes the first inner conductor plate 24. The emitter electrode 12c of the first semiconductor element 12 passes through the opening 26a of the first insulating layer 26 and is joined to the first inner conductor plate 24 via a solder layer 40. In addition, one end portion of the second power terminal 15 is joined to the first inner conductor plate 24 via a solder layer 45. Although not particularly limited, the first insulating layer 26 may be provided on the first inner conductor plate 24 at a portion other than the joining region. Here, the above-described first insulating layer 26 and second insulating layer 36 are made of an insulating material, for example, a resin material such as polyimide.

[0066] The first insulating circuit board 20 further has a first conductor circuit pattern 27. The first conductor circuit pattern 27 is provided on the first insulating layer 26. Although not particularly limited, the conductor circuit pattern is located inside the encapsulant 11. In addition, the first conductor circuit pattern 27 includes a plurality of first conductor lines 27a. The plurality of first conductor lines 27a are electrically connected to the first semiconductor element 12. Each first conductor line 27a has one end portion close to the first semiconductor element and the other end portion away from the first semiconductor element 12. One end portion of the first conductor line 27a is joined to the signal electrode 12d of the first semiconductor element 12 via a solder layer 46. The other end portion of the first conductor line 27a is joined to one end portion of the first signal terminal 18 via a solder layer 48. Accordingly, each first signal terminal 18 is electrically connected to the signal electrode 12d of the first semiconductor element 12 via the first conductor line 27a.

[0067] Although not particularly limited, as Figure 2As shown, the thickness t2 of the first conductor circuit pattern 27 is smaller than the thickness t1 of the first inner conductor plate 24 of the first insulating circuit substrate 20. The first conductor circuit pattern 27 is made of a conductor material such as copper or other metal materials, for example. In addition, not limited to the solder layers 46 and 48, the signal electrode 12d and the first conductor line 27a, and the first conductor line 27a and the first signal terminal 18 may also be joined via other conductive joining layers.

[0068] In addition, as Figure 4 , Figure 6 shown, on the first insulating layer 26 of the first insulating circuit substrate 20, a mark M for positioning the first semiconductor element 12 is provided at a position corresponding to the periphery of the first semiconductor element 12. According to such a structure, when manufacturing the semiconductor device 10, the first semiconductor element 12 can be positioned on the first inner conductor plate 24 with good accuracy. The specific structure of the mark is not particularly limited. The mark M can be configured to be recognizable by image processing, for example.

[0069] In one example, the first insulating circuit substrate 20 and the second insulating circuit substrate 30 are DBC substrates. However, the first insulating circuit substrate 20 and the second insulating circuit substrate 30 are not limited to DBC substrates and may also be DBA substrates or AMB substrates. In addition, as described above, the respective ceramic substrates 22 and 32 are insulator members made of ceramics. The respective ceramic substrates 22 and 32 are made of ceramic materials such as alumina, silicon nitride, and aluminum nitride, for example. Here, the ceramic substrates 22 and 32 are an example of the insulator substrates in the technology disclosed in this specification. The insulator substrate is not limited to ceramic materials and may also be made of an insulating material such as a resin material, for example.

[0070] In the semiconductor device 10 described above, an emitter electrode 12c and a plurality of signal electrodes 12d are provided on the lower surface of the first semiconductor element 12. The emitter electrode 12c is connected to the first inner conductor plate 24, and each signal electrode 12d is connected to the first conductor line 27a, respectively. In such a structure where different two conductor components are connected to the first semiconductor element 12, it is necessary to ensure electrical insulation between the two conductor components.

[0071] In view of the above problems, in the semiconductor device 10 of the present embodiment, on the first inner conductor plate 24, a first conductor circuit pattern 27 is provided with a first insulating layer 26 interposed therebetween. Further, the emitter electrode 12c of the first semiconductor element 12 is electrically connected to the first inner conductor plate 24, and the plurality of signal electrodes 12d of the first semiconductor element 12 are respectively electrically connected to the first conductor line 27a of the first conductor circuit pattern 27. According to such a structure, the first inner conductor plate 24 electrically connected to the emitter electrode 12c and the first conductor line 27a electrically connected to the signal electrode 12d are insulated by the first insulating layer 26 interposed therebetween. Thereby, an unwanted contact is prevented between the first inner conductor plate 24 and the first conductor line 27a, and thus, for example, a large distance does not need to be provided between the two, and an unnecessary enlargement of the semiconductor device 10 can be suppressed.

[0072] As Figure 2 shown, in the semiconductor device 10 of the present embodiment, the thickness t2 of the first conductor circuit pattern 27 is smaller than the thickness t1 of the first inner conductor plate 24. If the thickness t2 of the first conductor circuit pattern 27 is small, a precise first conductor circuit pattern 27 can be easily formed by a layout process such as etching. In particular, in the case where the first conductor circuit pattern 27 is used as a part of a signal circuit as in the present embodiment, the voltage applied to the first conductor circuit pattern 27 is smaller than the voltage applied to the first inner conductor plate 24 as a part of a power circuit. Thus, the thickness t2 of the first conductor circuit pattern 27 can be made relatively small accordingly. In one example, the thickness t2 of the conductor circuit pattern may be several tens of micrometers. However, the signal electrode 12d of the first semiconductor element 12 is an example of the second electrode disclosed in the present specification, and the second electrode may be, for example, a collector electrode as a power electrode. In this case, the first semiconductor element 12 may be a lateral-type power semiconductor element.

[0073] In the semiconductor device 10 of the present embodiment, the first insulating layer 26 has an opening 26a that exposes the upper surface 20a of the first insulating circuit substrate 20 (i.e., the first inner conductor plate 24). The emitter electrode 12c of the first semiconductor element 12 passes through the opening 26a of the first insulating layer 26 and is joined to the upper surface 20a of the first inner conductor plate 24 via a solder layer 40. According to such a structure, it is possible to prevent the emitter electrode 12c from being joined beyond a desired region on the first inner conductor plate 24. Thus, the short circuit between the emitter electrode 12c and each signal electrode 12d caused by this joining can be reduced. Further, the solder layer 40 is not limited, and the first inner conductor plate 24 and the emitter electrode 12c may also be joined via another conductive joining layer.

[0074] In the semiconductor device 10 of the present embodiment, a second insulating layer 36 is provided on the lower surface 30b (i.e., the second inner conductor plate 34) of the second insulating circuit board 30, covering a part of the lower surface 30b. With such a structure, it is possible to prevent the second inner conductor plate 34 from being accidentally short-circuited with the first inner conductor plate 24 of the first insulating circuit board 20 or other components. That is, a short circuit between the collector and emitter of the semiconductor device 10 is prevented.

[0075] As Figure 4 shown, in the semiconductor device 10 of the present embodiment, the first conductor line 27a has one end electrically connected to the first semiconductor element 12 and the other end electrically connected to the first signal terminal 18. In this case, preferably, the width dimension w2 of the other end of the first conductor line 27a is larger than the width dimension w1 of one end of the first conductor line 27a. With such a structure, even when the size of the first semiconductor element 12, particularly the width dimension of the signal electrode 12d, is relatively small, it is possible to easily connect, for example, the first signal terminal 18 having a width dimension larger than that of the first signal electrode 12d to the first conductor line 27a.

[0076] In addition, in the semiconductor device 10 of the present embodiment, among two parallel first conductor lines 27a among the plurality of first conductor lines 27a, the center-to-center distance d2 of the other ends of the two parallel first conductor lines 27a is larger than the center-to-center distance d1 of one ends of the two parallel first conductor lines 27a. With such a structure, it is also possible to connect one ends of the two first conductor lines 27a to the signal electrode 12d of the first semiconductor element 12 having a relatively small size, and it is easy to connect, for example, signal terminals having a width dimension larger than that of the signal electrode 12d to the other ends of the two first conductor lines 27a.

[0077] The semiconductor device 10 of the present embodiment can be variously modified in addition to this. Refer to Figures 8 to 11 to describe other modification examples.

[0078] (Modification Example 1)

[0079] Refer to Figure 8 to describe the semiconductor device 10A of Modification Example 1. As Figure 8 shown, in the semiconductor device 10A of Modification Example 1, instead of the solder layer 48 in Embodiment 1, the first signal terminal 18 is connected to the first conductor line 27a via a wire 49. In the semiconductor device 10A of Modification Example 1, other parts except for the wire 49 can be configured in the same manner as the semiconductor device 10 of Embodiment 1. In Modification Example 1, the same components as those in Embodiment 1 are denoted by the same reference numerals, and repeated descriptions are omitted.

[0080] The wire 49 connects the first signal terminal 18 to the first conductor line 27a and is made of a metallic material such as copper, for example. The connecting member that connects the first signal terminal 18 to the first conductor line 27a is not limited to the wire 49, and for example, a connecting member having flexibility and conductivity is sufficient. By using such a flexible wire 49, relative displacement between the first signal terminal 18 and the first conductor line 27a due to, for example, thermal deformation can be tolerated. Additionally, it is also possible that not only between the first signal terminal 18 and the first conductor line 27a, but also between the first conductor line 27a and the signal electrode 12d are connected via a wire, for example.

[0081] (Modification 2)

[0082] Refer to Figure 9 The semiconductor device 10B of Modification 2 will be described. As Figure 9 shown, the semiconductor device 10B of Modification 2 further includes a conductor film 37 in addition to the structure of the semiconductor device 10 of Embodiment 1. In addition, the shapes of the first signal terminal 18 and the second power terminal 15 in Embodiment 1 are each partially changed. In the semiconductor device 10B of Modification 2, other parts except for these parts can be configured in the same manner as the semiconductor device 10 of Embodiment 1. In Modification 2, the same components as those in Embodiment 1 are denoted by the same reference numerals, and redundant descriptions are omitted.

[0083] The conductor film 37 is provided on the second insulating layer 36 of the second insulating circuit board 30. The conductor film 37 is formed of a conductor material such as copper or other metallic materials, for example. In addition, at one end of each of the first signal terminals 18 in Modification 2, a plurality of first protrusions 18a extending toward the first conductor line 27a are provided. The first signal terminal 18 is joined to the other end of the first conductor line 27a via a solder layer 48 at each of the first protrusions 18a. Thereby, when joining the first signal terminal 18 to the first conductor line 27a, the infiltration and diffusion of the solder are suppressed by the edge portions of the first protrusions 18a. Thus, it is possible to prevent the solder from coming into contact with an undesired position other than the joining region.

[0084] In addition, at one end of each of the first signal terminals 18, at a position opposite to the plurality of first protrusions 18a, a plurality of second protrusions 18b extending toward the conductor film 37 are provided. The first signal terminal 18 is joined to the conductor film 37 via a solder layer at each of the second protrusions 18b. According to such a structure, the first signal terminal 18 is fixed to the first insulating circuit board 20 via the first protrusions 18a and is fixed to the second insulating circuit board 30 via the second protrusions 18b. Thus, changes in the relative position and posture of the first signal terminal 18 in the first insulating circuit board 20 and the second insulating circuit board 30 are suppressed.

[0085] In addition, similar to the first signal terminal 18, at one end of the second power terminal 15, a third convex portion 15a extending toward the first inner conductor plate 24 is provided, and a fourth convex portion 15b located on the opposite side of the third convex portion 15a and extending toward the conductor film 37 is provided. The second power terminal 15 is joined to the first inner conductor plate 24 via a solder layer 45 at the third convex portion 15a, and is joined to the conductor film 37 via a solder layer at the fourth convex portion 15b. Thereby, the semiconductor device 10B can fix the first insulating circuit board 20 and the second insulating circuit board 30 via the plurality of convex portions 18a, 18b, 15a, 15b for both the first signal terminal 18 and the second power terminal 15. Consequently, in the semiconductor device 10B, the first insulating circuit board 20 and the second insulating circuit board 30 can be stably supported. Therefore, during the assembly of the semiconductor device 10B, positioning in the stacking direction of the semiconductor device 10B between the insulating circuit board 20 and the second insulating circuit board 30 can be accurately performed without using a jig.

[0086] In addition, the number of the convex portions 18a, 18b, 15a, 15b of the first signal terminal 18 and the second power terminal 15 is not limited to Figure 9 the number illustrated in. One or more convex portions 18a, 18b, 15a, 15b can be provided for the first signal terminal 18 and the second power terminal 15, respectively. In addition, in Figure 9 , the respective convex portions 18a, 18b, 15a, 15b are integrally formed on the first signal terminal 18 or the second power terminal 15, respectively, but it is not limited thereto, and a component (for example, a spacer) separated from the first signal terminal 18 or the second power terminal 15 can also be provided. In this case, the spacer can be formed of the same or different material as the first signal terminal 18 or the second power terminal 15. Alternatively, for example, regarding the second convex portion 18b and / or the fourth convex portion 15b, it can be integrally formed with the second insulating layer 36 or can be separately formed. In this case, the semiconductor device 10B of the second modification example may not include the second insulating layer 36. In addition, the above convex portions 18a, 18b, 15a, 15b can be provided for all of the plurality of connection terminals 14, 15, 18, or can be provided for at least one of the plurality of connection terminals 14, 15, 18.

[0087] (Second Modification Example)

[0088] Refer to Figure 10 to describe the semiconductor device 10C of the second modification example. As Figure 10As shown, the semiconductor device 10C of Modification 3 further includes an insulating cover 29 in addition to the structure of the semiconductor device 10 of Embodiment 1. In the semiconductor device 10C of Modification 3, other parts except the insulating cover 29 can be configured in the same manner as the semiconductor device 10 of Embodiment 1. In Modification 3, the same components as those in Embodiment 1 are denoted by the same reference numerals, and repeated descriptions are omitted. The insulating cover 29 is provided on the first conductor line 27a of the first insulating circuit board 20. The insulating cover 29 partially covers the first conductor line 27a. The insulating cover 29 is made of an insulating material, and can be made of a resin material such as polyimide, for example. According to such a structure, accidental short circuit between the first conductor line 27a and other components can be prevented.

[0089] (Modification 4)

[0090] Refer to Figure 11 to describe the semiconductor device 10D of Modification 4. As Figure 11 shown, compared with the semiconductor device 10 of Embodiment 1, the semiconductor device 10D of Modification 4 includes a first conductor plate 25 and a second conductor plate 35 without ceramic substrates 22 and 32 instead of the first insulating circuit board 20 and the second insulating circuit board 30. The first conductor plate 25 is equivalent to a structure obtained by integrating the first inner conductor plate 24 and the first outer conductor plate 28 in Embodiment 1. Similarly, the second conductor plate 35 is equivalent to a structure obtained by integrating the second inner conductor plate 34 and the second outer conductor plate 38 in Embodiment 1. Therefore, in the semiconductor device 10D of Modification 4, other parts except for not providing the ceramic substrates 22 and 32 can be configured in the same manner as the semiconductor device 10 of Embodiment 1. In Modification 4, the same components as those in Embodiment 1 are denoted by the same reference numerals, and repeated descriptions are omitted. In such a structure, the first conductor plate 25 electrically connected to the emitter electrode 12c and the first conductor line 27a electrically connected to the signal electrode 12d are also insulated by the first insulating layer 26 interposed therebetween. Thus, unwanted contact between the first conductor plate 25 and the first conductor line 27a is prevented.

[0091] Here, refer to Figures 12 to 15 to describe the manufacturing method of the semiconductor device 10. However, this manufacturing method is an example and is not particularly limited. The manufacturing method is generally divided into the following three processes. The three processes include a first process of forming the first insulating layer 26 on the first inner conductor plate 24 of the first insulating circuit board 20, a second process of forming the first conductor line 27a on the first insulating layer 26, and a third process of assembling the components of the semiconductor device 10. In addition, for other processes not described here, known techniques can be used for manufacturing.

[0092] Refer toFigure 12 For (a) to (d) of [], the first process will be described. As Figure 12 shown in (a) of [], first, the first insulating circuit board 20 is prepared. Next, as Figure 12 shown in (b) of [], a resin layer 50 is formed on the upper surface 20a of the prepared first insulating circuit board 20 (i.e., the first inner conductor plate 24). Here, the resin layer 50 is made of a photosensitive resin material and is formed of a resin material such as polyimide, for example. Next, as Figure 12 shown in (c) of [], the formed resin layer 50 is subjected to an exposure process. Specifically, light is irradiated onto the surface of the resin layer 50 via a photomask P, and a specified range of the resin layer 50 is exposed. Next, as Figure 12 shown in (d) of [], the exposed resin layer 50 is developed. By the development process, unnecessary portions of the exposed resin layer 50 (portions such as the inside of the opening 26a of the first insulating layer 26 that become bonding regions) are removed and cleaned. Thus, the first insulating layer 26 is formed on the first insulating circuit board 20.

[0093] Refer to Figure 13 For (a) to (e) of [], the second process will be described. As Figure 13 shown in (a) of [], a seed layer 52 is formed on the first insulating layer 26 formed by the first process. The seed layer 52 is formed by, for example, sputtering. Here, the seed layer 52 is made of a conductor material such as copper or other metal materials. The thickness dimension of the seed layer 52 is preferably about 0.1 to 5 microns.

[0094] As Figure 13 shown in (b) of [], a patterned resist layer 54 is formed on the seed layer 52. Specifically, after the resist layer is formed, by performing exposure and development processes, the exposed resist layer is removed. Thus, the patterned resist layer 54 is formed. Therefore, the seed layer 52 is covered by the patterned resist layer 54.

[0095] As Figure 13 shown in (c) of [], a plating layer 56 is formed on the seed layer 52 covered by the resist layer 54. The plating layer 56 is formed by plating. Next, as Figure 13 shown in (d) of [], the resist layer 54 is removed from the seed layer 52. The resist layer 54 is decomposed and removed by, for example, ashing. Next, as Figure 13 shown in (e) of [], the seed layer 52 other than the seed layer 52 under the plating layer 56 is removed. The seed layer 52 is removed by, for example, dry etching. Thus, in the first insulating circuit board 20, the first conductor line 27a is provided on the first insulating layer 26.

[0096] Refer toFigure 14 For (a) to (b) of [description], the third process will be described. First, prepare the second insulating circuit board 30, the first semiconductor element 12, and a plurality of connection terminals 15 and 18. In addition, in the description here, the illustration of the first power terminal 14 is omitted. At this time, the first semiconductor element 12 and the plurality of connection terminals 15 and 18 can be prepared as a single component (for example, a lead frame) formed integrally respectively. In addition, regarding the second insulating circuit board 30, it can be manufactured by referring to the first process of the first insulating circuit board 20, and the description of its manufacturing method is omitted.

[0097] Next, as Figure 14 shown in (a) of [description], the first reflow process is performed. In the first reflow process, on the upper surface 20a of the first insulating circuit board 20 where the first conductor line 27a is provided by the second process, the first semiconductor element 12 and the plurality of connection terminals 15 and 18 are respectively soldered to specified positions. Specifically, the emitter electrode 12c of the first semiconductor element 12 is joined to the first inner conductor plate 24 of the first insulating circuit board 20 via the solder layer 40, and the first signal electrode 12d of the first semiconductor element 12 is joined to one end of the first conductor line 27a of the first insulating circuit board 20 via the solder layer 46. In addition, one end of the first signal terminal 18 is joined to the other end of the first conductor line 27a via the solder layer 48, and the second power terminal 15 is joined to the first inner conductor plate 24 via the solder layer 45. During soldering, it is preferable to also dispose pre-solder on the upper surface of the first semiconductor element 12. Next, as Figure 14 shown in (b) of [description], the second reflow process is performed. In the second reflow process, the second insulating circuit board 30 is soldered to the lower surface of the first semiconductor element 12. Specifically, the second inner conductor plate 34 of the second insulating circuit board 30 is joined to the collector electrode 12b of the first semiconductor element 12 via the solder layer 42.

[0098] Through the above manufacturing method, the semiconductor device 10 can be manufactured. However, the manufacturing method of the semiconductor device 10 is not limited to the above method. Figure 13 The second process of the semiconductor device 10 illustrated in (a) to (e) of [description] can also be replaced with other methods. Regarding this other manufacturing method, the following will be described with reference to Figure 15 (a) to (c) of [description].

[0099] As Figure 15 shown in (a) of [description], a patterned resist layer 55 is formed on the first insulating layer 26 formed by the first process. Specifically, after forming the resist layer, through exposure and development processes, the exposed resist layer is removed. Thereby, the patterned resist layer 55 is formed. Thus, the first insulating layer 26 is covered by the patterned resist layer 55.

[0100] As shown Figure 15 in (b) of Figure 15 , a plating layer 57 is formed on the first insulating layer 26 covered by the resist layer 55. The plating layer 57 is formed by a plating process. Next, as shown Figure 15 in (c) of Figure 15 , the resist layer 55 is removed from the first insulating layer 26. The resist layer 55 is decomposed and removed, for example, by an ashing process. In this ashing process, it is required to sufficiently remove the resist layer 55 while leaving the first insulating layer 26. Therefore, the ashing solution used in the ashing process sufficiently reacts with the material constituting the resist layer 55 and does not react with the material constituting the first insulating layer 26. Preferably, a solution that hardly reacts or reacts relatively slowly is selected.

[0101] In addition, the manufacturing method of the semiconductor device 10 described above can be applied to the following modification examples 5 and 6 in addition to the above modification examples 1 to 4.

[0102] (Modification Example 5)

[0103] Refer to Figure 16 to describe the semiconductor device 10E of modification example 5. As shown Figure 16 in Figure 16 , the semiconductor device 10E of modification example 5 further includes a second semiconductor element 13 in addition to the structure of the semiconductor device 10 of Embodiment 1. With this change, a part of the structure of the first conductor circuit pattern 27 of the first insulating circuit board 20 is changed, and the first conductor circuit pattern 27 also has a second conductor line 27b. In the semiconductor device 10E of modification example 5, for other parts except the second semiconductor element 13 and the second conductor line 27b, it can be configured in the same manner as the semiconductor device 10 of Embodiment 1. In modification example 5, the same components as those in Embodiment 1 are denoted by the same reference numerals, and repeated descriptions are omitted.

[0104] The second semiconductor element 13 is a power semiconductor element and can be configured in the same manner as the first semiconductor element 12. The second semiconductor element 13 includes a semiconductor substrate and a plurality of electrodes 13c, 13d. Among the plurality of electrodes 13c, 13d, it includes a collector electrode and an emitter electrode 13c connected to the power circuit, and a plurality of signal electrodes 13d connected to the signal circuit. The second semiconductor element 13 is a switching element and can conduct and disconnect between the collector electrode and the emitter electrode 13c. The collector electrode is located on the upper surface side of the semiconductor substrate, and the emitter electrode 13c and the plurality of signal electrodes 13d are located on the lower surface side of the semiconductor substrate.

[0105] The first insulating circuit board 20 and the second insulating circuit board 30 face each other with the first semiconductor element 12 and the second semiconductor element 13 interposed therebetween. In particular, the first insulating circuit board 20 faces the lower surfaces of the first semiconductor element 12 and the second semiconductor element 13 at the upper surface 20a. Accordingly, the first inner conductor plate 24 of the first insulating circuit board 20 is joined to the emitter electrode 12c of the first semiconductor element 12 and is also joined to the emitter electrode 13c of the second semiconductor element 13. On the other hand, the second insulating circuit board 30 faces the upper surfaces of the first semiconductor element 12 and the second semiconductor element 13 at the lower surface 30b. Accordingly, the second inner conductor plate 34 of the second insulating circuit board 30 is joined to the collector electrode 12b of the first semiconductor element 12 and is also joined to the collector electrode of the second semiconductor element 13. Thereby, the first semiconductor element 12 and the second semiconductor element 13 are connected in parallel.

[0106] Furthermore, the first conductor circuit pattern 27 of the first insulating circuit board 20 includes a second conductor line 27b in addition to a plurality of first conductor lines 27a. The second conductor line 27b is electrically connected to the second semiconductor element 13. The second conductor line 27b has one end portion close to the second semiconductor element 13 and the other end portion away from the second semiconductor element 13. One end portion of the second conductor line 27b is joined to the second semiconductor element 13, and the other end portion of the second conductor line 27b is joined to one end portion of the first signal terminal 18.

[0107] With such a structure, the first insulating layer 26 interposed therebetween insulates between the first inner conductor plate 24 electrically connected to the emitter electrode 12c of the first semiconductor element 12 and the first conductor line 27a electrically connected to the signal electrode 12d. Thereby, an unwanted contact is prevented between the first inner conductor plate 24 and the first conductor line 27a. The same can be said for the second conductor line 27b. The first insulating layer 26 interposed therebetween insulates between the first inner conductor plate 24 electrically connected to the emitter electrode 13c of the second semiconductor element 13 and the second conductor line 27b electrically connected to the signal electrode 13d. Thereby, an unwanted contact is prevented between the first inner conductor plate 24 and the second conductor line 27b.

[0108] In addition, a part of the second conductor line 27b in Modification 5 is common with the first conductor line 27a. With such a structure, one or more conductor lines can be made common between the first semiconductor element 12 and the second semiconductor element 13, and the structure of the conductor circuit pattern can be made relatively simple corresponding to the number of semiconductor elements 12 and 13. Thereby, for example, miniaturization of the semiconductor device 10E can be achieved. The conductor line made common at this time can be, for example, a conductor line that transmits a common control signal (such as a gate drive signal) to the first semiconductor element 12 and the second semiconductor element 13. In addition, in the present embodiment, the other end portions of the first conductor line 27a and the second conductor line 27b are made common. However, the structure for making the first conductor line 27a and the second conductor line 27b common is not limited to this. As long as at least a part of the second conductor line 27b is common with at least a part of the first conductor line 27a.

[0109] (Modification 6)

[0110] Refer to Figure 17 to describe the semiconductor device 10F of Modification 6. As Figure 17 shown, the semiconductor device 10F of Modification 6 further includes a thermistor 60 and a second signal terminal 19 electrically connected to the thermistor 60 in addition to the structure of the semiconductor device 10E of Modification 5. With this change, a part of the structure of the conductor circuit pattern of the first insulating circuit substrate 20 is changed. The conductor circuit pattern also has a plurality of third conductor lines 27c. In the semiconductor device 10F of Modification 6, other parts except the second signal terminal 19 and the third conductor lines 27c can be configured in the same manner as the semiconductor device 10 of Modification 5. In Modification 6, the same components as those in Modification 5 are denoted by the same reference numerals, and repeated descriptions are omitted.

[0111] The semiconductor device 10F of Modification 6 includes a thermistor 60. The thermistor 60 measures the temperature of the semiconductor elements 12 and 13 by passing a current through the thermistor 60 and measuring the resistance value between both ends 60a and 60b of the thermistor 60. The conductor circuit pattern of the first insulating circuit board 20 has a plurality (two in this case) of third conductor lines 27c. Each of the third conductor lines 27c is electrically insulated from the first semiconductor element 12 and the second semiconductor element 13. One end of one third conductor line 27c is connected to one end 60a of the thermistor, and one end of the other third conductor line 27c is connected to the other end 60b of the thermistor 60. In addition, the semiconductor device 10F includes a plurality of second signal terminals 19. The other end of one third conductor line 27c is connected to the second signal terminal 19, and the other end of the other third conductor line 27c is connected to the second signal terminal 19. Thus, each of the second signal terminals 19 is electrically connected to the thermistor 60 via the third conductor line 27c. Thereby, in the semiconductor device 10F, the average temperature of the two semiconductor elements 12 and 13 can be measured relatively accurately. For example, since it is not necessary to provide temperature sensors for each of the semiconductor elements 12 and 13, each of the semiconductor elements 12 and 13 can be made relatively smaller or the active regions of each of the semiconductor elements 12 and 13 can be made larger accordingly.

[0112] In addition, the thermistor 60 is an example of an electronic component in the technology disclosed in this specification. Thus, the semiconductor device 10F may also include other electronic components instead of or in addition to the thermistor 60. With such a structure, any electronic component can be implanted into the semiconductor device 10F using the remaining area on the first insulating layer 26. In addition, as another embodiment, the electronic component may be a drive circuit for driving each of the semiconductor elements 12.

[0113] (Embodiment 2)

[0114] Refer to Figures 18 to 23 and the semiconductor device 100 of Embodiment 2 will be described. As Figures 18 to 23 shown, compared with the semiconductor device 10 of Embodiment 1, the semiconductor device 100 further includes a second semiconductor element 113, a connection component 158, and a plurality of connection terminals 14, 15, 116, 18, and 119. Accordingly, a part of the structures of the first insulating circuit board 20 and the second insulating circuit board 30 is also changed. In the semiconductor device 100 of Embodiment 2, other parts except for the above-described components can be configured in the same manner as the semiconductor device 10 of Embodiment 1. In Embodiment 2, the same components as those in Embodiment 1 are denoted by the same reference numerals, and redundant descriptions are omitted.

[0115] The semiconductor device 100 includes a plurality of connection terminals 14, 15, 116, 18, 119 whose other ends protrude from the encapsulant 11. One ends of the plurality of connection terminals 14, 15, 116, 18, 119 are electrically connected to the first semiconductor element 12 or the second semiconductor element 113 inside the encapsulant 11. The plurality of connection terminals 14, 15, 116, 18, 119 include a first power terminal 14, a second power terminal 15, a third power terminal 116, a plurality of first signal terminals 18, and a plurality of second signal terminals 119. The first power terminal 14 and the second power terminal 15 protrude from the first end face 11e of the encapsulant 11, and the third power terminal 116, each of the first signal terminals 18, and the second signal terminals 119 protrude from the second end face 11f of the encapsulant 11. The first power terminal 14 can be connected to the positive electrode of an external DC power supply, and the second power terminal 15 can be connected to the negative electrode of the external DC power supply. The third power terminal 116 can be connected to a load connected to a power circuit. The first signal terminals 18 and the second signal terminals 119 are connected to an external device such as a control substrate, for example, to control the first semiconductor element 12 and the second semiconductor element 113.

[0116] The second semiconductor element 113 can be configured in the same manner as the first semiconductor element 12. The second semiconductor element 113 includes a semiconductor substrate 113a and a plurality of electrodes 113b, 113c, 113d. The plurality of electrodes 113b, 113c, 113d include a collector electrode 113b and an emitter electrode 113c connected to a power circuit, and a plurality of signal electrodes 113d connected to a signal circuit. The collector electrode 113b is located on the upper surface side of the semiconductor substrate 113a, and the emitter electrode 113c and the plurality of signal electrodes 113d are located on the lower surface side of the semiconductor substrate 113a. Although not particularly limited, the second semiconductor element 113 is an RC-IGBT, and the second semiconductor element 113 has an IGBT structure 113e and a diode structure 113f connected in parallel with the IGBT structure 113e. Here, the emitter electrode 113c and the signal electrode 113d are examples of the fourth electrode and the fifth electrode, respectively, in the technology disclosed in this specification, and the collector electrode 113b is an example of the sixth electrode in the technology disclosed in this specification.

[0117] The first insulating circuit board 20 and the second insulating circuit board 30 are opposed to each other with the first semiconductor element 12 and the second semiconductor element 113 interposed therebetween. The first insulating circuit board 20 is opposed to the lower surface of the second semiconductor element 113 at the upper surface 20a and is joined to the emitter electrode 113c of the second semiconductor element 113 via the solder layer 180. The second insulating circuit board 30 is opposed to the upper surface of the second semiconductor element 113 at the lower surface 30b and is joined to the collector electrode 113b of the second semiconductor element 113 via the solder layer 182. Thus, the first insulating circuit board 20 and the second insulating circuit board 30 are electrically and thermally connected to the first semiconductor element 12 and the second semiconductor element 113 inside the encapsulated body 11 and constitute a part of the power circuit.

[0118] In the first insulating circuit board 20, on the upper surface of the first ceramic substrate 22, in addition to the first inner conductor plate 24, a third inner conductor plate 164 is also provided, and on the lower surface of the first ceramic substrate 22, in addition to the first outer conductor plate 28, a third outer conductor plate 168 is also provided. The third inner conductor plate 164 and the third outer conductor plate 168 are made of a conductor material. The third inner conductor plate 164 is electrically insulated from the third outer conductor plate 168 by the ceramic substrate 22. In addition, the third inner conductor plate 164 is also electrically insulated from the adjacent first inner conductor plate 24 on the first ceramic substrate 22. The third inner conductor plate 164 is joined to the emitter electrode 113c of the second semiconductor element 113 via the solder layer 180. Thus, the first insulating circuit board 20 is electrically connected to the emitter electrode 113c of the second semiconductor element 113 at the third inner conductor plate 164.

[0119] Similarly, on the upper surface of the second ceramic substrate 32, in addition to the second outer conductor plate 38, a fourth outer conductor plate 178 is also provided, and on the lower surface of the second ceramic substrate 32, in addition to the second inner conductor plate 34, a fourth inner conductor plate 174 is also provided. The fourth inner conductor plate 174 and the fourth outer conductor plate 178 are made of a conductor material. The fourth inner conductor plate 174 is electrically insulated from the fourth outer conductor plate 178 by the second ceramic substrate 32. In addition, the fourth inner conductor plate 174 is also electrically insulated from the adjacent second inner conductor plate 34 on the second ceramic substrate 32. The fourth inner conductor plate 174 is joined to the collector electrode 113b of the second semiconductor element 113 via the solder layer 182. Thus, the second insulating circuit board 30 is electrically connected to the collector electrode 113b of the second semiconductor element 113 at the fourth inner conductor plate 174.

[0120] The semiconductor device 100 further includes a connection component 158. The connection component 158 is disposed between the first semiconductor element 12 and the second semiconductor element 113. The connection component 158 electrically connects between the first inner conductor plate 24 and the fourth inner conductor plate 174. Thereby, the first semiconductor element 12 and the second semiconductor element 113 are connected in series. Although not particularly limited, the connection component 158 of the present embodiment has a first portion 158a joined to the first inner conductor plate 24 and a second portion 158b joined to the fourth inner conductor plate 174. The first portion 158a of the connection component 158 is joined to the first inner conductor plate 24 via a solder layer 184. The second portion 158b of the connection component 158 is joined to the fourth inner conductor plate 174 via a solder layer 186. In one example, the connection component 158 is formed as a component integral with the third power terminal 116. In addition, not limited to the solder layers 184 and 186, the connection component 158 and the first inner conductor plate 24, and the connection component 158 and the fourth inner conductor plate 174 may also be joined via other conductive joining layers.

[0121] On the fourth inner conductor plate 174 of the second insulating circuit board 30, a fourth insulating layer 176 is provided. The fourth insulating layer 176 covers a part of the fourth inner conductor plate 174. In one example, the fourth insulating layer 176 has two openings 176a and 176b that expose the fourth insulating layer 176 of the second insulating circuit board 30. The collector electrode 113b of the second semiconductor element 113 passes through one opening 176a of the fourth insulating layer 176 and is joined to the fourth inner conductor plate 174 via a solder layer 182. The second portion 158b of the connection component 158 passes through the other opening 176b of the fourth insulating layer 176 and is joined to the fourth inner conductor plate 174 via a solder layer 186. In addition, one end portion of the first power terminal 14 is joined to the second inner conductor plate 34 of the second insulating circuit board 30 via a solder layer 144. Although not particularly limited, it is preferable to provide the second insulating layer 36 or the fourth insulating layer 176 on the second inner conductor plate 34 and the fourth inner conductor plate 174 at portions other than the joining regions.

[0122] On the third inner conductor plate 164 of the first insulating circuit board 20, a third insulating layer 166 is provided. The third insulating layer 166 covers a part of the third inner conductor plate 164. In one example, the third insulating layer 166 has an opening 166a that exposes the third inner conductor plate 164. The emitter electrode 113c of the second semiconductor element 113 passes through the opening 166a of the third insulating layer 166 and is joined to the third inner conductor plate 164 via a solder layer 180. In addition, one end portion of the second power terminal 15 is joined to the third inner conductor plate 164 via a solder layer 145. Further, the first insulating layer 26 also has another opening 126b that exposes the first inner conductor plate 24. The first portion 158a of the connecting member 158 passes through the other opening 126b of the first insulating layer 26 and is joined to the first inner conductor plate 24 via a solder layer 184. Although not particularly limited, it is preferable that the first insulating layer 26 or the third insulating layer 166 is provided on the portions of the first inner conductor plate 24 and the third inner conductor plate 164 other than the joining regions. Here, the above-mentioned third insulating layer 166 and fourth insulating layer 176 are made of an insulating material, and are made of a resin material such as polyimide, for example.

[0123] The first insulating circuit board 20 further has a second conductor circuit pattern 167. The second conductor circuit pattern 167 is provided on the third insulating layer 166. Although not particularly limited, the second conductor circuit pattern 167 is located inside the encapsulated body 11. In addition, the second conductor circuit pattern 167 includes a plurality of second conductor lines 167a. The plurality of second conductor lines 167a are electrically connected to the second semiconductor element 113. Each of the second conductor lines 167a has one end portion close to the second semiconductor element 113 and the other end portion away from the second semiconductor element 113. One end portion of the second conductor line 167a is joined to the signal electrode 113d of the second semiconductor element 113 via a solder layer. The other end portion of the second conductor line 167a is joined to one end portion of the second signal terminal 119 via a solder layer. Thus, each of the second signal terminals 119 is electrically connected to the signal electrode 113d of the second semiconductor element 113 via the second conductor line 167a.

[0124] As described above, in the semiconductor device 100 of the second embodiment, the second conductor circuit pattern 167 is also provided on the third inner conductor plate 164 with the third insulating layer 166 therebetween. Further, the emitter electrode 113c of the second semiconductor element 113 is electrically connected to the third inner conductor plate 164, and the plurality of signal electrodes 113d of the second semiconductor element 113 are respectively electrically connected to the second conductor line 167a of the second conductor circuit pattern 167. With such a structure, the third inner conductor plate 164 electrically connected to the emitter electrode 113c of the second semiconductor element 113 and the second conductor line 167a electrically connected to the signal electrode 113d are also insulated by the third insulating layer 166 therebetween. Thus, accidental contact is prevented between the first inner conductor plate 24 and the first conductor line 27a, and between the third inner conductor plate 164 and the second conductor line 167a.

[0125] The semiconductor device 100 of the second embodiment is not limited to the Figure 22 configuration illustrated. For example, as Figures 24 to 26 shown, the connecting member 158 may also be formed as a member different from the third power terminal 116. In this case, preferably, the third power terminal 116 protrudes from the first end face 11e of the sealing body 11 in the same manner as the first power terminal 14 and the second power terminal 15. Further, preferably, the third power terminal 116 is joined to the fourth inner conductor plate 174 via a solder layer 188.

[0126] The specific examples of the technology disclosed in this specification have been described in detail above, but these are merely illustrations and do not limit the scope of the claims. In the technology recited in the claims, there are included various forms in which the specific examples illustrated above are variously modified and changed. The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations recited in the claims at the time of application. The technology illustrated in this specification or the drawings can achieve multiple objects simultaneously, and achieving one of the objects itself has technical usefulness.

[0127] Reference Numeral Explanation

[0128] 10, 10A, 10B, 10C, 10D, 10E, 10F, 100: Semiconductor device

[0129] 12, 13, 113: Semiconductor element

[0130] 12b, 113b: Collector electrode

[0131] 12c, 13c, 113c: Emitter electrode

[0132] 12d, 13d, 113d: Signal electrode

[0133] 14, 15, 116: Power terminals

[0134] 18, 19, 119: Signal terminals

[0135] 15a, 15b, 18a, 18b: Protrusions

[0136] 20, 30: Insulated circuit boards

[0137] 22, 32: Ceramic substrates

[0138] 24, 34, 164, 174: Inner conductor plates

[0139] 26, 36, 166, 176: Insulation layers

[0140] 26a, 36a, 126b, 166a, 176a, 176b: Openings

[0141] 27, 167: Conductor circuit patterns

[0142] 27a, 27b, 27c, 167a: Conductor lines

[0143] 28, 38, 168, 178: Outer conductor plates

[0144] 29: Insulation cover

[0145] 37: Conductor film

[0146] 40, 42, 44, 45, 46, 48, 144, 145, 180, 182, 184, 186, 188: Solder layers

[0147] 60: Thermistor

[0148] 158: Connection components

[0149] M: Mark

[0150] d1, d2: Center-to-center distance

[0151] t1, t2: Thickness

[0152] w1, w2: Width dimensions

Claims

1. A semiconductor device, characterized in that it comprises: a first semiconductor element having one surface provided with a first electrode and a second electrode and another surface located on the opposite side of the one surface; a first conductor plate having a first surface facing the one surface of the first semiconductor element and being electrically connected to the first electrode of the first semiconductor element on the first surface; a first insulating layer provided on the first surface of the first conductor plate and covering a part of the first surface; a conductor circuit pattern provided on the first insulating layer; a second conductor plate having a second surface facing the another surface of the first semiconductor element; a second insulating layer provided on the second surface of the second conductor plate and covering a part of the second surface; a first connection terminal; and a pad provided integrally or separately with the first connection terminal; the conductor circuit pattern has at least one first conductor line electrically connected to the first semiconductor element; the at least one first conductor line includes a conductor line electrically connected to the second electrode; the first semiconductor element further has a third electrode provided on the another surface and electrically connected to the second surface of the second conductor plate; the first connection terminal is electrically connected to the first conductor line; one end portion of the first connection terminal is located between the first conductor line and the second insulating layer and is joined to the first conductor line; the pad is disposed between the one end portion of the first connection terminal and the second insulating layer.

2. The semiconductor device according to claim 1, characterized in that the thickness of the conductor circuit pattern is smaller than the thickness of the first conductor plate.

3. The semiconductor device according to claim 1, characterized in that the first conductor line has one end portion electrically connected to the first semiconductor element and the other end portion electrically connected to the first connection terminal; the width dimension of the other end portion of the first conductor line is larger than the width dimension of the one end portion of the first conductor line.

4. The semiconductor device according to claim 1, characterized in that the at least one first conductor line includes two conductor lines parallel to each other; the two parallel conductor lines are respectively electrically connected to the first semiconductor element at one end portion; the center-to-center distance of the other end portions of the two parallel conductor lines is larger than the center-to-center distance of the one end portions of the two parallel conductor lines.

5. The semiconductor device according to claim 1, characterized in that the first insulating layer has an opening exposing the first surface of the first conductor plate; the first electrode of the first semiconductor element passes through the opening of the first insulating layer and is joined to the first surface of the first conductor plate.

6. The semiconductor device according to claim 1, characterized in that the first electrode is a power electrode of the first semiconductor element, and the second electrode is a signal electrode of the first semiconductor element.

7. The semiconductor device according to claim 1, characterized in that it further comprises an insulating cover locally covering the first conductor line.

8. The semiconductor device according to claim 1, wherein: in the first insulating layer of the first conductor plate, at a position corresponding to the periphery of the first semiconductor element, a mark for positioning the first semiconductor element is provided.

9. The semiconductor device according to claim 1, wherein: it further includes an electronic component located on the first insulating layer; the conductor circuit pattern further has at least one conductor line connected to the electronic component.

10. The semiconductor device according to claim 9, wherein: the electronic component includes a thermistor.

11. The semiconductor device according to claim 1, wherein: it further includes an insulator substrate provided with the first conductor plate.

12. The semiconductor device according to claim 1, wherein: it further includes a conductor film provided on the second insulating layer; the pad is bonded to the conductor film via a bonding layer.

13. The semiconductor device according to any one of claims 1 to 12, wherein: it further includes a second semiconductor element having one surface provided with a fourth electrode and a fifth electrode, and another surface located on the opposite side of the one surface; the first surface of the first conductor plate faces the one surface of the second semiconductor element and is electrically connected to the fourth electrode of the second semiconductor element; the conductor circuit pattern further has at least one second conductor line electrically connected to the second semiconductor element; the at least one second conductor line includes a conductor line electrically connected to the fifth electrode.

14. The semiconductor device according to claim 13, wherein: at least a part of the second conductor line is common to at least a part of the first conductor line.

15. The semiconductor device according to any one of claims 1 to 12, wherein: it further includes: a second semiconductor element having one surface provided with a fourth electrode and a fifth electrode, and another surface located on the opposite side of the one surface and provided with a sixth electrode; a third conductor plate having a third surface facing the one surface of the second semiconductor element, and being electrically connected to the fourth electrode of the second semiconductor element in the third surface; a fourth conductor plate having a fourth surface facing the another surface of the second semiconductor element, and being electrically connected to the sixth electrode of the second semiconductor element in the fourth surface; a connection component located between the first conductor plate and the fourth conductor plate, electrically connecting the first conductor plate and the fourth conductor plate; a third insulating layer provided on the third surface of the third conductor plate, covering a part of the third surface; and a second conductor circuit pattern provided on the third insulating layer; the second conductor circuit pattern has at least one second conductor line electrically connected to the second semiconductor element; the at least one second conductor line includes a conductor line electrically connected to the fifth electrode.

16. The semiconductor device according to claim 15, wherein: it further includes an insulator substrate provided with the first conductor plate and the third conductor plate.

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