Dual oscillator local networking controller local area network clock generator using precision resistor reference

Abstract

This disclosure relates to a dual-oscillator local area network (LAN) clock generator using a precision resistor reference. An electronic circuit includes a first pin corresponding to a reference signal and a second pin corresponding to an external resistor connected to the second pin on a first side and to ground on a second side. The device also includes a first oscillator having a first frequency loop configured to: receive the reference signal via the first pin; receive a current associated with a voltage applied to the external resistor via the second pin; and lock a first frequency output at a frequency associated with the reference signal. The device further includes a second oscillator having a second frequency loop configured to: receive the first frequency output; scale the frequency of the first frequency output; and lock the second frequency output at the scaled frequency of the first frequency output.

Description

Technical Field

[0001] This disclosure relates to vehicle circuitry, and more particularly to systems and apparatus for generating local area network clocks for local network controllers. Background Technology

[0002] Vehicles (such as cars, trucks, SUVs, crossovers, minivans, or other suitable vehicles) typically include a computing environment comprising various computing devices, such as microcontrollers and / or other computing devices, for controlling and / or monitoring various aspects of such vehicles. Electronic communication between computing devices within the computing environment can be achieved using high-speed controller area network (CAN) communication links, such as local network controller area networks (PN-CAN).

[0003] Typically, for operation within specifications, the timing requirements of such a communication link may include high accuracy requirements (e.g., ~0.5%) and / or fast clock requirements (e.g., greater than 6 MHz). This accuracy requirement may depend on the performance capabilities of the various transceiver blocks within the corresponding vehicle. Furthermore, PN-CAN may utilize message decoding features, which may require a clock generator capable of operating during vehicle standby while using minimal current. Summary of the Invention

[0004] This disclosure generally relates to the vehicle computing environment.

[0005] One aspect of the disclosed embodiments includes an apparatus. The apparatus includes electronic circuitry comprising a first pin corresponding to a reference signal and a second pin corresponding to an external resistor connected on a first side to the second pin and on a second side to ground. The apparatus also includes a first oscillator having a first frequency loop configured to: receive the reference signal via the first pin; receive a current associated with a voltage applied to the external resistor via the second pin; and lock a first frequency output at a frequency associated with the reference signal. The apparatus further includes a second oscillator having a second frequency loop configured to: receive the first frequency output; scale the frequency of the first frequency output; and lock the second frequency output at the scaled frequency of the first frequency output.

[0006] Another aspect of the disclosed embodiments includes an electronic circuit for generating a local area network clock for a local networking controller. The electronic circuit includes a first pin configured to receive a reference signal from a remote microcontroller and a second pin corresponding to an external precision resistor connected on a first side to the second pin and on a second side to ground. The electronic circuit also includes a low-frequency oscillator having a first frequency loop configured to: receive the reference signal via the first pin; receive a current associated with a voltage applied to the external precision resistor via the second pin; and lock a first frequency output at a frequency associated with the reference signal. The electronic circuit also includes a high-frequency oscillator having a second frequency loop configured to: receive the first frequency output; scale the frequency of the first frequency output; and lock a second frequency output at the scaled frequency of the first frequency output.

[0007] These and other aspects of this disclosure are set forth in the following detailed description of the embodiments, in the appended claims and in the accompanying drawings. Attached Figure Description

[0008] This disclosure can be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be emphasized that, by convention, the various features in the drawings are not drawn to scale. Instead, for clarity, the dimensions of the various features have been arbitrarily enlarged or reduced.

[0009] Figure 1 The vehicle is generally illustrated according to the principles of this disclosure.

[0010] Figure 2 The schematic diagram illustrates a controller area network electronic circuit (CAN oscillator top-level block diagram) based on the principles of this disclosure.

[0011] Figure 3 A block diagram of a low-frequency oscillator digital control circuit based on the principles of this disclosure is generally illustrated.

[0012] Figure 4 A block diagram of a high-frequency oscillator digital control circuit (CAN high-frequency oscillator digital control circuit) based on the principles of this disclosure is generally illustrated.

[0013] Figure 5 A time-sharing switching mirror frequency divider (chopper) based on the principles of this disclosure is generally illustrated. Detailed Implementation

[0014] The following discussion pertains to various embodiments of the invention. While one or more of these embodiments may be preferred, the disclosed embodiments should not be construed as or otherwise used to limit the scope of this disclosure, including the claims. Furthermore, those skilled in the art will understand that the following description has broad application, and the discussion of any embodiment is intended only as an example of that embodiment and not to imply that the scope of this disclosure (including the claims) is limited to that embodiment.

[0015] As described above, vehicles (e.g., cars, trucks, SUVs, crossovers, minivans, or other suitable vehicles) typically include a computing environment comprising various computing devices, such as microcontrollers and / or other computing devices, for controlling and / or monitoring various aspects of such vehicles. Electronic communication between computing devices within the computing environment can be achieved using high-speed controller area network (Controller Area Network) communication links such as PN-CAN.

[0016] Typically, for operation within specifications, the timing requirements of such a communication link may include high accuracy requirements (e.g., ~0.5%) and / or fast clock requirements (e.g., greater than 6 MHz). This accuracy requirement may depend on the performance capabilities of the various transceiver blocks within the corresponding vehicle. Furthermore, PN-CAN may utilize message decoding features, which may require a clock generator capable of operating during vehicle standby while using minimal current.

[0017] However, typical oscillators may fail to meet such requirements due to insufficient accuracy and / or lack of a reference during vehicle standby operation. To address these requirements, various techniques can be employed to generate an internal clock. Typical clock generators for CAN communication can be broadly categorized into resonator or phase-locked loop (PLL) clock generators. For example, a clock generation technique may use one or more crystal or ceramic resonators. Furthermore, this technique may include relatively simple buffer oscillators. Typically, clock generation using crystal resonators can be relatively accurate and may include a two-pin interface along with other components. However, clock generators using crystal resonators can be prohibitively expensive. While ceramic resonators may be less expensive and can be started relatively quickly, they may offer insufficient accuracy. Additionally, ceramic resonators can be connected to an associated integrated circuit (IC) using only two pins and may require additional components.

[0018] Another typical technique used for clock generation includes the use of phase-locked loops (PLLs) or frequency-locked loops (LLLs). For example, a control loop or regulator can be used to modify the resistance or current supplied to a resistor-capacitor (RC) oscillator. This technique can generate a clock frequency based on an available, precise frequency reference or data received from a communication link. Furthermore, this technique can be locked to a corresponding frequency source to provide a desired clock at the required frequency.

[0019] Typically, when using this technology, a PN-CAN device can be programmed to receive a wake-up message. This wake-up message may include fixed timing attributes that can be extracted by a corresponding controller or processor (e.g., the one receiving the wake-up message). Alternatively, the wake-up message may include an expected bit pattern that provides not only data but also timing information. The start bit and other components may include a fixed duration and pattern.

[0020] This technology can measure or synchronize this information to allow the creation of a clock signal (e.g., an actual clock and / or a correction factor that can be used for timing by digital components). Using a wake-up message as a frequency reference on the communication link can help support low-power modes where no other IC is operating or available to provide a frequency reference. Utilizing the communication link as a frequency reference can also be relatively passive until a clock is needed, which avoids wasting power on a running clock. The hardware control loop can use the wake-up message to generate the actual clock signal. Digital or software implementation alternatives can recalculate the bit timing and / or correction for communication on the communication link (e.g., PN-CAN).

[0021] However, this technology does not account for temperature drift, aging, lack of a reference, and / or power usage. Furthermore, its applicability depends on many factors, including the availability of a reference and power modulation. Additionally, internal RC oscillators operating above 10 MHz may have inefficient temperature performance, and parasitic resistance and capacitance can introduce temperature coefficient (TC)-related frequency drift. Phase-locked loops (PLLs) and frequency-locked loops using fixed-frequency references may not function correctly when their reference is turned off in standby mode because these loops correct for a large TC. PN-CAN systems typically require operation in low-power modes (e.g., in power-off mode).

[0022] Therefore, systems and devices, such as those described herein, may be needed to provide clock generation using a reference signal while simultaneously controlling TC-related drift. In some embodiments, the systems and devices described herein can be configured to provide circuitry (e.g., including application-specific integrated circuits (ASICs) or other suitable circuitry) for a vehicle computing environment. The systems and devices described herein can be configured to provide oscillator functionality over a PN-CAN communication link with a desired clock frequency (e.g., between 5 MHz and 40 MHz, or other suitable clock frequencies). The systems and devices described herein can be configured to provide clock generation cost-effectively with desired accuracy (e.g., 0.3% to 0.7% accuracy or other suitable accuracy) during and outside of vehicle standby operation. The systems and devices described herein can be configured to use a single external precision resistor and an external reference received from or corresponding to the microprocessor. The reference signal can be any suitable frequency, such as 100 Hz or other suitable frequencies. The frequency from the microcontroller can correspond to the microcontroller's crystal.

[0023] In some embodiments, the systems and apparatus described herein can be configured to provide an accurate clock during the low-power standby operation of a vehicle (e.g., by using precision resistors to maintain a specification of 0.5% with temperature variation during standby operation).

[0024] In some embodiments, the systems and apparatus described herein may include a first pin corresponding to a reference signal and a second pin corresponding to an external resistor. The external resistor may be a precision resistor. The external resistor may be connected to the second pin on the first side and to ground on the second side. The systems and apparatus described herein may include a first oscillator having a first frequency loop. The first oscillator may be a low-frequency oscillator.

[0025] The first frequency loop can be configured to receive a reference signal via a first pin. The first frequency loop can also be configured to receive a current associated with a voltage applied to an external resistor via a second pin. The first frequency loop can also be configured to lock a first frequency output at a frequency associated with the reference signal. In some embodiments, the first frequency loop includes at least a time-sharing mirror divider. The time-sharing mirror divider includes an input mirror reference connected to the drains of a plurality of field-effect transistors. In some embodiments, the frequency of the second frequency output is greater than the frequency of the first frequency output. In some embodiments, the first oscillator can be configured to reject reference signals having frequencies outside its frequency range.

[0026] The systems and apparatus described herein may include a second oscillator having a second frequency loop configured to receive a first frequency output. The second oscillator may include a high-frequency oscillator. The second frequency loop may also be configured to scale the frequency of the first frequency output. The second frequency loop may also be configured to lock the second frequency output at the scaled frequency of the first frequency output.

[0027] In some embodiments, the first oscillator may receive a reference signal in response to the ignition switch of the corresponding vehicle being in the ON position. In some embodiments, the second oscillator may be configured to maintain the frequency of the second frequency output in response to the absence of a reference signal. In some embodiments, the reference signal corresponds to a remotely located microcontroller. In some embodiments, the first oscillator, the second oscillator, and the remotely located microcontroller are disposed in the vehicle.

[0028] Figure 1 A vehicle 10 is generally illustrated according to the principles of this disclosure. Vehicle 10 may include any suitable vehicle, such as a sedan, truck, SUV, minivan, crossover, any other passenger vehicle, any suitable commercial vehicle, or any other suitable vehicle. Although vehicle 10 is illustrated as a wheeled passenger vehicle intended for road use, the principles of this disclosure can be applied to other means of transport, such as aircraft, ships, trains, drones, or other suitable means of transport. Vehicle 10 includes a body 12 and a hood 14. A portion of the body 12 defines a passenger compartment 18. Another portion of the body 12 defines an engine compartment 20. The hood 14 is movably attached to a portion of the body 12 such that when the hood 14 is in a first position or open position, the hood 14 provides access to the engine compartment 20, and when the hood 14 is in a second position or closed position, the hood 14 covers the engine compartment 20.

[0029] The passenger compartment 18 is located behind the engine compartment 20. The vehicle 10 may include any suitable propulsion system, including an internal combustion engine, one or more electric motors (e.g., an electric vehicle), one or more fuel cells, or a hybrid propulsion system (e.g., a hybrid vehicle) comprising a combination of an internal combustion engine, one or more electric motors, and / or any other suitable propulsion system. In some embodiments, the vehicle 10 may include a gasoline (petrol or gasoline) fuel engine, such as a spark-ignition engine. In some embodiments, the vehicle 10 may include a diesel fuel engine, such as a compression-ignition engine. The engine compartment 20 houses and / or encloses at least some components of the propulsion system of the vehicle 10. Additionally or alternatively, propulsion control devices, such as accelerator actuators (e.g., accelerator pedals), brake actuators (e.g., brake pedals), a steering wheel, and other such components, are located in the passenger compartment 18 of the vehicle 10. The propulsion control devices may be actuated or controlled by the driver of the vehicle 10 and may be directly connected to corresponding components of the propulsion system, such as the accelerator, brakes, axles, vehicle transmission, etc. In some implementations, the propulsion control device can transmit signals to the vehicle computer (e.g., drive-by-wire), which in turn can control the corresponding propulsion components of the propulsion system.

[0030] In some embodiments, vehicle 10 includes a transmission communicated with the crankshaft via a flywheel, clutch, or hydraulic coupling. In some embodiments, the transmission includes a manual transmission. In some embodiments, the transmission includes an automatic transmission. Vehicle 10 may include one or more pistons that, in the case of an internal combustion engine or hybrid vehicle, cooperate with the crankshaft to generate forces that are transferred via the transmission to one or more shafts that rotate the wheels 22. When vehicle 10 includes one or more electric motors, a vehicle battery and / or fuel cell provide energy to the electric motors to rotate the wheels 22. In the case where vehicle 10 includes a vehicle battery that provides energy to one or more electric motors, when the battery is depleted, the vehicle can be connected to the power grid (e.g., using a wall socket) to recharge the battery cells. Alternatively or concurrently, vehicle 10 may employ regenerative braking, which uses one or more of the vehicle 10's electric motors as generators to convert kinetic energy lost due to deceleration back into energy stored in the battery.

[0031] Vehicle 10 may include an autonomous vehicle propulsion system, such as cruise control, adaptive cruise control, automatic braking control, other autonomous vehicle propulsion systems, or combinations thereof. Vehicle 10 may be an autonomous or semi-autonomous vehicle, or other suitable type of vehicle. Vehicle 10 may include more or fewer features than those generally illustrated and / or disclosed herein.

[0032] In some embodiments, vehicle 10 may include a communication link, such as PN-CAN. The communication link can be configured to allow various controllers, processors, sensors, other computing devices, etc., to communicate via the communication link. As described, vehicle 10 may include electronic circuitry, such as… Figure 2 The generally illustrated electronic circuit 200 is configured to provide clock generation for communication via a communication link.

[0033] In some embodiments, circuit 200 includes a first frequency control loop 202 and a second frequency control loop 204. The first frequency control loop 202 may include a low-frequency control loop or other suitable control loop. The second frequency control loop 204 may include a high-frequency control loop or other suitable control loop. In some embodiments, the first frequency control loop 202 may be adjusted to a first lockout frequency. The first lockout frequency may include any suitable frequency, such as a frequency in the range of 20 kHz to 50 kHz or other suitable frequencies. The second frequency control loop 204 may be adjusted to a second lockout frequency. The second lockout frequency may include any suitable frequency, such as a frequency in the range of 5 MHz to 40 MHz or other suitable frequencies.

[0034] In some implementations, such as in Figure 2 and Figure 4 As generally illustrated, the second frequency control loop 204 may include a digital control unit 206 as part of the second frequency control loop 204. The digital control unit 206 may be locked to a frequency reference (e.g., a relatively accurate and relatively low frequency reference). The second frequency control loop 204 may include an analog device 208. The analog device 208 may include a resistor-capacitor oscillator controlled by the digital control unit 206. The analog device 208 may use a current-based internal resistor that switches the voltage across a pair of capacitors from a power supply to a voltage signal higher than ground.

[0035] In some implementations, analog device 208 can be adjusted to a second locking frequency. However, in the absence of a reference frequency (e.g., due to parasitic resistors and capacitors in high-frequency switching circuits (buffers and logic gates), resistance TC variations, and / or mirror mismatch), analog device 208 may include TC in its frequency drift (e.g., ~4% or 6 sigma process capability index). Therefore, digital control unit 206 can be adjusted to a predefined number of counts (e.g., 3200 counts or other suitable number of counts), and analog device 208 can be re-centered at the second locking frequency.

[0036] In some implementations, to address temperature drift caused by parasitic resistors and capacitors in analog device 208, the first frequency control loop 202 may include a low-frequency oscillator 212, which can provide a low-power frequency reference (e.g., 25 kHz or other suitable frequency). Compared to analog device 208, the low-frequency oscillator 212 is less susceptible to temperature drift from parasitic resistors and capacitors. For example, while the effects of parasitic resistors and capacitors may be present in the low-frequency oscillator 212, at a frequency 400 times slower (e.g., 10,000,000 / 25,000), the delay through the buffer accounts for a relatively small percentage of the cycle.

[0037] The low-frequency oscillator 212 may include power supply suppression. For example, the low-frequency oscillator 212 may be configured to reduce or eliminate TC drift from parasitic resistors and capacitors during standby operation of the vehicle 10 when there is no reference signal (e.g., a frequency of 100 Hz or other suitable frequency) from a remotely located microcontroller (e.g., remotely located within the vehicle 10 relative to circuit 200).

[0038] In some embodiments, circuit 200 may include an external resistor 214. External resistor 214 may include any suitable resistor. For example, the external resistor may include a precision resistor with a resistance value between 10 kΩ and 25 kΩ or other suitable resistance value. External resistor 214 may be connected to a pin of circuit 200 on one side and to ground on the other side.

[0039] In some implementations, a current can be generated in the external resistor 214 by applying a voltage (e.g., 2 volts or other suitable voltage) across its terminals. Circuit 200 can be configured to mirror the current generated in the external resistor 214. It should be understood that the accuracy of the voltage applied to the external resistor 214 (and the corresponding current generated in it) can vary without departing from the scope of the systems and apparatus described herein, as long as the voltage tracks the frequency of the power supply to the low-frequency oscillator 212. The external resistor 214 can be configured to reduce or eliminate operational problems associated with the internal resistors of circuit 200.

[0040] The low-frequency oscillator 212 may include a current trap (e.g., a 2.2 µA trap or other suitable trap) and may include a similar current source. Circuit 200 may include a current mirror 500, such as a 36-segment mirror (e.g., responsive to the resistance value of external resistor 214) or other suitable mirrors, such as... Figure 5Broadly illustrative. Mirror 500 may include a plurality of switches 502 configured to move at periodic intervals to produce a reference for a mirrored output (e.g., vice versa). The individual devices in mirror 500 are time-divisionally shared at various locations within mirror 500, which allows any mismatch to be averaged over the time it takes to occupy all locations within mirror 500. In some embodiments, the time for averaging any mismatch may include eight clock cycles or other suitable clock cycles. The number of clock cycles may be equal to the number of metal-oxide-semiconductor field-effect transistors (MOSFETs).

[0041] In some implementations, mirror 500 can operate at 25 kHz or other suitable frequencies by switching the reference device in mirror 500 in a time-sharing manner. Each stage (e.g., a p-type stage or other suitable type of stage) utilizes multiple outputs (e.g., such as two outputs or other suitable numbers of outputs) of a total of eight cascaded MOSFETs with 24 switches to divide the current received at the pin connected to external resistor 214 by a factor (such as six or other suitable factor). Mirror 500 may include two mirror stages to achieve 36-way operation. These two mirror stages may include p-channel and n-channel, and they are substantially identical except for p- and n-channel characteristics. After 36-way operation, the sink current can be mirrored in a similar 1x time-sharing manner to generate a source current for use by the low-frequency oscillator 212 with another sink.

[0042] Circuit 200 can be configured to remove jitter at the first locked frequency by dividing frequency 216 by the number of stages in mirror 500. Circuit 200 can be configured to use eight devices from each stage of the p-channel and n-channel of mirror 500 to generate a jitter-free clock frequency 218 (e.g., 3.125 kHz (3125 Hz) or other suitable frequency). Frequency 216 can provide a reference for analog device 208.

[0043] In some implementations, the low-frequency oscillator 212 may use a + / - 1-bit digital-to-analog converter (DAC) 220 to modify the current in mirror 500 with a second locked frequency resolution. The digital control loop 210 may include a digital control bit 222 for adding a certain amount of current (e.g., which may be referred to as a fast bit) and another digital control bit 224 for subtracting a certain amount of current from mirror 500 (e.g., which may be referred to as a slow bit). The digital control loop 210 may be configured to adjust the percentage of time during which current addition and subtraction adjustments are performed within a cycle to precisely control the frequency.

[0044] In some implementations, the control value can be observed (e.g., manually or by a suitable processor, such as those described herein) by measuring changes in frequency 218 (e.g., this can be precise because the digital control loop 210 includes a second locked frequency of frequency 218, or a portion of 3200, with a clock resolution). In some implementations, three frequency measurements can be used to adjust the low-frequency oscillator 212. Alternatively, the first frequency control loop 202 may include a coarse-tuning DAC 225, which can be configured to fix the current from external resistor 214 by setting the voltage across external resistor 214.

[0045] In some implementations, the low-frequency oscillator 212 can be frequency-locked to a reference frequency received from a remotely located microcontroller. For example, the low-frequency oscillator 212 can receive a reference signal 226 indicating the reference frequency at a pin of a first frequency control loop 202. The reference frequency can include any suitable frequency, such as 100 Hz. The first frequency control loop 202 can receive the reference signal 226 in response to the ignition switch of the vehicle 10 being engaged (e.g., turned to the on position or closed). The low-frequency oscillator 212 can be set to the reference frequency using a digital control loop 210 of the first frequency control loop 202. Figure 3 As shown, the first frequency control loop 202 may include a + / - 1-bit DAC and is dither-free. The first frequency control loop 202 may include an integrator using adder 228 and divider 230 (e.g., a 100,000-count divider or other suitable divider). Any long-term aging will be corrected each time the oscillator leaves standby mode.

[0046] In some embodiments, the second frequency control loop 204 may be further configured to scale the frequency 218. For example, the digital control unit 206 may be configured to multiply the frequency 218 by a factor, as described. The digital control unit 206 may automatically adjust the frequency control 232. The analog device 208 may be configured to generate a second locking frequency for the second frequency control loop 204 using a CAN clock at the scaled frequency. The analog device 208 may provide the second locking frequency to various microcontrollers on the PN-CAN network. The various microcontrollers may use the second locking frequency as the PN-CAN clock.

[0047] In some implementations, analog device 208 may be configured to maintain a second locked frequency in response to the absence of reference signal 226. For example, in response to the ignition switch being turned off or actuated to the off position, reference signal 226 may be disconnected and no longer available at the pin of the first frequency control loop 202. Digital control unit 206 may include fault logic device 234, such as... Figure 4In a general illustration, fault logic device 234 can be configured to identify a lost reference frequency, a slow reference frequency, and a high reference frequency. If fault logic device 234 identifies a received reference frequency (e.g., received from the first frequency control loop 202) as a lost reference frequency, a slow reference frequency, or a high reference frequency, then analog device 208 maintains a second locked frequency.

[0048] In some embodiments, an apparatus includes electronic circuitry comprising a first pin corresponding to a reference signal and a second pin corresponding to an external resistor, the external resistor being connected to the second pin on a first side and to ground on a second side. The apparatus also includes a first oscillator having a first frequency loop configured to: receive the reference signal via the first pin; receive a current associated with a voltage applied to the external resistor via the second pin; and lock a first frequency output at a frequency associated with the reference signal. The apparatus further includes a second oscillator having a second frequency loop configured to: receive the first frequency output; scale the frequency of the first frequency output; and lock the second frequency output at the scaled frequency of the first frequency output.

[0049] In some embodiments, the first frequency loop includes at least a time-division shared switching current mirror divider. In some embodiments, the time-division shared switching mirror divider includes an input current mirror reference connected to the drains of multiple field-effect transistors. In some embodiments, the frequency of the second frequency output is greater than the frequency of the first frequency output. In some embodiments, the electronic circuitry is associated with a local area network (LAN). In some embodiments, the reference signal corresponds to a remotely located microcontroller. In some embodiments, the electronic circuitry and the remotely located microcontroller are located in a vehicle. In some embodiments, the electronic circuitry is configured to reject reference signals having frequencies outside its frequency range. In some embodiments, the electronic circuitry receives a reference signal in response to an ignition switch being in the ON position. In some embodiments, the electronic circuitry is configured to maintain the frequency of the second frequency output in response to the absence of a reference signal. In some embodiments, the electronic circuitry includes an application-specific integrated circuit (ASIC). In some embodiments, the external resistor includes a precision resistor. In some embodiments, the first oscillator includes a low-frequency oscillator. In some embodiments, the second oscillator includes a high-frequency oscillator.

[0050] In some embodiments, electronic circuitry for generating a local area network (LAN) clock for a local network controller includes a first pin configured to receive a reference signal from a remote microcontroller and a second pin corresponding to an external precision resistor connected on a first side to the second pin and on a second side to ground. The electronic circuitry also includes a low-frequency oscillator with a first frequency loop configured to: receive the reference signal via the first pin; receive a current associated with a voltage applied to the external precision resistor via the second pin; and lock a first frequency output at a frequency associated with the reference signal. The electronic circuitry also includes a high-frequency oscillator with a second frequency loop configured to: receive the first frequency output; scale the frequency of the first frequency output; and lock a second frequency output at the scaled frequency of the first frequency output.

[0051] In some embodiments, the frequency of the second frequency output is greater than the frequency of the first frequency output. In some embodiments, the low-frequency oscillator is configured to reject reference signals having frequencies outside its frequency range. In some embodiments, the low-frequency oscillator receives a reference signal in response to the ignition switch being in the ON position. In some embodiments, the high-frequency oscillator is configured to maintain the frequency of the second frequency output in response to the absence of a reference signal. In some embodiments, the low-frequency oscillator includes at least a first power time-sharing switch mirror divider.

[0052] The foregoing discussion is intended to illustrate the principles and various implementations of this disclosure. Once the foregoing disclosure is fully understood, many variations and modifications will become apparent to those skilled in the art. The appended claims are intended to be construed as encompassing all such variations and modifications.

[0053] The word “example” is used herein to mean serving as an example, instance, or illustration. Any aspect or design described herein as an “example” is not necessarily to be construed as preferred or superior to other aspects or designs. Rather, the use of the word “example” is intended to present the concept in a concrete manner. As used in this application, the term “or” is intended to mean an inclusive “or” rather than an exclusive “or.” That is, unless otherwise stated or clear from the context, “X comprises A or B” is intended to mean any natural inclusion arrangement. That is, if X comprises A; X comprises B; or X comprises A and B, then “X comprises A or B” is satisfied in any of the foregoing cases. Furthermore, the articles “a” and “an” used in this application and the appended claims should generally be interpreted as meaning “one or more” unless otherwise stated or clearly pointed to from the context in the singular form. In addition, the use of the terms “implementation” or “an implementation” throughout does not imply the same implementation or mode of execution, unless so described.

[0054] The systems, algorithms, methods, instructions, etc., described herein can be implemented in hardware, software, or any combination thereof. Hardware may include, for example, a computer, intellectual property (IP) core, application-specific integrated circuit (ASIC), programmable logic array, optical processor, programmable logic controller, microcode, microcontroller, server, microprocessor, digital signal processor, or any other suitable circuit. In the claims, the term "processor" should be understood to include any of the foregoing hardware, whether alone or in combination. The terms "signal" and "data" are used interchangeably.

[0055] As used herein, the term "module" can include a packaged functional hardware unit designed for use with other components, an instruction set executable by a controller (e.g., a processor executing software or firmware), processing circuitry configured to perform a specific function, and a separate hardware or software component connected to a larger system. For example, a module can include application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), circuits, digital logic circuits, analog circuits, combinations of discrete circuits, gates, and other types of hardware or combinations thereof. In other embodiments, a module can include a memory storing instructions that can be executed by a controller to implement the features of the module.

[0056] Furthermore, in one aspect, for example, the system described herein may be implemented using a general-purpose computer or general-purpose processor having a computer program that, when executed, performs any of the corresponding methods, algorithms, and / or instructions described herein. Alternatively or alternatively, for example, a special-purpose computer / processor may be used, which may contain additional hardware for performing any of the methods, algorithms, or instructions described herein.

[0057] Furthermore, all or part of the embodiments of this disclosure may take the form of a computer program product accessible from, for example, a computer-usable or computer-readable medium. A computer-usable or computer-readable medium may be, for example, any device capable of tangibly containing, storing, transmitting, or transporting a program for use by or in conjunction with any processor. Such a medium may be, for example, an electronic, magnetic, optical, electromagnetic, or semiconductor device. Other suitable media are also available.

[0058] The above-described embodiments, implementations, and aspects have been provided to facilitate an easy understanding of this disclosure and do not limit it. Rather, this disclosure is intended to cover various modifications and equivalent arrangements included within the scope of the appended claims, and this scope should be interpreted in the broadest possible sense to cover all such modifications and equivalent structures permitted by law.

Claims

1. An apparatus for a local area network (LAN) controller, the apparatus comprising: Electronic circuit, the electronic circuit comprising: The first pin corresponds to the reference signal; The second pin corresponds to an external resistor, which is connected to the second pin on the first side and to ground on the second side; A first oscillator having a first frequency loop, the first frequency loop being configured to: The reference signal is received via the first pin; The second pin receives a current associated with the voltage applied to the external resistor; and Lock the first frequency output at the frequency associated with the reference signal; and A second oscillator having a second frequency circuit, the second frequency circuit being configured to: Receive the first frequency output; The frequency of the first frequency output is scaled; and The second frequency output is locked at a scaled frequency of the first frequency output.

2. The apparatus according to claim 1, wherein, The first frequency loop includes at least a time-sharing shared switching mirror frequency divider.

3. The apparatus according to claim 2, wherein, The time-sharing shared-switch mirror divider includes an input mirror reference connected to the drains of multiple field-effect transistors.

4. The apparatus according to claim 1, wherein, The frequency of the second frequency output is greater than the frequency of the first frequency output.

5. The apparatus according to claim 1, wherein, The electronic circuit is associated with the local area network of the local networking controller.

6. The apparatus according to claim 1, wherein, The reference signal corresponds to the remote positioning microcontroller.

7. The apparatus according to claim 6, wherein, The electronic circuitry and the remote positioning microcontroller are located in the vehicle.

8. The apparatus according to claim 1, wherein, The electronic circuitry is configured to reject reference signals with frequencies outside the frequency range.

9. The apparatus according to claim 1, wherein, The electronic circuit receives the reference signal in response to the ignition switch being in the ON position.

10. The apparatus according to claim 1, wherein, The electronic circuit is configured to maintain the frequency of the second frequency output in response to the absence of the reference signal.

11. The apparatus according to claim 1, wherein, The electronic circuit includes a dedicated integrated circuit.

12. The apparatus according to claim 1, wherein, The external resistor includes a precision resistor.

13. The apparatus according to claim 1, wherein, The first oscillator includes a low-frequency oscillator.

14. The apparatus according to claim 1, wherein, The second oscillator includes a high-frequency oscillator.

15. An electronic circuit for generating a local area network (LAN) clock for a local networking controller, the electronic circuit comprising: A first pin is configured to receive a reference signal from a remote microcontroller; The second pin corresponds to an external precision resistor, which is connected to the second pin on the first side and to ground on the second side; A low-frequency oscillator having a first frequency loop, wherein the first frequency loop is configured to: The reference signal is received via the first pin; The second pin receives a current associated with the voltage applied to the external precision resistor; and Lock the first frequency output at the frequency associated with the reference signal; and A high-frequency oscillator with a second frequency loop, wherein the second frequency loop is configured to: Receive the first frequency output; The frequency of the first frequency output is scaled; and The second frequency output is locked at a scaled frequency of the first frequency output.

16. The electronic circuit according to claim 15, wherein, The frequency of the second frequency output is greater than the frequency of the first frequency output.

17. The electronic circuit according to claim 15, wherein, The low-frequency oscillator is configured to reject reference signals with frequencies outside its frequency range.

18. The electronic circuit according to claim 15, wherein, The low-frequency oscillator receives the reference signal in response to the ignition switch being in the ON position.

19. The electronic circuit according to claim 15, wherein, The high-frequency oscillator is configured to maintain the frequency of the second frequency output in response to the absence of the reference signal.

20. The electronic circuit according to claim 15, wherein, The low-frequency oscillator includes at least a first power time-sharing switch mirror frequency divider.

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