A solid-state drive and its configuration method, system, and device

Abstract

This application discloses a solid-state drive (SSD) and its configuration method, system, and apparatus, relating to the field of data storage. The method for configuring the SSD includes: obtaining initial configuration parameters for a Nand Flash memory, the initial configuration parameters including multiple initial programming states; dividing all initial programming states into multiple first programming states and multiple second programming states, with two adjacent first programming states forming a state group, and at least one first programming state being separated from two first programming states within a state group by one or more second programming states; and determining all first programming states as application programming states, so that the Nand Flash operates according to the application programming states. In this application, when there are second programming states between adjacent first programming states, the distance between these two first programming states is significantly greater than the distance between the initial programming states, resulting in higher resistance to interference from extreme environments and improved data reliability during application.

Description

Technical Field

[0001] This invention relates to the field of data storage, and in particular to a solid-state drive and its configuration method, system, and apparatus. Background Technology

[0002] A solid-state drive (SSD) is a hard drive made using an array of solid-state electronic storage chips. An SSD consists of a control unit and storage cells. The NAND flash memory within the storage cells determines the overall performance of the SSD.

[0003] There is currently a market demand for solid-state drives (SSDs) used in extreme environments such as wide-temperature zones. However, under extreme conditions, the interference with data retention and program erase cycles (PECcycles) of conventional NAND flash memory becomes more severe, thus reducing the data reliability of the NAND flash. Only NAND flash memory with special specifications can maintain data reliability under extreme conditions. This special specification NAND flash is not the main product of most manufacturers and has a higher production cost.

[0004] Therefore, how to provide a solution to the above-mentioned technical problems is a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0005] In view of this, the purpose of this invention is to provide a solid-state drive (SSD) with wider applicability and higher data reliability, as well as its configuration method, system, and apparatus. The specific solution is as follows:

[0006] A method for configuring a solid-state drive, comprising:

[0007] Obtain the initial configuration parameters of the Nand Flash, which include multiple initial programming states;

[0008] All the initial programming states are divided into multiple first programming states and multiple second programming states, wherein two adjacent first programming states form a state group, and at least one of the two first programming states in a state group contains one or more second programming states.

[0009] All of the first programming states are identified as application programming states, so that the Nand Flash operates according to all of the application programming states.

[0010] Preferably, the number of the first programming state and the number of the second programming state are equal.

[0011] Preferably, the Nand Flash is a TLC Nand Flash, and the preliminary configuration parameters include eight initial programming states.

[0012] Preferably, the process of dividing all the initial programming states into multiple first programming states and multiple second programming states includes:

[0013] All the initial programming states that satisfy the valid bit relationships are determined as the first programming state;

[0014] The remaining initial programming states, excluding all the first programming states, are determined as the second programming states.

[0015] Preferably, the effective bit relationship is as follows:

[0016] In the initial programming state, the XOR value of the first and second significant bits is equal to the value of the third significant bit.

[0017] Preferably, the effective bit relationship is as follows:

[0018] In the initial programming state, the first and second significant bits are equal.

[0019] Preferably, after determining all the first programming states as application programming states, the method further includes:

[0020] Correct the threshold voltage for all first programming states.

[0021] Accordingly, this application also discloses a configuration system for a solid-state drive, including:

[0022] The acquisition module is used to acquire the initial configuration parameters of the Nand Flash, which include multiple initial programming states;

[0023] The classification module is used to divide all the initial programming states into a plurality of first programming states and a plurality of second programming states, wherein two adjacent first programming states form a state group, and at least one or more second programming states are contained between two first programming states in at least one state group.

[0024] An application module is configured to determine all the first programming states as application programming states, so that the NandFlash operates according to all the application programming states.

[0025] Accordingly, this application also discloses a configuration device for a solid-state drive, comprising:

[0026] Memory used to store configuration programs;

[0027] A processor, configured to implement the steps of the configuration method for a solid-state drive as described in any of the preceding descriptions when executing the configuration program.

[0028] Accordingly, this application also discloses a solid-state drive, including a configuration device for the solid-state drive as described above.

[0029] This application discloses a method for configuring a solid-state drive (SSD), comprising: obtaining initial configuration parameters of a Nand Flash, the initial configuration parameters including multiple initial programming states; dividing all the initial programming states into multiple first programming states and multiple second programming states, wherein two adjacent first programming states form a state group, and at least one first programming state is contained between two first programming states in at least one state group; and determining all the first programming states as application programming states, so that the Nand Flash operates according to all the application programming states. In this application, when there is a second programming state between adjacent first programming states, these two first programming states are designated as application programming states, and their distance is obviously greater than the distance between the initial programming states, resulting in higher resistance to interference from extreme environments and improved data reliability. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0031] Figure 1 This is a flowchart illustrating the steps of a solid-state drive configuration method according to an embodiment of the present invention;

[0032] Figure 2 This is a structural distribution diagram of the initial programming state of the TLC in an embodiment of the present invention;

[0033] Figure 3 This is a structural distribution diagram of a solid-state drive configuration system according to an embodiment of the present invention. Detailed Implementation

[0034] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0035] There is currently a market demand for solid-state drives (SSDs) used in extreme environments such as wide-temperature zones. However, under extreme conditions, the interference with data retention and repeated erasure of conventional NAND flash memory becomes more severe, thus reducing the data reliability of NAND flash. Only special-specification NAND flash can maintain data reliability under extreme conditions. This special-specification NAND flash is not the main product of most manufacturers and has a higher production cost.

[0036] In this application, when there is a second programming state between adjacent first programming states, these two first programming states are used as application programming states. The distance between them is obviously greater than the distance between the initial programming states, which has a higher resistance to interference in extreme environments and improves the reliability of data.

[0037] Currently, most solid-state drives (SSDs) use NAND Flash as their storage medium. Based on different programming methods, they can be divided into SLC (Single-Level Cell), MLC (Multi-Level Cell, generally referring to dual-level storage), TLC (Trinary-Level Cell), and QLC (Quad-Level Cell). Among them, TLC is the main product currently manufactured by NAND Flash manufacturers, and most SSDs on the market use TLC.

[0038] The main impacts on data reliability in Nand Flash memory include erasure, data retention, and read / write interference. These factors can lead to electron leakage, causing more data reversals in the PAGE, resulting in data error correction failures, and ultimately data loss, thus affecting data reliability. Extreme environments, such as high or low temperatures, alter the electron leakage capability, further exacerbating the impact of erasure and data retention on data reliability.

[0039] This invention discloses a method for configuring a solid-state drive (SSD), see [link to relevant documentation]. Figure 1 As shown, it includes:

[0040] S1: Obtain the initial configuration parameters of the Nand Flash, which include multiple initial programming states;

[0041] S2: Divide all initial programming states into multiple first programming states and multiple second programming states, wherein two adjacent first programming states form a state group, and at least one or more second programming states are contained between two first programming states in at least one state group.

[0042] It is understandable that all initial programming states are plotted on a voltage distribution curve with the read voltage value as the horizontal axis and the number of bit flips corresponding to each read voltage value during data reading tests as the vertical axis. The voltage value corresponding to the peak number of bit flips for each initial programming state is the threshold voltage for that initial programming state, and the distance between any two initial programming states is the distance between their threshold voltages. Currently, the main product type of NAND Flash manufacturers is TLC. Taking TLC NAND Flash as an example, the initial configuration parameters include 8 initial programming states, such as... Figure 2 The voltage distribution curve VN shown has initial programming states LE and L1-L7. Each initial programming state includes three significant bits: LSB (Least Significant Bit), CSB (Central Significant Bit), and MSB (Most Significant Bit). The threshold voltage for each initial programming state can be obtained from... Figure 2 Read it out.

[0043] Furthermore, the initial programming states are divided into two categories according to preset rules: a first programming state and a second programming state. Both are essentially initial programming states; the first programming state is the one used by the Nand Flash during subsequent operation, while the second programming state is the one not used by the Nand Flash during subsequent operation. Clearly, when a second programming state exists between two adjacent first programming states in a state group, and when the first programming state is used as an application programming state, the distance between these two adjacent application programming states is significantly greater than the distance between adjacent initial programming states, thus enhancing data reliability.

[0044] S3: Determine all first programming states as application programming states so that the Nand Flash operates according to all application programming states.

[0045] Understandably, the initial programming state corresponds to the programming state in the initial programming method of the Nand Flash, and its number is a power of 2, where N is the number of valid bits of the state data in the initial programming method. Specifically, N=4 in QCL, N=3 in TCL, and N=2 in MCL. From the initial programming state to the application programming state, the number of available programming states decreases, and the data reliability increases. For the convenience of subsequent management programs, the number of application programming states is usually a power of 2, where M<N. When running according to the application programming state, the conventional programming method of adjusting the number of valid bits of M state data can be used to run the program.

[0046] Furthermore, since the number of programming states is positively correlated with storage capacity, in order to balance data reliability and storage capacity, the number of application programming states should be less than the number of initial programming states, but not too much less. At the same time, considering the direct reuse of existing mature running programs, the number of application programming states can be set to half the number of initial programming states, that is, the number of first programming states and second programming states are equal. Therefore, step S2, which divides all initial programming states into multiple first programming states and multiple second programming states, can include: dividing all initial programming states into multiple first programming states and multiple second programming states of equal number.

[0047] Furthermore, since the current mainstream product type of NAND Flash manufacturers is TLC, the NAND Flash in this embodiment can specifically be selected as TLC NAND Flash. The initial configuration parameters include 8 initial programming states, such as... Figure 2 As shown, the initial programming states are LE and L1-L7. Each initial programming state includes three significant bits: LSB (Least Significant Bit), CSB (Central Significant Bit), and MSB (Most Significant Bit). Following step S2, four first programming states can be determined, corresponding to the MLC programming method. Therefore, the original TLC mode, configured according to the method in this embodiment, can also be called pseudo-MLC mode.

[0048] Furthermore, step S2, the process of dividing all initial programming states into multiple first programming states and multiple second programming states, includes:

[0049] All initial programming states that satisfy the valid bit relationships are determined as the first programming state;

[0050] The remaining initial programming states, excluding all first programming states, are designated as second programming states.

[0051] Understandably, when implementing this configuration method, it is difficult to directly specify that some of the initial programming states are the first programming state and the rest are the second programming state. Usually, all initial programming states are screened one by one by judging the valid bit relationship, and the initial programming state that satisfies the valid bit relationship is determined as the first programming state.

[0052] The setting of the valid bit relationship is specifically a logical expression for the valid bits, which can be implemented by choosing one of the following two operation types:

[0053] The first type of operation is the XOR operation. Specifically, the relationship between the significant bits is: in the initial programming state, the XOR value of the first and second significant bits equals the value of the third significant bit.

[0054] It is understandable that the first, second, and third significant bits here correspond to the three significant bits in the TLC, but the correspondence between the first, second, and third significant bits and the LSB, CSB, and MSB is not restricted here:

[0055] When the third valid bit is MSB, the valid bit relationship is: MSB = LSB ⊕ CSB, and the initial programming states that satisfy the valid bit relationship are LE, L2, L4, L6.

[0056] When the third valid bit is CSB, the valid bit relationship is: CSB = LSB⊕MSB, and the initial programming states that satisfy the valid bit relationship are LE, L2, L4, L6.

[0057] When the third valid bit is LSB, the valid bit relationship is: LSB = MSB ⊕ CSB, and the initial programming states that satisfy the valid bit relationship are LE, L2, L4, L6.

[0058] As can be seen, the first programming state determined under these three valid bit relationships is the same, and only one valid bit relationship needs to be selected. Furthermore, the first programming states (LE, L2, L4, L6) and the second programming states (L1, L3, L5, L7) are interleaved, with a second programming state existing between each pair of adjacent first programming states. This significantly widens the peak values ​​of adjacent first programming states and increases the distance between them, thereby significantly reducing the possibility of data misreading and enhancing data reliability.

[0059] The second type of operation is the equality operation, and the specific relationship of the effective bits is: in the initial programming state, the first effective bit and the second effective bit are equal, that is, the first effective bit = the second effective bit.

[0060] It is understandable that the first and second significant bits here correspond to two of the three significant bits in the TLC, specifically:

[0061] When the first and second significant bits are LSB and CSB in TLC, the relationship between the significant bits is: LSB = CSB, and the initial programming state packets that satisfy the relationship between the significant bits are LE, L2, L3, and L5.

[0062] When the first and second valid bits are CSB and MSB in TLC, the valid bit relationship is: MSB = CSB, and the initial programming state packets that satisfy the valid bit relationship are LE, L1, L3, and L6.

[0063] When the first and second significant bits are the LSB and MSB in the TLC, the relationship between the significant bits is: LSB = MSB. The initial programming state packets that satisfy the relationship between the significant bits are LE, L3, L4, and L7.

[0064] As can be seen, these three effective bit relationships are not the same, but all of them contain one or more second programming states between two first programming states in at least one state group. For example, if first programming states L3 and L5 are adjacent and form a state group, then a second programming state L4 is contained between two adjacent first programming states L3 and L5 in this state group. That is, they all satisfy the positional relationship between the first programming state and the second programming state. However, there are also cases where two adjacent first programming states are still the previous two adjacent initial programming states, such as L2 and L3, LE and L1, L3 and L4. In this case, there is no second programming state between the adjacent first programming states, and the distance between the two first programming states is still small. When running the NAND Flash with the current application programming state, there is no second programming state between these two adjacent first programming states, and the threshold voltage distance between these two first programming states is small. When environmental changes cause the actual threshold voltage to drift, but the NAND Flash still reads according to the originally set threshold voltage, the NAND Flash is prone to data read failure, i.e., read disturbance. To solve this problem, the threshold voltage of these two adjacent first programming states can be adjusted to make the threshold voltage used by the NAND Flash during reading more accurate, thereby improving the accuracy of data reading. Specific adjustment methods include directly using the reread table set by the manufacturer in the Nand Flash to try rereading each group of threshold voltages one by one, and using the voltage of the reread table with the correct data read as the threshold voltage for the Nand Flash to run. Alternatively, you can test whether different voltage levels can read the correct data to determine the accurate actual threshold voltage and use it as the threshold voltage for operation.

[0065] Furthermore, among the different valid bit relationships, based on the peak distance of the measured threshold voltage of the current solid-state drive, a more suitable valid bit relationship can be selected from these three equivalent operation valid bit relationships, so that adjacent first programming states can further improve data reliability by correcting the threshold voltage.

[0066] It is understood that, in addition to the XOR and equal values ​​already mentioned, other methods can be selected to set the effective bit relationships in this embodiment, and no restrictions are imposed here.

[0067] It is understandable that, in any solid-state drive configuration method, after determining all first programming states as application programming states in step S3, the method may further include: adjusting the threshold voltage of all first programming states by rereading the drive. By correcting the threshold voltage, the impact of read interference on data reliability can be further reduced.

[0068] Specifically, as mentioned above, in extreme environments such as wide-temperature ranges, NAND flash memory is prone to actual threshold voltage drift due to environmental changes. If the NAND flash continues to read data according to the originally set threshold voltage, data read failures are likely, also known as read disturbances. To further improve data reliability and reduce read disturbances, the threshold voltage of all first programming states can be adjusted to make the threshold voltage used by the NAND flash during reading more accurate, thereby improving data read accuracy. Specific adjustment methods include directly attempting to reread data from each threshold voltage set in the read retry table configured by the manufacturer in the NAND flash, using the retry voltage at which data was read correctly as the threshold voltage for NAND flash operation. Alternatively, different threshold voltages can be tested one by one to determine the accurate actual threshold voltage and use it as the operating threshold voltage.

[0069] This application discloses a method for configuring a solid-state drive (SSD), comprising: obtaining initial configuration parameters of a Nand Flash, the initial configuration parameters including multiple initial programming states; dividing all the initial programming states into multiple first programming states and multiple second programming states, wherein two adjacent first programming states form a state group, and at least one first programming state is contained between two first programming states in at least one state group; and determining all the first programming states as application programming states, so that the Nand Flash operates according to all the application programming states. In this application, when there is a second programming state between adjacent first programming states, these two first programming states are designated as application programming states, and the distance between them is obviously greater than the distance between the initial programming states, resulting in higher resistance to interference from extreme environments and improved data reliability.

[0070] Accordingly, this application also discloses a solid-state drive configuration system, see [link to relevant documentation]. Figure 3 As shown, it includes:

[0071] Acquisition module 1 is used to acquire the initial configuration parameters of the Nand Flash, which include multiple initial programming states;

[0072] Classification module 2 is used to divide all the initial programming states into multiple first programming states and multiple second programming states, wherein two adjacent first programming states form a state group, and at least one or more second programming states are contained between two first programming states in at least one state group.

[0073] Application module 3 is used to determine all the first programming states as application programming states so that the NandFlash runs according to all the application programming states.

[0074] In this application, when there is a second programming state between adjacent first programming states, these two first programming states are used as application programming states. The distance between them is obviously greater than the distance between the initial programming states, which has a higher resistance to interference in extreme environments and improves the reliability of data.

[0075] In some specific embodiments, the classification module 2 is specifically used for:

[0076] All the initial programming states are divided into multiple first programming states and multiple second programming states of equal number.

[0077] In some specific embodiments, the Nand Flash is specifically a TLC Nand Flash, and the preliminary configuration parameters include eight initial programming states.

[0078] In some specific embodiments, the classification module 2 is specifically used for:

[0079] All the initial programming states that satisfy the valid bit relationships are determined as the first programming state;

[0080] The remaining initial programming states, excluding all the first programming states, are determined as the second programming states.

[0081] In some specific embodiments, the effective bit relationship is specifically as follows:

[0082] In the initial programming state, the XOR value of the first and second significant bits is equal to the value of the third significant bit.

[0083] In some specific embodiments, the effective bit relationship is specifically as follows:

[0084] In the initial programming state, the first and second significant bits are equal.

[0085] In some specific embodiments, after the application module 3 determines all the first programming states as application programming states, it further includes:

[0086] Correct the threshold voltage for all first programming states.

[0087] Accordingly, embodiments of this application also disclose a configuration device for a solid-state drive, including:

[0088] Memory used to store configuration programs;

[0089] A processor is used to implement the steps of the solid-state drive configuration method as described in any of the above embodiments when executing the configuration program.

[0090] Accordingly, this application also discloses a solid-state drive, including a configuration device for the solid-state drive as described in the above embodiments.

[0091] For details regarding the configuration method of the solid-state drive, please refer to the relevant descriptions in the above embodiments, which will not be repeated here.

[0092] In this embodiment, the solid-state drive configuration device and the solid-state drive have the same technical effects as the solid-state drive configuration method in the previous embodiment, and will not be described again here.

[0093] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0094] The present invention provides a detailed description of a solid-state drive and its configuration method, system, and device. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for configuring a solid-state drive, characterized in that, include: Obtain the initial configuration parameters of the Nand Flash, which include multiple initial programming states; The initial programming state is a voltage distribution curve with the read voltage value on the horizontal axis and the number of bit inversions corresponding to each read voltage value during the read data test on the vertical axis. The voltage value corresponding to the peak value of the number of bit inversions is the threshold voltage of the corresponding initial programming state. If the number of valid bits of data in the Nand Flash is N, the initial programming state includes 2 to the power of N programming states. All initial programming states are divided into multiple first programming states and multiple second programming states, wherein two adjacent first programming states form a state group, and at least one state group contains one or more second programming states between two first programming states; the first programming states are the initial programming states used by the Nand Flash in subsequent operation, and the second programming states are the initial programming states not used by the Nand Flash in subsequent operation. All of the first programming states are identified as application programming states, so that the Nand Flash operates according to all of the application programming states.

2. The configuration method according to claim 1, characterized in that, The number of the first programming state and the number of the second programming state are equal.

3. The configuration method according to claim 2, characterized in that, The Nand Flash is specifically a TLC NandFlash, and the initial configuration parameters include eight initial programming states.

4. The configuration method according to claim 3, characterized in that, The process of dividing all the initial programming states into multiple first programming states and multiple second programming states includes: All the initial programming states that satisfy the valid bit relationships are determined as the first programming state; The remaining initial programming states, excluding all the first programming states, are determined as the second programming states.

5. The configuration method according to claim 4, characterized in that, The specific relationship of the effective bits is as follows: In the initial programming state, the XOR value of the first and second significant bits is equal to the value of the third significant bit.

6. The configuration method according to claim 4, characterized in that, The specific relationship of the effective bits is as follows: In the initial programming state, the first and second significant bits are equal.

7. The configuration method according to any one of claims 1 to 6, characterized in that, After determining all the first programming states as application programming states, the process further includes: Correct the threshold voltage for all first programming states.

8. A configuration system for a solid-state drive, characterized in that, include: The acquisition module is used to acquire the initial configuration parameters of the Nand Flash, which include multiple initial programming states; The initial programming state is a voltage distribution curve with the read voltage value on the horizontal axis and the number of bit inversions corresponding to each read voltage value during the read data test on the vertical axis. The voltage value corresponding to the peak value of the number of bit inversions is the threshold voltage of the corresponding initial programming state. If the number of valid bits of data in the Nand Flash is N, the initial programming state includes 2 to the power of N programming states. The classification module is used to divide all the initial programming states into multiple first programming states and multiple second programming states, wherein two adjacent first programming states form a state group, and at least one of the two first programming states in a state group contains one or more second programming states; the first programming states are the initial programming states used by the Nand Flash in subsequent operation, and the second programming states are the initial programming states not used by the Nand Flash in subsequent operation. An application module is configured to determine all the first programming states as application programming states, so that the Nand Flash operates according to all the application programming states.

9. A device for configuring a solid-state drive, characterized in that, include: Memory used to store configuration programs; A processor, configured to implement the steps of the configuration method for a solid-state drive as described in any one of claims 1 to 7 when executing the configuration program.

10. A solid-state drive, characterized in that, The configuration device includes the solid-state drive as described in claim 9.

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