Memory devices and apparatus for power management

Abstract

The present disclosure relates to power management. A memory device can include a controller configured to cause the memory device to determine whether the memory device is waiting to initiate a next phase of an access operation; and in response to determining that the memory device is waiting to initiate the next phase, determine whether there is an available current budget sufficient to initiate the next phase in a selected operating mode, responsive at least to the priority token of the memory device, an expected peak current amount value for the next phase in the selected operating mode, and additional expected peak current amount values of other memory devices. In response to determining that there is an available current budget sufficient to initiate the next phase in the selected operating mode, the memory device can output the expected peak current amount value for the next phase in the selected operating mode from the memory device.

Description

[0001] Related Applications

[0002] This application claims the benefit of U.S. Provisional Application No. 63 / 182,015, filed April 30, 2021, which is hereby incorporated by reference in its entirety. TECHNICAL FIELD

[0003] The present disclosure relates generally to power management in integrated circuit devices, and in particular, in one or more embodiments, the present disclosure relates to methods and apparatuses that utilize predictive peak current monitoring and priority levels in power management. BACKGROUND

[0004] Memory, e.g., a memory device, is typically provided as internal semiconductor integrated circuit devices in computers or other electronic devices. There are many different types of memory, including random access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.

[0005] Flash memory has evolved into a popular non-volatile memory source for use in a wide variety of electronic applications. Flash memory typically uses a single transistor memory cell that allows for high memory density, high reliability, and low power consumption. The threshold voltage (Vt) of the memory cell, which determines the data state (e.g., data value) of each memory cell, is altered by programming a charge storage structure (e.g., a floating gate or charge trap) or other physical phenomenon (e.g., phase change or polarization). Common uses of flash memory and other non-volatile memory include personal computers, personal digital assistants (PDAs), digital cameras, digital media players, digital recorders, games, electrical devices, vehicles, wireless devices, mobile telephones, and removable memory modules, and the use of non-volatile memory is continually expanding.

[0006] NAND flash memory is a commonly used type of flash memory device, so named for the logical form in which the basic memory cell configuration is arranged. Typically, an array of memory cells for NAND flash memory is arranged so that the control gates of each memory cell in a row in the array are connected together to form an access line, such as a word line. Columns in the array include strings of memory cells (often referred to as NAND strings) connected together in series between a pair of select gates, such as between a source select transistor and a drain select transistor. Each source select transistor can be connected to a source, and each drain select transistor can be connected to a data line, such as a column bit line. Variations using more than one select gate between the string of memory cells and the source and / or between the string of memory cells and the data line are known.

[0007] Power consumption is often an important consideration in the design and use of memory devices. Problems can arise when multiple memory devices are operated in parallel. Such problems can include exceeding power consumption specifications and / or adversely affecting quality of service. SUMMARY

[0008] In one aspect, the disclosure provides a memory device comprising: an array of memory cells; a node for connection to a signal line; a plurality of registers, wherein one register of the plurality of registers is configured to store a value of an expected peak current amount of the memory device and a priority token of the memory device, and wherein remaining registers of the plurality of registers are each configured to store a respective value of an expected peak current amount of a respective different memory device; and a controller for accessing the array of memory cells, wherein the controller is configured to cause the memory device to: determine whether the memory device is waiting for a next phase of an access operation to be initiated to the array of memory cells; in response to determining that the memory device is waiting for the next phase of the access operation to be initiated: determine, responsive at least to: the priority token of the memory device; the respective values of expected peak current amount of the remaining registers of the plurality of registers; and a value of an expected peak current amount of the next phase of the access operation in a selected mode of operation, whether there is an available current budget sufficient to initiate the next phase of the access operation in the selected mode of operation; and in response to determining that there is an available current budget sufficient to initiate the next phase of the access operation in the selected mode of operation, output the value of the expected peak current amount of the next phase of the access operation in the selected mode of operation to the node and store the value of the expected peak current amount of the next phase of the access operation in the selected mode of operation to the one register of the plurality of registers.

[0009] In another aspect, the disclosure additionally provides a memory device comprising: an array of memory cells; and a controller for accessing the array of memory cells, wherein the controller is configured to cause the memory device to: determine whether the memory device is waiting for a next phase of an access operation to be initiated on the array of memory cells; in response to determining that the memory device is waiting for the next phase of the access operation to be initiated: determine a value corresponding to a current budget reservation for the memory device; determine an available current budget equal to a total current budget available to a plurality of memory devices minus the current budget reservation corresponding to the memory device, wherein the plurality of memory devices includes the memory device and one or more other memory devices in communication with the memory device; determine whether there is an available current budget sufficient to initiate the next phase of the access operation in a selected operating mode; in response to determining that there is an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, broadcast an expected peak current amount value for the selected operating mode to remaining memory devices in the plurality of memory devices; and in response to determining that there is not an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, broadcast an expected peak current amount value for a suspended memory device to the remaining memory devices in the plurality of memory devices.

[0010] In yet another aspect, the disclosure additionally provides an apparatus comprising: a plurality of dies, wherein each die of the plurality of dies is in communication with each remaining die of the plurality of dies, and wherein a particular die of the plurality of dies comprises: a controller configured to cause the particular die to: store a respective expected peak current amount value for each die of the plurality of dies; determine whether the particular die is waiting for a next phase of an access operation to be initiated; in response to determining that the particular die is waiting for the next phase of the access operation to be initiated: determine a value corresponding to a current budget reservation for the particular die; determine an available current budget equal to a total current budget available to the plurality of dies minus the current budget reservation corresponding to the particular die; determine whether there is an available current budget sufficient to initiate the next phase of the access operation in a selected operating mode; in response to determining that there is an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, broadcast an expected peak current amount value for the selected operating mode to remaining dies of the plurality of dies; and in response to determining that there is not an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, broadcast an expected peak current amount value for a suspended die to the remaining dies of the plurality of dies.

[0011] In yet another aspect, the disclosure additionally provides a memory device comprising: an array of memory cells; and a controller for accessing the array of memory cells, wherein the controller is configured to cause the memory device to: determine whether the memory device is waiting for a next phase of an access operation to be initiated to the array of memory cells; in response to determining that the memory device is waiting for the next phase of the access operation to be initiated: determine whether the memory device has a particular priority token of a plurality of priority tokens; in response to determining that the memory device has the particular priority token: determine whether there is an available current budget sufficient to initiate the next phase of the access operation in a selected operating mode, wherein the available current budget is equal to a total current budget available to a plurality of memory devices including the memory device; in response to determining that there is an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, change its priority token to a lower priority token of the plurality of priority tokens, and broadcast an expected peak current amount value for the selected operating mode and the lower priority token to remaining memory devices of the plurality of memory devices; and in response to determining that there is not an available current budget sufficient to initiate the next phase of the access operation in a normal operating mode, broadcast an expected peak current amount value for the normal operating mode and the particular priority token to the remaining memory devices of the plurality of memory devices. BRIEF DESCRIPTION OF DRAWINGS

[0012] Figure 1 is a simplified block diagram of a memory in communication with a processor as part of an electronic system in accordance with an embodiment.

[0013] Figure 2 is a simplified block diagram of a memory module in communication with a host as part of an electronic system in accordance with another embodiment.

[0014] Figure 3 is a perspective view of a representation of a multi-die package in accordance with an embodiment.

[0015] Figure 4 is a schematic representation of a multi-die package in accordance with an embodiment.

[0016] Figures 5A-5B are conceptual timing diagrams of signals and register contents in accordance with an embodiment.

[0017] Figure 6 is a timing diagram depicting clocks and other signals in accordance with an embodiment.

[0018] Figures 7A-7B is a simplified schematic of a circuit for generating signals for use with an embodiment.

[0019] Figure 8is a schematic representation of a multi-die package according to another embodiment.

[0020] Figure 9 is a flowchart of a method of operating a die according to an embodiment.

[0021] Figures 10A-10B is a flowchart of a method of operating a plurality of dies according to an embodiment.

[0022] Figures 11A-11B are conceptual timing diagrams of signals and register contents according to an embodiment.

[0023] Figures 12A-12C is a flowchart of a method of operating a die according to an embodiment.

[0024] Figure 13 is a flowchart of a portion of a method of operating a die according to various embodiments. DETAILED DESCRIPTION

[0025] In the following detailed description, references are made to the accompanying drawings that form a part hereof, and in which are shown by way of illustration specific embodiments. In the drawings, like numerals describe substantially similar components throughout the several views. Other embodiments can be utilized and structural, logical, and electrical changes can be made without departing from the scope of the present disclosure. Therefore, the following detailed description is not to be taken in a limiting sense.

[0026] For example, the term "semiconductor" as used herein can refer to a layer of material, a wafer or substrate, and includes any base semiconductor structure. "Semiconductor" should be understood to include silicon-on-sapphire (SOS) technology, silicon-on-insulator (SOI) technology, thin-film transistor (TFT) technology, doped and undoped semiconductors, epitaxial layers of silicon supported by a base semiconductor structure, as well as other semiconductor structures that have been developed or are developed in the future. In addition, when referring to a semiconductor in the following description, it is contemplated that a region / junction has been formed in the base semiconductor structure as a result of previous processing steps, and the term semiconductor can include the underlying layer containing such region / junction.

[0027] The term "conductive" as used herein, and various related forms thereof (e.g., conduct, conductively, conducting, conduction, conductivity, etc.), refers to electrically conductive, unless otherwise clear from context. Similarly, the term "connecting" as used herein, and various related forms thereof (e.g., connect, connected, connection, etc.), refers to electrically connecting through a conductive path, unless otherwise clear from context.

[0028] It is recognized herein that even where values can be expected to be equal, variability and precision of industrial processes and operations can still cause differences from their expected values. These variabilities and precisions are generally dependent on the technology used in the manufacture and operation of integrated circuit devices. Thus, if values are expected to be equal, those values are considered equal regardless of their resulting values.

[0029] NAND memory is widely used in managed NAND (MNAND) and solid state drive (SSD) systems. Common examples of MNAND can include embedded multimedia cards (eMMC) as can be common in SSD systems, embedded USB (eUSB) as can be common in industrial applications, and universal flash storage as can be common in digital cameras, mobile phones, and other consumer electronics devices. Capacitive loads for three-dimensional NAND are generally large and can continue to grow as process scaling continues. Various access lines, data lines, and voltage nodes can need to be charged or discharged very quickly during sensing (e.g., read or verify), program, and erase operations so that memory array access operations can meet performance specifications often needed to meet data processing volume targets indicated by, for example, consumer demands or industry standards. For sequential read or program, multi-plane operations are generally used to increase system throughput. Thus, a typical NAND memory can have a peak current usage close to 200 mA, which can be four to five times the average current amplitude. With a typical market demand of a 400-1000 mA total current requirement budget for MNAND systems, operating more than four NAND memories in parallel can become challenging.

[0030] Power consumption for memory systems containing multiple memory devices has been managed with a variety of techniques, where many memory devices rely on a memory controller to stagger the activity of the memory devices, in an attempt to avoid the high power portion of access operations being performed in parallel in more than one memory device. Various embodiments described herein facilitate power management between multiple dies (e.g., memory) by having the dies predict their expected peak current flow values, and make decisions about how to proceed in response to assigned priorities and a value indicative of a sum of the expected peak current flow values.

[0031] Figure 1is a simplified block diagram of a first device in the form of a memory (e.g., a memory device) 100 in communication with a second device in the form of a processor 130 as part of a third device in the form of an electronic system in accordance with an embodiment. Some examples of the electronic system include a personal computer, a personal digital assistant (PDA), a digital camera, a digital media player, a digital recorder, a game, an electrical device, a vehicle, a wireless device, a mobile telephone, and the like. The processor 130 (e.g., a controller external to the memory device 100) can be a memory controller or other external host device.

[0032] The memory device 100 includes an array of memory cells 104 logically arranged in rows and columns. The memory cells in a logical row are typically connected to the same access line (collectively referred to as a word line), while the memory cells in a logical column are typically selectively connected to the same data line (collectively referred to as a bit line). A single access line can be associated with more than one logical row of memory cells and a single data line can be associated with more than one logical column. The memory cells of at least a portion of the array of memory cells 104 (not shown in FIG. 1) are capable of being programmed to one of at least two target data states. Figure 1

[0033] Row decode circuitry 108 and column decode circuitry 110 are provided to decode address signals. The address signals are received and decoded to access the array of memory cells 104. The memory device 100 also includes input / output (I / O) control circuitry 112 to manage the input of commands, addresses and data to the memory device 100 and the output of data and status information from the memory device 100. Address registers 114 are in communication with the I / O control circuitry 112 and the row decode circuitry 108 and the column decode circuitry 110 to latch the address signals prior to decoding. Command registers 124 are in communication with the I / O control circuitry 112 and control logic 116 to latch incoming commands.

[0034] ​The controller (e.g., control logic 116 internal to the memory device 100) controls access to the memory cell array 104 in response to the command and can generate status information for the external processor 130, i.e., the control logic 116 is configured to perform access operations (e.g., sense operations [which can include read operations and verify operations], program operations, and / or erase operations) on the memory cell array 104. The control logic 116 communicates with the row decode circuitry 108 and the column decode circuitry 110 to control the row decode circuitry 108 and the column decode circuitry 110 in response to the address. The control logic 116 can include an instruction register 126, which can represent a computer-usable memory for storing computer-readable instructions. For some embodiments, the instruction register 126 can represent firmware. Alternatively, the instruction register 126 can represent a grouping of memory cells in the memory cell array 104, such as a reserved block of memory cells.

[0035] The control logic 116 can also communicate with a cache register 118. The cache register 118 latches incoming or outgoing data as directed by the control logic 116 to temporarily store the data while the memory cell array 104 is busy writing or reading other data, respectively. During a program operation (e.g., a write operation), data can be transferred from the cache register 118 to the data register 120 for transfer to the memory cell array 104; new data can then be latched from the I / O control circuitry 112 into the cache register 118. During a read operation, data can be transferred from the cache register 118 to the I / O control circuitry 112 for output to the external processor 130; new data can then be transferred from the data register 120 to the cache register 118. The cache register 118 and / or the data register 120 can form a page buffer (e.g., can form a portion thereof) of the memory device 100. The page buffer can additionally include a sense device (not shown in FIG. 1) to sense a data state of a memory cell connected to a data line of the memory cell array 104, for example, by sensing a state of the data line. Figure 1 The status register 122 can communicate with the I / O control circuitry 112 and the control logic 116 to latch status information for output to the processor 130.

[0036] Control logic 116 may further communicate with timer 128. Timer 128 may be configured to bi-state switch the logic level of its output signal after an elapsed time, such as a programmable interval timer. Such programmable interval timers are well known. For example, timer 128 may normally provide an output signal with a logic low level, and may briefly bi-state switch the output signal to a logic high level (e.g., for one clock cycle) after a specific elapsed time. After bi-state switching the output signal, timer 128 may return the output signal to its normal logic level. The specific elapsed time may be in response to a received control signal. Alternatively, timer 128 may represent a counter, configured to decrement a count value representing the elapsed time, for example, in response to a clock cycle. Such counter operations are well known.

[0037] Control logic 116 may further communicate with clock generator 136. Clock generator 136 may generate clock signals for use in various embodiments. Alternatively, clock generator 136 may be external to memory device 100. As an example, clock generator 136 may communicate with processor 130 and may form part of processor 130. Memory device 100 may be connected via signal lines ( Figure 1 (Not depicted herein) Receives clock signals from processor 130 or other external devices. While the circuitry for generating clock signals within memory device 100 is not considered essential to the embodiments disclosed herein, examples of which can be found in U.S. Patent No. 9,417,685, issued August 16, 2016, by Ha et al.

[0038] The memory device 100 receives control signals from the processor 130 via control link 132 at control logic 116. These control signals may include chip enable (CE#), command latch enable (CLE), address latch enable (ALE), write enable (WE#), read enable (RE#), and write protection (WP#). Depending on the nature of the memory device 100, additional or alternative control signals (not shown) may be received via control link 132. The memory device 100 receives command signals (representing commands), address signals (representing addresses), and data signals (representing data) from the processor 130 via multiplexed input / output (I / O) bus 134 and outputs data to the processor 130 via I / O bus 134.

[0039] For example, a command can be received at the I / O control circuitry 112 via input / output (I / O) pins [7:0] of the I / O bus 134 and then can be written into the command register 124. An address can be received at the I / O control circuitry 112 via input / output (I / O) pins [7:0] of the I / O bus 134 and then can be written into the address register 114. Data can be received at the I / O control circuitry 112 via input / output (I / O) pins [7:0] for 8-bit devices or input / output (I / O) pins [15:0] for 16-bit devices and then can be written into the cache register 118. The data can then be written into the data register 120 for programming the memory cell array 104. For another embodiment, the cache register 118 can be omitted and the data can be written directly into the data register 120. Data can also be output via input / output (I / O) pins [7:0] for 8-bit devices or input / output (I / O) pins [15:0] for 16-bit devices. While reference can be made to I / O pins, these can include any electrically conductive node that enables an electrical connection to the memory device 100 by an external device (e.g., the processor 130), such as a commonly used electrically conductive pad or electrically conductive bump.

[0040] Those skilled in the art will appreciate that additional circuitry and signals can be provided, and that the memory device 100 has been simplified Figure 1 for this description. Figure 1 It will be recognized that the functionality of the various block components described with reference to Figure 1 may not necessarily be separated in accordance with the various components or component portions of an integrated circuit device. For example, a single component or component portion of an integrated circuit device can be adapted to perform the functionality of more than one block component described Figure 1 . Alternatively, one or more components or component portions of an integrated circuit device can be combined to perform the functionality of a single block component described

[0041] Further, while specific I / O pins are described in accordance with popular convention for the receipt and output of various signals, it should be noted that other combinations of I / O pins (or other I / O node structures) or other numbers of I / O pins (or other I / O node structures) can be used in various embodiments.

[0042] A given processor 130 can communicate with one or more memory devices 100 (e.g., dies). Figure 2 is a simplified block diagram of an apparatus in the form of a memory module 201 as part of an electronic system in communication with a host 240 in accordance with another embodiment. The memory device 100 and the processor 130 can be as described with reference to Figure 1The memory module (e.g., memory package) 201 is depicted as having four memory devices 100 (e.g., dies), although the memory module 201 can have fewer or more memory devices 100. As used herein, a die refers to an individual integrated circuit device that can include a memory device 100.

[0043] Because the processor 130 (e.g., memory controller) is between the host 240 and the memory devices 100, communication between the host 240 and the processor 130 can involve a different communication link than the communication link used between the processor 130 and the memory devices 100. For example, the memory module 201 can be an embedded multimedia storage card (eMMC) of a solid state drive (SSD). According to existing standards, communication with the eMMC can include a data link 242 (e.g., 8-bit link) for data transfer, a command link 244 for command transfer and device initialization, and a clock link 246 that provides a clock signal for synchronizing transfers on the data link 242 and the command link 244. The processor 130 can autonomously handle many activities, such as error correction, management of defective blocks, wear leveling, and address translation.

[0044] Figure 3 is a perspective view of a representation of a multi-die package 302 according to an embodiment. The multi-die package 302 is depicted as including four dies 100 (i.e., 1000-1003 corresponding to dies 0-die 3), although the multi-die package can have fewer or more such dies. Each of the dies (e.g., memory devices) 100 and the package 302 can include a node 304 (e.g., conductive pad) for providing a ready / busy control signal RB#. The ready / busy control signal can be used to indicate to a host device or to the dies 100 in the multi-die package 302 whether one or more of the dies 100 is busy performing an access operation. As such, the nodes 304 can be commonly connected. Each of the dies 100 and the package 302 can include a node 306 for providing an input / output (I / O) signal. Note that each node 306 can represent more than one physical node, such as one pad for each of the dies 100 and the multi-package 302 for each signal of the I / O bus 134. The nodes 306 (e.g., for a given signal of the I / O bus 134) can be commonly connected. Figure 1 Figure 1 is a perspective view of a representation of a multi-die package 302 according to an embodiment. The multi-die package 302 is depicted as including four dies 100 (i.e., 1000-1003 corresponding to dies 0-die 3), although the multi-die package can have fewer or more such dies. Each of the dies (e.g., memory devices) 100 and the package 302 can include a node 304 (e.g., conductive pad) for providing a ready / busy control signal RB#. The ready / busy control signal can be used to indicate to a host device or to the dies 100 in the multi-die package 302 whether one or more of the dies 100 is busy performing an access operation. As such, the nodes 304 can be commonly connected. Each of the dies 100 and the package 302 can include a node 306 for providing an input / output (I / O) signal. Note that each node 306 can represent more than one physical node, such as one pad for each of the dies 100 and the multi-package 302 for each signal of the I / O bus 134. The nodes 306 (e.g., for a given signal of the I / O bus 134) can be commonly connected. Figure 1 Figure 1 is a perspective view of a representation of a multi-die package 302 according to an embodiment. The multi-die package 302 is depicted as including four dies 100 (i.e., 1000-1003 corresponding to dies 0-die 3), although the multi-die package can have fewer or more such dies. Each of the dies (e.g., memory devices) 100 and the package 302 can include a node 304 (e.g., conductive pad) for providing a ready / busy control signal RB#. The ready / busy control signal can be used to indicate to a host device or to the dies 100 in the multi-die package 302 whether one or more of the dies 100 is busy performing an access operation. As such, the nodes 304 can be commonly connected. Each of the dies 100 and the package 302 can include a node 306 for providing an input / output (I / O) signal. Note that each node 306 can represent more than one physical node, such as one pad for each of the dies 100 and the multi-package 302 for each signal of the I / O bus 134. The nodes 306 (e.g., for a given signal of the I / O bus 134) can be commonly connected.

[0045] Each of the dies 100 and the package 302 can include a node 310 (e.g., a pad) for providing a chip enable signal CE#. The chip enable signal can be used to enable access to the dies 100 in the multi-die package 302. As such, the nodes 310 can be commonly connected. Each of the dies 100 and the package 302 can include a node 312 (e.g., a pad) for providing a signal HC#. The signal HC# can be shared among the dies 100, and for some embodiments, shared with a host device. In conjunction with a secondary clock cycle of the clock signal ppmCLK, as described in greater detail later, the signal HC# can provide an indication of an expected peak current flow value to other devices sharing the clock signal ppmCLK, and for some embodiments, provide a device priority. The nodes 312 can be commonly connected. For some embodiments, connections to the multi-die package 302 can be eliminated. Each of the dies 100 can include a node 314 for sharing the clock signal ppmCLK. The clock signal can be shared among the dies 100. The clock signal ppmCLK can be generated by a clock generator of one of the dies 100, or received from a device external to all of the dies 100. The use of the clock signal will be described with reference to subsequent figures. The nodes 314 can be commonly connected. For some embodiments, connections to the multi-die package 302 can be eliminated, e.g., if the clock signal ppmCLK is generated by one of the dies 100.

[0046] Figure 4 is a schematic representation of a multi-die package 302 including four dies 100 (e.g., 1000-1003) in accordance with an embodiment. The clock signal ppmCLK is commonly shared among the dies 100 by a clock signal line 422. The clock signal HC# is commonly shared among the dies 100 by a signal line 424. The signal HC# can have a nominal condition of being normally pulled to a particular state (e.g., pulled high) by way of a resistor 416 (sometimes referred to collectively as a weak pull-up resistor, or simply a pull-up resistor) connecting the signal line 424 to a voltage supply node 414 configured to receive a supply voltage, e.g., Vcc.

[0047] The ready / busy control signal RB# is commonly shared among the dies 100 by a signal line 426. The ready / busy control signal RB# can be normally pulled to a particular state (e.g., pulled high) by way of a resistor 420 connecting the ready / busy control signal line 426 to a voltage supply node 418. Each of the dies 100 is further commonly connected to the control link 132 and to the I / O bus 134.

[0048] Various embodiments will be discussed with reference to the multi-die package 302 of Figure 4 It will be apparent that such embodiments can utilize more or fewer dies 100 thanFigure 4 Fewer or more dies 100 can be depicted in the middle. In general, an access operation for a die 100 can be divided into a number of phases. The phases can be determined such that an access operation can be paused after completion of one phase and before initiation of the next phase without unnecessarily impeding completion of the access operation, except for causing a delay. For example, it can be undesirable to pause an access operation if doing so would require discharging a node and the charge must be restored to the node before initiation of the next phase. Similarly, it can be undesirable to pause an access operation if doing so would risk loss or corruption of data values.

[0049] Each phase can correspond to a respective duration, which can be predefined (e.g., phases that have the same or similar timing characteristics whenever performed) or variable (e.g., phases whose timing characteristics vary based on detection of some analog characteristic). Each phase can further correspond to a respective expected peak current flow value. Table 1 provides one example of magnitudes of expected peak current flow that can be assigned to various phases of an access operation.

[0050] Table 1

[0051] Level Encoded value Expected peak current value 0 000 <= 25 mA 1 001 <= 50 mA 2 010 <= 75 mA 3 011 <= 100 mA 4 100 <= 125 mA 5 101 <= 150 mA 6 110 <= 175 mA 7 111 <= 200 mA

[0052] While the example of Table 1 depicts eight different levels of expected peak current flow values, other numbers of levels of expected peak current flow values levels can be used with embodiments. For example, using a four-digit encoded value (e.g., a numerical representation), sixteen levels of expected peak current flow values can be defined, which can provide finer control of total current usage of a multi-die system. Further, while the example of Table 1 depicts levels of expected peak current flow values differing from adjacent expected peak current flow value levels by a constant difference, the current difference between adjacent levels need not be constant. The expected peak current flow values can not represent actual peak current flow values, but can represent peak current flow values that will be used in determining whether and how to proceed with a next or initial phase of an access operation. For example, actual peak current flow values can be higher, but can also have such short durations as to be considered negligible.

[0053] Various embodiments facilitate power management in a multi-die package by having the dies of the package predict their expected peak current flow values, and assigned priorities, and make decisions about how to proceed in response to the assigned priorities and a value indicative of a sum of the expected peak current flow values. Each die can broadcast its expected peak current flow value to the remaining dies, and each die can make an informed decision based on the sum of the expected peak current flow values. For example, a die can decide to suspend operation after completing its current phase of operation, or to initiate the next phase in a different mode of operation, such as a lower peak current mode of operation, if execution of the next phase under normal operating conditions would be expected to exceed the total current demand budget of the package.

[0054] With respect to broadcasting expected peak current flow values, a die can determine whether a transition to a next phase of operation is expected, which can be the next phase of the current operation or an initial phase of a new operation. If such a transition is expected, its expected peak current flow value for the next phase can be determined. If such a transition is not expected, its expected peak current flow value can be determined to be the expected peak current flow value of its current phase, which can include an idle state. It should be noted that an idle (e.g., a phase in which no access operations are actively performed) die can be considered to have a base value of expected peak current flow value, which can be the lowest value of a defined plurality of expected peak current flow values. It should also be noted that while an idle die can be considered to have an expected peak current flow value corresponding to the lowest value of the plurality of expected peak current flow values, the lowest value of the plurality of expected peak current flow values can be sufficient to further correspond to certain phases of operation actively performed by the die.

[0055] Alternatively, if the next phase of its operation can operate in a low peak current mode of operation, and such operation is enabled, the die can recalculate the total expected peak current flow value using the expected peak current flow value of the low peak current mode of operation for the next phase. As one example, a low peak current mode of operation can include slowing down a charge pump or other voltage generating device to reduce current usage. This can increase the duration of the next phase, e.g., a node can not reach a desired voltage level as quickly. If the total current demand budget is considered to be exceeded by the use of the expected peak current flow value of the next phase under normal operating conditions, but not by the use of the expected peak current flow value of the low peak current mode of operation for the next phase, the die can broadcast its expected peak current flow value to the remaining dies has a value corresponding to the low peak current mode of operation for the next phase of its operation and proceed to execute the next phase in the low peak current mode of operation.

[0056] For some embodiments, the decision as to whether to continue in normal or low peak current operating mode or to suspend can be based on a priority level of the die itself, as well as expected peak current values of all dies sharing the current budget. For example, each priority level can correspond to a respective reservation amount, and a die can determine whether there is still sufficient current budget to continue in normal operating mode or low peak current operating mode if the current budget is to be reduced by the reservation amount. Higher priority levels can correspond to lower current budget reservation amounts. In this way, a die with a higher priority level can have a higher likelihood of being able to continue, and also a higher likelihood of being able to continue in normal operating mode. Consider the example of priority tokens 11, 10, 01, and 00, where each priority token is an indication of a priority level. For example, 11 can represent the highest priority, 10 can represent a priority lower than 11, and 01 can represent a priority lower than 10. Priority token 00 can indicate an idle die, such as suspending execution of access operations without a queued command, thus effectively having the lowest priority. An 11 priority token can correspond to a reservation amount of 0 mA, a 10 priority token can correspond to a reservation amount of 90 mA, and a 01 priority token can correspond to a reservation amount of 180 mA.

[0057] Priority tokens can be assigned to a die by an application program that is requesting access to the die, and can additionally be modified, such as to increase the priority level, in response to an amount of time that the die has been idle and waiting to initiate its next phase of access operations. Alternatively, priority tokens can be assigned based on the type of access operation being performed. For example, foreground operations, such as write operations in response to write commands, can have a priority level that is higher than background operations, such as write operations performed in response to garbage collection or wear leveling. Read operations can have a priority that is higher than write operations, which can have a priority that is higher than erase operations. Furthermore, these assignments by operation type can be modified in response to an amount of time that the die has been waiting to initiate its next phase. Selection of different priority levels can be guided by desired quality of service (QoS) of services supported by the multi-die package.

[0058] Figure 5A is a conceptual timing diagram of the signal and register contents implementing budget reservation by priority level, for example as discussed in the above example. In Figure 5AIn some examples, the total current budget might be 400mA, shared by four dies 100, such as die 0 1000, die 1 1001, die 2 1002, and die 3 1003. Each die 100 may have four registers 570, such as die 0_ICC_reg 5700, die 1_ICC_reg 5701, die 2_ICC_reg 5702, and die 3_ICC_reg 5703, for storing information about the corresponding expected peak current value and / or the corresponding priority token for each of the dies 100. In some embodiments, individual dies 100 may not store priority tokens for other dies 100 because decisions to proceed may be made without considering the priority tokens of other dies 100.

[0059] The die pointer or memory device pointer Dptr may indicate when each die or memory device 100 will broadcast its expected peak current value and, for an embodiment storing a priority token for each of the dies 100 in package 302, an indication of when its priority token will be broadcast. (See reference...) Figure 6 In more detail, this may include a single clock signal in which each die 100 counts repeatedly and then responds when the count corresponds to that die 100. Alternatively, the die pointer Dptr may include a corresponding control signal for each of the dies 100, wherein each of the dies 100 responds when its control signal has a predetermined logic level. The expected peak current magnitude that is about to occur may be determined before the die 100 broadcasts its current demand information. While not considered essential to the embodiments disclosed herein, U.S. Patent Application Publication No. 2021 / 0055772A1, commonly assigned to Guo, discloses a method and apparatus for determining the expected peak current magnitude. Reference will be made to... Figure 6 In more detail, the broadcast of current demand information may include shared HC# signal decoding. For Figure 5A For example, the various levels of the expected peak current values ​​may correspond to the levels in Table 1.

[0060] exist Figure 5ABefore time tO, die 0 can be idle, e.g., have priority token 00 and have an expected peak current flow value of 25 mA, e.g., less than or equal to 25 mA. Die 1 can have priority token 01 and can be performing a phase of an access operation, e.g., with an expected peak current flow value of 125 mA, e.g., less than or equal to 125 mA. Die 2 can have priority token 10 and can be performing a phase of an access operation, e.g., with an expected peak current flow value of 175 mA, e.g., less than or equal to 175 mA. Die 3 can have priority token 01 and can be performing a phase of an access operation, e.g., with an expected peak current flow value of 75 mA, e.g., less than or equal to 75 mA. Die 1, die 2, and die 3 can be performing different access operations, or can be performing the same access operation, but at different phases of that access operation.

[0061] Additionally at Figure 5A Before time tO, die 0 can receive a command indicating a desire to initiate an access operation, and can assign priority token 11 for that access operation. For example, host 240 can consider the access operation to have a higher priority than the access operations being performed by die 1, die 2, and die 3. The initial phase of the access operation of die 0 can have an expected peak current flow value of 150 mA in a normal operating mode, and can not have a low peak current operating mode. With a total current budget of 400 mA, and with die 1, die 2, and die 3 having expected peak current flow values of 125 mA, 175 mA, and 75 mA, respectively, die 0 will thus determine that it can not initiate its access operation, as there is not enough available current budget. As such, its expected peak current flow value will be expected to remain at the level of an idle die, e.g., 25 mA, and die 0 can broadcast its current demand information between times tO and tl as an expected peak current flow value of 25 mA and, optionally, priority token 11. Each of the dies can then update its registers 5700 accordingly. The available current budget can be sufficient if the sum of the expected peak current flow values of each other die of the multi-die package plus the expected peak current flow value of the die making the determination of whether to initiate its next phase is less than, e.g., less than or equal to, the available current budget. The available current budget can be insufficient if the sum of the expected peak current flow values of each other die of the multi-die package plus the expected peak current flow value of the die making the determination of whether to initiate its next phase is greater than the available current budget.

[0062] At Figure 5ABefore time t1, die 1 may determine that it is still in the phase of performing its access operation, making no further relevant decisions. Therefore, its expected peak current value will be expected to remain at 125mA, and die 1 may broadcast its current demand information between times t1 and t2 as the expected peak current value of 125mA and optionally, priority token 01. Each of the dies may then update its register 5701 accordingly. As used herein, updating register 570 may include not changing that register 570 if the new current demand information is the same as the previous current demand information. Alternatively, updating register 570 may include overwriting the previous version of the current demand information of the die that broadcast the updated current demand information.

[0063] exist Figure 5A Before time t2, die 2 may complete its access operation at one stage and may determine that the next stage of its access operation has an expected peak current of 175mA in normal operating mode and an expected peak current of 75mA in low peak current operating mode. With priority token 10, the total current budget of 400mA may be reduced by a corresponding reserve of 90mA, and the sum of the current budgets allocated to the remaining dies may be reduced. For example, 400mA – 90mA – 25mA – 125mA – 75mA equals 85mA. Die 2 may therefore determine that it may not be able to continue in its normal operating mode due to the lack of sufficient available current budget, but may be able to continue in its low peak current operating mode due to the presence of sufficient available current budget. Thus, its expected peak current is expected to decrease to 75mA, and die 2 may broadcast its current demand information between time t2 and t3 as an expected peak current of 75mA and optionally, priority token 10. Each of the bare dies may then update its register 5702 accordingly.

[0064] exist Figure 5A Before time t3, die 3 may have completed its access operations and may have determined that it has no subsequent access operations to perform. When idle, it may reduce its priority token to 00 and may determine that its expected peak current is 25mA. Therefore, die 3 may broadcast its current demand information between times t3 and t4 as the expected peak current of 25mA and, optionally, the priority token 00. Each of the dies may then update its register 5703 accordingly.

[0065] exist Figure 5ABefore time t4, die 0 can determine that it will have an available current budget sufficient to initiate its access operation. For example, with priority token 11, current budget 400mA can only be reduced by the expected peak current amount value of the remaining dies. Without current budget reservation, the available current budget for die 0 would equal 400mA - 125mA - 75mA - 25mA or 175mA. Die 0 can thus determine that it can continue in its normal mode of operation since there is sufficient available current budget. As such, die 0 can broadcast its current demand information between times t4 and t5 as expected peak current amount value 150mA and, optionally, priority token 11. Each of the dies can then update their registers 5700 accordingly.

[0066] Figure 5B is a conceptual timing diagram for signals and register contents used to convey and store priority tokens and values for expected peak current amount values, for example, with reference to Figure 5A the embodiments described and using the encoded values of Table 1. In Figure 5B the example of Figure 6, the first two digits of the five-digit value of the signal HC# and contents of register 570 can represent the priority token, while the last three digits of the five-digit value of the signal HC# and contents of register 570 can represent the expected peak current amount value.

[0067] Figure 6 is one example of a timing diagram depicting clocks and other signals in accordance with an embodiment. Figure 6 Assume, for example, Figure 4 with four dies 100, and a multi-die package corresponding to the current demand information as exhibited with respect to Figures 5A-5B the embodiments described. Various embodiments provide each die (e.g., in sequence) with an opportunity to evaluate its expected peak current amount value for a certain time period (e.g., a future time period) to determine whether to continue or suspend its operation, and to broadcast its expected peak current amount value to the remaining dies before or during that time period. In Figure 6 , trace 650 can represent clock signal ppmCLK.

[0068] For one embodiment, trace 652 can represent a die pointer Dptr generated by dividing the clock signal ppmCLK. For example, the control signal of trace 652 can exhibit a pulse of the clock signal ppmCLK every X cycles, where in this example X = 6. In turn, each of the dies 1000-1003 can count the pulses of the die pointer Dptr in a repeating manner, e.g., from 0 to 3, and then repeat the sequence starting from count 0 in response to a next pulse of the die pointer Dptr. Each of the dies 1000-1003 can be assigned a respective count value. In this manner, die 1000 can respond to each count 0, die 1001 can respond to each count 1, die 1002 can respond to each count 2, and die 1003 can respond to each count 3. The value X can be selected in response to a desired number of cycles of the clock signal ppmCLK for use in broadcasting the expected peak current magnitude values to other dies, as will be described in greater detail below. Using the example of a two-bit digital priority token, two clock cycles can be used for the broadcast of that digital representation. Further, using the example of Table 1, using a three-bit digital to represent the respective magnitude of the expected peak current magnitude values, three clock cycles can be used for the broadcast of that digital representation. The value X can then be equal to or greater than the number of clock cycles used for the broadcast.

[0069] Alternatively, each die 100 can respond to a separate control signal. For example, traces 6540-6543 can represent counter signals C0-C3, respectively. The control signals of traces 6540-6543 can exhibit a pulse of the clock signal ppmCLK every D*X cycles, where in this example D = 4 and X = 6. The value D can be equal to the number of dies sharing the clock signal ppmCLK, and the number of counter signals can be equal to D. The value X can be selected in response to a desired number of cycles of the clock signal ppmCLK for use in broadcasting the expected peak current magnitude values, and optionally, priority tokens, to other dies, as will be described in greater detail below, and the pulses of traces 6540-6543 can be staggered from each other by X cycles of the clock signal ppmCLK. In this embodiment, each of the dies 1000-1003 can respond to a respective counter signal C0-C3. For example, die 1000 can respond to the counter signal C0 of trace 6540, die 1001 can respond to the counter signal C1 of trace 6541, die 1002 can respond to the counter signal C2 of trace 6542, and die 1003 can respond to the counter signal C3 of trace 6543.

[0070] Further, the counter signals CO-C3 of the traces 6540-6543 can be provided as a combination control signal to each of the dies 1000-1003 that has a D-bit number as information. Each of the dies 1000-1003 can be assigned a respective value of the combination control signal. In this way, the die 1000 can respond to the value (e.g., a numerical value) 1000, the die 1001 can respond to the value 0100, the die 1002 can respond to the value 0010, and the die 1003 can respond to the value 0001. While not considered essential to the embodiments disclosed herein, U.S. Patent No. 9,417,685, commonly assigned to Ha et al., describes circuitry of the type that can be used to generate the counter signals CO-C3.

[0071] The following example of broadcasting current demand information will use the counter signals CO-C3 for determining which die 1000-1003 to designate to broadcast its current demand information. However, it will be apparent that any method of sequentially cycling through the dies can be used. The various embodiments utilize the shared signal (e.g., the signal HC#) to provide an encoded value (e.g., a numerical representation) of the current demand information by one die of a multi-die package to each of the remaining dies of the signal HC# of the shared traces 656 of that multi-die package. It should be noted that while the counter signals CO-C3 of the traces 6540-6543 are depicted as being aligned with the clock signal ppmCLK of the traces 650 in Figure 6 , when the counter signals CO-C3 are generated from the clock signal ppmCLK, some delay can be expected so that the time to for the counter signals CO-C3 can not be aligned with the time to for the clock signal ppmCLK. Similarly, the time to for the signal HC# can not be aligned with the time to for the clock signal ppmCLK. However, a transition of one of these signals at a particular time can be considered to be in response to a transition of the clock signal ppmCLK that corresponds to that particular time. Figure 6 Each time period (e.g., to-ti, ti-t2, t3-t4, etc.) of the traces 6540-6543 can correspond to one clock cycle of the clock signal ppmCLK.

[0072] Reference is made to Figure 6 , the trace 6540 can transition to the first logic level at time to and at time t24, the trace 6541 can transition to the first logic level at time t6 and at time t30, the trace 6542 can transition to the first logic level at time t12 and at time t36 (not depicted in FIG. 6B), and the trace 6543 can transition to the first logic level at time t18 and at time t42 (not depicted in FIG. 6B). Figure 6 Figure 6 ​The traces 6540-6543 can otherwise have a second logic level that is different from their first logic level. For trace 654, for example, its first logic level can be a logic high level and its second logic level can be a logic low level.

[0073] In this example, die 1000 can be designated at time tO, for example, in response to trace 6540 transitioning to the first logic level. Die 1000 can then broadcast its current demand information by encoding the signal HC# of trace 656 to represent a five-digit value of 11000, for example, during one or more subsequent cycles of the clock signal ppmCLK of trace 650. For example, die 1000 can cause the signal HC# to have its first logic level during time periods t1-t2 and t2-t3, and its second logic level during time periods t3-t4, t4-t5, and t5-t6, thereby representing the digital value of 11000.

[0074] Die 1001 can be designated at time t6, for example, in response to trace 6541 transitioning to the first logic level. Die 1001 can then broadcast its current demand information by encoding the signal HC# to represent a five-digit value of 01100. For example, die 1001 can cause the signal HC# to have its second logic level during time period t7-t8, its first logic level during time periods t8-t9 and t9-t10, and its second logic level during time periods t10-t11 and t11-t12, thereby representing the digital value of 01100.

[0075] Die 1002 can be designated at time t12, for example, in response to trace 6542 transitioning to the first logic level. Die 1002 can then broadcast its current demand information by encoding the signal HC# to represent a five-digit value of 10010. For example, die 1002 can cause the signal HC# to have its first logic level during time period t13-t14, its second logic level during time periods t14-t15 and t15-t16, its first logic level during time period t16-t17, and its second logic level during time period t17-t18, thereby representing the digital value of 10010.

[0076] At time t18, die 1003 can be designated, e.g., in response to trace 6543 transitioning to the first logic level. Die 1003 can then broadcast its current demand information by encoding signal HC# to represent the five-digit value 00000. For example, die 1003 can cause signal HC# to have its second logic level during t19-t20, t20-t21, t21-t22, t22-t23, and t23-t24, thereby representing the digital value 00000.

[0077] At time t24, die 1000 can again be designated, e.g., in response to trace 6540 again transitioning to the first logic level. Die 1000 can then broadcast its current demand information by encoding signal HC# to represent the five-digit value 11101. For example, die 1000 can cause signal HC# to have its first logic level during time periods t25-t26, t26-t27, and t27-t28, its second logic level during time period t28-t29, and its first logic level during time period t29-t30, thereby representing the digital value 11101.

[0078] Figures 7A-7B is a simplified schematic of circuitry for generating signal HC# for use with embodiments. As Figure 7A As depicted in FIG. 6B, dies 1000-1003 generally share signal HC# via signal line 424. For example, signal HC# can normally be pulled to a logic high level using voltage supply node 414 and resistor 416. For each of dies 1000-1003, another voltage supply node, e.g., a reference potential node 764 configured to receive a reference potential such as ground or Vss, can be selectively connected to signal line 424 by a switch such as transistor 762, each having a control gate configured to receive a control signal. For example, die 1000 can have its transistor 762's control gate configured to receive control signal GO generated by die 1000, die 1001 can have its transistor 762's control gate configured to receive control signal G1 generated by die 1001, die 1002 can have its transistor 762's control gate configured to receive control signal G2 generated by die 1002, and die 1003 can have its transistor 762's control gate configured to receive control signal G3 generated by die 1003. These control signals can be generated, e.g., by a controller of the die, to activate its respective transistor 762 when its respective die 100 intends to indicate the second logic level, and to deactivate its respective transistor 762 when its respective die 100 intends to indicate the first logic level, or when its respective die 100 is not designated to broadcast its current demand information. In Figure 7AIn the example of FIG. 10, when any of the transistors 762 is activated, the voltage level of the signal line 424 will be pulled to a logic low level, and when none of the transistors 762 is activated, the voltage level of the signal line 424 will be pulled back to a logic high level.

[0079] As Figure 7B As depicted in FIG. 10, the dies 1000-1003 collectively share the signal HC# via the signal line 424. The signal HC# can normally float unless actively driven by one of the dies 1000-1003. Each of the dies 1000-1003 can include a driver 766 that can be configured to selectively connect its output to a particular voltage supply node 764 or 768 corresponding to a desired logic level of the signal line 424 when enabled, or to present a high impedance (high Z) state to the signal line 424 when disabled by isolating its output from both voltage supply nodes 764 and 768. For example, the die 1000 can generate the control signal El to have a logic low level to disable its driver 766 and isolate its output from its voltage supply nodes 764 and 768, or to have a logic high level to enable its driver 766 to connect its output to its voltage supply node 764 or its voltage supply node 768 in response to the logic level of its control signal G0. Continuing this example, if the die 1000 generates the control signal G0 to have a logic low level, its driver 766 can be configured to connect its output to its voltage supply node 764, and if the die 1000 generates the control signal G0 to have a logic high level, its driver 766 can be configured to connect its output to its voltage supply node 768. The remaining dies 1001-1003 can be similarly configured. In this way, one of the dies 100 can drive the logic level of the signal line 424 through its driver 766 when designated, while the remaining dies 100 can each present a high impedance from their drivers 766. Other circuitry collectively sharing the signal HC# can also be used, in which each die 100 is configured to selectively transition the logic level of the signal line 424.

[0080] In view of the foregoing example, it is apparent that fewer or more clock cycles of the clock signal ppmCLK can be used to represent lower or higher granularity of the expected peak current values and / or priority levels, respectively, to represent different orders of the digital representation. In addition, while the foregoing example completes broadcasting the digital representation of one die before designating the next die, the two actions can overlap. For example, the counter signal C0 can transition at time t0, and the die 1000 can broadcast the digital representation of the die 1000 as Figure 6The depicted broadcast of its digital representation from time ti to time t6. However, in this alternative example, counter signal Ci can transition at time ts, e.g., while die 1000 is broadcasting the last digit of its digital representation, and die 1001 can begin broadcasting its digital representation at time t6. Similarly, counter signal C2may transition at time tio, e.g., while die 1001 is broadcasting the last digit of its digital representation, and die 1002 can begin broadcasting its digital representation at time tn, and so on.

[0081] Figure 8 is a schematic representation of a multi-die package including eight dies 100 (e.g., 1000-1007) according to another embodiment. Clock signal ppmCLK is commonly shared among the dies 100 over clock signal line 422. Dies 1000-1007 can be part of multi-die package 302. Dies 1000-1003 can be selectively enabled in response to chip enable signal CE0# (not separately depicted) that is part of control link 1320, and can communicate via I / O bus 1340. Dies 1004-1007 can be selectively enabled in response to chip enable signal CE1# (not separately depicted) that is part of control link 1321 separate from control link 1320, and can communicate via I / O bus 1341 separate from I / O bus 1340.

[0082] Signal HC# is commonly shared among the dies 100 over signal line 424. Signal HC# can normally be pulled to a particular state (e.g., pulled high). Ready / busy control signal RB0# is commonly shared among dies 1000-1003 over control signal line 4260. Ready / busy control signal RB1# is commonly shared among dies 1004-1007 over control signal line 4261. Both ready / busy control signals RB0# and RB1# can normally be pulled to a particular state (e.g., pulled high) independent of one another. For such an example, embodiments can cycle through each of the dies 100 for determining and broadcasting the expected peak current magnitude value, even though some of the dies 100 can be disabled in response to their respective chip enable signals. For examples in which signal HC# is shared in the manner described with reference to Figure 7A For embodiments in which signal HC# is shared in the manner described with reference to Figure 7BEmbodiments of the described manner of sharing the signal HC# can be configured to drive a transition of the signal HC# to indicate the encoded value for the lowest expected peak current magnitude as soon as designated when otherwise disabled in response to its respective chip enable signal.

[0083] Figure 9 A flowchart depicting a method of operating a die, such as a memory device or other integrated circuit device, is in accordance with an embodiment. The method can be in the form of computer readable instructions, such as stored to instruction register 128. Such computer readable instructions can be executed by a controller, such as control logic 116, to cause the die, e.g., relevant components of the die, to perform the method.

[0084] At 901, a determination can be made whether the die is waiting to initiate a next phase of an access operation, which can be an initial phase of an access operation. For example, a determination can be made whether the die has completed a previous phase of an access operation and is paused, or whether the die has completed a previous access operation and has a subsequent access operation queued. In response to determining that the die is not waiting to initiate a next phase of an access operation, the die can proceed to 903 and broadcast current demand information in its current condition. The current condition of the die can be idle, even though it has received a command to perform a next access operation, and the die can further continue in an idle state. Alternatively, the current condition of the die can be in a phase of actively performing an access operation, and the die can continue performing that phase of the access operation. For some embodiments, the current demand information can include, and can additionally consist of, an indicator of an expected peak current magnitude value. For other embodiments, the current demand information can include an indicator of an expected peak current magnitude value and a priority token.

[0085] In response to determining that the die is waiting to initiate a next phase of an access operation, e.g., has completed a previous phase of an access operation or has completed a previous access operation, can proceed to 905 and determine whether a current budget reservation corresponds to the die. In response to determining that there is no corresponding current budget reservation for the die, can determine at 907 that the available current budget C avail is equal to a total current budget C tot of a multi-die package containing the die. In response to determining that there is a corresponding current budget reservation for the die, can determine at 909 that the available current budget C avail is equal to the total current budget C tot minus a current budget reservation R die corresponding to the die. It should be noted that when the current budget reservation R die corresponding to the die is equal to zero, the available current budget C avail is determined at 907 to be equal to the total current budget C totThis is equivalent to determining the available current budget C at point 909. avail Equal to the total current budget C tot Reduce the current budget reserve R corresponding to the bare die die The process may then turn to 911.

[0086] At 911, the die may determine whether there is an available current budget sufficient to initiate the next stage of the access operation in normal operating mode. In response to determining that there is an available current budget sufficient to continue in normal operating mode, the die may broadcast the current requirement information for that stage of its access operation in normal operating mode at 913. The die may further initiate the next stage of the access operation in normal operating mode. In response to determining that there is no available current budget sufficient to continue in normal operating mode, the die may proceed to 915.

[0087] At 915, the die may determine whether a low-peak-current operating mode is available to perform the next stage of an access operation. In response to determining that no such low-peak-current operating mode exists, the die may proceed to 917 and broadcast current requirement information for a paused die, which may be the same as the current requirement information for an idle die. The die may further pause its operation while waiting for sufficient available current budget, for example, by delaying the initiation of the next stage of an access operation. In response to determining that a low-peak-current operating mode is available, the die may proceed to 919.

[0088] At 919, the die may determine whether there is a sufficient available current budget for initiating the next stage of the access operation in a low-peak-current operating mode. In response to determining that there is no sufficient available current budget to continue in the low-peak-current operating mode, the die may proceed to 917 and broadcast a pause in its current requirement information, and may further pause its operation while waiting for sufficient available current budget. In response to determining that there is sufficient available current budget to continue in the low-peak-current operating mode, the die may proceed to 921 and may broadcast the current requirement information for the low-peak-current operating mode of its access operation. The die may further initiate the next stage of the access operation in the low-peak-current operating mode.

[0089] Figure 9 The process may be performed sequentially for each die in a multi-die package, repeated when the die is enabled, for example, by its chip enable signal. In some embodiments, Figure 9 The process may be repeated for an enabled die in response to at least one of the dies in a multi-die package indicating that it is busy (e.g., indicated by a shared ready / busy control signal).

[0090] Figures 10A-10BA flowchart depicting a method of operating multiple dies (e.g., memory devices or other integrated circuit devices) in accordance with an embodiment. The method can be in the form of computer-readable instructions stored to instruction registers 128, for example. Such computer-readable instructions can be executed by a controller such as control logic 116 to cause the dies (e.g., relevant components of the dies) to perform the method.

[0091] At 1001, a variable N can be initialized to a value N init . The value of variable N can represent an integer value of a counter (e.g., a wrap-around counter) that counts representative values for each die of a plurality of dies of a multi-die package. For example, for an embodiment having D dies, the value of N can be initialized at N init , and can count to a value D + N init - 1. For example, with D = 4, and N init = 0, the counter can be advanced (e.g., incremented) from 0 to 3 before being reinitialized to 0. Alternatively, if for this instance, N init = 1, then the counter can be advanced from 1 to 4 before being reinitialized to 1. For other embodiments, variable N can represent a corresponding number pattern of a D-bit number pattern, such as the number patterns of four control signals C0, C1, C2, and C3 described with reference to Figure 6 Thus, Figure 10A the loop of variable N to D unique values depicted in Figure 6 may represent a loop of the number patterns 1000, 0100, 0010, and 0001 described with reference to Figures 10A-10B Further, while embodiments of are discussed with reference to an incrementing sequence, the sequence of values N can instead be decrementing with intuitive changes occurring in the disclosed process, such as the value N can be initialized at N init , and can count to a value N init + 1 - D before being reinitialized. For example, with D = 4, and N init = 3, the counter can be advanced (e.g., decremented) from 3 to 0 before being reinitialized to 3. Other sequencing schemes having a sequence of D unique values can be utilized, with each of the D dies broadcasting current demand information on a shared signal in response to a value N corresponding to a respective unique value of the D unique values.

[0092] At 1003, a determination can be made as to whether a die corresponding to the current value N (e.g., die N) is waiting to initiate a next phase of an access operation, which can be an initial phase of an access operation whose execution it is waiting to initiate, or a next phase of an access operation whose execution it is currently performing. In response to determining that die N is not waiting to initiate a next phase of its access operation, the process can proceed to 1005 and broadcast current condition current demand information for die N. The current condition for die N can be idle, and die N can further continue in the idle state. Alternatively, the current condition for die N can be a phase in which it is actively performing an access operation, and die N can continue performing that phase of the access operation. For some embodiments, the current demand information can include, and can consist of, an indicator of an expected peak current amount value. For other embodiments, the current demand information can include an indicator of an expected peak current amount value and a priority token.

[0093] In response to determining that die N is waiting to initiate a next phase of an access operation, e.g., has completed a previous phase of an access operation or has completed a previous access operation, the process can proceed to 1011 and determine whether a current budget reservation corresponds to die N. In response to determining that there is no corresponding current budget reservation for die N, it can be determined at 1013 that the available current budget C avail is equal to the total current budget C tot . In response to determining that there is a corresponding current budget reservation for die N, it can be determined at 1015 that the available current budget C avail is equal to the total current budget C tot minus the current budget reservation Res corresponding to die N N . The process can then proceed to point A, and thus to Figure 10B 1019.

[0094] At 1019, die N can determine whether there is an available current budget sufficient to initiate the next phase of an access operation for die N in a normal operating mode for that phase of the access operation. In response to determining that there is an available current budget sufficient to continue in the normal operating mode, die N can broadcast current demand information for the normal operating mode for that phase of its access operation at 1021. In response to determining that there is not an available current budget sufficient to continue in the normal operating mode, die N can proceed to 1025.

[0095] At 1025, die N can determine whether a low peak current operating mode is available for performing the next phase of an access operation. In response to determining that there is not such a low peak current operating mode, die N can proceed to 1027 and broadcast current demand information to suspend die N, and the die can further suspend its operation pending sufficient available current budget. In response to determining that a low peak current operating mode is available, die N can proceed to 1029.

[0096] At 1029, die N may determine whether there is a sufficient available current budget for that stage of the low-peak-current operating mode to initiate the access operation in the next stage of the access operation for die N. In response to determining that there is no sufficient available current budget to continue in the low-peak-current operating mode, die N may proceed to 1027 and broadcast a pause current requirement message for die N, and may further pause its operation while waiting for sufficient available current budget. In response to determining that there is sufficient available current budget to continue in the low-peak-current operating mode, die N may proceed to 1031 and may broadcast the current requirement message for the low-peak-current operating mode of that stage of its access operation.

[0097] After broadcasting the current demand information, regardless of... Figure 10A At point 1005, it is still in Figure 10B At points 1021, 1027, or 1031, the process may proceed to point B, whether concurrently with or after the broadcast of current demand information. From point B, the process may proceed to 1007 and determine whether value N is, for example, the last value in the sequence. In response to determining that value N is not the last value in the sequence, value N may advance at 1009, for example, by incrementing an increment counter, decrementing a decrement counter, changing to the next digit pattern in a sequence of multiple digit patterns, etc. From 1009, the process may return to 1003. In response to determining at 1007 that value N is the last value in the sequence, the process may return to 1001 to initialize (e.g., reinitialize) value N before continuing to 1003.

[0098] Figures 10A-10B The process may be repeated when D dies are enabled, for example, by their chip enable signals. In some embodiments, Figures 10A-10B The process may be repeated for an enabled die in response to at least one indication in the die that it is busy (e.g., indicated by a shared ready / busy control signal).

[0099] Figure 11A It is a conceptual timing diagram that implements the released signals and register contents according to priority levels and defined budgets. Figure 11AImplementations may again use four priority tokens, such as 11, 10, 01, and 00, where each priority token is an indication of a priority level. Priority token 11 may indicate the highest priority level corresponding to a die considered to be waiting to initiate the next or initial phase of an access operation for a period longer than the desired time (e.g., a timeout period) or to a die waiting to initiate the initial phase of an access operation considered to have high priority. Priority token 10 may indicate a die performing a high-priority access operation. Such a die may enter a low-peak-current operating mode or suspend its operation in response to determining that there is no sufficient current budget available, and may further enter a low-peak-current operating mode to meet the current budget requested by the die with priority token 11, but may not suspend its operation to meet the current budget requested by the die with priority token 11. Priority token 01 may represent a priority level lower than the priority level of priority token 10. A die with this priority token may enter a low-peak-current operating mode or suspend its operation in response to the determination that there is no sufficient available current budget, and may further enter a low-peak-current operating mode or suspend its operation to meet the current budget requested by a die with priority token 11. Priority token 00 may indicate an idle die, which may be suspended and waiting for the next stage of initiating an access operation, or suspended under queuing orders to execute access operations, and thus effectively has the lowest priority.

[0100] exist Figure 11A In this example, the current budget (e.g., the total current budget) might be 400mA, which will be Figure 4 The four dies 100, such as die 0 1000, die 1 1001, die 2 1002, and die 3 1003, share this information. Each die 100 may have four registers 570 for storing information (e.g., current demand information) about the corresponding expected peak current value and the corresponding priority token for each of the dies 100. For example, die 0_ICC_reg 5700, die 1_ICC_reg 5701, die 2_ICC_reg 5702, and die 3_ICC_reg 5703. The die pointer Dptr may indicate when each die 100 will broadcast its expected peak current value and its priority token using the HC# signal, for example, reference... Figure 6 As described.

[0101] exist Figure 11ABefore time tO, die 0 can be idle, for example, have priority token 00 and have expected peak current flow value 25 mA, for example, less than or equal to 25 mA. Die 1 can have priority token 01 and can perform a phase of an access operation, for example, with expected peak current flow value 125 mA, for example, less than or equal to 125 mA. Die 2 can have priority token 01 and can perform a phase of an access operation, for example, with expected peak current flow value 175 mA, for example, less than or equal to 175 mA. Die 3 can have priority token 01 and can perform a phase of an access operation, for example, with expected peak current flow value 75 mA, for example, less than or equal to 75 mA. Die 1, die 2, and die 3 can perform different access operations, or can perform the same access operation, but at different phases of that access operation.

[0102] Additionally at Figure 11A Before time tO, die 0 can receive a command to initiate an access operation, and can assign priority token 11 for that access operation. The assignment of the priority token can be made by host 240 in communication with die 0, for example, by an application running on host 240 and attempting to perform the access operation. Alternatively, the assignment of the priority token can be predetermined by the type of access operation to be performed. For example, host 240 can consider the access operation to have a priority higher than the access operations being performed by die 1, die 2, and die 3. The initial phase of the access operation for die 0 can have expected peak current flow value 150 mA in normal operating mode, and can not have a low peak current operating mode. With current budget (e.g., total current budget) 400 mA, and with die 1, die 2, and die 3 having expected peak current flow values 125 mA, 175 mA, and 75 mA, respectively, die 0 thus determines that it can not initiate its access operation. As such, its expected peak current flow value is expected to remain at the level of an idle die, for example, 25 mA. However, die 0 can broadcast its current demand information as expected peak current flow value 150 mA (e.g., expected peak current flow value in the case that it will initiate the next phase of its access operation) and its updated priority token 11 between times tO and tl. Each of the dies can then update its registers 5700 accordingly. With priority token 11, the expected peak current flow value of die 0 can represent a requested peak current flow value, as die 0 has determined that it cannot initiate the next phase of its access operation. As such, it can not be used in the calculation of total current demand in all cases.

[0103] At Figure 11ABefore time t1, die 1 can determine that it is still in a phase of its access operation such that there is no related decision to proceed. Thus, its expected peak current value is expected to remain at 125mA, and die 1 can broadcast its current demand information between times t1 and t2 as expected peak current value 125mA and its priority token 01. Each of the dies can then update its register 5701 accordingly. As used herein, updating a register 570 can include not changing that register 570 in the case that the new current demand information is the same as the previous current demand information.

[0104] At Figure 11A Before time t2, die 2 can complete its phase of its access operation and can determine that a next phase of its access operation (which can include an initial phase of a next access operation) has an expected peak current value of 175mA in a normal operating mode and an expected peak current value of 75mA in a low peak current operating mode. With priority token 01, die 2 can determine whether any of the other dies has a highest priority token 11. Because die 0 has priority token 11, die 2 can determine whether it can proceed in its normal operating mode using the expected peak current values stored in its register 570. However, 150mA + 125mA + 175mA + 75mA equals 525mA, which exceeds the total current budget 400mA. Thus, die 2 can determine that it can not proceed in its normal operating mode. Die 2 can then determine whether it can proceed in its low peak current operating mode using the expected peak current values stored in its register 570. However, 150mA + 125mA + 75mA + 75mA equals 425mA, which again exceeds the total current budget 400mA. Thus, die 2 can determine that it can not proceed in its low peak current operating mode such that it can proceed to wait for initiation of a next phase of its access operation. Thus, its expected peak current value is expected to decrease to 25mA, and die 2 can broadcast its current demand information between times t2 and t3 as expected peak current value 25mA and its priority token 01. Each of the dies can then update its register 5702 accordingly.

[0105] At Figure 11ABefore time t3, die 3 may have completed its access operation phase and may have determined that the next phase of its access operation has a expected peak current of 75mA in normal operating mode, and no low peak current operating mode is available. Having priority token 01, die 3 may determine whether any of the other dies has the highest priority token 11. Because die 0 has priority token 11, die 3 may use the expected peak current stored in its register 570 to determine whether it can continue in its normal operating mode. In this case, 150mA + 125mA + 25mA + 75mA equals 375mA, making there a sufficient current budget to continue in its normal operating mode. Die 3 may broadcast its current requirement information between times t3 and t4 as the expected peak current of 75mA and its priority token 01. Each of the dies may then update its register 5703 accordingly.

[0106] exist Figure 11A Before time t4, die 0 may store the expected peak current value in its register 570 to determine whether it can continue in its normal operating mode. In this case, 150mA + 125mA + 25mA + 75mA equals 375mA, making there a sufficient available current budget to continue in its normal operating mode. With a sufficient available current budget, die 0 may change its priority token to 10 to indicate that it is considered to be performing its access operation, and may broadcast its current demand information between times t4 and t5 as the expected peak current value of 150mA and its priority token 10. Each of the dies may then update its register 5700 accordingly.

[0107] Figure 11B It is used for, for example, reference Figure 11A The described embodiment uses the encoded values ​​in Table 1 to transmit and store the signal and register contents for priority tokens and expected peak current values, forming a conceptual timing diagram. Figure 11B In this example, the first two digits of the signal HC# and the five-digit value of the contents of register 570 may represent a priority token, while the last three digits of the signal HC# and the five-digit value of the contents of register 570 may represent the expected peak current value.

[0108] Figures 12A-12C This is a flowchart of a method for operating a die (e.g., a memory device or other integrated circuit device) according to an embodiment. The method may be in the form of computer-readable instructions, for example, stored in instruction register 128. Such computer-readable instructions may be executed by a controller, such as control logic 116, causing the die (e.g., associated components of the die) to perform the method.

[0109] At 1201, a determination can be made as to whether the die is waiting to initiate a next phase of an access operation, which can be an initial phase of an access operation. For example, a determination can be made as to whether the die has completed a previous phase of an access operation and is stalled, or whether the die has completed a previous access operation and has a subsequent access operation queued. In response to determining that the die is not waiting to initiate a next phase of its access operation, the die can proceed to 1203 and broadcast current condition current demand information for the die. The current condition of the die can be idle, even though it has received a command to perform a next access operation, and the die can further continue in an idle state. Alternatively, the current condition of the die can be a phase of actively performing an access operation, and the die can continue performing that phase of the access operation. For some embodiments, the current demand information can include an indicator of an expected peak current volume value and a priority token.

[0110] In response to determining that the die is waiting to initiate a next phase of an access operation, such as having completed a previous phase of an access operation or having completed a previous access operation, the die can proceed to 1205 and determine whether the die has a particular priority token. The particular priority token can correspond to a highest priority level of a plurality of priority levels that can be assigned to the die. However, the particular priority token can correspond to a priority level of the plurality of priority levels other than the highest priority level. Figures 12A-12C The method of 1205 directly handles up to three different priority tokens, and thus three different priority levels, but actions can be added in response to other priority tokens.

[0111] In response to determining at 1205 that the die does not have the particular priority token, the process can then proceed to point A, and thus to Figure 12Bdetermined to exist for initiating the next phase of the access operation in the normal operating mode, but to exist for initiating the next phase of the access operation in the low-peak current operating mode, the selected operating mode can be the low-peak current operating mode. In response to determining at 1207 that no available current budget exists for continuing in the selected operating mode, the die can proceed to 121 1. At 121 1, the die can broadcast the die's current demand information in the event that the die will initiate the next phase of its access operation in the normal operating mode, as well as the particular priority token, but the die can delay initiating the next phase of its access operation. In effect, the die will indicate that it still has the particular priority token, and will have the expected peak current amount value as if it were operating in its normal operating mode. However, the die can instead only have the expected peak current amount value of an idle die, as it is still waiting to initiate the next phase of its access operation.

[0112] In response to determining at 1207 that no available current budget exists for continuing in the selected operating mode, the die can proceed to 121 1. At 121 1, the die can broadcast the die's current demand information in the event that the die will initiate the next phase of its access operation in the normal operating mode, as well as the particular priority token, but the die can delay initiating the next phase of its access operation. In effect, the die will indicate that it still has the particular priority token, and will have the expected peak current amount value as if it were operating in its normal operating mode. However, the die can instead only have the expected peak current amount value of an idle die, as it is still waiting to initiate the next phase of its access operation.

[0113] At Figure 12B At 1213 in the process of FIG. 12, a die that does not have the particular priority token can determine whether any of the plurality of dies of the multi-die package has the particular priority token. In response to determining at 1213 that no die has the particular priority token, the process can then proceed to 1215 and the die can determine whether an available current budget exists for initiating the next phase of the access operation in the selected operating mode of the one or more operating modes of the die.

[0114] In response to determining that there is an available current budget sufficient to continue in the selected operating mode, the die can broadcast, at 1217, current demand information for the selected operating mode of that phase of the access operation of the die, and its current priority token. The die can additionally initiate the next phase of the access operation in the selected operating mode. The selected operating mode can be the normal operating mode regardless of whether the low peak current operating mode is available. Alternatively, the selected operating mode can be the normal operating mode in response to determining that there is an available current budget sufficient to initiate the next phase in the normal operating mode, and can be the low peak current operating mode in response to determining that there is not an available current budget sufficient to initiate the next phase in the normal operating mode, but there is an available current budget sufficient to initiate the next phase in the low peak current operating mode.

[0115] In response to determining, at 1215, that there is not an available current budget sufficient to continue in the selected operating mode, the die can proceed to 1219. At 1219, the die can broadcast current demand information to suspend the die, and its current priority token. The die can additionally delay initiating the next phase of its access operation.

[0116] In response to determining, at 1213, that at least one of the plurality of dies has the particular priority token, the process can then proceed to 1221 and the die can determine whether it has the first lower priority token. In response to determining, at 1221, that the die does not have the first lower priority token, the process can then proceed to point B, and thus to Figure 12C 1231 and / or 1233. In response to determining, at 1221, that the die does have the first lower priority token, the process can then proceed to 1223 and the die can determine whether there is an available current budget sufficient to initiate the next phase of the access operation of the die for the selected operating mode of the one or more operating modes of the die. In response to determining that there is an available current budget sufficient to continue, the die can broadcast, at 1225, current demand information for the selected operating mode of that phase of the access operation of the die, and the first lower priority token. The die can additionally initiate the next phase of the access operation in the selected operating mode. The selected operating mode can be the normal operating mode regardless of whether the low peak current operating mode is available. Alternatively, the selected operating mode can be the normal operating mode in response to determining that there is an available current budget sufficient to initiate the next phase in the normal operating mode, and can be the low peak current operating mode in response to determining that there is not an available current budget sufficient to initiate the next phase in the normal operating mode, but there is an available current budget sufficient to initiate the next phase in the low peak current operating mode.

[0117] In response to determining at 1223 that there is not an available current budget sufficient to continue in the selected operating mode, the die can proceed to 1227. At 1227, the die can determine whether there is an available current budget sufficient to initiate the next phase of access operations for the selected operating mode of the one or more operating modes of the die if each die with a particular priority token is considered free. For example, instead of using the expected peak current amount value broadcast by the die with the particular priority token when determining whether there is a sufficient available current budget at 1223, the die can instead use the expected peak current budget of a free die when making the determination at 1227. In response to determining that there is an available current budget sufficient to continue, the die can return to 1225 to broadcast its current demand information and priority token, and initiate the next phase of its access operations.

[0118] In response to determining at 1227 that there is not an available current budget sufficient to continue in the selected operating mode, the die can proceed to 1229. At 1229, the die can broadcast its current demand information, and its current priority token, i.e., the first lower priority token, to suspend the die. The die can additionally delay initiating the next phase of its access operations.

[0119] The die that has determined at 1221 not to have the particular priority token and proceeds to point B can optionally proceed to 1231 and can determine whether it has a second lower priority token. The second lower priority token can correspond to a priority level lower than the priority level corresponding to the first lower priority token in a plurality of priority levels. For the example discussed above with reference to Figures 11A-11B For the example discussed above with reference to 1201-1221, there are four priority tokens, where 11 corresponds to the highest priority level, 10 corresponds to the next lower priority, 01 corresponds to the next lower priority, and 00 corresponds to a free die. In this scheme, 11 can be the particular priority token, 10 can be the first lower priority token, and 01 can be the second lower priority token. In such a scheme, if the die is waiting to initiate the next phase of its access operations at 1201, it can not be a free die, and can not have the priority token 00. Further, if the die is also determined not to have the particular priority token 11 at 1205, and not to have the first lower priority token 10 at 1221, then the die must have the second lower priority token 01. Thus, the determination that the die has the second lower priority token can be inherent, and the process can proceed from point B to 1233. However, if additional priority tokens are utilized, e.g., using a three digit priority token, then the actions taken in response to the other lower priority tokens can be made through additional processing at 1239.

[0120] At 1233, the die can determine whether there is an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode of the one or more operating modes of the die for the access operation. In response to determining that there is an available current budget sufficient to continue, the die can broadcast current demand information for the selected operating mode of that phase of the access operation, and its current priority token, e.g., a second lower priority token, at 1235. The die can additionally initiate the next phase of the access operation in the selected operating mode. The selected operating mode can be the normal operating mode regardless of whether a low peak current operating mode is available. Alternatively, the selected operating mode can be the normal operating mode in response to determining that there is an available current budget sufficient to initiate the next phase in the normal operating mode, and can be the low peak current operating mode in response to determining that there is not an available current budget sufficient to initiate the next phase in the normal operating mode, but there is an available current budget sufficient to initiate the next phase in the low peak current operating mode.

[0121] In response to determining at 1233 that there is not an available current budget sufficient to continue in the selected operating mode, the die can proceed to 1237. At 1237, the die can broadcast current demand information to suspend the die, and a second lower priority token. The die can additionally defer initiating the next phase of its access operation. Unlike a die having a first lower priority token, a die having a second lower priority token can not consider a die having a particular priority token to be in an idle state when determining whether there is a sufficient available current budget available.

[0122] Figures 12A-12C The process of 1201 can be repeated for each die of the multi-die package in sequence as the dies are enabled, e.g., by their chip enable signals. For some embodiments, Figures 12A-12C The process of 1201 can be repeated for an enabled die in response to at least one of the dies of the multi-die package indicating that it is busy, e.g., as indicated by a ready / busy control signal shared by the dies. For example, after broadcasting the current demand information, whether at 1203, 1209, or 1211 of 1201, Figure 12A At 1217, 1219, 1225, or 1229 of 1201, or at 1235 or 1237 of 1201, the process can determine whether the die is the last die of the sequence as discussed with reference to Figure 12B At 1217, 1219, 1225, or 1229 of 1201, or at 1235 or 1237 of 1201, the process can determine whether the die is the last die of the sequence as discussed with reference to Figure 12C At 1235 or 1237 of 1201, the process can determine whether the die is the last die of the sequence as discussed with reference to Figure 10A In response to determining that the die is not the last die of the sequence, the die pointer can advance, e.g., increment for an incrementing counter, decrement for a decrementing counter, change to a next number mode in the sequence of a plurality of number modes, etc., and Figures 12A-12CThe process of 1301-1 can apply to the next die of the sequence. In response to determining that the die is the last die of the sequence, the process can initialize (e.g., reinitialize) the die pointer and broadcast Figures 12A-12C The process of 1301-1 applies to the initial die of the sequence.

[0123] Figure 13 is a flowchart of a portion of a method of operating a die (e.g., a memory device or other integrated circuit device) in accordance with various embodiments. Various embodiments determine whether there is sufficient available current budget for one or two operating modes (e.g., a normal operating mode, or a normal operating mode and a low peak current operating mode). However, such embodiments can be modified in cases where more than two operating modes are available. For example, at 1301, the die can determine whether there is sufficient available current budget to initiate the next phase of an access operation in a selected operating mode for the access operation of the die. In response to determining that there is sufficient available current budget to initiate the next phase of the access operation in the selected operating mode, the die can broadcast, at 1305, current demand information for the die in the selected operating mode. In response to determining that there is not sufficient available current budget to initiate the next phase of the access operation in the selected operating mode, the die can broadcast, at 1307, current demand information to suspend the die, and can additionally suspend its operation, or continue to suspend its operation, pending sufficient available current budget.

[0124] The selected operating mode can be the most preferred operating mode of the available operating modes in which there is sufficient budget. For example, for an access operation having N operating modes arranged in order from a first operating mode (e.g., a normal operating mode) considered most preferred to an Nth operating mode considered least preferred, the die can evaluate the expected peak current amount value for each of the N operating modes until determining that one operating mode has an expected peak current amount value that maintains the expected peak current amount value sum within the current budget (e.g., less than or equal to the current budget). It should be noted that the operating modes need not be arranged in order of decreasing expected peak current demand.

[0125] Thus, at 1301-1, the die can determine whether there is sufficient available current budget to initiate the next phase of an access operation in a first operating mode for the access operation of the die. In response to determining that there is sufficient available current budget to continue in the first operating mode, the die can broadcast, at 1305-1, current demand information for the first operating mode for that phase of the access operation of the die. The die can further initiate the next phase of the access operation in the first operating mode. In response to determining that there is not sufficient available current budget to continue in the first operating mode, the die can proceed to 1303-2.

[0126] At 1303-2, the die can determine whether a second operating mode is available to perform the next phase of the access operation. Responsive to determining that there is no second operating mode, the die can go to 1307 and broadcast current demand information to suspend the die, and can further suspend its operation, or continue to suspend its operation, waiting for sufficient available current budget. Responsive to determining that a second operating mode is available, the die can go to 1301-2.

[0127] At 1301-2, the die can determine whether there is sufficient available current budget to initiate the next phase of the access operation in a second operating mode for that phase of the access operation for the die. Responsive to determining that there is sufficient available current budget to continue in the second operating mode, the die can broadcast current demand information for the second operating mode for that phase of the access operation at 1305-2. The die can further initiate the next phase of the access operation in the second operating mode. Responsive to determining that there is insufficient available current budget to continue in the second operating mode, the die can go to 1303-N.

[0128] At 1303-N, the die can determine whether an Nth operating mode is available to perform the next phase of the access operation. Responsive to determining that there is no Nth operating mode, the die can go to 1307 and broadcast current demand information to suspend the die, and can further suspend its operation, or continue to suspend its operation, waiting for sufficient available current budget. Responsive to determining that an Nth operating mode is available, the die can go to 1301-N. It should be noted that going from 1301-2 to 1303-N can include determining whether there is one or more additional operating modes available between the second operating mode and the Nth operating mode, whether there is sufficient available current budget at each of those operating modes, including broadcasting current demand information for the corresponding operating mode responsive to determining that there is sufficient available current budget.

[0129] At 1301-N, the die can determine whether there is sufficient available current budget to initiate the next phase of the access operation in an Nth operating mode for that phase of the access operation for the die. Responsive to determining that there is sufficient available current budget to continue in the Nth operating mode, the die can broadcast current demand information for the Nth operating mode for that phase of the access operation at 1305-N. The die can further initiate the next phase of the access operation in the Nth operating mode. Responsive to determining that there is insufficient available current budget to continue in the Nth operating mode, the die can go to 1307 and broadcast current demand information to suspend the die, and can further suspend its operation, or continue to suspend its operation, waiting for sufficient available current budget.

[0130] CONCLUSION

[0131] While particular embodiments have been illustrated and described herein, it will be appreciated that any arrangement according to any embodiment can be substituted for the specific embodiments shown. Those skilled in the art will appreciate many adaptations and modifications of the embodiments described. Therefore, it is intended that the application be considered as including any and all such adaptations and modifications.

Claims

1. A memory device comprising: an array of memory cells; a node for connection to a signal line; a plurality of registers, wherein one register of the plurality of registers is configured to store a value of an expected peak current amount of the memory device and a priority token of the memory device, and wherein remaining registers of the plurality of registers are each configured to store a respective value of an expected peak current amount of a respective different memory device; and a controller for accessing the array of memory cells, wherein the controller is configured to cause the memory device to: determine whether the memory device is waiting for a next stage of an access operation to be initiated to the array of memory cells; in response to determining that the memory device is waiting for the next stage of the access operation to be initiated: determine, responsive at least to: the priority token of the memory device; the respective values of expected peak current amount of the remaining registers of the plurality of registers; and a value of expected peak current amount of the next stage of the access operation in the selected mode of operation, whether there is an available current budget sufficient to initiate the next stage of the access operation in the selected mode of operation; and in response to determining that there is an available current budget sufficient to initiate the next stage of the access operation in the selected mode of operation, output to the node and store to the one register of the plurality of registers the value of expected peak current amount of the next stage of the access operation in the selected mode of operation and the priority token of the memory device having the different value. determining whether the priority token of the memory device has a particular value of a plurality of values; 2. The memory device of claim 1, wherein the controller is further configured to cause the memory device to: and in response to determining that the priority token of the memory device has the particular value: in response to determining that there is an available current budget sufficient to initiate the next stage of the access operation in the selected mode of operation, change the priority token of the memory device to a different value of the plurality of values and output to the node and store to the one register of the plurality of registers the value of expected peak current amount of the next stage of the access operation in the selected mode of operation and the priority token of the memory device having the different value; and in response to determining that there is not an available current budget sufficient to initiate the next stage of the access operation in the selected mode of operation, output to the node a value of expected peak current amount of a normal mode of operation and the priority token of the memory device having the particular value.

3. The memory device of claim 2, wherein the remaining registers of the plurality of registers are each further configured to store a respective priority token of its respective different memory device, and wherein the controller is further configured to cause the memory device to: determine whether there is an available current budget sufficient to initiate the next stage of the access operation in the selected operating mode at least in response to: the priority token of the memory device; the respective priority token of the remaining registers of the plurality of registers; the respective expected peak current flow amount value of the remaining registers of the plurality of registers; and the expected peak current amount value of the next stage of the access operation in the selected operating mode; and in response to determining that the priority token of the memory device does not have the particular value: determine whether any priority token of the plurality of registers has the particular value; and in response to determining that the respective priority token of at least one register of the plurality of registers has the particular value: determine whether the priority token of the memory device has the different value; in response to determining that the priority token of the memory device has the different value: determine whether there is an available current budget sufficient to initiate the next stage of the access operation in the selected operating mode; in response to determining that there is an available current budget sufficient to initiate the next stage of the access operation in the selected operating mode, output the expected peak current amount value of the selected operating mode and the priority token having the different value to the node; and in response to determining that there is not an available current budget sufficient to initiate the next stage of the access operation in the selected operating mode: determine whether there is an available current budget sufficient to initiate the next stage of the access operation in the selected operating mode in the case that the respective expected peak current amount value of each register of the plurality of registers whose respective priority token has the particular value is treated as the expected peak current amount value of an idle memory device; in response to determining that there is an available current budget sufficient to initiate the next stage of the access operation in the selected operating mode in the case that the respective expected peak current amount value of each register of the plurality of registers whose respective priority token has the particular value is treated as the expected peak current amount value of an idle memory device, output the expected peak current amount value of the selected operating mode and the priority token having the different value to the node; and in response to determining that there is not an available current budget sufficient to initiate the next stage of the access operation in the selected operating mode in the case that the respective expected peak current amount value of each register of the plurality of registers whose respective priority token has the particular value is treated as the expected peak current amount value of an idle memory device, output the expected peak current amount value of an idle memory device and a lower priority token having the different value to the node.

4. The memory device of claim 3, wherein the controller is further configured to cause the memory device to: in response to determining that the priority token of the memory device does not have the different value: determine whether there is an available current budget sufficient to initiate the next phase of the access operation in the selected mode of operation; in response to determining that there is an available current budget sufficient to initiate the next phase of the access operation in the selected mode of operation, output the expected peak current amount value of the selected mode of operation and the priority token having another value of the plurality of values to the node; and in response to determining that there is not an available current budget sufficient to initiate the next phase of the access operation in the selected mode of operation, output the expected peak current amount value of an idle memory device and a priority token having the another value to the node.

5. The memory device of claim 1, wherein the available current budget is equal to a total current budget available to the memory device and to each of the remaining registers of the plurality of registers available to a respective memory device, less a current budget reservation of a priority token corresponding to the memory device.

6. The memory device of claim 5, wherein the priority token of the memory device is a particular priority token of a plurality of priority tokens assignable to the memory device, and wherein each priority token of the plurality of priority tokens corresponds to a respective current budget reservation of a plurality of current budget reservations.

7. The memory device of claim 6, wherein each priority token of the plurality of priority tokens corresponds to a respective priority level of a plurality of priority levels, wherein the respective current budget reservation for a priority token of the plurality of priority tokens corresponding to a highest priority level of the plurality of priority levels is less than the respective current budget reservation for each priority token of the plurality of priority tokens corresponding to a priority level of the plurality of priority levels lower than the highest priority level of the plurality of priority levels, and wherein the respective current budget reservation for a priority token of the plurality of priority tokens corresponding to a lowest priority level of the plurality of priority levels is greater than the respective current budget reservation for each priority token of the plurality of priority tokens corresponding to a priority level of the plurality of priority levels higher than the lowest priority level of the plurality of priority levels.

8. A memory device, comprising: an array of memory cells; and a controller for accessing the array of memory cells, wherein the controller is configured to cause the memory device to: determine whether the memory device is waiting for a next phase of an access operation to be initiated to the array of memory cells; in response to determining that the memory device is waiting for the next phase of the access operation to be initiated: determine a value of a current budget reservation corresponding to the memory device; determining that an available current budget is equal to a total current budget available to a plurality of memory devices less the current budget reservation corresponding to the memory device, wherein the plurality of memory devices includes the memory device and one or more other memory devices in communication with the memory device; determining whether there is an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode; in response to determining that there is an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, broadcasting an expected peak current amount value for the selected operating mode to remaining memory devices of the plurality of memory devices; and in response to determining that there is not an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, broadcasting an expected peak current amount value for a suspended memory device to the remaining memory devices of the plurality of memory devices, wherein the controller is configured to cause the memory device to determine the value of the current budget reservation corresponding to the memory device comprises the controller being configured to cause the memory device to determine a value of a priority token corresponding to the memory device and determine a value of a current budget reservation corresponding to that priority token, wherein each priority token of a plurality of priority tokens assignable to the memory device corresponds to a respective value of a plurality of values of the current budget reservation.

9. The memory device of claim 8, wherein the controller is configured to cause the memory device to determine whether there is an available current budget sufficient to initiate the next phase of the access operation in the selected mode of operation comprises: the controller is configured to cause the memory device to determine whether a sum of the expected peak current amount values for the remaining memory devices of the plurality of memory devices and the expected peak current amount value for the selected operating mode is less than or equal to the available current budget.

10. The memory device of claim 8, wherein the next phase of the access operation is an initial phase of the access operation.

11. The memory device of claim 8, wherein the controller is further configured to cause the memory device to: in response to determining that the memory device is not waiting to initiate the next phase of the access operation: broadcast an expected peak current amount value for a suspended memory device to remaining memory devices of the plurality of memory devices.

12. The memory device of claim 8, wherein the selected operating mode is a normal operating mode for the next phase of the access operation.

13. The memory device of claim 12, wherein the selected operating mode is the normal operating mode for the next phase of the access operation in response to determining that there is an available current budget sufficient to initiate the next phase in the normal operating mode and is a low peak current operating mode for the next phase of the access operation in response to determining that there is not an available current budget sufficient to initiate the next phase in the normal operating mode, but there is an available current budget sufficient to initiate the next phase in the low peak current operating mode.

14. The memory device of claim 8, wherein the selected mode of operation is a most preferred mode of operation of the next stage of the access operation for which there is a sufficient available current budget to initiate that next stage in that mode of operation.

15. The memory device of claim 8, wherein each priority token corresponds to a respective priority level of a plurality of priority levels, wherein a priority token of the plurality of priority tokens corresponding to a highest priority level of the plurality of priority levels corresponds to a lowest value of the plurality of values of the current budget reservation, and wherein a priority token of the plurality of priority tokens corresponding to a lowest priority level of the plurality of priority levels corresponds to a highest value of the plurality of values of the current budget reservation.

16. The memory device of claim 8, wherein the controller configured to cause the memory device to broadcast the expected peak current flow amount value for the selected mode of operation to the remaining memory devices of the plurality of memory devices comprises: the controller is configured to cause the memory device to broadcast the priority token of the selected mode of operation and the expected peak current amount value to the remaining memory devices of the plurality of memory devices.

17. The memory device of claim 8, wherein the controller is further configured to cause the memory device to store each expected peak current amount value broadcast by any of the remaining memory devices of the plurality of memory devices.

18. The memory device of claim 17, wherein the controller is configured to cause the memory device to store each expected peak current amount value broadcast by any of the remaining ones of the plurality of memory devices comprises: the controller is configured to cause the memory device to overwrite any previously stored expected peak current amount value of each memory device of the remaining memory devices of the plurality of memory devices that broadcasts an updated expected peak current amount value.

19. The memory device of claim 8, wherein the controller is configured to cause the memory device to determine whether the memory device is waiting for the next phase of the access operation to be initiated comprises: the controller is configured to cause the memory device to determine, in response to a memory device pointer having a value corresponding to the memory device, whether the memory device is waiting to initiate the next stage of the access operation.

20. The memory device of claim 19, wherein each memory device of the plurality of memory devices corresponds to a respective value of a plurality of values of the memory device pointer.

21. The memory device of claim 20, wherein each value of the plurality of values of the memory device pointer is selected from the group consisting of a value of a counter and a digital pattern of a plurality of control signals.

22. An apparatus comprising: a plurality of dies, wherein each die of the plurality of dies is in communication with each remaining die of the plurality of dies, and wherein a particular die of the plurality of dies comprises: a controller configured to cause the particular die to: store a respective expected peak current amount value for each die of the plurality of dies; determine whether the particular die is waiting to initiate a next stage of an access operation; in response to determining that the particular die is waiting to initiate the next stage of the access operation: determine a value of a current budget reservation corresponding to the particular die; determine that an available current budget is equal to a total current budget available to the plurality of dies minus the current budget reservation corresponding to the particular die; determine whether there is a sufficient available current budget to initiate the next stage of the access operation in a selected mode of operation; broadcasting, to the remaining dies of the plurality of dies, an expected peak current magnitude value for the selected operating mode in response to determining that there is an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode; and broadcasting, to the remaining dies of the plurality of dies, an expected peak current magnitude value for a hold-off die in response to determining that there is not an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, wherein the controller is configured to cause the particular die to determine the value of the current budget reservation corresponding to the particular die comprises the controller being configured to cause the particular die to determine a value of a priority token corresponding to the particular die and to determine a value of a current budget reservation corresponding to that priority token, wherein each of a plurality of priority tokens assignable to the particular die corresponds to a respective value of a plurality of values of the current budget reservation.

23. The apparatus of claim 22, wherein the controller is configured to cause the particular die to determine whether there is an available current budget sufficient to initiate the next stage of the access operation in the selected mode of operation comprises: the controller is configured to cause the particular die to determine whether a sum of the expected peak current magnitude values of the remaining dies of the plurality of dies and the expected peak current magnitude value for the selected operating mode is less than or equal to the available current budget.

24. The apparatus of claim 22, wherein the next phase of the access operation is an initial phase of the access operation.

25. The apparatus of claim 22, wherein the controller is further configured to cause the particular die to: in response to determining that the particular die is not waiting to initiate the next phase of the access operation: broadcast, to the remaining dies of the plurality of dies, an expected peak current magnitude value for a hold-off die.

26. The apparatus of claim 22, wherein the selected operating mode is a normal operating mode for the next phase of the access operation.

27. The apparatus of claim 26, wherein the selected operating mode is the normal operating mode for the next phase of the access operation in response to determining that there is an available current budget sufficient to initiate the next phase in the normal operating mode and is a low peak current operating mode for the next phase of the access operation in response to determining that there is not an available current budget sufficient to initiate the next phase in the normal operating mode but there is an available current budget sufficient to initiate the next phase in the low peak current operating mode.

28. The apparatus of claim 22, wherein the selected operating mode is a most preferred operating mode for the next phase of the access operation for which there is an available current budget sufficient to initiate the next phase in that operating mode.

29. The apparatus of claim 22, wherein each priority token corresponds to a respective priority level of a plurality of priority levels, wherein a priority token of the plurality of priority tokens corresponding to a highest priority level of the plurality of priority levels corresponds to a lowest value of the plurality of values of the current budget reservation, and wherein a priority token of the plurality of priority tokens corresponding to a lowest priority level of the plurality of priority levels corresponds to a highest value of the plurality of values of the current budget reservation.

30. The apparatus of claim 22, wherein the controller is configured to cause the particular die to broadcast the expected peak current flow amount value for the selected operating mode to the remaining dies in the plurality of dies comprises: the controller is configured to cause the particular die to broadcast the priority token and the expected peak current amount value of the selected operating mode to the remaining dies of the plurality of dies.

31. The apparatus of claim 22, wherein the controller is further configured to cause the particular die to store each expected peak current amount value broadcast by any of the remaining dies of the plurality of dies.

32. The apparatus of claim 22, wherein the controller is configured to cause the particular die to determine whether the particular die is waiting to initiate the next stage of the access operation comprises: the controller is configured to cause the particular die to determine whether the particular die is waiting to initiate the next phase of the access operation in response to a die pointer having a value corresponding to the particular die.

33. The apparatus of claim 32, wherein each die of the plurality of dies corresponds to a respective value of a plurality of values of the die pointer.

34. The apparatus of claim 33, wherein each value of the plurality of values of the die pointer is selected from a group consisting of a value of a counter and a digital pattern of a plurality of control signals.

35. The apparatus of claim 22, wherein the controller is a first controller, wherein the access operation is a first access operation, wherein the available current budget is a first available current budget, and wherein a second die of the plurality of dies comprises: a second controller configured to cause the second die to: store a respective expected peak current amount value for each die of the plurality of dies; determine whether the second die is waiting to initiate a next phase of a second access operation; in response to determining that the second die is waiting to initiate the next phase of the second access operation: determine a value of a current budget reservation corresponding to the second die; determine a second available current budget equal to the total current budget available to the plurality of dies less the current budget reservation corresponding to the second die; determine whether there is a second available current budget sufficient to initiate the next phase of the second access operation in a selected operating mode for the second access operation; in response to determining that there is a second available current budget sufficient to initiate the next phase of the second access operation in the selected operating mode for the second access operation, broadcast an expected peak current amount value of the selected operating mode for the second access operation to remaining dies of the plurality of dies; and ​ in response to determining that there is not a second available current budget sufficient to initiate the next phase of the second access operation in the selected mode of operation for the second access operation, broadcast the expected peak current amount value of the die to the remaining dies of the plurality of dies.

36. The apparatus of claim 35, wherein the second controller is configured to broadcast one of the expected peak current amount values of the second die in a time period that is mutually exclusive from a time period when the first controller is configured to broadcast one of the expected peak current amount values of the particular die.

37. A memory device, comprising: an array of memory cells; and a controller for accessing the array of memory cells, wherein the controller is configured to cause the memory device to: determine whether the memory device is waiting for a next phase of an access operation to be initiated to the array of memory cells; in response to determining that the memory device is waiting for the next phase of the access operation to be initiated: determine whether the memory device has a particular priority token of a plurality of priority tokens; in response to determining that the memory device has the particular priority token: determine whether there is an available current budget sufficient to initiate the next phase of the access operation in a selected mode of operation, wherein the available current budget is equal to a total current budget available to a plurality of memory devices including the memory device; in response to determining that there is an available current budget sufficient to initiate the next phase of the access operation in the selected mode of operation, change its priority token to a lower priority token of the plurality of priority tokens, and broadcast an expected peak current amount value of the selected mode of operation and the lower priority token to remaining memory devices of the plurality of memory devices; and in response to determining that there is not an available current budget sufficient to initiate the next phase of the access operation in a normal mode of operation, broadcast an expected peak current amount value of the normal mode of operation and the particular priority token to the remaining memory devices of the plurality of memory devices.

38. The memory device of claim 37, wherein the memory device is connected to a signal line, wherein the signal line is connected to each memory device of the plurality of memory devices, and wherein the controller is further configured to cause the memory device to: in response to determining that the memory device does not have the particular priority token: determine whether any memory device of the plurality of memory devices has the particular priority token; in response to determining that at least one memory device of the plurality of memory devices has the particular priority token: determine whether the memory device has the lower priority token; in response to determining that the memory device has the lower priority token: determine whether there is an available current budget sufficient to initiate the next phase of the access operation in a selected mode of operation; in response to determining that there is an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, broadcasting an expected peak current amount value for the selected operating mode and the lower priority token to remaining memory devices of the plurality of memory devices; and in response to determining that there is not an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode: determining whether there is an available current budget sufficient to initiate the next phase of the access operation in a selected operating mode if each memory device of the plurality of memory devices having the particular priority token is considered free; in response to determining that there is an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode if each memory device of the plurality of memory devices having the particular priority token is considered free, broadcasting an expected peak current amount value for the selected operating mode and the lower priority token to remaining memory devices of the plurality of memory devices; and in response to determining that there is not an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode if each memory device of the plurality of memory devices having the particular priority token is considered free, broadcasting the expected peak current amount value for a free memory device and the lower priority token to the remaining memory devices of the plurality of memory devices.

39. The memory device of claim 37, wherein the controller is further configured to cause the memory device to: in response to determining that no memory device of the plurality of memory devices has the particular priority token: determining whether there is an available current budget sufficient to initiate the next phase of the access operation in a selected operating mode; in response to determining that there is an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, broadcasting an expected peak current amount value for the selected operating mode and a priority token for the memory device to remaining memory devices of the plurality of memory devices; and in response to determining that there is not an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, broadcasting the expected peak current amount value for a free memory device and the priority token for the memory device to the remaining memory devices of the plurality of memory devices.

40. The memory device of claim 37, wherein the lower priority token is a first lower priority token, and wherein the controller is further configured to cause the memory device to: in response to determining that the memory device does not have the first lower priority token: determining whether there is an available current budget sufficient to initiate the next phase of the access operation in a selected operating mode; in response to determining that there is an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, broadcasting an expected peak current amount value for the selected operating mode and a priority token for the memory device to remaining memory devices of the plurality of memory devices; and in response to determining that there is not an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, broadcasting the expected peak current amount value for a free memory device and the priority token for the memory device to the remaining memory devices of the plurality of memory devices. in response to determining that there is an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, broadcasting an expected peak current amount value of the selected operating mode and a second lower priority token to remaining memory devices of the plurality of memory devices; and in response to determining that there is not an available current budget sufficient to initiate the next phase of the access operation in the selected operating mode, broadcasting the expected peak current amount value of an idle memory device and the second lower priority token to the remaining memory devices of the plurality of memory devices.

41. The memory device of claim 37, wherein the controller is configured to cause the memory device to determine whether there is an available current budget sufficient to initiate the next phase of the access operation in the selected mode of operation comprises: the controller is configured to cause the memory device to determine whether there is an available current budget sufficient to initiate the next phase of the access operation in a plurality of different operating modes until determining that there is an available current budget sufficient to initiate the next phase of the access operation in one of the operating modes of the plurality of different operating modes as the selected operating mode, or determining that there is not an available current budget sufficient to initiate the next phase of the access operation in any of the operating modes of the plurality of different operating modes.

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