Image sensor and its fabrication method

Abstract

This invention provides an image sensor and its fabrication method. The method includes: providing a substrate in which a photodiode region is formed, and a sacrificial oxide layer and a gate are formed thereon; forming a first sidewall layer and a second sidewall layer; performing an ion implantation process to form a second clamping region on the first clamping region; continuing the ion implantation process to form a barrier layer on the second clamping region; and performing a wet cleaning process on the wafer surface. This application, by continuing the ion implantation process to form a barrier layer on the second clamping region after forming the second clamping region, can suppress ion diffusion in the second clamping region and trap interstitial silicon atoms and other defect sites. This can suppress the diffusion and escape of boron / fluorine ions caused by subsequent thermal annealing processes, thereby suppressing photoelectron escape, improving white noise, and thus solving the problem of charge escape in CMOS image sensors.

Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, specifically to an image sensor and its fabrication method. Background Technology

[0002] As the size of photodiodes (PDs) in CMOS image sensors (CIS) continues to shrink, charge is more likely to escape from the interface, generating dark currents and producing white pixels, which affect image quality.

[0003] In CIS products, after the gate sidewall is formed, a P-type ion implantation process (e.g., boron implantation) is typically performed on the N-well of the photodiode (PD) on the substrate to form a charge clamping layer (depletion layer). This depletion layer isolates and prevents charge escape, thereby reducing the impact of dark current on product performance. However, the subsequent real-time absorption (RTA) process exacerbates the diffusion and escape of P-type ions (e.g., boron ions), affecting the isolation effect and causing photoelectrons to escape from the silicon surface, resulting in white pixels. Therefore, a new process is needed to address the charge escape problem in CMOS image sensors. Summary of the Invention

[0004] This application provides an image sensor and its fabrication method, which can solve the problem of charge escape in CMOS image sensors.

[0005] On one hand, embodiments of this application provide a method for fabricating an image sensor, including:

[0006] A substrate is provided in which a photodiode region is formed, a sacrificial oxide layer and a gate are formed on the substrate, wherein the sacrificial oxide layer covers the surface of the substrate, the gate is located on the sacrificial oxide layer and the gate covers a portion of the photodiode region on the projection of the substrate surface;

[0007] A first clamping region is formed, the first clamping region being located on the photodiode region in the substrate;

[0008] A first sidewall layer and a second sidewall layer are formed, wherein the first sidewall layer covers the surfaces of the gate and the substrate, and the second sidewall layer is located on the first sidewall layer on the side of the gate;

[0009] A first patterned photoresist layer is formed, wherein the first patterned photoresist layer opens a first window on the second sidewall layer on the photodiode region;

[0010] According to the first window, an ion implantation process is performed on the substrate to form a second clamping region on the first clamping region;

[0011] Continue to perform an ion implantation process on the substrate according to the first window to form a barrier layer on the second clamping region;

[0012] Remove the first patterned photoresist layer;

[0013] A wet cleaning process is performed on the surfaces of the first sidewall layer and the second sidewall layer.

[0014] Optionally, in the method for fabricating the image sensor, a Co-C ion implantation process is performed on the substrate according to the first window to form a barrier layer on the second clamping region.

[0015] Optionally, in the method for fabricating the image sensor, during the process of performing a Co-C ion implantation process on the substrate to form a barrier layer on the second clamping region, the implantation energy of the Co-C ion implantation process is 4 keV to 8 keV; the dose of implanted carbon ions is 0.5E15 atoms / cm. 2 ~1E15 atoms / cm 2 .

[0016] Optionally, in the method for fabricating the image sensor, the first patterned photoresist layer is removed by ashing with a mixed gas of O2 and H2N2.

[0017] Optionally, in the method for fabricating the image sensor, SPM and SC1 are used to perform a wet cleaning process on the surfaces of the first sidewall layer and the second sidewall layer to remove residual metal ions and the first patterned photoresist layer.

[0018] Optionally, in the method for fabricating the image sensor, the thickness of the first patterned photoresist layer is [missing information].

[0019] Optionally, in the method for fabricating the image sensor, after performing a wet cleaning process on the surfaces of the first sidewall layer and the second sidewall layer, the method further includes:

[0020] The image sensor after the barrier layer is formed is subjected to a thermal annealing process.

[0021] Optionally, in the method for fabricating the image sensor, the step of forming a first clamping region, wherein the first clamping region is located on the photodiode region in the substrate, includes:

[0022] A second patterned photoresist layer is formed, wherein the second patterned photoresist layer opens a second window on the gate side of the photodiode region;

[0023] According to the second window, an ion implantation process is performed on the substrate to form a first clamping region on the photodiode region;

[0024] Remove the second patterned photoresist layer.

[0025] Optionally, in the method for fabricating the image sensor, after performing a wet cleaning process on the surfaces of the first sidewall layer and the second sidewall layer, the method further includes:

[0026] The surfaces of the first and second sidewall layers are subjected to a wafer brushing process to remove residual polymer particles.

[0027] On the other hand, embodiments of this application also provide an image sensor, including:

[0028] A substrate in which a photodiode region is formed, and a sacrificial oxide layer and a gate are also formed on the substrate, wherein the sacrificial oxide layer covers the surface of the substrate, the gate is located on the sacrificial oxide layer and the gate covers a portion of the photodiode region on the projection of the substrate surface;

[0029] A first clamping region is located on the photodiode region in the substrate;

[0030] A first sidewall layer and a second sidewall layer, wherein the first sidewall layer covers the surfaces of the gate and the substrate, and the second sidewall layer is located on the first sidewall layer on the side of the gate;

[0031] A second clamping region is located on the first clamping region in the substrate;

[0032] A barrier layer located on the second clamping region in the substrate.

[0033] The technical solution of this application has at least the following advantages:

[0034] This invention provides a method for fabricating an image sensor, comprising: providing a substrate in which a photodiode region is formed, and a sacrificial oxide layer and a gate are also formed on the substrate; forming a first clamping region; forming a first sidewall layer and a second sidewall layer; forming a first patterned photoresist layer to open a first window on the photodiode region; performing an ion implantation process to form a second clamping region on the first clamping region; continuing the ion implantation process to form a barrier layer on the second clamping region; removing the first patterned photoresist layer; and performing a wet cleaning process on the surfaces of the first sidewall layer and the second sidewall layer. By performing an ion implantation process on the substrate to form a second clamping region on the first clamping region, and continuing the ion implantation process to form a barrier layer on the second clamping region, the second clamping region can provide good isolation, and fluorine ions in the second clamping region can trap defects and suppress the diffusion of conductive ions doped in the substrate. Furthermore, the barrier layer can suppress ion diffusion in the second clamping region on the one hand, and trap interstitial silicon atoms and other defect sites on the other hand, thereby suppressing the diffusion and escape of boron / fluorine ions caused by subsequent thermal annealing processes, thereby suppressing the escape of photoelectrons, improving white noise, and thus solving the problem of charge escape in CMOS image sensors. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0036] Figure 1 This is a flowchart of the method for fabricating an image sensor according to an embodiment of the present invention;

[0037] Figure 2-11 This is a schematic diagram of the semiconductor process in each step of the image sensor fabrication process according to an embodiment of the present invention;

[0038] The reference numerals in the attached figures are explained as follows:

[0039] 11-Substrate, 12-Deep well region, 13-Photodiode region, 14-First clamping region, 15-Second clamping region, 16-Barrier layer, 17-Source / drain region, 20-Sacrificial oxide layer, 31-Gate, 32-First sidewall layer, 33-Second sidewall layer, 40-Second patterned photoresist layer, 50-First patterned photoresist layer. Detailed Implementation

[0040] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0041] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0042] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0043] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0044] This application provides a method for fabricating an image sensor, referring to... Figure 1 , Figure 1 This is a flowchart of a method for fabricating an image sensor according to an embodiment of the present invention. The method for fabricating an image sensor includes:

[0045] Step S10: Provide a substrate in which a photodiode region is formed, and a sacrificial oxide layer and a gate are formed on the substrate, wherein the sacrificial oxide layer covers the surface of the substrate, the gate is located on the sacrificial oxide layer and the gate covers a portion of the photodiode region on the projection of the gate onto the surface of the substrate;

[0046] Step S20: Form a first clamping region, the first clamping region being located on the photodiode region in the substrate;

[0047] Step S30: Form a first sidewall layer and a second sidewall layer, wherein the first sidewall layer covers the surface of the gate and the substrate, and the second sidewall layer is located on the first sidewall layer on the side of the gate;

[0048] Step S40: Form a first patterned photoresist layer, wherein the first patterned photoresist layer opens a first window on the second sidewall layer on the photodiode region;

[0049] Step S50: Perform an ion implantation process on the substrate according to the first window to form a second clamping region on the first clamping region;

[0050] Step S60: Continue to perform an ion implantation process on the substrate according to the first window to form a barrier layer on the second clamping region;

[0051] Step S70: Remove the first patterned photoresist layer;

[0052] Step S80: Perform a wet cleaning process on the surfaces of the first sidewall layer and the second sidewall layer.

[0053] For details, please refer to Figures 2-11 , Figure 2-11 This is a schematic diagram of the semiconductor process in each step of the image sensor fabrication process according to an embodiment of the present invention.

[0054] First, refer to Figure 2 A substrate 11 is provided, in which a deep well region 12 is formed, and a photodiode region 13 is formed on the deep well region. A sacrificial oxide layer 20 and a gate 31 are formed on the substrate 11, wherein the sacrificial oxide layer 20 covers the surface of the substrate 11, and the gate 31 is located on the sacrificial oxide layer 20, and the gate 31 covers a portion of the photodiode region 13 on the surface of the substrate 11 from top to bottom. In this embodiment, the substrate 11 may be made of single-crystal silicon, and the substrate 11 may include a substrate and an epitaxial layer located on the substrate. Both the deep well region 12 and the photodiode region 13 may be formed in the epitaxial layer. The deep well region 12 may be an N-type deep well region, and the photodiode region 13 may be an N+ type photodiode region. The doping ions in the N-type deep well region 12 and the N+ photodiode region 13 may be N-type conductive ions such as arsenic ions and phosphorus ions. In this embodiment, the gate 31 on the photodiode region 13 may be a transmission gate (TX).

[0055] Then, refer to Figure 3 A second patterned photoresist layer 40 is formed, and the second patterned photoresist layer 40 opens a second window on the gate 31 side of the photodiode region 13.

[0056] Next, refer to Figure 4 According to the second window, an ion implantation process is performed on the substrate 11 to form a first clamping region 14 on the photodiode region 13. P-type conductive ions (e.g., boron ions) are implanted into the substrate 11 to form the first clamping region 14 on the photodiode region 13.

[0057] Further reference Figure 5 Remove the second patterned photoresist layer 40.

[0058] Next, refer to Figure 6 A first sidewall layer 32 and a second sidewall layer 33 are formed. The first sidewall layer 32 covers the surfaces of the gate 31 and the substrate 11, and the second sidewall layer 33 is located on the side of the gate 31 on the first sidewall layer 32. The first sidewall layer 32 may be made of silicon oxide, and the second sidewall layer 33 may be made of silicon nitride.

[0059] Further reference Figure 7 A first patterned photoresist layer 50 is formed, which opens a first window on the second sidewall layer 33 on the photodiode region 13 (first clamping region 14). Preferably, the thickness of the first patterned photoresist layer 50 can be [missing information]. For example

[0060] Next, refer to Figure 8 According to the first window, an ion implantation process is performed on the substrate 11 to form a second clamping region 15 on the first clamping region 14. In this embodiment, P-type conductive ions (e.g., boron ions, such as BF2) are implanted into the substrate 11 to form the second clamping region 15 on the first clamping region 14. The second clamping region 15 provides good isolation, and the fluorine ions can trap defects and suppress the diffusion of doped conductive ions in the substrate 11.

[0061] Further reference Figure 9 Continuing according to the first window, an ion implantation process is performed on the substrate 11 to form a barrier layer 16 on the second clamping region 15.

[0062] Preferably, in this embodiment of the application, a Co-C ion implantation process is performed on the substrate according to the first window to form a barrier layer 16 on the second clamping region 15. Specifically, during the process of performing the Co-C ion implantation process on the substrate to form the barrier layer 16 on the second clamping region 15, the implantation energy of the Co-C ion implantation process can be 4 keV to 8 keV; the dose of implanted carbon ions can be 0.5E15 atoms / cm 2 ~1E15 atoms / cm 2 .

[0063] Next, refer to Figure 10 The first patterned photoresist layer 50 is removed. Specifically, in this embodiment, the first patterned photoresist layer 50 can be removed by ashing with a mixed gas of O2 and H2N2.

[0064] Finally, a wet cleaning process is performed on the surfaces of the first sidewall layer 32 and the second sidewall layer 33 (the formed semiconductor structure). In this embodiment, SPM and SC1 are used to perform a wet cleaning process on the surfaces of the first sidewall layer and the second sidewall layer to remove residual metal ions and the first patterned photoresist layer 50.

[0065] Further reference Figure 11 After performing a wet cleaning process on the surfaces of the first sidewall layer 32 and the second sidewall layer 33, the method for fabricating the image sensor according to this embodiment may further include: forming a source / drain region 17, wherein in this embodiment, the source / drain region 17 is a floating diffusion region (FD). The conductivity type of the source / drain region 17 may be N-type.

[0066] In this embodiment, it may also include conventional image sensor manufacturing processes such as forming a reset gate, a source follower gate, a gate gate, and forming their respective bottom active regions, as well as conventional CIS fabrication processes such as AA, Photo, IMP, POLY, CT, and Metal.

[0067] Preferably, after performing a wet cleaning process on the surfaces of the first sidewall layer 32 and the second sidewall layer 33, or after forming the source / drain region 17, the method for fabricating the image sensor according to this application embodiment may further include: performing a thermal annealing process on the semiconductor structure after forming the barrier layer 16. Figure 10As can be seen, during the thermal annealing process, the lattice repair of the substrate 11 surface layer (silicon surface layer) promotes the diffusion of boron ions / fluorine ions to the silicon surface. After Co-C ion (carbohydrate co-ion) implantation, the carbon-rich barrier layer 16 can suppress the diffusion of boron ions / fluorine ions. Furthermore, carbon ions can trap interstitial silicon atoms and other defect sites, thereby suppressing the diffusion and escape of boron ions / fluorine ions caused by annealing, and thus suppressing the escape of photoelectrons and improving white pixel (white noise). The inventors found that as the carbon ion dose increases, the boron ion concentration near a 7nm depth of the substrate increases from 1.3x10⁻⁶ to 10⁻⁶. 20 atoms / cm 3 Increased to 1.9x10 20 atoms / cm 3 This demonstrates that C co-implantation can effectively suppress boron ion diffusion in the second clamping region. Furthermore, the inventors also discovered that after performing the Co-C ion (carbon co-ion) implantation process, the leakage current was effectively reduced while maintaining the same Ion value in the NMOS.

[0068] Preferably, after performing a wet cleaning process on the surfaces of the first sidewall layer 32 and the second sidewall layer 33, or after forming the source / drain region 17, the method for fabricating the image sensor according to the present application embodiment may further include: performing a wafer brushing process on the surfaces of the first sidewall layer 32 and the second sidewall layer 33 to thoroughly remove residual polymer particles from the device surface.

[0069] Based on the same inventive concept, embodiments of this application also provide an image sensor, such as... Figure 10 As shown, the image sensor includes:

[0070] A substrate 11 is provided, in which a photodiode region 13 is formed. A sacrificial oxide layer 20 and a gate 31 are also formed on the substrate 11. The sacrificial oxide layer 20 covers the surface of the substrate 11, and the gate 31 is located on the sacrificial oxide layer 20 and covers a portion of the photodiode region 13 on the projection of the gate 31 onto the surface of the substrate 11.

[0071] A first clamping region 14 is located on the photodiode region 13 in the substrate 11;

[0072] A first sidewall layer 32 and a second sidewall layer 33, wherein the first sidewall layer 32 covers the surface of the gate 31 and the substrate 11, and the second sidewall layer 33 is located on the first sidewall layer 32 on the side of the gate 31;

[0073] The second clamping region 15 is located on the first clamping region 14 in the substrate 11;

[0074] A barrier layer 16 is located on the second clamping region 15 in the substrate 11.

[0075] In summary, the present invention provides a method for fabricating an image sensor, comprising: providing a substrate 11, wherein a photodiode region 13 is formed in the substrate 11, and a sacrificial oxide layer 20 and a gate 31 are further formed on the substrate 11; forming a first clamping region 14; forming a first sidewall layer 32 and a second sidewall layer 33; forming a first patterned photoresist layer 50 to open a first window on the photodiode region 13; performing an ion implantation process to form a second clamping region 15 on the first clamping region 14; continuing to perform an ion implantation process to form a barrier layer 16 on the second clamping region 15; removing the first patterned photoresist layer 50; and performing a wet cleaning process on the surfaces of the first sidewall layer 32 and the second sidewall layer 33. The present invention also provides an image sensor. This application employs an ion implantation process on the substrate to form a second clamping region 15 on the first clamping region 14, and then performs another ion implantation process to form a barrier layer 16 on the second clamping region 15. The second clamping region 15 provides excellent isolation, and fluorine ions can trap defects, suppressing the diffusion of conductive ions doped in the substrate 11. Furthermore, the barrier layer 16 can suppress the diffusion of boron ions in the second clamping region 15 and trap interstitial silicon atoms and other defect sites, thereby suppressing the diffusion and escape of boron / fluorine ions caused by subsequent thermal annealing processes, thus suppressing the escape of photoelectrons, improving white noise, and solving the problem of charge escape in CMOS image sensors.

[0076] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.

Claims

1. A method for fabricating an image sensor, characterized in that, include: A substrate is provided in which a photodiode region is formed, a sacrificial oxide layer and a gate are formed on the substrate, wherein the sacrificial oxide layer covers the surface of the substrate, the gate is located on the sacrificial oxide layer and the gate covers a portion of the photodiode region on the projection of the substrate surface; A first clamping region is formed, the first clamping region being located on the photodiode region in the substrate; A first sidewall layer and a second sidewall layer are formed, wherein the first sidewall layer covers the surfaces of the gate and the substrate, and the second sidewall layer is located on the first sidewall layer on the side of the gate; A first patterned photoresist layer is formed, wherein the first patterned photoresist layer opens a first window on the second sidewall layer on the photodiode region; According to the first window, an ion implantation process is performed on the substrate to form a second clamping region on the first clamping region; Continue to perform an ion implantation process on the substrate according to the first window to form a barrier layer on the second clamping region; Remove the first patterned photoresist layer; A wet cleaning process is performed on the surfaces of the first sidewall layer and the second sidewall layer.

2. The method for fabricating an image sensor according to claim 1, characterized in that, Continue with the first window, perform a Co-C ion implantation process on the substrate to form a barrier layer on the second clamping region.

3. The method for fabricating an image sensor according to claim 2, characterized in that, During the Co-C ion implantation process performed on the substrate to form a barrier layer on the second clamping region, the implantation energy of the Co-C ion implantation process is 4 keV to 8 keV; the dose of implanted carbon ions is 0.5E15 atoms / cm. 2 ~1E15 atoms / cm 2 .

4. The method for fabricating an image sensor according to claim 1, characterized in that, The first patterned photoresist layer was removed by ashing with a mixture of O2 and H2N2 gas.

5. The method for fabricating an image sensor according to claim 1, characterized in that, Wet cleaning processes were performed on the surfaces of the first and second sidewall layers using SPM and SC1 to remove residual metal ions and the first patterned photoresist layer.

6. The method for fabricating an image sensor according to claim 1, characterized in that, The thickness of the first patterned photoresist layer is 7. The method for fabricating an image sensor according to claim 1, characterized in that, After performing a wet cleaning process on the surfaces of the first sidewall layer and the second sidewall layer, the method for fabricating the image sensor further includes: The image sensor after the barrier layer is formed is subjected to a thermal annealing process.

8. The method for fabricating an image sensor according to claim 1, characterized in that, The step of forming a first clamping region, wherein the first clamping region is located on the photodiode region in the substrate, includes: A second patterned photoresist layer is formed, wherein the second patterned photoresist layer opens a second window on the gate side of the photodiode region; According to the second window, an ion implantation process is performed on the substrate to form a first clamping region on the photodiode region; Remove the second patterned photoresist layer.

9. The method for fabricating an image sensor according to claim 1, characterized in that, After performing a wet cleaning process on the surfaces of the first sidewall layer and the second sidewall layer, the method for fabricating the image sensor further includes: The surfaces of the first and second sidewall layers are subjected to a wafer brushing process to remove residual polymer particles.

10. An image sensor, characterized in that, include: A substrate in which a photodiode region is formed, and a sacrificial oxide layer and a gate are also formed on the substrate, wherein the sacrificial oxide layer covers the surface of the substrate, the gate is located on the sacrificial oxide layer and the gate covers a portion of the photodiode region on the projection of the substrate surface; A first clamping region is located on the photodiode region in the substrate; A first sidewall layer and a second sidewall layer, wherein the first sidewall layer covers the surfaces of the gate and the substrate, and the second sidewall layer is located on the first sidewall layer on the side of the gate; A second clamping region is located on the first clamping region in the substrate; A barrier layer located on the second clamping region in the substrate.

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