Array substrate and touch display device

Abstract

An array substrate and a touch display device are disclosed. In the array substrate, a first control unit (21) and a second control unit (22) are disposed opposite to each other along a first direction; a plurality of touch sensing blocks (30) are divided into a first group of electrode blocks (31) and a second group of electrode blocks (32) arranged along the first direction; a plurality of touch signal lines (40) are divided into a first group of touch signal lines (41) and a second group of touch signal lines (42), the first group of touch signal lines (41) and the second group of touch signal lines (42) being arranged along the first direction; the first group of touch signal lines (41) includes a plurality of touch... The signal lines (40) are respectively coupled to the multiple touch sensing blocks (30) in the first group of electrode blocks (31), and one end of the multiple touch signal lines (40) included in the first group of touch signal lines (41) is respectively coupled to the first control unit (21); the multiple touch signal lines (40) included in the second group of touch signal lines (42) are respectively coupled to the multiple touch sensing blocks (30) in the second group of electrode blocks (32), and one end of the multiple touch signal lines (40) included in the second group of touch signal lines (42) is respectively coupled to the second control unit (22).

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to an array substrate and a touch display device. Background Technology

[0002] Touchscreens are ubiquitous in our lives. They save space, are easy to carry, and offer better human-computer interaction. Among various types of touchscreens, capacitive touchscreens are widely used due to their high sensitivity and multi-touch capability.

[0003] The working principle of a capacitive touchscreen is as follows: a conductive material is placed on the surface of the substrate as a touch electrode; when a touch object (such as a user's finger) touches the touchscreen, the capacitance of the touch electrode located at the touch point changes, and the position of the touch point on the touchscreen can be detected based on this change.

[0004] Capacitive touch technology can be divided into touch technology that utilizes the mutual capacitance principle and touch technology that utilizes the self-capacitance principle.

[0005] An embedded touchscreen is a type of touchscreen in which the touch electrodes are positioned between the array substrate and the opposing substrate of the display panel. Embedded touchscreens have higher integration and are thinner and lighter, thus having broad application prospects. Summary of the Invention

[0006] The purpose of this disclosure is to provide an array substrate and a touch display device.

[0007] To achieve the above objectives, this disclosure provides the following technical solution:

[0008] A first aspect of this disclosure provides an array substrate, comprising:

[0009] Base;

[0010] A first control unit and a second control unit are arranged opposite to each other along a first direction;

[0011] Multiple independent touch sensing blocks are arranged in an array on the substrate. The multiple touch sensing blocks are divided into a first group of electrode blocks and a second group of electrode blocks, and the first group of electrode blocks and the second group of electrode blocks are arranged along a first direction.

[0012] Multiple independent touch signal lines, each of which extends at least partly along the first direction, the multiple touch signal lines are divided into a first group of touch signal lines and a second group of touch signal lines, the first group of touch signal lines and the second group of touch signal lines are arranged along the first direction;

[0013] The first group of touch signal lines includes multiple touch signal lines arranged along a second direction, which intersects with the first direction. The multiple touch signal lines included in the first group of touch signal lines are respectively coupled to multiple touch sensing blocks in the first group of electrode blocks. One end of the multiple touch signal lines included in the first group of touch signal lines is respectively coupled to the first control unit.

[0014] The second group of touch signal lines includes multiple touch signal lines arranged along the second direction. The multiple touch signal lines in the second group of touch signal lines are respectively coupled to multiple touch sensing blocks in the second group of electrode blocks. One end of the multiple touch signal lines in the second group of touch signal lines is respectively coupled to the second control unit.

[0015] Optionally, the two touch signal lines opposite each other along the first direction have an electrostatic protection distance in the first direction.

[0016] Optionally, the array substrate further includes: a plurality of pixel electrodes; the electrostatic protection distance L1 satisfies: L1=k*H; H represents the maximum length of the pixel electrode in the first direction, 2%≤k≤6%.

[0017] Optionally, the electrostatic protection distance is greater than or equal to 10 micrometers.

[0018] Optionally, at least a portion of the touch signal line includes multiple straight edges and multiple curved edges, with the straight edges and curved edges alternating.

[0019] In a touch signal line, at least a portion of the curved portion overlaps with the orthographic projection of the pixel electrode onto the substrate.

[0020] Optionally, the first group of touch signal lines includes at least one first target touch signal line, and the end of the at least one first target touch signal line near the second group of touch signal lines includes a first target bend; the second group of touch signal lines includes at least one second target touch signal line, and the end of the at least one second target touch signal line near the first group of touch signal lines includes a second target bend; there is a first protection distance between the first target bend and the second target bend, and the first protection distance is greater than or equal to the electrostatic protection distance.

[0021] Optionally, the orthographic projection of the first target curved portion on the substrate at least partially overlaps with the orthographic projection of the pixel electrode on the substrate; the first target curved portion includes an extension that extends in a direction away from the second set of touch signal lines.

[0022] Optionally, the first group of touch signal lines includes at least one third target touch signal line, and the end of the at least one third target touch signal line near the second group of touch signal lines includes a first target straight edge; the second group of touch signal lines includes at least one fourth target touch signal line, and the end of the at least one fourth target touch signal line near the first group of touch signal lines includes a second target straight edge; there is a second protection distance between the first target straight edge and the second target straight edge, and the second protection distance is greater than or equal to the electrostatic protection distance.

[0023] Optionally, the array substrate further includes:

[0024] Multiple data lines, at least a portion of which extend along a first direction;

[0025] Multiple switching elements, each located between an adjacent bend and a data line.

[0026] Optionally, the first group of electrode blocks and the second group of electrode blocks include the same number of touch sensing blocks; the first group of touch signal lines and the second group of touch signal lines include the same number of touch signal lines.

[0027] Optionally, the array substrate further includes a plurality of data lines, at least a portion of which extend along a first direction;

[0028] Each touch sensing block includes multiple touch electrodes that are electrically connected to each other and spaced apart from each other;

[0029] At least one of the first group of touch signal lines and the second group of touch signal lines can be divided into multiple sub-touch signal line groups. Each sub-touch signal line group includes two adjacent touch signal lines along the second direction. The orthographic projections of the two adjacent touch signal lines on the substrate are respectively located on both sides of the orthographic projection of the same data line on the substrate. The orthographic projections of the two adjacent touch signal lines and the orthographic projection of the same data line both include the portion located between the orthographic projections of adjacent touch electrodes on the substrate.

[0030] Optionally, the layers on which the two adjacent touch signal lines are located are different from the layers on which the same data line is located.

[0031] Optionally, the array substrate further includes a plurality of gate lines, at least a portion of which extend along the second direction;

[0032] At least a portion of the straight edge portion includes a first sub-part and a second sub-part coupled together. In a direction parallel to the substrate and perpendicular to the extension direction of the touch signal line, the width of the first sub-part is greater than the width of the second sub-part. The orthographic projection of the first sub-part on the substrate covers the orthographic projection of at least a portion of the side surface of the gate line on the substrate.

[0033] And / or,

[0034] At least a portion of the curved portion includes a coupled third sub-portion and a fourth sub-portion, wherein the width of the third sub-portion is greater than the width of the fourth sub-portion in a direction parallel to the substrate and perpendicular to the extension direction of the touch signal line; the orthographic projection of the third sub-portion on the substrate covers the orthographic projection of at least a portion of the side surface of the gate line on the substrate.

[0035] Optionally, the gate line includes multiple gate patterns and multiple gate connecting portions; the gate patterns and the gate connecting portions are alternately arranged along the second direction, and adjacent gate patterns are coupled through the gate connecting portions; along the first direction, the width of the gate pattern is greater than the width of the gate connecting portion;

[0036] The orthographic projection of the first sub-part onto the substrate covers the orthographic projection of at least a portion of the side surface of the gate connection portion onto the substrate;

[0037] The orthographic projection of the third sub-part onto the substrate covers the orthographic projection of at least a portion of the side surface of the grating pattern onto the substrate.

[0038] Optionally, the first sub-part extends along the first direction, and the gate connecting part extends along a third direction, wherein the angle between the third direction and the first direction is less than 90 degrees.

[0039] Optionally, at least a portion of the grid pattern includes a solid area and a first cutout area, wherein the orthographic projection of the solid area on the substrate at least partially overlaps with the orthographic projection of the third sub-part on the substrate; and the orthographic projection of the first cutout area on the substrate at least partially overlaps with the orthographic projection of the fourth sub-part on the substrate.

[0040] Optionally, each touch sensing block includes a plurality of touch electrodes electrically connected to and spaced apart from each other; the plurality of touch electrodes are arranged in an array, and the plurality of touch electrodes are divided into multiple rows of touch electrodes arranged along the first direction, and each row of touch electrodes includes a plurality of touch electrodes arranged along the second direction;

[0041] Each touch sensor block also includes:

[0042] Multiple first common connection portions, each of which corresponds one-to-one with the multiple rows of touch electrodes, and each first common connection portion is coupled to its corresponding row of touch electrodes.

[0043] Multiple second common connection portions, with adjacent rows of touch electrodes coupled through at least one second common connection portion.

[0044] Optionally, the array substrate further includes multiple gate lines, at least a portion of which extend along the second direction; the first common connection portion is disposed in the same layer and material as the gate lines.

[0045] Optionally, the first common connection portion is directly attached to the surface of its corresponding row of touch electrodes.

[0046] Optionally, there is a gap between adjacent first common connection portions along the second direction, the width of the gap in the second direction being greater than or equal to 5 micrometers.

[0047] Optionally, the array substrate further includes a plurality of data lines, at least a portion of which extend along a first direction;

[0048] In the two adjacent first common connection portions along the second direction, at least one of the first common connection portions has a first overlapping area on the substrate with the orthographic projection of the data line on the substrate at one end facing the interval area, and the width of the first overlapping area along the second direction is equal to the width of the data line.

[0049] Optionally, the array substrate further includes multiple data lines, at least a portion of which extend along a first direction; the second common connection portion is disposed on the same layer and made of the same material as the data lines.

[0050] Optionally, along the first direction, the first common connection portion is located on the first side of its corresponding row of touch electrodes;

[0051] At least a portion of the second common connection extends along the first direction, and the first end of the second common connection is coupled to the first common connection of one row of touch electrodes in the two adjacent rows of touch electrodes, and the second end of the second common connection is coupled to at least one touch electrode in the other row of touch electrodes in the two adjacent rows of touch electrodes.

[0052] Optionally, the array substrate further includes multiple gate lines, at least a portion of which extend along the second direction; at least a portion of the gate lines are provided with a second cutout area, and the orthographic projection of the second common connection portion on the substrate overlaps with the orthographic projection of the second cutout area on the substrate.

[0053] Optionally, each touch sensing block includes a plurality of touch electrodes electrically connected to and spaced apart from each other; the array substrate further includes:

[0054] Multiple grid lines, at least a portion of which extend along the second direction;

[0055] A plurality of third common connection portions are provided between adjacent touch sensing blocks along the first direction. At least one of the third common connection portions extends along the first direction. A first end of the third common connection portion is coupled to a touch electrode in a first touch sensing block among adjacent touch sensing blocks, and a second end of the third common connection portion is not coupled to a second touch sensing block among adjacent touch sensing blocks. The orthographic projection of at least a portion of the third common connection portion on the substrate and the orthographic projection of the gate line on the substrate have a second overlapping area.

[0056] At least a portion of the second common connection portion has a third overlapping region with the orthographic projection of the gate line on the substrate, and the width of the second overlapping region is equal to the width of the third overlapping region along the first direction.

[0057] Optionally, at least a portion of the grid lines are provided with a third cutout area, and the orthographic projection of the third common connection portion on the substrate at least partially overlaps with the orthographic projection of the third cutout area on the substrate.

[0058] Optionally, the orthographic projection of the second end of the third common connection portion onto the substrate does not overlap with the orthographic projection of the grid line onto the substrate.

[0059] Optionally, the orthographic projection of the second end of the third common connection portion onto the substrate does not overlap with the orthographic projection of the second touch sensing block in the adjacent touch sensing block, including the first common connection portion onto the substrate.

[0060] Based on the above-described array substrate technical solution, a second aspect of this disclosure provides a touch display device including the above-described array substrate.

[0061] Optionally, the touch display device further includes: a counter substrate and a liquid crystal layer, wherein the counter substrate is disposed opposite to the array substrate, and the liquid crystal layer is located between the counter substrate and the array substrate. Attached Figure Description

[0062] The accompanying drawings, which are included to provide a further understanding of this disclosure and form part of this disclosure, illustrate exemplary embodiments of the present disclosure and are used to explain the disclosure, but do not constitute an undue limitation of the disclosure. In the drawings:

[0063] Figure 1This is a schematic diagram of the structure of an array substrate in related technologies;

[0064] Figure 2 This is a schematic diagram of the first structure of the array substrate provided in this disclosure;

[0065] Figure 3 This is a schematic diagram of the second structure of the array substrate provided in this disclosure;

[0066] Figure 4 This is a first schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0067] Figure 5 This is a schematic diagram of the third structure of the array substrate provided in this disclosure;

[0068] Figure 6 This is a schematic diagram of the fourth structure of the array substrate provided in this disclosure;

[0069] Figure 7 This is a second schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0070] Figure 8 for Figure 7 Schematic diagram of the middle touch signal line;

[0071] Figure 9 for Figure 7 A schematic diagram of the cross-section along the D1D2 direction;

[0072] Figure 10 This disclosure provides a schematic diagram of the structure of adjacent sub-pixel regions inside an array substrate;

[0073] Figure 11 for Figure 10 Schematic diagram of the middle touch signal line;

[0074] Figure 12 This is a schematic diagram of the layout of the touch sensing block provided in this disclosure;

[0075] Figure 13 This is a partial structural diagram of a touch sensing block provided in this disclosure;

[0076] Figure 14 This is a schematic diagram of the structure of the portion between adjacent touch sensing blocks along the first direction provided in this disclosure;

[0077] Figure 15 for Figure 14 A schematic diagram of the third common connection section and the grid lines;

[0078] Figure 16 This is a third schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0079] Figure 17 This is a fourth schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0080] Figure 18 This is a fifth schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0081] Figure 19 This is a sixth schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0082] Figure 20 This is a seventh schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0083] Figure 21 This is the eighth schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0084] Figure 22 This is a ninth schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0085] Figure 23 This is a tenth schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0086] Figure 24 This is the eleventh schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0087] Figure 25 This is the twelfth schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0088] Figure 26 This is a thirteenth schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0089] Figure 27 This is the fourteenth schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0090] Figure 28 This is the fifteenth schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0091] Figure 29 This is the sixteenth schematic diagram of a portion of the structure near the middle region of the array substrate provided in this disclosure;

[0092] Figure 30 This is the seventeenth schematic diagram of a partial structure near the middle region of the array substrate provided in this disclosure. Detailed Implementation

[0093] To further illustrate the array substrate and touch display device provided in the embodiments of this disclosure, a detailed description is provided below with reference to the accompanying drawings.

[0094] In-line touch panels offer significant advantages over external touch panels in terms of cost and stability. An in-line touch panel design places the touch electrodes within the panel itself, requiring a high level of pixel design precision. It is typically used in small to medium-sized panels in the TPC and MNT (Mobile Telephone & Display) industries, with touch sensor area ranging from 4mm to 6mm. For example, a 10-inch TPC panel typically has around 1500 touch sensor units. A 23.8-inch MNT panel has around 3600 touch sensor units. In contrast, TV and IWB (In-Wave) products often have tens of thousands of touch sensor units.

[0095] like Figure 1 As shown, the more touch sensing blocks there are in the panel, the more touch signal lines need to be set accordingly. However, the layout space in the panel is limited. When setting a large number of touch signal lines, the difficulty of laying out the touch signal lines and the difficulty of connecting the touch signal lines and the touch chip 200 will increase significantly.

[0096] Please see Figures 2-4 This disclosure provides an array substrate, including: a substrate, a first control unit 21, a second control unit 22, a plurality of touch sensing blocks 30 and a plurality of touch signal lines 40.

[0097] The first control unit 21 and the second control unit 22 are arranged opposite each other along a first direction.

[0098] The plurality of touch sensing blocks 30 are independent of each other and are arranged in an array on the substrate. The plurality of touch sensing blocks 30 are divided into a first group of electrode blocks 31 and a second group of electrode blocks 32, and the first group of electrode blocks 31 and the second group of electrode blocks 32 are arranged along a first direction.

[0099] The plurality of touch signal lines 40 are independent of each other, and at least a portion of each touch signal line 40 extends along the first direction. The plurality of touch signal lines 40 are divided into a first group of touch signal lines 41 and a second group of touch signal lines 42, and the first group of touch signal lines 41 and the second group of touch signal lines 42 are arranged along the first direction.

[0100] The first group of touch signal lines 41 includes multiple touch signal lines 40 arranged along a second direction, which intersects with the first direction. The multiple touch signal lines 40 in the first group of touch signal lines 41 are respectively coupled to multiple touch sensing blocks 30 in the first group of electrode blocks 31. One end of the multiple touch signal lines 40 in the first group of touch signal lines 41 is respectively coupled to the first control unit 21.

[0101] The second group of touch signal lines 42 includes multiple touch signal lines 40 arranged along the second direction. The multiple touch signal lines 40 in the second group of touch signal lines 42 are respectively coupled to multiple touch sensing blocks 30 in the second group of electrode blocks 32. One end of the multiple touch signal lines 40 in the second group of touch signal lines 42 is respectively coupled to the second control unit 22.

[0102] For example, the first control unit 21 includes at least one touch chip 200, and the second control unit 22 includes at least one touch chip 200.

[0103] For example, the touch chip 200 is used to provide touch signals and common electrode signals, etc.

[0104] For example, the touch chip 200 is bonded to the substrate.

[0105] For example, flip-chip technology is used to couple the touch chip 200 to the substrate.

[0106] For example, the plurality of touch sensing blocks 30 are arranged in an array on the substrate, and the plurality of touch sensing blocks 30 are spaced apart.

[0107] For example, the plurality of touch sensing blocks 30 are divided into a first group of electrode blocks 31 and a second group of electrode blocks 32. The first group of electrode blocks 31 includes a plurality of touch sensing blocks 30 arranged in an array, and the second group of electrode blocks 32 includes a plurality of touch sensing blocks 30 arranged in an array.

[0108] For example, the number of touch sensing blocks 30 included in the first group of electrode blocks 31 and the second group of electrode blocks 32 is the same.

[0109] For example, the touch sensing blocks 30 included in the first group of electrode blocks 31 and the second group of electrode blocks 32 are arranged in the same way.

[0110] For example, the first group of electrode blocks 31 and the second group of electrode blocks 32 are arranged symmetrically.

[0111] For example, the plurality of touch signal lines 40 are divided into a first group of touch signal lines 41 and a second group of touch signal lines 42, and the first group of touch signal lines 41 and the second group of touch signal lines 42 are arranged along the first direction.

[0112] For example, the first group of touch signal lines 41 and the second group of touch signal lines 42 include the same number of touch signal lines 40.

[0113] For example, the multiple touch signal lines 40 included in the first group of touch signals are of approximately the same length in the first direction, and the multiple touch signal lines 40 included in the second group of touch signals are of approximately the same length in the first direction.

[0114] For example, the multiple touch signal lines 40 included in the first group of touch signal lines 41 are arranged along the second direction, and the multiple touch signal lines 40 included in the second group of touch signal lines 42 are arranged along the second direction.

[0115] For example, the first direction includes a vertical direction, and the second direction includes a horizontal direction.

[0116] For example, the multiple touch signal lines 40 included in the first group of touch signal lines 41 correspond one-to-one with the multiple touch sensing blocks 30 in the first group of electrode blocks 31, and each touch signal line 40 included in the first group of touch signal lines 41 is coupled to the corresponding touch sensing block 30.

[0117] For example, the multiple touch signal lines 40 included in the first group of touch signal lines 41 correspond one-to-one with the multiple touch pins in the first control unit 21, and one end of each touch signal line 40 in the first group of touch signal lines 41 is coupled to the corresponding touch pin.

[0118] For example, the multiple touch signal lines 40 included in the second group of touch signal lines 42 correspond one-to-one with the multiple touch sensing blocks 30 in the second group of electrode blocks 32, and each touch signal line 40 included in the second group of touch signal lines 42 is coupled to the corresponding touch sensing block 30.

[0119] For example, the multiple touch signal lines 40 included in the second group of touch signal lines 42 correspond one-to-one with the multiple touch pins in the second control unit 22, and one end of each touch signal line 40 in the second group of touch signal lines 42 is coupled to the corresponding touch pin.

[0120] Each touch sensing block 30 is connected to the control unit via a touch signal line 40. The control unit is connected to the touch microprocessor (Touch MCU) so that the touch microprocessor (Touch MCU) can locate the coordinates of the touch and perform the next processing action.

[0121] For example, the multiple touch signal lines 40 included in the first group of touch signal lines 41 correspond one-to-one with the multiple touch signal lines 40 included in the second group of touch signal lines 42, and the corresponding two touch signal lines 40 are arranged opposite each other along the first direction.

[0122] For example, the ends of the multiple touch signal lines 40 included in the first group of touch signal lines 41 that are away from the first control unit 21 are flush.

[0123] For example, the ends of the multiple touch signal lines 40 included in the second group of touch signal lines 42 that are away from the second control unit 22 are flush.

[0124] It needs to be explained that, Figure 2 , Figure 3 , Figure 5 and Figure 6 The black dots represent vias used for electrical connections. The touch signal line 40 is electrically connected to the corresponding touch sensing block 30 through at least one via. For example, the touch signal line 40 is electrically connected to at least one first common connection portion in the corresponding touch sensing block 30 through a via. For example, the touch signal line 40 is electrically connected to at least one touch electrode 300 in the corresponding touch sensing block 30 through a via.

[0125] As can be seen from the specific structure of the array substrate described above, in the array substrate provided in this embodiment, a first control unit 21 and a second control unit 22 are arranged opposite to each other along a first direction, dividing the plurality of touch sensing blocks 30 into a first group of electrode blocks 31 and a second group of electrode blocks 32. At the same time, a first group of touch signal lines 41 and a second group of touch signal lines 42 are arranged, such that the first group of touch signal lines 41 are coupled to the first group of electrode blocks 31 and the first control unit 21 respectively, and the first control unit 21 controls the writing of signals to the first group of electrode blocks 31 or the receiving of signals fed back by the first group of electrode blocks 31 through the first group of touch signal lines 41; such that the second group of touch signal lines 42 are coupled to the second group of electrode blocks 32 and the second control unit 22 respectively, and the second control unit 22 controls the writing of signals to the second group of electrode blocks 32 or the receiving of signals fed back by the second group of electrode blocks 32 through the second group of touch signal lines 42.

[0126] Therefore, in the array substrate provided in this embodiment, the entire array substrate is divided into two parts arranged along the first direction and capable of controlling touch separately. In this way, when laying out the touch signal lines 40, the number of touch signal lines that play an effective connecting role can be increased. Each touch signal line 40 does not need to pass through the entire array substrate along the first direction, but only needs to pass through the area where its corresponding set of electrode blocks are located. This not only reduces the layout space required for the touch signal lines 40 in the array substrate and effectively reduces the layout difficulty of the touch signal lines 40 in the large-size array substrate, but also improves the impact on the aperture ratio of each sub-pixel in the array substrate when laying out the touch signal lines 40.

[0127] In addition, the above configuration divides the touch signal lines 40 in the entire array substrate into two groups, with each group of touch signal lines 40 connected to the corresponding control unit, realizing bilateral driving of the array substrate and thus greatly reducing the difficulty of connecting the touch signal lines 40 and the control unit.

[0128] like Figure 12 As shown, in some embodiments, each touch sensing block 30 includes a plurality of touch electrodes 300 that are electrically connected to each other and spaced apart from each other;

[0129] like Figure 4 As shown, the array substrate further includes:

[0130] Multiple grid lines 50, at least a portion of which extend along the second direction;

[0131] Multiple data lines 51, at least a portion of which extend along the first direction, intersect with the multiple gate lines 50 to define multiple sub-pixel regions;

[0132] Multiple pixel electrodes 52, each pixel electrode 52 corresponding to one of the multiple sub-pixel regions, and each pixel electrode 52 being located in the corresponding sub-pixel region.

[0133] For example, each touch sensing block 30 includes a plurality of touch electrodes 300 arranged in an array, with adjacent touch electrodes 300 spaced apart, and the plurality of touch electrodes 300 included in each touch sensing block 30 are electrically connected to each other.

[0134] For example, the touch electrode 300 is reused as a common electrode in the array substrate. When the array substrate is applied to a display device, the touch electrode 300 serves as a common electrode when the display device is displaying normally; when the display device implements touch function, the control unit controls touch scanning, and the touch electrode 300 serves as a touch sensing sensor.

[0135] It is worth noting that the touch sensing block in the array substrate is not a single electrode layer covering a continuous area of ​​the array substrate, but is composed of multiple independent common electrodes. For example, the common electrodes correspond one-to-one with the sub-pixels in the array substrate.

[0136] For example, the plurality of gate lines 50 are arranged along the first direction, and at least a portion of each gate line 50 extends along the second direction.

[0137] For example, the plurality of data lines 51 are arranged along the second direction, and at least a portion of each data line 51 extends along the first direction.

[0138] For example, the multiple data lines 51 and the multiple gate lines 50 are intersected to define multiple sub-pixel regions that are distributed in an array.

[0139] For example, the pixel electrode 52 is made of a transparent conductive material, such as indium tin oxide.

[0140] For example, the pixel electrode 52 receives the data signal provided by the data line 51, and each sub-pixel realizes the display function under the joint control of the corresponding pixel electrode 52 and the common electrode.

[0141] For example, the array substrate further includes a plurality of switching elements 53, which correspond one-to-one with the plurality of pixel electrodes 52. For example, the switching element 53 is a thin film transistor (TFT). The switching element 53 includes a first electrode, a second electrode, and a control electrode. The control electrode is part of the gate line. The second electrode of the switching element 53 is coupled to the corresponding pixel electrode 52.

[0142] For example, the plurality of switching elements 53 are arranged in an array, which can be divided into multiple rows of switching elements 53 arranged along the first direction, or into multiple columns of switching elements 53 arranged along the second direction. The plurality of gate lines 50 correspond one-to-one with the multiple rows of switching elements 53, and each gate line 50 is coupled to the control terminal of its corresponding row of switching elements 53, for controlling the conduction and cutoff of the coupled row of switching elements 53.

[0143] The coupling methods between the multiple data lines 51 and the multiple columns of switching elements 53 are varied. For example, each data line 51 corresponds one-to-one with a column of switching elements 53, with each data line 51 coupled to the first pole of each switching element 53 in its corresponding column, for writing data signals to the first pole of each switching element 53. For example, each data line 51 is coupled to two adjacent columns of switching elements 53 on either side of it, with the switching elements 53 connected to the data line 51 alternately located on both sides of the data line 51. This structure allows a row of data lines 51 arranged along the first direction to alternately receive positive and negative polarity signals during driving, and also allows a column of pixel electrodes 52 to alternately receive positive and negative polarity signals.

[0144] It is worth noting that in the above array substrate, since there are a large number of touch sensing blocks 30, and each touch sensing block 30 needs to be connected to a touch signal line 40, the problem of the layout of the touch signal line 40 and its connection with the touch chip 200 is overcome by setting up double-sided bonding pads, that is, by double-sided driving.

[0145] like Figure 4 and Figure 5 As shown, when using the array substrate with the above structure, taking the touch chip 200 on each side of the PAD driving the touch sensing block 30 of half of the screen as an example, in order to ensure that the load of each area in the array substrate is consistent, the first group of touch signal lines 41 and the second group of touch signal lines 42 will both extend to the middle area of ​​the array substrate, so that the distance between the two touch signal lines 40 facing each other along the first direction is relatively close, generally to ensure that no short occurs. For example, the distance L0 is set to be greater than or equal to 4μm. At the same time, the touch signal lines 40 are generally relatively thin, with a common width between 4μm and 10μm.

[0146] During the experiment, the inventors discovered that in the array substrate provided in the above embodiment, the touch signal lines 40 that drive the half screen are directly opposite each other along the first direction, forming directly opposite tips in the middle area, making the middle area prone to electrostatic discharge (ESD), causing the touch signal lines 40 to burn out and causing the two opposing touch signal lines 40 to short circuit.

[0147] like Figures 6-8 As shown, in some embodiments, two touch signal lines 40 opposite each other along the first direction are provided with an electrostatic protection distance in the first direction.

[0148] For example, of the two touch signal lines 40 that are opposite each other along the first direction, one touch signal line 40 belongs to the first group of touch signal lines 41, and the other touch signal line 40 belongs to the second group of touch signal lines 42.

[0149] For example, the electrostatic discharge (ESD) protection distance is greater than or equal to 10 micrometers. For example, the ESD protection distance is greater than or equal to 20 micrometers. Specifically, the ESD protection distance can be 10 micrometers, 12 micrometers, 15 micrometers, 18 micrometers, 20 micrometers, or 22 micrometers.

[0150] The above configuration increases the spacing between the two touch signal lines 40 that are opposite each other along the first direction, effectively improving the ESD defects that occur between the two touch signal lines 40 that are opposite each other along the first direction, while ensuring the display and touch performance when the array substrate is used in a display device.

[0151] In some embodiments, the array substrate further includes: a plurality of pixel electrodes 52; the electrostatic protection distance L1 satisfies: L1=k*H; H represents the maximum length of the pixel electrode 52 in the first direction, 2%≤k≤6%.

[0152] The electrostatic protection distance is between 2% H and 6% H, and may include 2% H, 3% H, 4% H, 5% H and 6% H.

[0153] When the electrostatic discharge protection distance is set to meet the above conditions, the spacing between the two touch signal lines 40 that are opposite each other along the first direction is increased, which effectively improves the ESD defects that occur between the two touch signal lines 40 that are opposite each other along the first direction, and at the same time ensures the display and touch performance when the array substrate is used in a display device.

[0154] like Figures 7-9 , Figure 11 As shown, in some embodiments, at least a portion of the touch signal line 40 includes a plurality of straight edges 401 and a plurality of curved edges 402, the straight edges 401 and the curved edges 402 being alternately arranged; in a touch signal line 40, at least a portion of the curved edges 402 overlaps with the orthographic projection of the pixel electrode 52 on the substrate 10.

[0155] For example, the multiple straight edges 401 and multiple curved edges 402 of the same touch signal line 40 are formed into an integral structure.

[0156] For example, the touch signal line 40 and the data line 51 are made of the same layer and material.

[0157] For example, the touch signal line 40 and the data line 51 are arranged on different layers.

[0158] For example, the touch signal line 40 is made of metal.

[0159] For example, the straight edge 401 extends along the first direction.

[0160] For example, the straight edge 401 is parallel to the data line 51.

[0161] For example, the distance between the orthographic projection of the bent portion on the substrate 10 and the orthographic projection of the adjacent data line 51 on the substrate 10 is greater than the distance between the orthographic projection of the straight edge portion 401 on the substrate 10 and the orthographic projection of the adjacent data line 51 on the substrate 10.

[0162] For example, in the same touch signal line 40, at least a portion of the curved portion 402 overlaps with the orthographic projection of the pixel electrode 52 on the substrate 10.

[0163] For example, the orthographic projection of the bent portion on the substrate 10 does not overlap with the orthographic projection of the switching element 53 on the substrate 10.

[0164] The above arrangement helps to reduce the layout difficulty of the touch signal line 40 and reduce the parasitic capacitance formed between the touch signal line 40 and other structures in the array substrate.

[0165] like Figure 7 and Figure 8 As shown, in some embodiments, the first group of touch signal lines 41 includes at least one first target touch signal line, and the end of the at least one first target touch signal line near the second group of touch signal lines 42 includes a first target bend 4021; the second group of touch signal lines 42 includes at least one second target touch signal line, and the end of the at least one second target touch signal line near the first group of touch signal lines 41 includes a second target bend 4022; a first protection distance L2 is provided between the first target bend 4021 and the second target bend 4022, and the first protection distance L2 is greater than or equal to the electrostatic protection distance L1.

[0166] For example, the first group of touch signal lines 41 includes multiple first target touch signal lines, and the second group of touch signal lines 42 includes multiple second target touch signal lines. The first target touch signal lines and the second target touch signal lines correspond one-to-one, and the corresponding first target touch signal lines and second target touch signal lines are arranged opposite each other along the first direction.

[0167] In the corresponding first target touch signal line and second target touch signal line, the end of the first target touch signal line near the second target touch signal line includes a first target bend 4021, and the end of the second target touch signal line near the first target touch signal line includes a second target bend 4022. The first target bend 4021 and the second target bend 4022 are directly opposite each other along the first direction, and the first target bend 4021 and the second target bend 4022 have the first protection distance L2 along the first direction.

[0168] For example, by removing the portion of the first target bend 4021 that is close to the second target bend 4022, the first target bend 4021 and the second target bend 4022 are provided with the first protection distance L2.

[0169] The above configuration increases the spacing between the two touch signal lines 40 that are opposite each other along the first direction, effectively improving the ESD defects that occur between the two touch signal lines 40 that are opposite each other along the first direction, while ensuring the display and touch performance when the array substrate is used in a display device.

[0170] It is worth noting that in the array substrate provided in the above embodiment, in one touch signal line 40, at least a portion of the bent portion 402 overlaps with the orthographic projection of the pixel electrode 52 on the substrate 10, generating a small overlap capacitance, which is part of the pixel storage capacitance Cst. Because the spacing between the two touch signal lines 40 opposite each other along the first direction is increased in order to overcome the aforementioned ESD problem, a large increase in this distance can cause the overlap capacitance formed by the pixel electrode 52 near the middle region to be inconsistent with other locations, easily leading to display defects.

[0171] like Figure 7 and Figure 8 As shown, in some embodiments, the orthographic projection of the first target bend 4021 on the substrate 10 is at least partially overlapped with the orthographic projection of the pixel electrode 52 on the substrate 10; the first target bend 4021 includes an extension 4023, which extends in a direction away from the second set of touch signal lines 42 (i.e. away from the second target bend 4022).

[0172] For example, the extension 4023 is formed as an integral structure with the first target curved portion 4021.

[0173] For example, the extension 4023 extends along the second direction.

[0174] For example, the orthographic projection of the extension 4023 on the substrate 10 overlaps with the orthographic projection of the pixel electrode 52 on the substrate 10.

[0175] It should be noted that the size of the extension 4023 can be set according to actual needs, and it should be able to ensure that the Cst size of the sub-pixel at this location is consistent with the Cst size of the sub-pixels at other locations.

[0176] The above configuration ensures an electrostatic protection distance L1 between the first target touch signal line and the second target touch signal line, while compensating for the overlap area between the first target curved portion 4021 and the pixel electrode 52. This ensures that the Cst size of the sub-pixel at this location is consistent with the Cst size of sub-pixels at other locations, reducing the risk of display abnormalities.

[0177] In addition, the extension 4023 is extended away from the second set of touch signal lines 42, so that the end of the touch signal line (i.e. the end of the extension 4023) is away from the second target bend 4022, so as to avoid electrostatic breakdown short circuit caused by the end relative to the other.

[0178] It is worth noting that, for example Figure 8 As shown, the portion of the first target curved portion 4021 that contacts the extension portion 4023 includes a bending portion X. By setting the bending portion X, not only can the first target curved portion 4021 be far away from the second pole of the switching element 53, avoiding a short circuit between the first target curved portion 4021 and the second pole of the switching element 53, but the first target curved portion 4021 is also closer to the gate line, which is beneficial to improving the pixel aperture ratio.

[0179] like Figure 7 and Figure 8 As shown, in some implementations, the first group of touch signal lines 41 includes at least one third target touch signal line, and the end of the at least one third target touch signal line near the second group of touch signal lines 42 includes a first target straight edge portion 4011; the second group of touch signal lines 42 includes at least one fourth target touch signal line, and the end of the at least one fourth target touch signal line near the first group of touch signal lines 41 includes a second target straight edge portion 4012; a second protection distance L3 is provided between the first target straight edge portion 4011 and the second target straight edge portion 4012, and the second protection distance L3 is greater than or equal to the electrostatic protection distance L1.

[0180] For example, the first group of touch signal lines 41 includes multiple third target touch signal lines, and the second group of touch signal lines 42 includes multiple fourth target touch signal lines. The third target touch signal lines and the fourth target touch signal lines correspond one-to-one, and the corresponding third target touch signal lines and the fourth target touch signal lines are arranged opposite to each other along the first direction.

[0181] In the corresponding third target touch signal line and the fourth target touch signal line, the end of the third target touch signal line near the fourth target touch signal line includes a first target straight edge portion 4011, and the end of the fourth target touch signal line near the third target touch signal line includes a second target straight edge portion 4012. The first target straight edge portion 4011 and the second target straight edge portion 4012 are directly opposite each other along the first direction, and the first target straight edge portion 4011 and the second target straight edge portion 4012 have a second protection distance L3 along the first direction.

[0182] The above configuration increases the spacing between the two touch signal lines 40 that are opposite each other along the first direction, effectively improving the ESD defects that occur between the two touch signal lines 40 that are opposite each other along the first direction, while ensuring the display and touch performance when the array substrate is used in a display device.

[0183] In some embodiments, the second protection distance L3 is greater than the first protection distance L2.

[0184] It is worth noting that since the first target straight edge 4011 and the second target straight edge 4012 do not affect the pixel storage capacitor Cst, and the first target straight edge 4011 and the second target straight edge 4012 have their tips facing each other in the middle region, the second protection distance L3 can be appropriately increased. For example, the second protection distance L3 is set to be greater than 20 micrometers, thereby better reducing the risk of ESD damage to the first target straight edge 4011 and the second target straight edge 4012 in the middle region.

[0185] Since the first target bend 4021 and the second target bend 4022 do not have their tips facing each other in the middle region, the first protection distance L2 can be set to a relatively small value, which can also reduce the risk of ESD failure.

[0186] like Figure 16 As shown, in some embodiments, the first target curved portion 4021 includes an extension portion 4023, at least a portion of the second target curved portion 4022 extends along the second direction, at least a portion of the first target straight edge portion 4011 extends along the second direction, and at least a portion of the second target straight edge portion 4012 extends along the second direction.

[0187] like Figure 17 As shown, in some embodiments, the first target curved portion 4021 includes an extension portion 4023, at least a portion of the second target curved portion 4022 extends along the second direction, at least a portion of the first target straight edge portion 4011 extends along the first direction, and at least a portion of the second target straight edge portion 4012 extends along the second direction.

[0188] like Figure 18 As shown, in some embodiments, the first target curved portion 4021 includes an extension portion 4023, at least a portion of the second target curved portion 4022 extends along the second direction, at least a portion of the first target straight edge portion 4011 extends along the second direction, and at least a portion of the second target straight edge portion 4012 extends along the first direction.

[0189] like Figure 19 As shown, in some embodiments, the first target curved portion 4021 includes an extension portion 4023, at least a portion of the second target curved portion 4022 extends along the second direction, at least a portion of the first target straight edge portion 4011 extends along the first direction, and at least a portion of the second target straight edge portion 4012 extends along the first direction.

[0190] like Figure 20 As shown, in some embodiments, the first target curved portion 4021 includes an extension portion 4023, at least a portion of the second target curved portion 4022 extends along the first direction, at least a portion of the first target straight edge portion 4011 extends along the second direction, and at least a portion of the second target straight edge portion 4012 extends along the second direction.

[0191] like Figure 21 As shown, in some embodiments, the first target curved portion 4021 includes an extension portion 4023, at least a portion of the second target curved portion 4022 extends along the first direction, at least a portion of the first target straight edge portion 4011 extends along the first direction, and at least a portion of the second target straight edge portion 4012 extends along the second direction.

[0192] like Figure 22 As shown, in some embodiments, the first target curved portion 4021 includes an extension portion 4023, at least a portion of the second target curved portion 4022 extends along the first direction, at least a portion of the first target straight edge portion 4011 extends along the second direction, and at least a portion of the second target straight edge portion 4012 extends along the first direction.

[0193] It is worth noting that the array substrates provided in the above embodiments include ADS mode array substrates and IPS mode array substrates, etc.

[0194] like Figures 23-30 As shown, in the IPS mode array substrate, the pixel electrode 52 and the common electrode 70 in each sub-pixel are formed as interdigitated structures, and the common electrodes 70 in different sub-pixels can be coupled through a common electrode line 71. The pixel electrode 52 and the common electrode 70 can be fabricated in the same layer using a metal material.

[0195] like Figure 23 As shown, in some embodiments, among the touch signal lines 40 that are opposite each other along the first direction, the ends of each touch signal line 40 near the intermediate region extend along the first direction.

[0196] like Figures 24-29 As shown, in some embodiments, among the touch signal lines 40 opposite each other along the first direction, at least one touch signal line 40 extends along the second direction near the end of the intermediate region.

[0197] like Figure 30 As shown, in some embodiments, among the touch signal lines 40 that are opposite each other along the first direction, the ends of each touch signal line 40 near the intermediate region extend along the second direction.

[0198] It needs to be explained that, Figures 16 to 30 The protection distances L4 and L5 are both greater than or equal to the electrostatic protection distance.

[0199] like Figure 4 As shown, in some embodiments, the array substrate further includes:

[0200] Multiple data lines 51, at least a portion of which extend along a first direction;

[0201] Multiple switching elements 53, each of which is located between an adjacent bend 402 and a data line 51.

[0202] For example, the switching element 53 includes a thin-film transistor, the gate of which is coupled to a corresponding gate line 50, the first electrode of which is coupled to a corresponding data line 51, and the second electrode of which is coupled to a corresponding pixel electrode 52.

[0203] Under the control of the corresponding gate line 50, the thin-film transistor is turned on, and the data signal provided by the data line 51 coupled to it is written into the corresponding pixel electrode 52.

[0204] like Figure 6As shown, in some embodiments, the number of touch sensing blocks 30 included in the first group of electrode blocks 31 and the second group of electrode blocks 32 is equal; the number of touch signal lines 40 included in the first group of touch signal lines and the second group of touch signal lines is equal.

[0205] In some embodiments, the number of touch sensing blocks 30 included in the first group of electrode blocks 31 is greater than the number of touch sensing blocks 30 included in the second group of electrode blocks 32; the number of touch signal lines 40 included in the first group of touch signal lines 41 is greater than the number of touch signal lines 40 included in the second group of touch signal lines 42.

[0206] like Figure 4 As shown, in some embodiments, the array substrate further includes a plurality of data lines 51, at least a portion of which extend along a first direction; each touch sensing block 30 includes a plurality of touch electrodes 300 electrically connected to and spaced apart from each other.

[0207] At least one of the first group of touch signal lines 41 and the second group of touch signal lines 42 can be divided into multiple sub-touch signal line groups 43. Each sub-touch signal line group 43 includes two adjacent touch signal lines 40 along the second direction. The orthographic projections of the two adjacent touch signal lines 40 on the substrate 10 are respectively located on both sides of the orthographic projection of the same data line 51 on the substrate 10. The orthographic projections of the two adjacent touch signal lines 40 and the orthographic projection of the same data line 51 both include the portion located between the orthographic projections of adjacent touch electrodes 300 on the substrate.

[0208] For example, the plurality of sub-touch signal line groups 43 are arranged along the second direction.

[0209] For example, the sub-touch signal line group 43 includes at least one of the touch signal lines 40 arranged along the second direction.

[0210] For example, each sub-touch signal line group 43 includes two adjacent touch signal lines 40 along the second direction.

[0211] For example, each touch signal line 40 can only belong to one sub-touch signal line group 43.

[0212] For example, the plurality of sub-touch signal line groups 43 correspond one-to-one with the plurality of data lines 51, and the orthographic projections of two adjacent touch signal lines 40 on the substrate 10 are respectively located on both sides of the orthographic projections of the corresponding data lines 51 on the substrate 10.

[0213] The above-mentioned orthographic projections of the two adjacent touch signal lines 40 and the same data line 51 both include the portion between the orthographic projections of the adjacent touch electrodes 300 on the substrate, which effectively reduces the occlusion of the pixel aperture area by the touch signal lines 40, thereby ensuring the pixel aperture ratio.

[0214] In some embodiments, the layers on which the two adjacent touch signal lines 40 are located are different from the layers on which the same data line 51 is located.

[0215] The above configuration helps to avoid short circuits between the touch signal line 40 and the data line 51, thus ensuring the reliability of the array substrate.

[0216] Furthermore, the above-mentioned arrangement can reduce the distance between the orthographic projection of the touch signal line 40 on the substrate 10 and the orthographic projection of the data line 51 on the substrate 10, which helps to reduce the layout difficulty of the touch signal line 40 and further improve the pixel aperture ratio.

[0217] like Figure 10 and Figure 11 As shown, in some embodiments, the array substrate further includes a plurality of gate lines 50, at least a portion of which extends along the second direction; the straight edge portion 401 is provided to include a first sub-part 4013 and a second sub-part 4014 coupled together, and in a direction parallel to the substrate 10 and perpendicular to the extension direction of the touch signal line 40, the width b of the first sub-part 4013 is greater than the width a of the second sub-part 4014; the orthographic projection of the first sub-part 4013 onto the substrate 10 covers the gate line 4014. The orthographic projection of at least a portion of the side surface of the line 50 onto the substrate 10; and / or, at least a portion of the curved portion 402 includes a coupled third sub-portion 4024 and a fourth sub-portion 4025, wherein, in a direction parallel to the substrate 10 and perpendicular to the extension direction of the touch signal line 40, the width b of the third sub-portion 4024 is greater than the width a of the fourth sub-portion 4025; the orthographic projection of the third sub-portion 4024 onto the substrate 10 covers the orthographic projection of at least a portion of the side surface of the gate line 50 onto the substrate 10.

[0218] For example, the first sub-part 4013 and the second sub-part 4014 are formed as an integral structure.

[0219] For example, the third sub-part 4024 and the fourth sub-part 4025 are formed as an integral structure.

[0220] For example, the touch signal line 40 is located on the side of the gate line 50 facing away from the substrate 10, and an insulating layer is provided between the touch signal line 40 and the gate line 50.

[0221] The above configuration widens the portion of the touch signal line 40 that overlaps with the side of the gate line 50 (i.e. the side of the gate line 50 that forms a step), thereby reducing the risk of breakage of the portion of the touch signal line 40 that overlaps with the side of the gate line 50.

[0222] It should be noted that the design standard for line width b is as follows: (1) It is related to the thickness of the gate line 50 in the direction perpendicular to the substrate 10. The thicker the gate line 50, the higher the risk of breakage of the overlapping part of the touch signal line 40 and the gate line 50. In order to reduce the risk of breakage of the touch signal line 40, the value of a will be set relatively large, generally between 6μm and 20μm. (2) An overlapping capacitance is formed between the touch signal line 40 and the gate line 50. In order to avoid the overlapping capacitance being too large, the value of b should be as small as possible after satisfying condition (1).

[0223] The design standards for line width a are: (1) Ensure that the resistance of the touch signal line 40 meets the requirements. The larger the line width a of the touch signal line 40, the smaller the resistance of the touch signal line 40; (2) Reduce the lateral field capacitance between the touch signal line 40 and other conductive structures. The lateral field capacitance is related to the width of the touch signal line 40 and the distance between the touch signal line 40 and other conductive structures. The smaller the width of the touch signal line 40 and the greater the distance between the touch signal line 40 and other conductive structures, the smaller the lateral field capacitance between the touch signal line 40 and other conductive structures.

[0224] The above-mentioned configuration, where the width b of the first sub-part 4013 is greater than the width a of the second sub-part 4014, and the width b of the third sub-part 4024 is greater than the width a of the fourth sub-part 4025, reduces the line width of part of the touch signal line 40, shortens the horizontal distance between the touch line and other conductive structures, and achieves a smaller lateral field capacitance formed by the touch signal line 40 and other conductive structures (including gate line 50, data line 51, pixel electrode 52, and touch electrode 300, etc.) while meeting the resistance requirements of the touch signal line 40.

[0225] like Figure 10 and Figure 11 As shown, in some embodiments, the gate line 50 includes a plurality of gate patterns 501 and a plurality of gate connecting portions 502; the gate patterns 501 and the gate connecting portions 502 are alternately arranged along the second direction, and adjacent gate patterns 501 are coupled to each other through the gate connecting portions 502; along the first direction, the width of the gate pattern 501 is greater than the width of the gate connecting portion 502.

[0226] The orthographic projection of the first sub-part 4013 on the base 10 covers the orthographic projection of at least a portion of the side surface of the gate connection part 502 on the base 10.

[0227] The orthographic projection of the third sub-part 4024 onto the substrate 10 covers the orthographic projection of at least a portion of the side surface of the grating pattern 501 onto the substrate 10.

[0228] For example, the multiple gate patterns 501 and multiple gate connectors 502 included in the same gate line 50 are formed into an integral structure.

[0229] For example, the gate pattern 501 is multiplexed as the gate of the switching element 53.

[0230] The above-mentioned arrangement at least partially covers the orthographic projection of the first sub-part 4013 on the substrate 10, which covers at least part of the orthographic projection of the side surface of the gate connection portion 502 on the substrate 10. This not only makes it less likely for the first sub-part 4013 to break in the area where it overlaps with at least part of the side surface of the gate connection portion 502, but also helps to reduce the overlap capacitance formed between the first sub-part 4013 and the gate line 50.

[0231] Similarly, the above-described arrangement at least partially covers the orthographic projection of the third sub-part 4024 on the base 10, covering at least a portion of the orthographic projection of the side surface of the gate pattern 501 on the base 10, making the third sub-part 4024 less prone to breakage in the area overlapping with at least a portion of the side surface of the gate pattern 501.

[0232] In the above configuration along the first direction, the width of the gate pattern 501 is greater than the width of the gate connection portion 502, which effectively reduces the resistance of the gate line 50.

[0233] In some embodiments, the first sub-part 4013 extends along the first direction, and the gate connection 502 extends along a third direction, wherein the angle between the third direction and the first direction is less than 90 degrees.

[0234] The above arrangement increases the contact area between the first sub-part 4013 and the step created by the gate connection part 502, thereby effectively reducing the risk of the first sub-part 4013 breaking.

[0235] In some embodiments, at least a portion of the gate pattern 501 includes a solid area 5011 and a first cutout area 5012, wherein the orthographic projection of the solid area 5011 on the substrate 10 at least partially overlaps with the orthographic projection of the third sub-part 4024 on the substrate 10; and the orthographic projection of the first cutout area 5012 on the substrate 10 at least partially overlaps with the orthographic projection of the fourth sub-part 4025 on the substrate 10.

[0236] The above arrangement makes it less likely for the portion of the third sub-part 4024 that overlaps with the solid region 5011 to break.

[0237] The above-mentioned arrangement ensures that the orthographic projection of the first hollow area 5012 on the substrate 10 and the orthographic projection of the fourth sub-part 4025 on the substrate 10 at least partially overlap, effectively reducing the coupling capacitance formed between the touch signal line 40 and the gate line 50.

[0238] like Figure 12 and Figure 13 As shown, in some embodiments, each touch sensing block 30 includes a plurality of touch electrodes 300 electrically connected to and spaced apart from each other; the plurality of touch electrodes 300 are arranged in an array, and the plurality of touch electrodes 300 are divided into multiple rows of touch electrodes 300 arranged along the first direction, and each row of touch electrodes 300 includes a plurality of touch electrodes 300 arranged along the second direction.

[0239] Each touch sensing block 30 also includes:

[0240] Multiple first common connection portions 301, each of which corresponds to one of the multiple rows of touch electrodes 300, and each first common connection portion 301 is coupled to its corresponding row of touch electrodes 300.

[0241] Multiple second common connection portions 302 are provided, and adjacent rows of touch electrodes 300 are coupled through at least one second common connection portion 302.

[0242] For example, the plurality of touch electrodes 300 are independently spaced apart, and the plurality of touch electrodes 300 correspond one-to-one with a plurality of sub-pixel regions in the array substrate, with at least a portion of each touch electrode 300 located in the corresponding sub-pixel region.

[0243] For example, at least a portion of the first common connection portion 301 extends along the second direction, and the first common connection portion 301 is capable of electrically connecting each touch electrode 300 in a row of touch electrodes 300 corresponding to it together.

[0244] For example, the first common connection portion 301 is substantially parallel to the gate line 50.

[0245] For example, in the same touch sensing block 30, adjacent rows of touch electrodes 300 are coupled together by a plurality of second common connection portions 302, and the plurality of second common connection portions 302 are spaced apart.

[0246] For example, in a plurality of second common connection portions 302, there is a gap of at least three touch electrodes 300 width between each two adjacent second common connection portions 302.

[0247] In the array substrate provided in the above embodiments, multiple spaced touch electrodes 300 are electrically connected together through the first common connection portion 301 and the second common connection portion 302 to form a touch sensing block 30. Each touch electrode 300 can be time-division multiplexed, serving as a common electrode during display and for implementing touch functions during touch.

[0248] In some embodiments, the array substrate further includes a plurality of gate lines 50, at least a portion of which extend along the second direction; the first common connection portion 301 is disposed in the same layer and of the same material as the gate lines 50.

[0249] The above configuration allows the first common connection portion 301 and the gate line 50 to be formed in the same patterning process, thereby effectively simplifying the manufacturing process of the array substrate and reducing the manufacturing cost of the array substrate.

[0250] In some embodiments, the first common connection portion 301 is directly attached to the surface of its corresponding row of touch electrodes 300 to achieve the connection between the first common connection portion and the touch electrodes.

[0251] For example, there is no insulating layer between the first common connection portion 301 and the touch electrode 300. After the touch electrode 300 is fabricated, the first common connection portion 301 can be fabricated directly and directly attached to the surface of its corresponding row of touch electrodes 300.

[0252] For example, the touch electrode 300 is made of a transparent conductive material, such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0253] like Figure 9 As shown, exemplarily, the array substrate is fabricated according to the following fabrication process: First, a first indium tin oxide layer (i.e., 1ITO layer) is fabricated; then, a first gate metal layer is fabricated on the side of the 1ITO layer facing away from the substrate 10; then, a gate insulating layer GI is fabricated on the side of the first gate metal layer facing away from the substrate 10; then, an active layer is fabricated on the side of the gate insulating layer GI facing away from the substrate 10; then, a source / drain metal layer is fabricated on the side of the active layer facing away from the substrate 10; then, a first passivation layer PVX1 is fabricated on the side of the source / drain metal layer facing away from the substrate 10; then, a touch signal line 40 layer is fabricated on the side of the first passivation layer PVX1 facing away from the substrate 10; then, a second passivation layer PVX2 is fabricated on the side of the touch signal line 40 layer facing away from the substrate 10; finally, a second indium tin oxide layer (i.e., 2ITO layer) is fabricated on the side of the second passivation layer PVX2 facing away from the substrate 10.

[0254] It needs to be explained that, Figure 9 The diagram also illustrates the active pattern 530, the first pole 531, and the second pole 532 included in the switching element 53. Figure 7 The dashed box at the switching element 53 represents the active graphic 530.

[0255] For example, the 1ITO layer includes a touch electrode 300, the first gate metal layer includes a gate line 50 and a first common connection portion 301, the active layer includes an active pattern of the switching element 53, the source-drain metal layer includes a data line 51, and a first electrode and a second electrode of the switching element 53, the touch signal line 40 layer includes a touch signal line 40, and the 2ITO layer includes a pixel electrode 52.

[0256] It should be noted that the pixel electrode 52 can also be made using a 1ITO layer and the touch electrode 300 can be made using a 2ITO layer. In this case, the other structures in the array substrate can be changed accordingly.

[0257] In some embodiments, a gap region is provided between adjacent first common connection portions 301 along the second direction. The width of the gap region in the second direction is greater than or equal to 5 micrometers. The exposure machine resolution can achieve a precision of 5 micrometers. The first common connection portions 301 along the second direction are all in small segments, which will not accumulate a large amount of charge and cause ESD. Therefore, 5 micrometers can achieve the effect of preventing short circuits between the two.

[0258] For example, in the adjacent touch sensing blocks 30 along the second direction, there is a gap between the first common connection portion 301 in each touch sensing block 30.

[0259] The above arrangement results in a greater distance between adjacent first common connection portions 301 along the second direction, thereby effectively preventing short circuits between adjacent first common connection portions 301 along the second direction.

[0260] In some embodiments, the array substrate further includes a plurality of data lines 51, at least a portion of which extend along a first direction; of two adjacent first common connection portions 301 disposed along a second direction, at least one of the first common connection portions 301 having an orthographic projection on the substrate 10 of one end of which faces the interval region, having a first overlapping region with the orthographic projection of the data line 51 on the substrate 10, wherein the width of the first overlapping region along the second direction is equal to the width of the data line.

[0261] For example, in the array substrate, the overlap area formed between each of the data lines 51 and the first common connection portion 301 is the same.

[0262] The above configuration ensures that the parasitic capacitance formed by each data line 51 and the first common connection portion 301 is consistent, thus avoiding uneven charging rates in sub-pixels.

[0263] In some embodiments, the array substrate further includes a plurality of data lines 51, at least a portion of which extend along a first direction; the second common connection portion 302 is disposed in the same layer and of the same material as the data lines 51.

[0264] The above configuration allows the second common connection portion 302 and the data line 51 to be formed in the same patterning process, thereby effectively simplifying the manufacturing process of the array substrate and reducing the manufacturing cost of the array substrate.

[0265] In some embodiments, the second common connection portion 302 and the touch signal line 40 are disposed on the same layer and made of the same material, and the second common connection portion 302 and the touch signal line 40 can be formed in the same patterning process.

[0266] like Figure 13 As shown, in some embodiments, along the first direction, the first common connection portion 301 is located on the first side of its corresponding row of touch electrodes 300.

[0267] At least a portion of the second common connection portion 302 extends along the first direction, and a first end of the second common connection portion 302 is coupled to a first common connection portion 301 that is coupled to one row of touch electrodes 300 in the two adjacent rows of touch electrodes 300, and a second end of the second common connection portion 302 is coupled to at least one touch electrode 300 in the other row of touch electrodes 300 in the two adjacent rows of touch electrodes 300.

[0268] For example, the orthographic projection of the first end of the second common connection portion 302 on the substrate 10 overlaps with the orthographic projection of the first common connection portion 301 coupled to one row of touch electrodes 300 in the two adjacent rows of touch electrodes 300 on the substrate 10. The first end of the second common connection portion 302 and the first common connection portion 301 coupled to one row of touch electrodes 300 in the two adjacent rows of touch electrodes 300 are coupled at the overlap through a first via 63 and a first connection portion 64. For example, the first connection portion 64 is made of 2ITO.

[0269] For example, the first connection portion 64 couples the first end of the second common connection portion 302 to the first common connection portion 301 that is coupled to one row of touch electrodes 300 in the two adjacent rows of touch electrodes 300 through the first through hole 63.

[0270] For example, the orthographic projection of the second end of the second common connection portion 302 on the substrate 10 overlaps with the orthographic projection of at least one touch electrode 300 in another row of the two adjacent rows of touch electrodes 300 on the substrate 10. The second end of the second common connection portion 302 and at least one touch electrode 300 in another row of the two adjacent rows of touch electrodes 300 are coupled at the overlap location through a second via 61 and a second connection portion 62. For example, the second connection portion 62 is made of 2ITO.

[0271] For example, the second connection portion 62 couples the second end of the second common connection portion 302 to at least one touch electrode 300 in another row of the two adjacent rows of touch electrodes 300 through the second through hole 61.

[0272] For example, the first via 63 and the second via 61 are formed in the same patterning process, and the first connecting portion 64 and the second connecting portion 62 are formed in the same patterning process.

[0273] In the array substrate provided in the above embodiments, two adjacent rows of touch electrodes 300 belonging to the same touch sensing block 30 can be electrically connected together through the second common connection portion 302.

[0274] like Figure 13 As shown, in some embodiments, the array substrate further includes a plurality of gate lines 50, at least a portion of which extend along the second direction; at least a portion of the gate lines 50 are provided with a second cutout area 5013, and the orthographic projection of the second common connection portion 302 on the substrate 10 overlaps with the orthographic projection of the second cutout area 5013 on the substrate 10.

[0275] The above configuration effectively reduces the overlap area between the second common connection portion 302 and the gate line 50, and reduces the parasitic capacitance formed between the second common connection portion 302 and the gate line 50.

[0276] like Figure 14 and Figure 15 As shown, in some embodiments, each touch sensing block 30 includes a plurality of touch electrodes 300 electrically connected to and spaced apart from each other; the array substrate further includes:

[0277] Multiple grid lines 50, at least a portion of which extend along the second direction;

[0278] A plurality of third common connection portions 54 are provided between adjacent touch sensing blocks 30 along the first direction. At least one of the third common connection portions 54 extends along the first direction. The first end 541 of the third common connection portion 54 is coupled to the touch electrode 300 in the first touch sensing block 30 of the adjacent touch sensing block 30, and the second end 542 of the third common connection portion 54 is not coupled to the second touch sensing block 30 of the adjacent touch sensing block 30. The orthographic projection of at least a portion of the third common connection portion 54 on the substrate 10 and the orthographic projection of the gate line 50 on the substrate 10 have a second overlapping area. The orthographic projection of at least a portion of the second common connection portion 302 on the substrate and the orthographic projection of the gate line 50 on the substrate have a third overlapping area. Along the first direction, the width of the second overlapping area is equal to the width of the third overlapping area.

[0279] For example, the third common connection portion 54 is disposed in the same layer and with the same material as the data line 51, or the third common connection portion 54 is disposed in the same layer and with the same material as the touch signal line 40.

[0280] For example, the number of third common connection portions 54 provided between adjacent touch sensing blocks 30 along the first direction is the same as the number of second common connection portions 302 provided between two adjacent rows of touch electrodes 300 inside a touch sensing block 30.

[0281] For example, the orthographic projection of the first end 541 of the third common connection portion 54 on the substrate 10 overlaps with the orthographic projection of the touch electrode 300 in the first touch sensing block 30 of the adjacent touch sensing block 30 on the substrate 10. The first end 541 of the third common connection portion 54 and the touch electrode 300 in the first touch sensing block 30 of the adjacent touch sensing block 30 are coupled at the overlap point through a third via 65 and a third connection portion 66.

[0282] For example, the third connection portion 66 couples the first end 541 of the third common connection portion 54 to the touch electrode 300 in the first touch sensing block 30 of the adjacent touch sensing block 30 through the third through hole 65.

[0283] For example, the third via 65 is formed in the same patterning process as the first via 63 and the second via 61, and the third connecting portion 66 is formed in the same patterning process as the first connecting portion 64 and the second connecting portion 62.

[0284] The second end 542 of the third common connection portion 54 is not coupled to the second touch sensing block 30 in the adjacent touch sensing block 30, thus ensuring insulation between adjacent touch sensing blocks 30 along the first direction.

[0285] The above-mentioned configuration ensures that at least a portion of the orthographic projection of the second common connection portion 302 on the substrate and the orthographic projection of the gate line 50 on the substrate have a third overlapping region. Along the first direction, the width of the second overlapping region is equal to the width of the third overlapping region, so that the parasitic capacitance formed by each gate line 50 with the first common connection portion 301 and / or the second common connection portion 302 is consistent, thus avoiding signal delay in individual gate lines 50 and uneven charging rate in individual sub-pixels.

[0286] like Figure 14 and Figure 15 As shown, in some embodiments, at least a portion of the gate line 50 is provided with a third cutout area 5014, and the orthographic projection of the third common connection portion 54 on the substrate 10 at least partially overlaps with the orthographic projection of the third cutout area 5014 on the substrate 10.

[0287] The above configuration effectively reduces the overlap area between the third common connection portion 54 and the gate line 50, and reduces the parasitic capacitance formed between the third common connection portion 54 and the gate line 50.

[0288] like Figure 14 and Figure 15 As shown, in some embodiments, the orthographic projection of the second end 542 of the third common connection portion 54 on the substrate 10 does not overlap with the orthographic projection of the grid line 50 on the substrate 10.

[0289] For example, the third common connection portion 54 extends along the first direction, the first end 541 of the third common connection portion 54 is coupled to the touch electrode 300 in the first touch sensing block 30 of the adjacent touch sensing block 30, and the second end 542 of the third common connection portion 54 is not coupled to the second touch sensing block 30 of the adjacent touch sensing block 30; the portion of the third common connection portion 54 located between the first end and the second end overlaps with the gate line 50.

[0290] The length of the second end 542 of the third common connection portion 54 along the first direction is greater than or equal to 1 micrometer. For example, the length of the second end 542 of the third common connection portion 54 along the first direction is between 1 micrometer and 2 micrometers, and may include an endpoint value.

[0291] The above configuration ensures that the overlap area between the third common connection portion 54 and the gate line 50 is consistent, so that the parasitic capacitance formed by each gate line 50 and the first common connection portion 301 and / or the second common connection portion 302 is the same.

[0292] like Figure 14 and Figure 15 As shown, in some embodiments, the orthographic projection of the second end 542 of the third common connection portion 54 on the substrate 10 is configured not to overlap with the orthographic projection of the second touch sensing block 30, including the first common connection portion 301, on the substrate 10 in the adjacent touch sensing block 30.

[0293] The above configuration can reduce the parasitic capacitance between adjacent touch sensing blocks 30, ensuring the stability of the array substrate operation.

[0294] This disclosure also provides a touch display device, including the array substrate described above.

[0295] In the array substrate provided in the above embodiment, the entire array substrate is divided into two parts arranged along a first direction and capable of controlling touch separately. Thus, when laying out the touch signal lines 40, each touch signal line 40 does not need to pass through the entire array substrate along the first direction; it only needs to pass through the area where its corresponding set of electrode blocks is located. This not only reduces the layout space required for the touch signal lines 40 in the array substrate and effectively reduces the layout difficulty of the touch signal lines 40 in a large-size array substrate, but also improves the impact on the aperture ratio of each sub-pixel in the array substrate when laying out the touch signal lines 40. Furthermore, the above arrangement divides the touch signal lines 40 in the entire array substrate into two groups, with each group of touch signal lines 40 connected to a corresponding control unit, realizing bilateral driving of the array substrate and thus significantly reducing the connection difficulty between the touch signal lines 40 and the control unit.

[0296] Therefore, the touch display device provided in this embodiment of the present disclosure also has the above-mentioned beneficial effects when including the array substrate, which will not be repeated here.

[0297] In some embodiments, the touch display device further includes: a counter substrate and a liquid crystal layer, wherein the counter substrate is disposed opposite to the array substrate, and the liquid crystal layer is located between the counter substrate and the array substrate.

[0298] For example, the opposing substrate includes a color filter substrate.

[0299] The liquid crystal layer is deflected under the drive of the pixel electrode 52 and the common electrode, thereby realizing the display function of the touch display device.

[0300] It should be noted that the touch display device can be any product or component with display function, such as a television, monitor, digital photo frame, mobile phone, or tablet computer.

[0301] It should be noted that the various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the method embodiments are basically similar to the product embodiments, so the description is relatively simple, and the relevant parts can be referred to the description of the product embodiments.

[0302] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “connection,” “coupled,” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as “upper,” “lower,” “left,” and “right” are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0303] It is understandable that when a component such as a layer, film, region, or substrate is referred to as being "above" or "below" another component, the component may be "directly" located "above" or "below" the other component, or there may be intermediate components present.

[0304] In the description of the above embodiments, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0305] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. An array substrate, comprising: a substrate; a first control unit and a second control unit oppositely arranged along a first direction; a plurality of touch sensing blocks independently from each other, the plurality of touch sensing blocks being arranged in an array on the substrate, the plurality of touch sensing blocks being divided into a first group of electrode blocks and a second group of electrode blocks, the first group of electrode blocks and the second group of electrode blocks being arranged along the first direction; a plurality of touch signal lines independently from each other, at least part of each of the plurality of touch signal lines extending along the first direction, the plurality of touch signal lines being divided into a first group of touch signal lines and a second group of touch signal lines, the first group of touch signal lines and the second group of touch signal lines being arranged along the first direction; a plurality of touch signal lines included in the first group of touch signal lines being arranged along a second direction, the second direction intersecting the first direction, the plurality of touch signal lines included in the first group of touch signal lines being respectively coupled to a plurality of touch sensing blocks in the first group of electrode blocks, one end of the plurality of touch signal lines included in the first group of touch signal lines being respectively coupled to the first control unit; a plurality of touch signal lines included in the second group of touch signal lines being arranged along the second direction, the plurality of touch signal lines included in the second group of touch signal lines being respectively coupled to a plurality of touch sensing blocks in the second group of electrode blocks, one end of the plurality of touch signal lines included in the second group of touch signal lines being respectively coupled to the second control unit; two touch signal lines oppositely arranged along the first direction having an electrostatic protection distance in the first direction; the array substrate further comprising a plurality of pixel electrodes, the electrostatic protection distance L1 satisfying L1=k*H, H representing a maximum length of the pixel electrodes in the first direction, 2%≤k≤6%.

2. The array substrate according to claim 1, wherein, The electrostatic protection distance is greater than or equal to 10 microns.

3. The array substrate of claim 1, wherein, At least part of the touch signal lines include a plurality of straight edge portions and a plurality of curved portions, the straight edge portions and the curved portions being alternately arranged; In one touch signal line, at least part of the curved portions overlap with a projection of the pixel electrodes on the substrate.

4. The array substrate according to claim 3, wherein, The first group of touch signal lines includes at least one first target touch signal line, the at least one first target touch signal line including a first target curved portion at one end close to the second group of touch signal lines; the second group of touch signal lines includes at least one second target touch signal line, the at least one second target touch signal line including a second target curved portion at one end close to the first group of touch signal lines; the first target curved portion and the second target curved portion have a first protection distance therebetween, the first protection distance being greater than or equal to the electrostatic protection distance.

5. The array substrate according to claim 4, wherein, A projection of the first target curved portion on the substrate at least partially overlaps with a projection of the pixel electrodes on the substrate; the first target curved portion includes an extension portion, the extension portion extending away from the second group of touch signal lines.

6. The array substrate according to claim 3, wherein, The first group of touch signal lines includes at least one third target touch signal line, and the at least one third target touch signal line includes a first target straight edge portion at one end close to the second group of touch signal lines; the second group of touch signal lines includes at least one fourth target touch signal line, and the at least one fourth target touch signal line includes a second target straight edge portion at one end close to the first group of touch signal lines; the first target straight edge portion and the second target straight edge portion have a second protection distance therebetween, and the second protection distance is greater than or equal to the electrostatic protection distance.

7. The array substrate according to claim 3, wherein, The array substrate further comprises: a plurality of data lines, at least part of the data lines extending along a first direction; a plurality of switch elements, each switch element being located between one adjacent bend portion and one data line.

8. The array substrate of claim 1, wherein, The first group of electrode blocks and the second group of electrode blocks include an equal number of touch sensing blocks; and the first group of touch signal lines and the second group of touch signal lines include an equal number of touch signal lines.

9. The array substrate of claim 8, wherein, The array substrate further comprises a plurality of data lines, at least part of the data lines extending along a first direction; Each touch sensing block includes a plurality of touch electrodes which are electrically connected to each other and spaced apart from each other; At least one of the first group of touch signal lines and the second group of touch signal lines can be divided into a plurality of sub groups of touch signal lines, each sub group of touch signal lines including two adjacent touch signal lines along the second direction, the orthogonal projections of the two adjacent touch signal lines on the substrate being located on two sides of the orthogonal projection of one same data line on the substrate respectively, and the orthogonal projections of the two adjacent touch signal lines and the orthogonal projection of the one same data line each including a portion located between the orthogonal projections of adjacent touch electrodes on the substrate.

10. The array substrate of claim 9, wherein, The layers in which the two adjacent touch signal lines are located are different from the layer in which the one same data line is located.

11. The array substrate of claim 3, wherein, The array substrate further comprises a plurality of gate lines, at least part of the gate lines extending along the second direction; At least part of the straight edge portion includes a first sub portion and a second sub portion which are coupled to each other, the width of the first sub portion being greater than the width of the second sub portion in a direction parallel to the substrate and perpendicular to the extension direction of the touch signal lines; and the orthogonal projection of the first sub portion on the substrate covers the orthogonal projection of at least part of the side surface of the gate line on the substrate. And / or, At least part of the bend portion includes a third sub portion and a fourth sub portion which are coupled to each other, the width of the third sub portion being greater than the width of the fourth sub portion in a direction parallel to the substrate and perpendicular to the extension direction of the touch signal lines; and the orthogonal projection of the third sub portion on the substrate covers the orthogonal projection of at least part of the side surface of the gate line on the substrate.

12. The array substrate of claim 11, wherein the gate lines include a plurality of gate patterns and a plurality of gate connection portions; the gate patterns and the gate connection portions are arranged alternately along the second direction, and the gate connection portions are coupled between adjacent gate patterns; and along the first direction, the width of the gate patterns is greater than the width of the gate connection portions. A normal projection of the first sub-portion on the substrate covers a normal projection of at least part of a side surface of the gate connection portion on the substrate. A normal projection of the third sub-portion on the substrate covers a normal projection of at least part of a side surface of the gate pattern on the substrate.

13. The array substrate of claim 12, wherein, The first sub-portion extends along the first direction, and the gate connection portion extends along a third direction, an included angle between the third direction and the first direction being less than 90 degrees.

14. The array substrate of claim 12, wherein, At least part of the gate pattern comprises a solid area and a first hollow area, a normal projection of the solid area on the substrate at least partially overlaps a normal projection of the third sub-portion on the substrate. A normal projection of the first hollow area on the substrate at least partially overlaps a normal projection of the fourth sub-portion on the substrate.

15. The array substrate of claim 1, wherein, Each touch sensing block comprises a plurality of touch electrodes which are electrically connected to each other and spaced apart from each other; the plurality of touch electrodes are arranged in an array, and the plurality of touch electrodes are divided into a plurality of rows of touch electrodes arranged along the first direction, each row of touch electrodes comprising a plurality of touch electrodes arranged along the second direction; Each touch sensing block further comprises: a plurality of first common connection portions, each of the first common connection portions corresponding to one row of touch electrodes, and each of the first common connection portions and the corresponding row of touch electrodes being coupled to each other, respectively; a plurality of second common connection portions, two adjacent rows of touch electrodes being coupled to each other through at least one of the second common connection portions.

16. The array substrate of claim 15, wherein, The array substrate further comprises a plurality of gate lines, at least part of the gate lines extending along the second direction; the first common connection portions are arranged in the same layer and made of the same material as the gate lines.

17. The array substrate of claim 15, wherein, The first common connection portion directly overlaps a surface of the corresponding row of touch electrodes.

18. The array substrate of claim 15, wherein, The first common connection portions adjacent to each other along the second direction have a spacing area, and a width of the spacing area along the second direction is greater than or equal to 5 microns.

19. The array substrate of claim 18, wherein, The array substrate further comprises a plurality of data lines, at least part of the data lines extending along the first direction; Among two first common connection portions adjacent to each other along the second direction, a normal projection of at least one of the first common connection portions on the substrate toward one end of the spacing area has a first overlapping area with a normal projection of the data line on the substrate, and a width of the first overlapping area along the second direction is equal to a width of the data line.

20. The array substrate of claim 15, wherein, The array substrate further comprises a plurality of data lines, at least part of the data lines extending along the first direction; the second common connection portions are arranged in the same layer and made of the same material as the data lines.

21. The array substrate of claim 15, wherein, Along the first direction, the first common connection portion is located at a first side of the corresponding row of touch electrodes; At least part of the second common connection portion extends along the first direction, a first end of the second common connection portion is coupled to the first common connection portion coupled to one of the two adjacent rows of touch electrodes, and a second end of the second common connection portion is coupled to at least one touch electrode in the other of the two adjacent rows of touch electrodes.

22. The array substrate of claim 15, wherein, The array substrate further comprises a plurality of gate lines, at least part of the gate lines extending along the second direction; at least part of the gate lines is provided with a second hollow area, a projection of the second common connection portion on the base overlaps with a projection of the second hollow area on the base.

23. The array substrate of claim 15, wherein, Each touch sensing block comprises a plurality of touch electrodes which are electrically connected to each other and spaced apart from each other; The array substrate further comprises: a plurality of gate lines, at least part of the gate lines extending along the second direction; a plurality of third common connection portions, at least one third common connection portion is provided between adjacent touch sensing blocks along the first direction, at least part of the third common connection portion extends along the first direction, a first end of the third common connection portion is coupled to a touch electrode in a first one of the adjacent touch sensing blocks, and a second end of the third common connection portion is not coupled to a second one of the adjacent touch sensing blocks; at least part of a projection of the third common connection portion on the base has a second overlap area with a projection of the gate lines on the base; at least part of a projection of the second common connection portion on the base has a third overlap area with a projection of the gate lines on the base, along the first direction, a width of the second overlap area is equal to a width of the third overlap area.

24. The array substrate of claim 23, wherein, At least part of the gate lines is provided with a third hollow area, a projection of the third common connection portion on the base at least partially overlaps with a projection of the third hollow area on the base.

25. The array substrate of claim 23, wherein, The second end of the third common connection portion does not overlap with a projection of the gate lines on the base.

26. The array substrate of claim 23, wherein, The second end of the third common connection portion does not overlap with a projection of the first common connection portion included in the second one of the adjacent touch sensing blocks on the base.

27. A touch display device, comprising the array substrate according to any one of claims 1-26.

28. The touch display device of claim 27, wherein, The touch display device further comprises a counter substrate and a liquid crystal layer, the counter substrate is arranged opposite to the array substrate, and the liquid crystal layer is located between the counter substrate and the array substrate.

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