Display substrate, display panel, and display device

By setting up an array layout of multiple light emitting devices and pixel driving circuits on the display substrate, sharing data lines and simplifying wiring design, the problem of under-screen camera wiring occupying the display area and border area is solved, and shooting effect and display synchronization are improved.

CN115280504BActive Publication Date: 2025-08-08BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
CN202080002592.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-10-30
Publication Date
2025-08-08
Estimated Expiration
2040-10-30

AI Technical Summary

Technical Problem

In the prior art, the wiring method of the under-screen camera occupies the light-transmitting area of the display area and the space of the frame area, affecting the photography effect and screen-to-body ratio.

Method used

By using an array layout where multiple light emitting devices and pixel driving circuits are arranged on the display substrate, the pixel driving circuits of the first and second light emitting devices are connected with common data lines in the second display area, winding in the first display area is avoided, and shift registers are cascaded in the border area, thereby simplifying wiring design.

Benefits of technology

Improves the shooting effect of the under-screen camera, reduces the space occupied by the bezel area, reduces production costs, and improves display synchronization and uniformity of driving signals.

✦ Generated by Eureka AI based on patent content.

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    Figure CN115280504B_ABST
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Abstract

A display substrate, a display panel, and a display device, comprising a display area (AA) and a frame area (BB) around the display area (AA); the display area (AA) comprises a first display area (AA1) and a second display area (AA2) located at least on one side of the first display area (AA1); a plurality of light-emitting devices arranged in an array on a base substrate (1), specifically comprising a plurality of first light-emitting devices (2) in the first display area (AA1) and a plurality of second light-emitting devices (3) in the second display area (AA2); a plurality of first pixel driving circuits (4) in the frame area (BB) and a plurality of second pixel driving circuits (5) in the second display area (AA2); a plurality of first pixel driving circuits (6) in the frame area (BB) and a plurality of second pixel driving circuits (7) in the second display area (AA2); a plurality of first pixel driving circuits (8) in the frame area (BB) and a plurality of second pixel driving circuits (9) in the frame area (BB); a plurality of first pixel driving circuits (10) in the frame area (BB) and a plurality of second pixel driving circuits (11) in the frame area (BB); a plurality of first pixel driving circuits (11) in the frame area (BB) and a plurality of second pixel driving circuits (12) in the frame area (BB); a plurality of first pixel driving circuits (13) in the frame area (BB) and a plurality of second pixel driving circuits (14) in the frame area (BB); a plurality of first pixel driving circuits (15) in the frame area (BB) and a plurality of second pixel driving circuits (16) in the frame area (BB); a plurality of first pixel driving circuits (17) in the frame area (BB) and a plurality of second pixel driving circuits (18) in the frame area (BB); a plurality of first pixel driving circuits (19) in the frame area (BB) and a plurality of second pixel driving circuits (19) in the frame area (BB); a plurality of first pixel driving circuits (11) in the frame area (BB) and a plurality of second pixel driving circuits ); a plurality of first pixel driving circuits (4) are electrically connected to a plurality of first light-emitting devices (2) in a one-to-one correspondence, and a plurality of second pixel driving circuits (5) are electrically connected to a plurality of second light-emitting devices (3) in a one-to-one correspondence; a plurality of data lines (6) are located in a second display area (AA2), and each data line (6) is connected to a first pixel driving circuit (4) and a second pixel driving circuit (5) electrically connected to a column of first light-emitting devices (2) and a column of second light-emitting devices (3), respectively, and the column of first light-emitting devices (2) and the column of second light-emitting devices (3) are in the same column.
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Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate, a display panel, and a display device. Background Art

[0002] With the rapid development of smartphones, not only are they aesthetically pleasing, but they also need to provide users with a superior visual experience. Major manufacturers are increasing the screen-to-body ratio on their smartphones, making full-screen displays a new competitive advantage. With the rise of full-screen displays, the demand for improved performance and functionality is also increasing. Under-display cameras, without sacrificing a high screen-to-body ratio, can, to a certain extent, deliver a visual and user experience impact. Summary of the Invention

[0003] In one aspect, an embodiment of the present disclosure provides a display substrate, comprising:

[0004] A base substrate, the base substrate comprising a display area and a frame area located around the display area; wherein the display area comprises: a first display area and a second display area located at least on one side of the first display area;

[0005] A plurality of light-emitting devices are arranged in an array on the base substrate; the plurality of light-emitting devices include: a plurality of first light-emitting devices located in the first display area, and a plurality of second light-emitting devices located in the second display area;

[0006] A plurality of pixel driving circuits are located between the base substrate and the layer where the plurality of light-emitting devices are located; the plurality of pixel driving circuits include: a plurality of first pixel driving circuits located in the frame area, and a plurality of second pixel driving circuits located in the second display area; wherein the plurality of first pixel driving circuits are electrically connected to the plurality of first light-emitting devices in a one-to-one correspondence, and the plurality of second pixel driving circuits are electrically connected to the plurality of second light-emitting devices in a one-to-one correspondence;

[0007] A plurality of data lines are located in the second display area; each of the data lines is correspondingly connected to the first pixel driving circuit and the second pixel driving circuit, which are electrically connected to a column of the first light-emitting devices and a column of the second light-emitting devices, respectively, and the column of the first light-emitting devices and the column of the second light-emitting devices are arranged in the same column.

[0008] Optionally, the display substrate provided in the embodiment of the present disclosure further comprises: a plurality of first wirings extending along the row direction and a plurality of second wirings extending along the column direction in the second display area; wherein,

[0009] The data line arranged opposite the first display area is connected to at least one second line through a first line, each second line is electrically connected to a corresponding first pixel driving circuit, and the first light-emitting devices corresponding to the first pixel driving circuits electrically connected to the at least one second line are arranged in the same column.

[0010] Optionally, in the display substrate provided in the embodiment of the present disclosure, each of the first wirings is located at a plurality of row gaps adjacent to the first display area, and two first wirings are provided at the same row gap;

[0011] The second wirings are arranged in a one-to-one correspondence at a plurality of column gaps on both sides of the first display area in the row direction.

[0012] Optionally, the display substrate provided in the embodiment of the present disclosure further includes: a plurality of first transfer lines located in the frame area adjacent to the first display area;

[0013] Each of the first transfer lines is correspondingly connected to one of the second wirings and one of the first pixel driving circuits.

[0014] Optionally, the display substrate provided in the embodiment of the present disclosure includes: a first gate metal layer, a second gate metal layer, a first source-drain metal layer, and a second source-drain metal layer that are stacked and insulated from each other;

[0015] The data lines and the plurality of first transfer lines are arranged in the same layer as the first source-drain metal layer, the plurality of first routing lines are arranged in the same layer as the second gate metal layer, and the plurality of second routing lines are arranged in the same layer as the second source-drain metal layer.

[0016] Optionally, the above-mentioned display substrate provided in the embodiment of the present disclosure further includes: a plurality of shift registers cascaded in the border area; wherein each of the shift registers is correspondingly connected to the first pixel driving circuit and the second pixel driving circuit that are electrically connected to a row of the first light-emitting devices and a row of the second light-emitting devices, respectively, and the row of the first light-emitting devices and the row of the second light-emitting devices are arranged in the same row.

[0017] Optionally, in the display substrate provided in the embodiment of the present disclosure, the frame area includes: a first frame area adjacent to the first display area, a second frame area opposite to the first frame area, and a third frame area and a fourth frame area connecting the first frame area and the second frame area;

[0018] The plurality of first pixel driving circuits are located in the first frame area, and the plurality of shift registers are located in at least one of the third frame area and the fourth frame area;

[0019] The display substrate further includes: a plurality of connecting lines, located in at least one of the third border area and the fourth border area adjacent to the first display area, and the first border area; wherein each of the connecting lines corresponds to one of the shift registers and at least part of the plurality of the first pixel driving circuits corresponding to a row of the first light-emitting devices.

[0020] Optionally, in the display substrate provided in an embodiment of the present disclosure, the plurality of shift registers arranged in cascade are provided in two groups, wherein one group of the plurality of shift registers arranged in cascade is located in the third border area, and the other group of the plurality of shift registers arranged in cascade is located in the fourth border area;

[0021] The plurality of first pixel driving circuits are located in the first border area;

[0022] The multiple connecting lines are located in the third border area and the fourth border area adjacent to the first display area, and the first border area; wherein, one end of each of the connecting lines is correspondingly connected to one of the shift registers, and the other end is correspondingly connected to at least one of the first pixel driving circuits, and the first light-emitting devices electrically connected to the at least one first pixel driving circuit are arranged in the same row.

[0023] Optionally, the display substrate provided in the embodiment of the present disclosure includes: a first gate metal layer, a second gate metal layer, a first source-drain metal layer, and a second source-drain metal layer that are stacked and insulated from each other;

[0024] The plurality of connection lines are provided in the same layer as at least one of the first gate metal layer, the second gate metal layer and the second source / drain metal layer.

[0025] Optionally, in the display substrate provided in the embodiment of the present disclosure, each group of the plurality of shift registers arranged in cascade connection includes: a plurality of first shift registers arranged in cascade connection, and a plurality of second shift registers arranged in cascade connection;

[0026] The multiple connecting lines include: multiple first connecting lines arranged in the same layer as at least one of the first gate metal layer, the second gate metal layer and the second source and drain metal layer, and multiple second connecting lines arranged in the same layer as at least one of the first gate metal layer and the second gate metal layer; wherein each of the first connecting lines is electrically connected to a first shift register and a plurality of first pixel driving circuits corresponding to an adjacent half row of the first light-emitting devices; and each of the second connecting lines is electrically connected to a second shift register and a plurality of first pixel driving circuits corresponding to an adjacent half row of the first light-emitting devices.

[0027] Optionally, in the display substrate provided in the embodiment of the present disclosure, the plurality of first shift registers arranged in cascade connection are located between the plurality of second shift registers arranged in cascade connection and the display area;

[0028] Each of the first connecting lines is bent from a side of the first shift register close to the display area to the first border area between the first pixel driving circuit and the display area;

[0029] Each of the second connecting lines is bent from a side of the second shift register away from the display area to the first border area between the first pixel driving circuit and the display area.

[0030] Optionally, the display substrate provided in the embodiment of the present disclosure further includes: a plurality of second transfer lines and a plurality of third transfer lines provided in the first frame area and on the same layer as the first source / drain metal layer; wherein,

[0031] Each of the second transfer lines connects one of the first connection lines and one of the first pixel driving circuits, and each of the third transfer lines connects one of the second connection lines and one of the first pixel driving circuits.

[0032] Optionally, the display substrate provided in the embodiment of the present disclosure further includes: a plurality of gate lines and a plurality of light-emitting control lines disposed in the second display area and in the same layer as the first gate metal layer, and a plurality of fourth transfer lines and a plurality of fifth transfer lines disposed in the third frame area and the fourth frame area and in the same layer as the first source / drain metal layer; wherein,

[0033] Each of the gate lines is electrically connected to the second pixel driving circuit of a half row, and is electrically connected to one of the first shift registers via one of the fourth transfer lines;

[0034] Each of the light emitting control lines is electrically connected to the second pixel driving circuit of a half row, and is electrically connected to one of the second shift registers through one of the fifth switching lines.

[0035] Optionally, the above-mentioned display substrate provided in the embodiment of the present disclosure further includes: a plurality of power signal lines extending in the column direction, one of the power signal lines being electrically connected to a column of the second pixel driving circuits, or one of the power signal lines being electrically connected to the first pixel driving circuits and the second pixel driving circuits contained in the same column.

[0036] Optionally, the display substrate provided in the embodiment of the present disclosure further includes: a plurality of initialization signal lines extending along a row direction in the second display area, and a plurality of sixth transfer lines located in the frame area;

[0037] Among them, one of the initialization signal lines is electrically connected to the second pixel driving circuit of half a row, and each of the initialization signal lines located on both sides of the row direction of the first display area is also electrically connected to the first pixel driving circuit corresponding to the first light-emitting device in the row through one of the sixth adapter lines.

[0038] Optionally, the above-mentioned display substrate provided in the embodiment of the present disclosure further includes: multiple transparent wirings located between the layer where the multiple pixel driving circuits are located and the layer where the multiple light-emitting devices are located, and each of the transparent wirings is connected one-to-one between the first pixel driving circuit and the first light-emitting device.

[0039] Optionally, in the above-mentioned display substrate provided in an embodiment of the present disclosure, the first display area is configured to install a light extraction module.

[0040] On the other hand, an embodiment of the present disclosure further provides a display panel, comprising the above-mentioned display substrate provided in an embodiment of the present disclosure.

[0041] On the other hand, an embodiment of the present disclosure further provides a display device, comprising: a light extraction module, and the above-mentioned display panel provided by an embodiment of the present disclosure; wherein the light extraction module is arranged in the first display area of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 Schematic diagram of the structure of a display device with an under-screen camera in the related art;

[0043] Figure 2 A schematic structural diagram of a display device provided in an embodiment of the present disclosure;

[0044] Figure 3 for Figure 2 A schematic diagram of an enlarged structure of area a;

[0045] Figure 4 for Figure 2 Another enlarged structural diagram of area a in the middle;

[0046] Figure 5 A data signal wiring diagram of a first pixel driving circuit provided in an embodiment of the present disclosure;

[0047] Figure 6 A diagram showing the horizontal transfer of data signals within a display area provided by an embodiment of the present disclosure;

[0048] Figure 7 A diagram showing the vertical transfer of data signals within a display area provided by an embodiment of the present disclosure;

[0049] Figure 8 for Figure 2 Another enlarged structural diagram of area a in the middle;

[0050] Figure 9 A signal wiring diagram of a first shift register provided in an embodiment of the present disclosure;

[0051] Figure 10 A signal wiring diagram of a second shift register provided in an embodiment of the present disclosure;

[0052] Figure 11 A signal transfer wiring diagram of a shift register provided in an embodiment of the present disclosure;

[0053] Figure 12 A diagram illustrating the vertical transfer of data signals and power signals within the border area provided by an embodiment of the present disclosure;

[0054] Figure 13 for Figure 2 Another enlarged structural diagram of area a in the middle;

[0055] Figure 14 for Figure 2 Another enlarged structural diagram of area a. DETAILED DESCRIPTION

[0056] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. It should be noted that the sizes and shapes of the figures in the drawings do not reflect the actual proportions, and the purpose is only to illustrate the contents of the present disclosure. And the same or similar numbers throughout represent the same or similar elements or elements with the same or similar functions. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0057] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by persons of ordinary skill in the field to which the present disclosure belongs. The words "first", "second" and similar terms used in this disclosure and the claims do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Inside", "outside", "upper", "lower" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0058] Figure 1Schematic diagram of the planar structure of a display device with an under-screen camera structure in the related art. Figure 1 As shown, the display device includes: a first display area AA1 and a second display area AA2, and the camera can be set at the position of the first display area AA1. Specifically, a plurality of light-emitting devices EL are provided in the first display area AA1, and a pixel driving circuit (for example, Figure 1 D_1 and D_2 in the pixel display area are located in the upper frame area BB1; a plurality of pixel driving circuits P are provided in the second display area AA2, each pixel driving circuit P includes a light-emitting device and a corresponding driving circuit, that is, the driving circuit in the pixel driving circuit P is located near the corresponding light-emitting device.

[0059] However, if Figure 1 As shown, for the pixel driving circuit placed in the upper frame area BB1 in the related art (for example Figure 1 D_1, D_2 in FIG), the data line providing the data signal Data is usually routed along the edge of the first display area AA1 through one or more film layers to the pixel driving circuit (for example Figure 1 This wiring method occupies a portion of the light-transmitting area of the first display area AA1, affecting the camera's performance. Furthermore, after the data lines extend from the edge of the first display area AA1 to the upper frame area BB1, they must be routed horizontally to connect to the corresponding pixel driver circuits. This occupies a portion of the frame area, limiting wiring space or increasing the frame area.

[0060] In view of the above technical problems existing in the related art, the present disclosure provides a display substrate, such as Figures 2 to 4 Shown, including:

[0061] A base substrate 1, comprising a display area AA and a frame area BB located around the display area AA; wherein the display area AA comprises a first display area AA1 and a second display area AA2 located at least on one side of the first display area AA1;

[0062] A plurality of light-emitting devices are arranged in an array on a base substrate 1; the plurality of light-emitting devices include: a plurality of first light-emitting devices 2 located in a first display area AA1, and a plurality of second light-emitting devices 3 located in a second display area AA2;

[0063] Multiple pixel driving circuits are located between the base substrate 1 and the layer where the multiple light-emitting devices are located; the multiple pixel driving circuits include: multiple first pixel driving circuits 4 located in the border area BB, and multiple second pixel driving circuits 5 located in the second display area AA2; wherein the multiple first pixel driving circuits 4 are electrically connected to the multiple first light-emitting devices 2 in a one-to-one correspondence, and the multiple second pixel driving circuits 5 are electrically connected to the multiple second light-emitting devices 3 in a one-to-one correspondence;

[0064] Multiple data lines 6 are located in the second display area AA2; wherein each data line 6 is correspondingly connected to a first pixel driving circuit 4 and a second pixel driving circuit 5 that are electrically connected to a column of first light-emitting devices 2 and a column of second light-emitting devices 3, respectively, and the above-mentioned column of first light-emitting devices 2 and the above-mentioned column of second light-emitting devices 3 are arranged in the same column.

[0065] In the above-mentioned display substrate provided in the embodiment of the present disclosure, a first pixel driving circuit 4 and a second pixel driving circuit 5 electrically connected to a column of first light-emitting devices 2 and second light-emitting devices 3 are arranged to share a data line 6 in the second display area AA2, thereby avoiding winding wires in the first display area AA1 to provide data signals for the first pixel driving circuit 4, thereby improving the shooting effect of the under-screen camera.

[0066] It should be noted that in the present disclosure, the density of the plurality of first light-emitting devices 2 in the first display area AA1 is the same as the density of the plurality of second light-emitting devices 3 in the second display area AA2, so as to improve the overall display effect; and in the present disclosure, the first light-emitting devices 2 and the second light-emitting devices 3 refer to pixels actually used to display light, and do not include floating (dummy) pixels. Specifically, dummy pixels are pixels that have a stacked structure consisting of an anode, a light-emitting layer (EL) and a cathode, but are not used to emit light because they are not connected to a signal line. Similarly, the first pixel driving circuit 4 and the second pixel driving circuit 5 are circuits for connecting light-emitting pixels. In addition, in the present disclosure, the shape of the first display area AA1 can be Figure 1 The square shown can also be other shapes such as a circle, and can be designed according to actual needs and is not limited here.

[0067] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figures 3 to 7 As shown, it may further include: a plurality of first connection lines 11 extending along the row direction and a plurality of fourth wirings 14 extending along the column direction in the second display area AA2; wherein,

[0068] The data line 6 arranged opposite the first display area AA1 is connected to at least one second wiring 8 through a first connecting line 11. Each second wiring 8 is electrically connected to a corresponding first pixel driving circuit 4. The first light-emitting devices 2 corresponding to the first pixel driving circuits 4 electrically connected to the at least one second wiring 8 are arranged in the same column.

[0069] The data signal provided by the data line 6 is transferred to the first pixel driving circuit 4 through the first connecting line 11 and the second routing line 8 set in the second display area AA2, avoiding the need for winding wires in the first display area AA1 to provide data signals to the first pixel driving circuit 4, thereby improving the shooting effect of the under-screen camera; at the same time, the first connecting line 11 extending along the row direction is completed and optimized in the second display area AA2, reducing the wiring pressure of other signal lines in the upper frame area BB1.

[0070] It should be noted that, in the present disclosure, “arranged opposite to each other” specifically means that the extension line of the data line 14 and the first display area AA1 overlap with each other.

[0071] In a specific implementation, to prevent crosstalk between data signals, an additional horizontal routing space for a first connecting line 11 can be reserved in a conventional 7T1C pixel driver circuit for transferring data line 6 from the first source / drain metal layer to the second gate metal layer where first connecting line 11 is located. Additionally, an additional vertical routing space for a second routing line 8 can be reserved for transferring the first connecting line 11 from the second gate metal layer to the second source / drain metal layer where second routing line 8 is located. The transfer holes can be located adjacent to each other or can be determined based on the specific size and structure of the pixel; specific locations are not required. Furthermore, first connecting lines 11 can be routed in alternate rows, and second routing lines 8 can be routed in alternate columns. Their specific locations in the conventional 7T1C pixel driver circuit are not required, provided they do not affect the functions of the original 7T1C pixel driver circuit.

[0072] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figures 3 to 5 As shown, each first connection line 11 can be located in multiple row gaps adjacent to the first display area AA1, with two first connection lines 11 located in the same row gap. Each second routing line 8 is disposed in a one-to-one correspondence in multiple column gaps adjacent to the first display area AA1. In other words, after the data lines 6 extending from the source driver circuit (IC) end reach the first display area AA1, they can be routed row by row through the first connection lines 11 near the IC end of the first display area AA1 to the left and right sides of the first display area AA1, and then routed column by column through the second routing lines 8 to the first pixel driver circuit 4.

[0073] The row gap specifically refers to the gap between pixel rows formed by multiple second light-emitting devices 3 in the second display area AA2; the column gap specifically refers to the gap between pixel columns formed by multiple second light-emitting devices 3 in the second display area AA2.

[0074] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 3 and Figure 4As shown, the display device may further include: a plurality of first transfer lines 9 located in the frame area BB adjacent to the first display area AA1; each first transfer line 9 correspondingly connects one second trace 8 to one first pixel driving circuit 4. That is, the data signal provided by the second trace 8 is transferred to the corresponding first pixel driving circuit 4 via the first transfer line 9.

[0075] Optionally, in the display substrate provided in the embodiments of the present disclosure, multiple data lines 6 and multiple first transfer lines 9 can be arranged in the same layer as the first source-drain metal layer, multiple first connection lines 11 can be arranged in the same layer as the second gate metal layer, and multiple second routing lines 8 can be arranged in the same layer as the second source-drain metal layer. This allows the vertically transferred data signals to be transferred from the second source-drain metal layer where the second routing lines 8 are located back to the first source-drain metal layer where the first transfer lines 9 are located at the boundary of the display area AA, and then connected to the corresponding first pixel driving circuit 4. The transfer holes can be determined based on the actual wiring situation, and the specific location is not required.

[0076] It should be understood that, in this disclosure, "same-layer arrangement" refers to a layer structure formed by using the same film-forming process to form a film layer for producing a specific pattern, and then using the same mask through a single patterning process. That is, one patterning process corresponds to one mask (also known as a photomask). Depending on the specific pattern, a single patterning process may include multiple exposure, development, or etching processes, and the specific patterns in the formed layer structure may be continuous or discontinuous, and these specific patterns may also be at different heights or have different thicknesses.

[0077] In addition, if Figure 1 As shown, for the pixel driving circuit placed in the upper frame area BB1 (eg Figure 1 In the related art, a shift register GOA is added to provide a driving signal, which is complex and costly.

[0078] Based on this, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 3 and Figure 4 As shown, it can also include: a plurality of shift registers 10 cascaded in the border area BB; wherein each shift register 10 is correspondingly connected to a first pixel driving circuit 4 and a second pixel driving circuit 5 electrically connected to a row of first light-emitting devices 2 and a row of second light-emitting devices 3, respectively, and the above-mentioned row of first light-emitting devices 2 and the above-mentioned row of second light-emitting devices 3 are arranged in the same row.

[0079] In the above-mentioned display substrate provided in the embodiment of the present disclosure, by sharing a shift register 10 with the first pixel driving circuit 4 electrically connected to the first light-emitting devices 2 contained in a row in the first display area AA1 and the second pixel driving circuit 5 corresponding to the second light-emitting devices 3 arranged in the same row in the second display area AA2, a technical effect of synchronous scanning of the first pixel driving circuit 4 corresponding to the first light-emitting devices 2 in the first display area AA1 contained in the same row and the second pixel driving circuit 5 corresponding to the first light-emitting devices 2 in the second display area AA2 is achieved, avoiding the need to separately provide a shift register 10 for the first pixel driving circuit 4 corresponding to the first light-emitting devices 2 in the first display area AA1, thereby simplifying the technical solution and reducing production costs.

[0080] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figures 2 to 4 As shown, the border area BB includes: a first border area BB1 adjacent to the first display area AA1, a second border area BB2 opposite to the first border area BB1, and a third border area BB3 and a fourth border area BB4 connecting the first border area BB1 and the second border area BB2; the second display area AA2 can be specifically located between the first display area AA1 and the second border area BB2, between the first display area AA1 and the third border area BB3, and between the first display area AA1 and the fourth border area BB4; that is, the second display area AA2 can specifically surround the left side, bottom side and right side of the first display area AA1, and the upper side boundary of the first display area AA1 coincides with the upper side boundary of the second display area AA2; of course, the second display area AA2 can also surround the periphery of the first display area AA1, which is not limited here.

[0081] Optionally, multiple first pixel driving circuits 4 can be located in the first border area BB1, and multiple shift registers 10 can be located in at least one of the third border area BB3 and the fourth border area BB4; the display substrate may further include: multiple connecting lines 11 located in at least one of the third border area BB3 and the fourth border area BB4 adjacent to the first display area AA1, and the first border area BB1; wherein one end of each connecting line 11 is correspondingly connected to a shift register 10, and the other end is correspondingly connected to at least one first pixel driving circuit 4, and the first light-emitting devices 2 electrically connected to the at least one first pixel driving circuit 4 are arranged in the same row. By arranging multiple connecting lines 11 in close proximity within the border area BB where the first shift register 10 and the first pixel driving circuit 4 are located, the wiring length of the connecting lines 11 can be effectively reduced.

[0082] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 3 and Figure 4As shown, the multiple shift registers 10 arranged in cascade are divided into two groups, wherein one group of the multiple shift registers 10 arranged in cascade is at least located in the third border area BB3, and the other group of the multiple shift registers 10 arranged in cascade is at least located in the fourth border area BB4; the multiple first pixel driving circuits 4 can be specifically located in the first border area BB1; the multiple connecting lines 11 can be specifically located in the third border area BB3 and the fourth border area BB4 adjacent to the first display area AA1, and the first border area BB1; wherein each connecting line 11 is electrically connected to a shift register 10 and the multiple first pixel driving circuits 4 corresponding to the first light-emitting devices 2 of the adjacent half row. For example, in Figure 3 and Figure 4 In the figure, the three from the left (i.e., half a row) of the six first light-emitting devices 2 contained in the first row adjacent to the first border area BB1 can respectively correspond to the three from the left of the six first pixel driving circuits 4 on the left side of the first border area BB that are electrically connected, and the three from the right (i.e., half a row) of the six first light-emitting devices 2 contained in the first row can respectively correspond to the three from the right of the six first pixel driving circuits 4 on the right side of the first border area BB that are electrically connected; the three from the left (i.e., half a row) of the six first light-emitting devices 2 contained in the second row can respectively correspond to the three from the right of the six first pixel driving circuits 4 on the left side of the first border area BB that are electrically connected, and the three from the right (i.e., half a row) of the six first light-emitting devices 2 contained in the first row can respectively correspond to the three from the left of the six first pixel driving circuits 4 on the right side of the first border area BB that are electrically connected; accordingly, the four traces 11 can be electrically connected to the three from the right of the six first pixel driving circuits 4 on the left side, the three from the left of the six first pixel driving circuits 4 on the left side, and the three from the right of the six first pixel driving circuits 4 on the right side of the first border area BB, respectively.

[0083] By disposing multiple first pixel driver circuits 4 in the upper frame area BB1 adjacent to the first display area AA1, the length of the transparent trace connecting the first pixel driver circuit 4 and the first light-emitting device 2 can be effectively reduced, thereby reducing the resistance of the transparent trace and improving the long-range uniformity of the drive signal. Furthermore, by disposing two sets of cascaded shift registers 10 in the third frame area BB3 and the fourth frame area BB4, respectively, the pixel driver circuits electrically connected to each row of light-emitting devices can be provided with drive signals by two shift registers 10, thereby effectively reducing the time difference between the pixel driver circuits electrically connected to the same row of light-emitting devices receiving the drive signal and improving the synchronous display effect.

[0084] Optionally, the display substrate provided in the embodiments of the present disclosure includes: a first gate metal layer (Gate1), a second gate metal layer (Gate2), a first source / drain metal layer (SD1), and a second source / drain metal layer (SD2), which are stacked and insulated from each other; the plurality of connecting lines 11 may be disposed in the same layer as at least one of the first gate metal layer, the second gate metal layer, and the second source / drain metal layer. Generally, the shift register 10, the first pixel driving circuit 4, and the second pixel driving circuit 5 may each include multiple transistors and at least one capacitor. The gate of each transistor and the first electrode plate of the capacitor may be located in the first gate metal layer, the second electrode plate of the capacitor may be located in the second gate metal layer, and the source and drain of each transistor may be located in the first source / drain metal layer.

[0085] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 3 、 Figure 4 、 Figures 8 to 10 As shown, each group of multiple shift registers 10 arranged in cascade may include: multiple first shift registers 101 arranged in cascade, and multiple second shift registers 102 arranged in cascade; wherein the multiple first shift registers 101 can be used to provide a gate scanning signal (Gate), and the multiple second shift registers 102 can be used to provide a light-emitting control signal (EM); at this time, the multiple connecting lines 11 may include: multiple first connecting lines 111 arranged in the same layer as at least one of the first gate metal layer, the second gate metal layer, and the second source and drain metal layer, and multiple second connecting lines 112 arranged in the same layer as at least one of the first gate metal layer and the second gate metal layer; wherein each first connecting line 111 is electrically connected to a first shift register 101 and a plurality of first pixel driving circuits 4 corresponding to the first light-emitting devices 2 of an adjacent half row; and each second connecting line 112 is electrically connected to a second shift register 102 and a plurality of first pixel driving circuits 4 corresponding to the first light-emitting devices 2 of an adjacent half row.

[0086] The gate scan signal of the first shift register 101 is provided to the second pixel driving circuit 5 of the display area AA through the first source-drain metal layer, and the first connecting line 1101 electrically connected to the first pixel driving circuit 4 can be wound using the first gate metal layer, the second gate metal layer, the second source-drain metal layer, etc. by changing the layer. The first source-drain metal layer can be simply and conveniently transferred to the first gate metal layer, the second gate metal layer, and the second source-drain metal layer through a transfer hole, thereby optimizing the wiring method. In specific implementation, the transfer hole is determined according to the actual wiring situation, and the specific position is not required. In addition, if Figure 7As shown, since the low-level (VSS) signal line located in the first source-drain metal layer is distributed on the side of the shift register 10 away from the display area AA in the related art, the second connection line 112 connecting the second shift register 102 and the first pixel driving circuit 4 can be routed by switching layers to the first gate metal layer and / or the second gate metal layer to reduce the wiring pressure in the frame area BB of the shift register 10 away from the display area AA.

[0087] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 3 、 Figure 4 、 Figure 9 and Figure 10 As shown, when the cascaded multiple first shift registers 101 are located between the cascaded multiple second shift registers 102 and the display area AA; each first connecting line 111 can be bent from the side of the first shift register 101 close to the display area AA to the first border area BB1 between the first pixel driving circuit 4 and the display area AA; each second connecting line 112 can be bent from the side of the second shift register 102 away from the display area AA to the first border area BB1 between the first pixel driving circuit 4 and the display area AA.

[0088] It can be seen that the first connecting line 111 and the second connecting line 112 are connected from both sides of the shift register 10 to the position of the first pixel driving circuit 4 contained in the frame area BB, bypassing the display area AA, thereby avoiding the change of the original signal lines (such as gate lines and light control lines) electrically connected to the shift register 10 in the display area AA, and optimizing the wiring design of the first connecting line 111 and the second connecting line 112. In addition, the bent parts of the first connecting line 111 and the second connecting line 112 can be Figure 3 The arc shown can also be Figure 4 The rectangular shape shown is not limited here.

[0089] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 3 and Figure 4 As shown, it can also include: a plurality of second transfer lines 12 and a plurality of third transfer lines 13 arranged in the first frame area BB1 and on the same layer as the first source and drain metal layer; wherein each second transfer line 12 connects a first connection line 111 and a first pixel driving circuit 4, and each third transfer line 13 connects a second connection line 112 and a first pixel driving circuit 4. In a specific implementation, the plurality of second transfer lines 12 and the plurality of third transfer lines 13 can be longitudinally wired in the first source and drain metal layer, so as to simply and conveniently realize the transfer of the plurality of first connection lines 111 and the second connection lines 112 that are horizontally wired in the first frame area BB1 through the transfer holes, as shown in FIG. Figure 11 shown.

[0090] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 3 、 Figure 4 、 Figure 9 and Figure 10 As shown, it can generally also include: a plurality of gate lines 14 and a plurality of light-emitting control lines 15 arranged in the second display area AA2 and in the same layer as the first gate metal layer, and a plurality of fourth transfer lines 16 and a plurality of fifth transfer lines 17 arranged in the third border area BB3 and the fourth border area BB4 and in the same layer as the first source and drain metal layer; wherein each gate line 14 is electrically connected to the half-row second pixel driving circuit 5, and is electrically connected to a first shift register 101 through a fourth transfer line 16; each light-emitting control line 15 is electrically connected to the half-row second pixel driving circuit 5, and is electrically connected to a second shift register 102 through a fifth transfer line 17.

[0091] As can be seen from the above, in the present disclosure, the gate scanning signal of the first shift register 101 is specifically provided to the gate line 14 in the display area AA through the fourth adapter line 16 of the first source-drain metal layer, and the light-emitting control signal of the second shift register 102 is provided to the light-emitting control line 15 in the display area AA through the fifth adapter line 17 of the first source-drain metal layer, without changing the original wiring method of the gate line 14 and the light-emitting control line 15. Therefore, it has good compatibility with related technologies.

[0092] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 12 As shown, the display device may further include: a plurality of power signal (VDD) lines 18 extending in the column direction, one power signal line 18 being electrically connected to a column of second pixel driving circuits 5, or one power signal line 18 being electrically connected to the first pixel driving circuits 4 and the second pixel driving circuits 5 contained in the same column. Specifically, the power signal line 18 may be directly connected from the display area AA to the first pixel driving circuit 4 in the frame area BB using the first source / drain metal layer.

[0093] Optionally, the display substrate provided in the embodiments of the present disclosure may further include: a plurality of initialization signal (Vinit) lines extending in the row direction within the second display area AA2, and a plurality of sixth adapter lines located in the border area BB; wherein one initialization signal line is electrically connected to the second pixel driver circuit 5 of a half row, and each initialization signal line located on both sides of the row in the first display area AA1 is also electrically connected to the first pixel driver circuit 5 corresponding to the first light-emitting device 2 in that row via a sixth adapter line. Of course, in a specific implementation, the initialization signal lines can be configured in a manner similar to the power signal lines 18, and this is not limited here.

[0094] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 13 and Figure 14 As shown, it may also include: multiple transparent traces 19 located between the layer where the multiple pixel driving circuits are located and the layer where the multiple light-emitting devices are located, and each transparent trace 19 is connected one-to-one between the first pixel driving circuit 4 and the first light-emitting device 2.

[0095] In a specific implementation, in order to provide more transparent traces 19 within a certain size range in the column direction to drive more first light-emitting devices 2, thereby achieving the same resolution of the first display area AA1 and the second display area AA2, in the present disclosure, multiple transparent traces 19 can be set in different film layers. In some embodiments, the multiple transparent traces 19 can be respectively located in the first transparent conductive layer, the second transparent conductive layer, and the third transparent conductive layer. The multiple first light-emitting devices 2 include multiple first color light-emitting devices R, multiple second color light-emitting devices G, and multiple third color light-emitting devices B; the first pixel driving circuit 4 includes a first sub-pixel circuit, a second sub-pixel circuit, and a third sub-pixel circuit; one end of the transparent trace 19 located in the first transparent conductive layer can be electrically connected to the first sub-pixel circuit, and the other end can be electrically connected to the first color light-emitting device R; one end of the transparent trace 19 located in the second transparent conductive layer can be electrically connected to the second sub-pixel circuit, and the other end can be electrically connected to the second color light-emitting device G; one end of the transparent trace 19 located in the third transparent conductive layer can be electrically connected to the third sub-pixel circuit, and the other end can be electrically connected to the third color light-emitting device B.

[0096] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the first display area AA1 is configured to install a light extraction module, such as a camera module, an optical fingerprint recognition module, an ambient light sensor, etc.

[0097] In another aspect, embodiments of the present disclosure further provide a display panel comprising the aforementioned display substrate provided in the embodiments of the present disclosure. Optionally, the display panel may be an organic electroluminescent display panel (OLED), a quantum dot light-emitting display panel (QLED), or a micro-light-emitting diode display panel (MicroLED). Because the principles underlying the display panel's solution are similar to those underlying the aforementioned display substrate, the implementation of the display panel provided in the embodiments of the present disclosure can be referenced to the implementation of the aforementioned display substrate provided in the embodiments of the present disclosure, and any repetitions will not be repeated.

[0098] On the other hand, the embodiments of the present disclosure further provide a display device, comprising: a light-collecting module (such as a camera module), and the above-mentioned display panel; wherein the light-collecting module is arranged in the first display area AA1 of the display panel. The display device can be: a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, a smart watch, a fitness wristband, a personal digital assistant, or any other product or component with a display function. Other essential components of the display device should be understood by those of ordinary skill in the art, and will not be described in detail here, nor should they be used as limitations on the present invention. In addition, since the principle of solving the problem by the display device is similar to the principle of solving the problem by the above-mentioned display panel, the implementation of the display device can refer to the embodiment of the above-mentioned display panel, and the repeated parts will not be described in detail.

[0099] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present invention without departing from the spirit and scope of the embodiments of the present invention. Thus, if such changes and modifications of the embodiments of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is intended to include such changes and modifications.

Claims

1. A display substrate, wherein: include: A base substrate, the base substrate comprising a display area and a frame area located around the display area; wherein the display area comprises: a first display area and a second display area located at least on one side of the first display area; A plurality of light-emitting devices are arranged in an array on the base substrate; the plurality of light-emitting devices include: a plurality of first light-emitting devices located in the first display area, and a plurality of second light-emitting devices located in the second display area; A plurality of pixel driving circuits are located between the base substrate and the layer where the plurality of light-emitting devices are located; the plurality of pixel driving circuits include: a plurality of first pixel driving circuits located in the frame area, and a plurality of second pixel driving circuits located in the second display area; wherein the plurality of first pixel driving circuits are electrically connected to the plurality of first light-emitting devices in a one-to-one correspondence, and the plurality of second pixel driving circuits are electrically connected to the plurality of second light-emitting devices in a one-to-one correspondence; a plurality of data lines located in the second display area; each of the data lines being connected to the first pixel driving circuit and the second pixel driving circuit, each of which is electrically connected to a column of the first light-emitting devices and a column of the second light-emitting devices, respectively, wherein the column of the first light-emitting devices and the column of the second light-emitting devices are arranged in the same column; A plurality of first routing lines extending along a row direction and a plurality of second routing lines extending along a column direction are provided in the second display area, wherein the data line arranged opposite the first display area is connected to at least one second routing line via one of the first routing lines, each of the second routing lines is electrically connected to a corresponding first pixel driving circuit, and the first light-emitting devices corresponding to the first pixel driving circuits to which the at least one second routing line is electrically connected are arranged in the same column.

2. The display substrate according to claim 1, wherein: Each of the first wirings is located at a plurality of row gaps adjacent to the first display area, and two first wirings are provided at the same row gap; The second wirings are arranged in a one-to-one correspondence at a plurality of column gaps on both sides of the first display area in the row direction.

3. The display substrate according to claim 2, wherein: Also includes: a plurality of first adapter wires located in the frame area adjacent to the first display area; Each of the first transfer lines is correspondingly connected to one of the second wirings and one of the first pixel driving circuits.

4. The display substrate according to claim 3, wherein: include: A first gate metal layer, a second gate metal layer, a first source-drain metal layer, and a second source-drain metal layer are stacked and insulated from each other; The data lines and the plurality of first transfer lines are arranged in the same layer as the first source-drain metal layer, the plurality of first routing lines are arranged in the same layer as the second gate metal layer, and the plurality of second routing lines are arranged in the same layer as the second source-drain metal layer.

5. The display substrate according to claim 1, wherein Also includes: Multiple shift registers are cascaded in the border area; wherein each of the shift registers is correspondingly connected to the first pixel driving circuit and the second pixel driving circuit that are electrically connected to a row of the first light-emitting devices and a row of the second light-emitting devices, respectively, and the row of the first light-emitting devices and the row of the second light-emitting devices are arranged in the same row.

6. The display substrate according to claim 5, wherein: The frame area includes: a first frame area adjacent to the first display area, a second frame area opposite to the first frame area, and a third frame area and a fourth frame area connecting the first frame area and the second frame area; The plurality of first pixel driving circuits are located in the first frame area, and the plurality of shift registers are located in at least one of the third frame area and the fourth frame area; The display substrate further includes: a plurality of connecting lines, located in at least one of the third border area and the fourth border area adjacent to the first display area, and the first border area; wherein one end of each of the connecting lines is correspondingly connected to one of the shift registers, and the other end is correspondingly connected to at least one of the first pixel driving circuits, and the first light-emitting devices electrically connected to the at least one first pixel driving circuit are arranged in the same row.

7. The display substrate according to claim 6, wherein: The plurality of shift registers arranged in cascade are divided into two groups, wherein one group of the plurality of shift registers arranged in cascade is at least located in the third border area, and the other group of the plurality of shift registers arranged in cascade is at least located in the fourth border area; The plurality of first pixel driving circuits are located in the first border area; The multiple connecting lines are specifically located in the third border area and the fourth border area adjacent to the first display area, and the first border area; wherein each of the connecting lines is connected to one of the shift registers and multiple first pixel driving circuits corresponding to the adjacent half row of the first light-emitting devices.

8. The display substrate according to claim 7, wherein: include: A first gate metal layer, a second gate metal layer, a first source-drain metal layer, and a second source-drain metal layer are stacked and insulated from each other; The plurality of connection lines are provided in the same layer as at least one of the first gate metal layer, the second gate metal layer and the second source / drain metal layer.

9. The display substrate according to claim 8, wherein: Each group of the plurality of shift registers arranged in cascade connection comprises: a plurality of first shift registers arranged in cascade connection, and a plurality of second shift registers arranged in cascade connection; The multiple connecting lines include: multiple first connecting lines arranged in the same layer as at least one of the first gate metal layer, the second gate metal layer and the second source and drain metal layer, and multiple second connecting lines arranged in the same layer as at least one of the first gate metal layer and the second gate metal layer; wherein each of the first connecting lines is electrically connected to a first shift register and a plurality of first pixel driving circuits corresponding to an adjacent half row of the first light-emitting devices; and each of the second connecting lines is electrically connected to a second shift register and a plurality of first pixel driving circuits corresponding to an adjacent half row of the first light-emitting devices.

10. The display substrate according to claim 9, wherein: The plurality of first shift registers arranged in cascade connection are located between the plurality of second shift registers arranged in cascade connection and the display area; Each of the first connecting lines is bent from a side of the first shift register close to the display area to the first border area between the first pixel driving circuit and the display area; Each of the second connecting lines is bent from a side of the second shift register away from the display area to the first border area between the first pixel driving circuit and the display area.

11. The display substrate according to claim 10, wherein: Also includes: A plurality of second transfer lines and a plurality of third transfer lines are provided in the first border area and on the same layer as the first source / drain metal layer; wherein, Each of the second transfer lines connects one of the first connection lines and one of the first pixel driving circuits, and each of the third transfer lines connects one of the second connection lines and one of the first pixel driving circuits.

12. The display substrate according to claim 11, wherein: Also includes: A plurality of gate lines and a plurality of light-emitting control lines are provided in the second display area and in the same layer as the first gate metal layer, and a plurality of fourth transfer lines and a plurality of fifth transfer lines are provided in the third frame area and the fourth frame area and in the same layer as the first source / drain metal layer; wherein, Each of the gate lines is electrically connected to the second pixel driving circuit of a half row, and is electrically connected to one of the first shift registers via one of the fourth transfer lines; Each of the light emitting control lines is electrically connected to the second pixel driving circuit of a half row, and is electrically connected to one of the second shift registers through one of the fifth switching lines.

13. The display substrate according to any one of claims 1 to 12, wherein: Also includes: A plurality of power signal lines extending in the column direction, one of the power signal lines is electrically connected to a column of the second pixel driving circuits, or one of the power signal lines is electrically connected to the first pixel driving circuits and the second pixel driving circuits in the same column.

14. The display substrate according to any one of claims 1 to 12, wherein: Also includes: a plurality of initialization signal lines extending along a row direction in the second display area, and a plurality of sixth transfer lines located in the frame area; Among them, one of the initialization signal lines is electrically connected to the second pixel driving circuit of half a row, and each of the initialization signal lines located on both sides of the row direction of the first display area is also electrically connected to the first pixel driving circuit corresponding to the first light-emitting device in the row through one of the sixth adapter lines.

15. The display substrate according to any one of claims 1 to 12, wherein: Also includes: A plurality of transparent wirings are located between the layer where the plurality of pixel driving circuits are located and the layer where the plurality of light emitting devices are located, and each of the transparent wirings is connected between the first pixel driving circuit and the first light emitting device in a one-to-one correspondence.

16. The display substrate according to any one of claims 1 to 12, wherein: The first display area is configured to install a light extraction module.

17. A display panel, wherein: The display substrate comprises the display substrate according to any one of claims 1 to 16.

18. A display device, wherein: include: A light extraction module and a display panel as claimed in claim 17; wherein the light extraction module is arranged in the first display area of the display panel.

Citation Information

Patent Citations

  • Display substrate, display panel and display device

    CN114730797A