High-speed demodulation method, device and equipment suitable for low-orbit satellites

Abstract

The present invention discloses a high-speed demodulation method, device and equipment suitable for low-orbit satellites. The demodulation method includes down-converting an intermediate frequency signal to a baseband signal, then decimating and down-sampling the baseband signal and low-pass filtering it, searching for the frame header through an FFT-based capture method, determining the pilot position, and then performing power estimation and channel gain control, followed by fast timing synchronization and carrier synchronization, and finally performing LDPC decoding on the synchronized data. The present invention adopts high-speed parallel processing technology and high-order modulation and demodulation technology, and the information processing capacity can reach more than 1Gbps; it also adopts high-dynamic capture and synchronization technology, which can adapt to the high-speed movement characteristics of low-orbit satellites. The center frequency and channel gain of the present invention are flexibly configurable, and can support a variety of rates and modulation methods, and are particularly suitable for high-speed signal communications in low-orbit satellite communication systems.

Description

Technical Field

[0001] The present invention relates to the field of satellite communications and can be used for high-speed signal communications in low-orbit satellite communications systems. Background Art

[0002] With the research and development of micro-satellite technology, the economic cost and difficulty of satellite communication have been significantly reduced, and the application of low-orbit satellite communication has become more and more extensive. At present, low-orbit satellite communication is mainly low-speed signal communication, and these low-speed signals are difficult to meet the needs of high-performance image transmission and large-capacity signal acquisition. Therefore, it is necessary to study the high-speed signal transmission of low-orbit satellites. Summary of the invention

[0003] In view of this, the present invention provides a high-speed demodulation method, device and equipment suitable for low-orbit satellites, which solves the problem of high-speed signal transmission of low-orbit satellites. The method adopts high-speed parallel processing technology and high-order modulation and demodulation technology, and the information processing capacity can reach more than 1Gbps; it also adopts high-dynamic capture and synchronization technology, which can adapt to the characteristics of high-speed movement of low-orbit satellites. The method can also support multiple rates and modulation modes, and has the advantages of high transmission performance and good real-time performance.

[0004] The object of the present invention is achieved in that:

[0005] A high-speed demodulation method applicable to a low-orbit satellite comprises the following steps:

[0006] (1) Receive the RF signal and convert it into an IF signal through analog down-conversion;

[0007] (2) Use high-speed AD to sample the intermediate frequency signal to obtain multiple parallel digital signals;

[0008] (3) Use configurable digital down-conversion to move the digital signal to zero frequency and convert it into a baseband signal;

[0009] (4) extracting and filtering the baseband signal, wherein the extraction multiple is set to different values ​​according to different symbol rates; filtering adopts a matched filtering method to perform low-pass filtering to reduce inter-symbol crosstalk and filter out-of-band noise;

[0010] (5) The filtered signal is captured with a fixed length through a sliding window, and the pilot position is determined by capturing the synchronization header;

[0011] (6) Use pilot signals to estimate power and use the power information as a state parameter to control channel gain;

[0012] (7) Use pilot signals for fast timing synchronization and carrier synchronization;

[0013] (8) Demap and LDPC decode the synchronized data.

[0014] Furthermore, the analog down-conversion in step (1) is implemented by a module with configurable frequency points, and an intermediate frequency signal with a variable center frequency point is obtained by configuring different frequency points.

[0015] Furthermore, the digital down-conversion in step (3) is implemented by a frequency-configurable module.

[0016] Furthermore, the specific method of step (5) is:

[0017] 1) For the filtered signal, only the sign bit is taken as the signal amplitude; that is, only +1 or -1 is taken to obtain the normalized signal amplitude that is independent of the signal amplitude;

[0018] 2) Using the length of the synchronization header as the length of the sliding window, perform a sliding XOR operation on the normalized signal and the synchronization header content, and then perform partial length accumulation, i.e., partial correlation operation, to obtain multiple correlation values;

[0019] 3) padding the multiple correlation values ​​with zeros and then performing FFT operation;

[0020] 4) Search for the maximum amplitude after FFT operation and determine whether it is greater than the threshold. If it is greater than the threshold, the capture is considered successful; if it is not greater than the threshold, continue sliding capture.

[0021] Furthermore, the synchronization header in step (5) is a segment of continuous data, and the length and content of the synchronization header are determined when the frame structure is designed.

[0022] Furthermore, the timing synchronization and carrier synchronization in step (7) are both synchronized using pilot signals, wherein the pilot signals for timing synchronization are 1 and 0 codes, and the pilot signals for carrier synchronization are single carrier signals.

[0023] A high-speed demodulation device suitable for low-orbit satellites, comprising a frequency conversion module a, a high-speed ADb, a preprocessing module c, a capture module d, a synchronization module e, a high-speed demodulation and decoding module f, a power estimation module g, a parameter configuration module h, a channel gain control module i, and a control center j;

[0024] The parameter configuration module h receives the control signal sent by the control center j and parses the instruction, and sends the parsed frequency point to the frequency conversion module a to control the central frequency point of the frequency conversion; the parsed modulation coding mode and other parameters are sent to the pre-processing module c, the capture module d, the synchronization module e, and the high-speed demodulation and decoding module f to control the modulation mode and symbol rate of these modules. In addition, the parameter configuration module h also receives the status information sent by these modules and reports it to the control center j; the parameter configuration module h also receives the power information of the power estimation module g, and sends the level control parameter to the channel gain control module i;

[0025] The preprocessing module c includes a parallel digital down-conversion module, a parallel extraction module, a parallel matched filtering module and a power estimation and adjustment module; the preprocessing module c receives the sampling data of the high-speed ADb, and completes the functions of down-conversion, extraction, filtering, etc. according to the frequency point, rate and other parameters sent by the parameter configuration module h, and then sends it to the capture module d; the power estimation module g sends the power information to the parameter configuration module h; the capture module d completes the positioning function, determines the pilot position, and sends it to the synchronization module e;

[0026] The synchronization module e includes a timing synchronization module and a carrier synchronization module to achieve precise synchronization of the clock and the carrier;

[0027] The high-speed demodulation and decoding module f includes parallel demapping and multi-channel decoding modules to complete the demapping and LDPC decoding of signals with different modulation modes;

[0028] The channel gain control module i receives the power parameters sent by the parameter configuration module h and controls the level gain of the analog channel.

[0029] A high-speed demodulation device suitable for low-orbit satellites includes a chassis, a processor and a memory, wherein the memory stores program codes, and when the program codes are executed, the method described in any one of the above items is implemented.

[0030] Compared with the background technology, the present invention has the following advantages:

[0031] 1. The present invention adopts high-speed parallel processing technology and high-order modulation and demodulation technology, and the information processing capacity can reach more than 1Gbps.

[0032] 2. The present invention adopts high-dynamic capture and synchronization technology, which can adapt to the high-speed movement characteristics of low-orbit satellites.

[0033] 3. The present invention can support multiple rates and modulation modes.

[0034] 4. The center frequency and channel gain of the present invention are flexibly configurable.

[0035] 5. The present invention has the advantages of high transmission performance and good real-time performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 is a flow chart of the method of the present invention.

[0037] Figure 2 It is a schematic diagram of the connection relationship of the device of the present invention.

[0038] Figure 3 This is a flow chart of the FFT-based acquisition method in step (5).

[0039] Figure 4 It is a block diagram of the device of the present invention. DETAILED DESCRIPTION

[0040] The present invention is described in further detail below.

[0041] like Figure 1 As shown, a high-speed demodulation method applicable to a low-orbit satellite comprises the following steps:

[0042] (1) Receive the RF signal and convert it into an IF signal through analog down-conversion;

[0043] (2) Use high-speed AD to sample the intermediate frequency signal to obtain multiple parallel digital signals;

[0044] (3) using configurable digital down-conversion to shift the digital signal to zero frequency and convert it into a baseband signal;

[0045] (4) Extracting and filtering the baseband signal. The extraction multiple is set to different values ​​according to different symbol rates; filtering adopts matched filtering to perform low-pass filtering, reduce inter-symbol crosstalk, and filter out-of-band noise;

[0046] (5) The filtered signal is captured with a fixed length through a sliding window, and the pilot position is determined by capturing the synchronization header;

[0047] (6) Use pilot signals to estimate power and use the power information as a state parameter to control channel gain;

[0048] (7) Use pilot signals for fast timing synchronization and carrier synchronization;

[0049] (8) Demap and LDPC decode the synchronized data.

[0050] Furthermore, the analog down-conversion in step (1) is a frequency-configurable module, and an intermediate frequency signal with a variable center frequency can be obtained by configuring different frequencies within a certain range;

[0051] Furthermore, the digital down-conversion in step (3) is similar to the analog down-conversion in step (2), and is still a frequency-configurable module.

[0052] Furthermore, the capture method in step (5) adopts an FFT-based amplitude normalization partial coherence capture method, which normalizes the signal amplitude so that the calculation result is not affected by the signal amplitude and can adapt to the high dynamic characteristics of low-orbit satellites. The length of the sliding window is the length of the synchronization head. Figure 3 As shown, the specific method is:

[0053] 1) For the signal after matched filtering, only the sign bit is taken as the signal amplitude; that is, only +1 or -1 is taken to obtain the normalized signal amplitude that is independent of the signal amplitude;

[0054] 2) performing a sliding XOR operation on the normalized signal and the synchronization header content, and then performing a partial length accumulation, i.e., a partial correlation operation, to obtain a plurality of correlation values;

[0055] 3) Filling the several correlation values ​​with zeros of a certain length and then performing FFT operation;

[0056] 4) Search for the maximum amplitude after FFT operation and determine whether it is greater than the threshold. If it is greater than the threshold, the capture is considered successful; if it is not greater than the threshold, continue sliding capture.

[0057] Furthermore, the synchronization header in step (5) is a continuous data segment, and the length and content of the synchronization header are determined when the frame structure is designed. A pseudo-random sequence is generally selected as the synchronization header.

[0058] Furthermore, the timing synchronization and carrier synchronization in step (7) are both synchronized using pilot signals, wherein the pilot signals for timing synchronization are 1 and 0 codes, and the pilot signals for carrier synchronization are single carrier signals. Carrier synchronization supports high-dynamic frequency tracking and can adapt to large frequency deviations and large frequency change rates caused by high-speed movement of low-orbit satellites;

[0059] like Figure 2 As shown, a high-speed demodulation device suitable for low-orbit satellites includes a frequency conversion module a, a high-speed AD b, a pre-processing module c, a capture module d, a synchronization module e, a high-speed demodulation and decoding module f, a channel gain control module i, a parameter configuration module h, and a control center j;

[0060] The parameter configuration module h receives the control signal sent by the control center j and parses the instruction, and sends the parsed frequency point to the frequency conversion module a to control the central frequency point of the frequency conversion; sends the parsed modulation coding mode and other parameters to the pre-processing module c, the capture module d, the synchronization module e, and the high-speed demodulation and decoding module f to control the modulation mode and symbol rate of these modules. In addition, it receives the status information sent by these modules and reports it to the control center j; the parameter configuration module h also sends the level control parameter to the channel gain control module i;

[0061] The preprocessing module c includes a parallel digital down-conversion module, a parallel extraction module, a parallel matched filtering module and a power estimation and adjustment module. The preprocessing module c receives the sampling data of the high-speed ADb, and completes the functions of down-conversion, extraction, filtering, etc. according to the frequency point, rate and other parameters sent by the parameter configuration module h, and then sends it to the capture module d; the power estimation and adjustment module sends the power information to the parameter configuration module h; the capture module d completes the positioning function, determines the pilot position, and sends it to the synchronization module e;

[0062] The synchronization module e includes a timing synchronization module and a carrier synchronization module to achieve precise synchronization of the clock and the carrier;

[0063] The high-speed demodulation and decoding module f includes parallel demapping and multi-channel decoding modules to complete the demapping and LDPC decoding of signals with different modulation modes.

[0064] The channel gain control module i receives the power parameter sent by the parameter configuration module h to control the level gain of the analog channel.

[0065] like Figure 4 As shown, a high-speed demodulation device suitable for low-orbit satellites includes a chassis, one or more processors, and a memory, the memory stores program code, and the processor is used to execute the program code; when the program code is running, it is used to implement the above method.

[0066] In summary, the present invention adopts high-speed parallel processing technology and high-order modulation and demodulation technology, and the information processing capacity can reach more than 1Gbps; it also adopts high-dynamic capture and synchronization technology, which can adapt to the characteristics of high-speed movement of low-orbit satellites. The center frequency and channel gain of the present invention are flexibly configurable, and can support a variety of rates and modulation modes, and are particularly suitable for high-speed signal communication of low-orbit satellite communication systems.

[0067] The above is only a specific implementation of the present invention, but the protection scope of the present invention is not limited thereto. Any equivalent replacement or change made by a person skilled in the art based on the technical solution and inventive concept of the present invention shall be included in the protection scope of the present invention.

Claims

1. A high-speed demodulation method suitable for low-orbit satellites, characterized in that: The following steps are involved: (1) Receive the RF signal and convert it into an IF signal through analog down-conversion; (2) Use high-speed AD to sample the intermediate frequency signal to obtain multiple parallel digital signals; (3) Use configurable digital down-conversion to move the digital signal to zero frequency and convert it into a baseband signal; (4) extracting and filtering the baseband signal, wherein the extraction multiple is set to different values ​​according to different symbol rates; filtering adopts a matched filtering method to perform low-pass filtering to reduce inter-symbol crosstalk and filter out-of-band noise; (5) The filtered signal is captured with a fixed length through a sliding window, and the pilot position is determined by capturing the synchronization header; the specific method is as follows: 1) For the filtered signal, only the sign bit is taken as the signal amplitude; that is, only +1 or -1 is taken to obtain the normalized signal amplitude that is independent of the signal amplitude; 2) Using the length of the synchronization header as the length of the sliding window, perform a sliding XOR operation on the normalized signal and the synchronization header content, and then perform partial length accumulation, i.e., partial correlation operation, to obtain multiple correlation values; 3) padding the multiple correlation values ​​with zeros and then performing FFT operation; 4) Search for the maximum amplitude after FFT operation and determine whether it is greater than the threshold. If it is greater than the threshold, the capture is considered successful; If it is not greater than the threshold, continue sliding capture; (6) Use pilot signals to estimate power and use the power information as a state parameter to control channel gain; (7) Using pilot signals for fast timing synchronization and carrier synchronization, where both timing synchronization and carrier synchronization are synchronized using pilot signals, where the pilot signals for timing synchronization are 1 and 0 codes, and the pilot signals for carrier synchronization are single carrier signals; (8) Demap and LDPC decode the synchronized data.

2. The high-speed demodulation method applicable to low-orbit satellites according to claim 1, characterized in that: The analog down-conversion in step (1) is implemented by a frequency-configurable module, and an intermediate frequency signal with a variable center frequency is obtained by configuring different frequencies.

3. The high-speed demodulation method applicable to low-orbit satellites according to claim 1, characterized in that: The digital down-conversion in step (3) is implemented through a frequency-configurable module.

4. The high-speed demodulation method applicable to low-orbit satellites according to claim 1, characterized in that: The synchronization header in step (5) is a piece of continuous data. The length and content of the synchronization header are determined when the frame structure is designed.

5. A high-speed demodulation device suitable for low-orbit satellites, characterized in that: The invention comprises a chassis, a processor and a memory, wherein the memory stores a program code, and when the program code is executed, the method according to any one of claims 1 to 4 is implemented.

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