Memory mapping method, device, chip, storage medium and program product

Abstract

The application provides a memory mapping method, device, chip, storage medium and program product. When a thread running on a chip is switched from a first thread to a second thread, if a virtual address space corresponding to the first thread and the second thread at least partially overlaps, and mapping parameters of the first thread and the second thread do not match, the mapping relationship corresponding to the first thread is released; the mapping parameter is used to indicate a physical address space of an external memory used; a mapping relationship between a virtual address corresponding to the second thread and a physical address of the external memory is established according to the mapping parameter of the second thread, so that the second thread is run based on the corresponding mapping relationship. Through the release and remapping of the memory mapping corresponding to the external memory, the time-sharing multiplexing of the memory of the external memory is realized, the memory of the external memory is expanded, and a basis is provided for enriching the functions of the chip.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data processing, and particularly relates to a memory mapping method and device, a chip, a storage medium and a program product. BACKGROUND

[0002] With the complication of chip functions, many self-built memories of chips cannot meet the requirements, and external memories with larger memory need to be expanded to solve the problem of insufficient memory.

[0003] Due to the limitation of chip design, the address space accessible by the chip is limited. Assuming that the single-access address space of the chip is 4M, the chip can only expand 4M external memory, and the expansion capacity is limited, which cannot support more complex functions. SUMMARY

[0004] The present application provides a memory mapping method, device, chip, storage medium and program product, which improves the capacity of the expandable memory of the chip through time-sharing multiplexing of the memory of the external memory, and further improves the memory of the chip, so that the chip supports more abundant functions.

[0005] In a first aspect, the present application provides a memory mapping method applied to a chip externally connected with an external memory, and the method comprises the following steps.

[0006] When a running thread is switched from a first thread to a second thread, if the virtual address spaces corresponding to the first thread and the second thread at least partially overlap, and the mapping parameters of the first thread and the second thread do not match, the mapping relationship corresponding to the first thread is released.

[0007] The mapping parameter is used to indicate the physical address space of the used external memory.

[0008] According to the mapping parameter of the second thread, a mapping relationship between the virtual address corresponding to the second thread and the physical address of the external memory is established, so that the second thread is run based on the corresponding mapping relationship.

[0009] Optionally, if the virtual address spaces corresponding to the first thread and the second thread at least partially overlap, and the mapping parameters of the first thread and the second thread do not match, the mapping relationship corresponding to the first thread is released, which comprises the following steps.

[0010] If the virtual address spaces corresponding to the first thread and the second thread at least partially overlap, the mapping parameters corresponding to the first thread and the second thread are obtained respectively.

[0011] If the mapping parameter of the first thread and the mapping parameter of the second thread are not equal, the mapping relationship corresponding to the first thread is released.

[0012] Optionally, the first thread and the second thread share the same virtual address space.

[0013] If the virtual address space corresponding to the first thread and the virtual address space corresponding to the second thread at least partially overlap, and the mapping parameter of the first thread and the mapping parameter of the second thread do not match, the mapping relationship corresponding to the first thread is released, including:

[0014] The mapping parameter corresponding to the first thread and the mapping parameter corresponding to the second thread are obtained.

[0015] If the mapping parameter of the first thread and the mapping parameter of the second thread are not equal, the mapping relationship corresponding to the first thread is released.

[0016] Optionally, the method further comprises:

[0017] When the running thread is switched from the first thread to the second thread, the mapping parameter of the first thread is stored in a preset field of the thread context of the first thread.

[0018] Correspondingly, the mapping parameter of the first thread is obtained, including:

[0019] Based on the second thread, the thread context of the first thread is obtained.

[0020] The value of the preset field in the thread context is determined as the mapping parameter of the first thread.

[0021] Optionally, before the mapping parameter corresponding to the first thread and the mapping parameter corresponding to the second thread are obtained, the method further comprises:

[0022] When the running thread is switched from the first thread to the second thread, the physical address space corresponding to the second thread is determined.

[0023] Correspondingly, the mapping parameter corresponding to the first thread and the mapping parameter corresponding to the second thread are obtained, including:

[0024] When the physical address space is located on the external memory, the mapping parameter corresponding to the first thread and the mapping parameter corresponding to the second thread are obtained.

[0025] Optionally, the address space of the external memory is divided into a first address space and a second address space; according to the mapping parameter of the second thread, the mapping relationship between the virtual address corresponding to the second thread and the physical address of the external memory is established.

[0026] if the mapping parameter of the second thread is the first parameter, then a mapping relationship between a virtual address space corresponding to the second thread and the first address space is established; and / or,

[0027] if the mapping parameter of the second thread is the second parameter or the mapping parameter of the second thread is default, then a mapping relationship between a virtual address space corresponding to the second thread and the second address space is established.

[0028] Optionally, the mapping relationship between the virtual address corresponding to the second thread and the physical address of the external memory is established according to the mapping parameter of the second thread, and includes:

[0029] The extended memory management interface of the chip is configured according to the mapping parameter of the second thread, so as to establish the mapping relationship corresponding to the second thread; and the mapping relationship corresponding to the second thread is stored.

[0030] Optionally, the extended memory management interface of the chip includes a physical address allocation interface, a virtual address allocation interface, an address mapping interface, a physical address release interface, a virtual address release interface and a demapping interface.

[0031] Optionally, the mapping parameter of the thread is configured by configuring an external memory mapping function corresponding to the thread.

[0032] In a second aspect, the present application provides a memory mapping device, which is applied to a chip externally connected with an external memory, and the device includes:

[0033] A mapping release module is configured to, when a running thread is switched from a first thread to a second thread, if a virtual address space corresponding to the first thread and a virtual address space corresponding to the second thread at least partially overlap, and a mapping parameter of the first thread and a mapping parameter of the second thread do not match, then release a mapping relationship corresponding to the first thread.

[0034] The mapping parameter is used to indicate a physical address space of the used external memory.

[0035] A memory mapping module is configured to, according to the mapping parameter of the second thread, establish a mapping relationship between a virtual address corresponding to the second thread and a physical address of the external memory, so as to run the second thread based on the corresponding mapping relationship.

[0036] In a third aspect, the present application provides a chip, which includes:

[0037] The chip is externally connected with an external memory, a processor and a memory in communication connection with the processor; the memory stores computer execution instructions; and the processor executes the computer execution instructions stored in the memory, so as to realize the method provided in the first aspect of the present application.

[0038] In a fourth aspect, the present application provides a computer readable storage medium, wherein computer execution instructions are stored in the computer readable storage medium, and the computer execution instructions are used to implement the method provided in the first aspect of the present application when executed by a processor.

[0039] In a fifth aspect, the present application provides a computer program product, comprising a computer program, wherein the computer program is used to implement the method provided in the first aspect of the present application when executed by a processor.

[0040] The memory mapping method, device, chip, storage medium and program product provided by the present application are used for the chip externally connected with the external memory. When the chip runs multiple threads, the thread switching is implemented by allocating time slices for the threads. When the thread running by the chip is switched, such as from the first thread to the second thread, if the virtual address spaces corresponding to the first thread and the second thread at least partially overlap, and the mapping parameters of the first thread and the second thread do not match, the mapping relationship between the virtual address corresponding to the first thread running previously and the physical address of the external memory is released, the mapping relationship between the virtual address corresponding to the second thread and the physical address of the external memory is established based on the mapping parameter of the second thread, and then the second thread is run based on the established mapping relationship of the second thread. In the thread switching, the release and re-establishment of the mapping relationship are implemented, which allows different threads to access different physical address spaces of the external memory, thereby improving the capacity of the expandable memory of the chip, providing a basis for enriching the functions supported by the chip, and enabling the chip to support functions involving large data processing such as audio and image; meanwhile, through the above memory mapping method, the user does not need to care about the physical space accessed by the thread when configuring the thread, and only needs to focus on the configuration of the virtual space, thereby improving the efficiency of function development. BRIEF DESCRIPTION OF DRAWINGS

[0041] The accompanying drawings, which are incorporated into and form a part of the specification, illustrate an embodiment consistent with the present application and, together with the description, serve to explain the principles of the application.

[0042] Figure 1 A schematic diagram of an application scenario provided by an embodiment of the present application;

[0043] Figure 2 A flowchart of a memory mapping method provided by an embodiment of the present application;

[0044] Figure 3 A schematic diagram of a memory mapping process provided by an embodiment of the present application;

[0045] Figure 4 A flowchart of another memory mapping method provided by an embodiment of the present application;

[0046] Figure 5 A chip structure schematic diagram provided for an embodiment of the present application.

[0047] The specific embodiments of the present application have been shown through the above-described drawings, and will be described in more detail hereinafter. These drawings and the written description are not intended to restrict the scope of the present application by any means, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0048] The exemplary embodiments will be described in detail herein with reference to the attached drawings. The same numbers refer to the same elements throughout the drawings. The following detailed description does not limit the present application to particular embodiments. Instead, the scope of the present application is to be defined by the appended claims, and equivalents thereof, in which:

[0049] Figure 1 A schematic diagram of an application scenario provided for an embodiment of the present application is shown in FIG. 1. Figure 1 As shown in FIG. 1, the chip processes the time corresponding to the thread service of the processor by means of time slice rotation, and then saves the state of the thread, switches to another thread, provides service for the thread, and thus realizes parallel execution of multiple threads, and realizes various functions of the chip through the running of the threads.

[0050] The chip is built-in with an internal memory with a small capacity, such as 328 kB, and needs to be externally expanded with an external memory in order to adapt to a scenario with a more complex function. The processor of the chip accesses the internal memory and the external memory through a bus. Due to the limitation of the bus width, the capacity of the external memory is usually the maximum address space (addressing capability of the processor) that can be accessed by the processor at a time, such as 4M, and the physical address of the external memory is mapped to the virtual address region of the chip through default address mapping, so that the thread accesses the mapped physical address of the external memory through the virtual address during running.

[0051] When the capacity of the externally expanded external memory chip (such as 8M) is greater than the corresponding address range (such as 4M) that can be accessed by the processor at a time limited by the bus width, the processor of the chip can only access part of the physical address of the external memory mapped with the virtual address through the above-mentioned manner, and the default configuration is usually the low address space, such as the low 4M address space, which leads to resource waste and makes the chip unable to support functions that need to occupy more than 4M memory.

[0052] The capacity of the external memory is 8M. If the processing needs to access the external memory greater than 4M, for example, two threads access the low 4M address space of the external memory and the high 4M address space of the external memory, when the processor executes one of the threads, the atomic code needs to be controlled to prevent the thread from being interrupted by other threads during running, so as to prevent the incorrect access of the memory. The above processing method needs to modify a large amount of business code, the development efficiency is low, and the parallel execution efficiency of the threads is reduced.

[0053] In order to improve the range of the physical address of the external memory accessible by the processor, so that the chip supports more complex functions, improves the richness of the functions of the chip, improves the development efficiency, and ensures the parallel execution of the threads, the present application provides a memory mapping method. For the scene of running multiple threads by the chip processor, the chip is externally connected with an external memory. When the running thread is switched, for example, from a first thread to a second thread, if the first thread and the second thread share at least part of the virtual address space, it is judged whether the mapping parameters of the first thread and the second thread match. If they do not match, it indicates that the physical address space of the external memory corresponding to the first thread and the second thread is different. Therefore, the mapping relationship corresponding to the first thread needs to be released first, and then the mapping relationship corresponding to the second thread is established based on the mapping parameters of the second thread. The second thread is run based on the established mapping relationship, so as to realize the access to the physical address space corresponding to the address range of the single access of the external memory greater than the bus width limit of the chip, improve the range of the accessible physical address space, and provide a memory basis for enriching the functions supported by the chip.

[0054] Meanwhile, through the automatic release and re-establishment of the mapping relationship at the system level, the developer only needs to focus on the configuration of the virtual address of the thread at the application layer, without the need for atomic configuration of the memory access, so as to prevent the thread from being interrupted by other threads, improve the development efficiency, and improve the execution efficiency through the parallel execution of the multiple threads.

[0055] The technical solutions of the present application and how the technical solutions of the present application solve the above technical problems will be described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes can not be described again in some embodiments. The embodiments of the present application will be described below with reference to the drawings.

[0056] Figure 2 A flowchart of a memory mapping method provided by the embodiments of the present application is shown. The memory mapping method can be executed by a chip, such as a processor of the chip. The chip can be any model of chip, and the chip is externally connected with an external memory.

[0057] In one embodiment, the mapping granularity of the MMU (Memory Management Unit) of the chip is 32kB.

[0058] In one embodiment, the chip is a dual-core system, including two processors, accessing the internal memory of the chip and the external memory connected to the chip through a bus.

[0059] The capacity of the external memory connected to the chip is N times of the addressing capability of the processor of the chip, where N is a positive integer greater than or equal to 2.

[0060] The addressing capability of the processor is determined by the bit width of the processor bus, such as 4M, 8M or other ranges.

[0061] As shown in FIG. 1, the memory mapping method includes the following steps: Figure 2

[0062] When the running thread is switched from the first thread to the second thread, if the virtual address spaces corresponding to the first thread and the second thread at least partially overlap, and the mapping parameters of the first thread and the second thread do not match, the mapping relationship corresponding to the first thread is released.

[0063] The mapping parameter is used to indicate the physical address space of the used external memory.

[0064] In the process of thread scheduling, thread switching is performed to realize multi-thread parallel execution. When the running thread is switched, such as from the first thread to the second thread, it can be first determined whether the virtual address spaces corresponding to the first thread and the second thread overlap, i.e., whether there is an overlapping part. If yes, it is determined whether the mapping parameters of the first thread and the second thread match. If not, the mapping relationship corresponding to the first thread is released.

[0065] If the virtual address spaces of the second thread and the first thread do not overlap, or the mapping parameters corresponding to the first thread and the second thread are the same, the mapping relationship corresponding to the first thread does not need to be released, and step S202 is directly executed to establish the mapping relationship corresponding to the second thread.

[0066] In one embodiment, the first thread and the second thread can share the same virtual address space.

[0067] The mapping parameters of each thread (including the first thread and the second thread) accessing the external memory can be configured in advance, and then when the running thread is switched, such as from the first thread to the second thread, the mapping parameters of the first thread and the second thread are obtained, and then it is determined whether the mapping parameters of the first thread and the second thread match.

[0068] ​The mapping parameter mismatch can be that the mapping parameters have different values. Different values of the mapping parameters can correspond to different mapping relationships or different physical address spaces.

[0069] If the physical address spaces corresponding to the first thread and the second thread completely coincide, the mapping parameters corresponding to the first thread and the second thread match.

[0070] For example, the mapping parameters can include a start address and an end address. If the start addresses of the mapping parameters corresponding to the two threads (the first thread and the second thread) are the same, and the end addresses are also the same, it is determined that the mapping parameters of the two threads match.

[0071] In an embodiment, the mapping parameters corresponding to a thread (such as the first thread, the second thread, etc.) are configured by an external memory mapping function or interface corresponding to the thread.

[0072] When a user writes code corresponding to a thread, the user can assign values to the external memory mapping function or interface to configure mapping parameters for the thread, thereby indicating the physical address space of the external memory that the processor thread needs to access.

[0073] The switching of the threads is scheduled by a processor of a chip. The processor can schedule the threads based on time slices allocated to the threads, thereby running the corresponding threads in the corresponding time slices to achieve parallel execution of multiple threads. Each thread corresponds to a task, and the designed function or application is achieved by running multiple threads corresponding to a process.

[0074] When a running thread is switched from the first thread to the second thread, the mapping relationship and the mapping parameters corresponding to the first thread can also be stored, such as being stored in the context of the first thread, so as to, when the first thread is resumed, establish a mapping between the virtual address corresponding to the first thread and the physical address based on the saved mapping relationship corresponding to the first thread, thereby reducing the time required for memory mapping, improving mapping efficiency, and further improving the efficiency of multi-threaded execution; and facilitating quick reading of the mapping parameters of the first thread through the context when the threads are switched.

[0075] After the mapping relationship corresponding to the first thread is released, the virtual address space corresponding to the first thread is also released, and the second thread is switched to, so as to run the second thread after the mapping relationship corresponding to the second thread is established.

[0076] The mapping relationship referred to in the present application refers to the mapping relationship between the virtual address of a chip and the physical address of an external memory, unless otherwise specified.

[0077] In step S202, a mapping relationship between a virtual address corresponding to the second thread and a physical address of the external memory is established according to mapping parameters of the second thread, so that the second thread is run based on the corresponding mapping relationship.

[0078] Specifically, after switching to the second thread, a physical address space of the external memory corresponding to the second thread is determined according to mapping parameters of the second thread, and the determined physical address space is allocated to the second thread; a virtual address space corresponding to the second thread is allocated, and a mapping relationship between the allocated physical address space and the virtual address space is established, the second thread is run, and through the established mapping relationship, the storage and calling of the calculated data are realized by accessing the physical address of the corresponding external memory, so that the calculation task corresponding to the second thread is completed.

[0079] Further, when the second thread is switched to another thread such as the first thread or the third thread, the mapping relationship corresponding to the second thread and the mapping parameters can also be stored in the context of the second thread.

[0080] The memory mapping method provided in the application is for the scenario of running multiple threads by a chip processor, the chip is externally connected with an external memory, when a running thread is switched, such as switching from the first thread to the second thread, if the first thread and the second thread share at least part of the virtual address space, it is determined whether the mapping parameters of the first thread and the second thread match, if not, it indicates that the physical address spaces of the external memories corresponding to the first thread and the second thread are different, then the mapping relationship corresponding to the first thread needs to be removed first, and then the mapping relationship corresponding to the second thread is established based on the mapping parameters of the second thread, and the second thread is run based on the established mapping relationship, so that the physical address space of the corresponding address range of the external memory accessed by a single access greater than the bus width limit of the chip is realized, the range of the accessible physical address space is improved, the memory basis for enriching the functions supported by the chip is provided, at the same time, the mapping relationship is automatically removed and re-established at the system level, so that the developer only needs to focus on the configuration of the virtual address of the thread at the application layer, without performing the atomic configuration of the memory access, so as to avoid the interruption of the thread by other threads, the development efficiency is improved, and the execution efficiency is improved through the parallel execution of multiple threads.

[0081] Optionally, if the virtual address spaces corresponding to the first thread and the second thread at least partially coincide, and the mapping parameters of the first thread and the mapping parameters of the second thread do not match, the mapping relationship corresponding to the first thread is removed, including:

[0082] If the virtual address spaces corresponding to the first thread and the second thread at least partially overlap, mapping parameters corresponding to the first thread and the second thread are obtained; if the mapping parameters of the first thread and the second thread are not equal, the mapping relationship corresponding to the first thread is released.

[0083] Optionally, the first thread and the second thread share the same virtual address space; if the virtual address spaces corresponding to the first thread and the second thread at least partially overlap and the mapping parameters of the first thread and the second thread do not match, the mapping relationship corresponding to the first thread is released, including:

[0084] Mapping parameters corresponding to the first thread and the second thread are obtained; if the mapping parameters of the first thread and the second thread are not equal, the mapping relationship corresponding to the first thread is released.

[0085] The first thread and the second thread share the same virtual address space, i.e., the virtual address spaces corresponding to the first thread and the second thread are the same.

[0086] In one embodiment, the mapping parameter can have at least two values, such as a first parameter and a second parameter; when the mapping parameters of the first thread and the second thread have different values, the mapping relationship corresponding to the first thread is released, and the virtual address space corresponding to the first thread is released.

[0087] In one embodiment, when the mapping parameter is a first parameter, it can indicate that the corresponding thread needs to access a high address space of the external memory, such as a high 4M address space; when the mapping parameter is a second parameter, it can indicate that the corresponding thread needs to access a low address space of the external memory, such as a low 4M address space.

[0088] By the value of the mapping parameter, different threads access different physical address segments of the external memory, which is simple to configure and easy to implement. When the threads sharing the virtual address space are switched, the memory mapping is released and remapped through the comparison of the mapping parameters, thereby improving the efficiency of thread scheduling.

[0089] Optionally, before obtaining the mapping parameters corresponding to the first thread and the second thread, the method further includes: when the running thread is switched from the first thread to the second thread, determining the physical address space corresponding to the second thread. Correspondingly, obtaining the mapping parameters corresponding to the first thread and the second thread includes: when the physical address space is located on the external memory, obtaining the mapping parameters corresponding to the first thread and the second thread.

[0090] The thread corresponding to the physical address space can be determined according to the interval in which the physical address space is located.

[0091] The mapping relationship corresponding to the first thread is the mapping relationship between the physical address of the external memory and the chip virtual address, and when the running thread is switched from the first thread to the second thread, it can be determined whether the physical address space corresponding to the second thread is located on the external memory, and if not, the subsequent steps do not need to be performed, and the corresponding virtual address space and physical address space of the second thread are directly allocated, and the mapping relationship between the virtual address space and the physical address space corresponding to the second thread is established and saved.

[0092] If the physical address space of the second thread is located on the external memory, the mapping parameters of the first thread and the second thread are obtained, and it is determined whether the mapping parameters of the two are matched, such as whether they are equal, and if not, the mapping relationship corresponding to the first thread is removed, and the virtual space address of the first thread is released, so that the virtual address space corresponding to the second thread can be allocated to the second thread.

[0093] In one embodiment, if the mapping parameter of the second thread is detected, it is determined that the second thread is a thread that needs to access the external memory, that is, the physical address space required to be accessed (or corresponding) by the second thread is located on the external memory.

[0094] Optionally, according to the mapping parameter of the second thread, the mapping relationship between the virtual address corresponding to the second thread and the physical address of the external memory is established, comprising:

[0095] According to the mapping parameter of the second thread, the extended memory management interface of the chip is configured to establish the mapping relationship corresponding to the second thread; and the mapping relationship corresponding to the second thread is stored.

[0096] The extended memory management interface of the chip can include a physical address allocation interface, a virtual address allocation interface, an address mapping interface, a physical address release interface, a virtual address release interface, and a demapping interface. The demapping interface is used to remove the mapping relationship, and the mapping relationship corresponding to the first thread can be removed through the demapping interface, so that the virtual space interval corresponding to the first thread is released based on the virtual address release interface, so as to allocate at least part (the part overlapping with the virtual space corresponding to the second thread) or all of the virtual space interval corresponding to the first thread to the second thread through the virtual address allocation interface.

[0097] Specifically, the physical address allocation interface, the virtual address allocation interface and the address mapping interface of the chip can be configured according to the value of the mapping parameter of the second thread and the physical address space and the virtual address space corresponding to the second thread, so as to allocate the corresponding physical address space for the second thread through the physical address allocation interface, allocate the corresponding virtual address space for the second thread through the virtual address allocation interface, and establish the mapping relationship between the corresponding physical address space and the corresponding virtual address space of the second thread through the address mapping interface. Then, the running thread is switched to the second thread, and the second thread is run.

[0098] Through the configuration of one mapping parameter, the configuration of multiple memory mapping related interfaces of the chip is realized, the configuration steps are simplified, and the memory mapping efficiency is improved.

[0099] Exemplarily, Figure 3 The schematic diagram of the memory mapping process provided by the embodiment of the application is shown in Figure 3 It is assumed that the addressing capability of the chip processor is 4M, the memory of the external memory externally connected is 8M, the mapping parameter of the first thread is 0, that is, the low 4M address space of the external memory is accessed, the mapping parameter of the second thread is 1, that is, the high 4M address space of the external memory is accessed, and the first thread and the second thread share the same virtual address space, such as 0x3F80_0000 to 0x3FBF_FFFF. When the running thread is switched from the first thread to the second thread, the memory mapping process is specifically as follows:

[0100] First, the mapping parameter and the mapping relationship of the first thread are stored in the context of the first thread, the mapping relationship corresponding to the first thread is released, and the virtual address space is released; it is assumed that the second thread has been run before the switching, the second thread is restored to the system, the mapping relationship between the virtual address space (0x3F80_0000 to 0x3FBF_FFFF) and the high 4M address space of the external memory is established, and thus the high 4M address space of the external memory is accessed.

[0101] Through the setting of multiple threads with different mapping parameters, the physical address space of the external memory greater than the range corresponding to the addressing capability of the processor is accessed, so that the chip supports more resource-occupying functions, such as audio and video data processing, picture processing and the like.

[0102] If the second thread is run for the first time, the state of the second thread is switched to a runnable state.

[0103] The first thread and the second thread can correspond to threads of the same application or different applications, such as a voice recognition application based on WiFi, a camera video streaming application, a health monitoring application, and the like Internet of Things application. Taking the voice recognition application as an example, the first thread and the second thread can be used to recognize different voice sequences, and can also generate corresponding reply messages according to the recognized voice keywords. Taking the health monitoring application as an example, the first thread and the second thread can be used to monitor different indicators and generate monitoring results.

[0104] Figure 4 Another flowchart of a memory mapping method provided by an embodiment of the present application is shown. The embodiment is for a scenario in which the address space of the external memory is divided into a first address space and a second address space. The embodiment is based on the embodiment shown in Figure 2 The memory mapping method can include the following steps: Figure 4

[0105] Step S401: When the running thread is switched from the first thread to the second thread, the mapping parameters of the first thread are stored in a preset field of the thread context of the first thread.

[0106] By storing the mapping parameters in the thread context, the mapping parameters can be obtained through the thread context when the thread is switched subsequently. At the same time, when the first thread is restored subsequently, the mapping relationship corresponding to the first thread can be quickly established through the mapping parameters stored in the thread context, thereby improving the processing efficiency.

[0107] In one embodiment, when the running thread is switched from the first thread to the second thread, the mapping relationship corresponding to the first thread and the mapping parameters of the first thread can also be directly stored in the thread context of the first thread.

[0108] Step S402: If the virtual address spaces corresponding to the first thread and the second thread at least partially overlap, the thread context of the first thread is obtained and the mapping parameters of the second thread are obtained based on the second thread.

[0109] Specifically, the mapping parameters of the second thread can be obtained by calling an external memory mapping function in the code corresponding to the second thread, or the mapping parameters of the second thread can be determined by reading the value of an external memory mapping interface in the code corresponding to the second thread.

[0110] Step S403: The value of the preset field in the thread context is determined to be the mapping parameters of the first thread.

[0111] ​Step S404, if the mapping parameter of the first thread and the mapping parameter of the second thread do not match, the mapping relationship corresponding to the first thread is released.

[0112] Specifically, if the mapping parameter of the first thread and the mapping parameter of the second thread do not match, the mapping relationship corresponding to the first thread is released, and the virtual address space corresponding to the first thread is released, so as to perform virtual address allocation of the second thread.

[0113] Step S405, the virtual address space corresponding to the first thread is released.

[0114] Step S405, if the mapping parameter of the second thread is the first parameter, the mapping relationship between the virtual address space corresponding to the second thread and the first address space is established.

[0115] Step S406, if the mapping parameter of the second thread is the second parameter or the mapping parameter of the second thread is default, the mapping relationship between the virtual address space corresponding to the second thread and the second address space is established.

[0116] The first address space and the second address space can be two physical address spaces that do not overlap. Alternatively, the second address space and the second address space can partially overlap.

[0117] For example, the address space of the external memory can be divided into the first address space and the second address space that do not overlap, for example, 16M of external memory is divided into high 8M address space and low 8M address space.

[0118] The mapping relationship corresponding to the second thread can be established by configuring the physical address allocation interface, the virtual address allocation interface and the address mapping interface in the extended memory management interface, specifically: the physical address space corresponding to the second thread is allocated through the physical address allocation interface, the virtual address space corresponding to the second thread is allocated through the virtual address allocation interface, and the mapping relationship between the physical address space corresponding to the second thread and the corresponding virtual address space is established through the address mapping interface. Further, the thread switching is the second thread, and the second thread is run.

[0119] The mapping relationship corresponding to the first thread can also be released by configuring the physical address release interface, the virtual address release interface and the dismapping interface in the extended memory management interface, specifically: the physical address space corresponding to the first thread is released through the physical address release interface, the virtual address space corresponding to the first thread is released through the virtual address release interface, and the mapping relationship between the physical address space corresponding to the first thread and the corresponding virtual address space is released through the dismapping interface.

[0120] In one embodiment, the external memory can also be divided into 3 or more spaces, such as a first to third address space, and the value of the mapping parameter can also include a third parameter, a fourth parameter, etc. The third parameter corresponds to the third address space, and when the mapping parameter of the second thread is the third parameter, a mapping relationship between the virtual address space corresponding to the second thread and the third address space can be established, and the same applies to the subsequent mapping parameters. The number of values of the mapping parameter and the number of regions into which the external memory is divided are not limited in the present application.

[0121] Further, when the running thread is switched from the second thread to another thread, such as being restored to the first thread or being switched to the third thread, the mapping parameter of the second thread can be stored in the thread context of the second thread, and the mapping release and remapping are performed again in the above manner, and the same applies to the subsequent thread switching. During the thread switching, the memory is time-multiplexed by the above memory mapping method, so that the processor can access the physical address space of the external memory which is larger than the addressing capability, and the application with more complex functions can be realized, thereby improving the richness of the chip application.

[0122] In the present embodiment, the mapping parameter is stored in the thread context during the thread switching, so that the mapping parameter of the thread can be quickly read from the thread context, and the mapping relationship of the previous thread is released and the mapping relationship of the subsequent thread is established by comparing the mapping parameters. The mapping relationship of the thread to be switched in is quickly established by the mapping parameter including multiple values, and the mapping relationship is released and remapped, so that the sum of the physical address spaces accessed by the first thread and the second thread is greater than the addressing capability of the processor, thereby expanding the capacity of the physical address space configured for the thread, and enabling the chip to support the application with more complex functions and requiring more memory.

[0123] The memory mapping device provided in the embodiment of the present application is applied to a chip, and the chip is externally connected with an external memory. The memory mapping device includes:

[0124] The mapping release module is configured to release the mapping relationship corresponding to the first thread when the running thread is switched from the first thread to the second thread, if the virtual address spaces corresponding to the first thread and the second thread at least partially overlap, and the mapping parameter of the first thread and the mapping parameter of the second thread do not match. The mapping parameter is used to indicate the physical address space of the external memory used. The memory mapping module is configured to establish a mapping relationship between the virtual address corresponding to the second thread and the physical address of the external memory according to the mapping parameter of the second thread, so as to run the second thread based on the corresponding mapping relationship.

[0125] Optionally, the mapping release module includes:

[0126] a mapping parameter obtaining unit, configured to obtain mapping parameters corresponding to the first thread and the second thread respectively if the virtual address spaces corresponding to the first thread and the second thread at least partially overlap; and a mapping canceling unit, configured to cancel the mapping relationship corresponding to the first thread if the mapping parameters of the first thread and the mapping parameters of the second thread are not equal.

[0127] Optionally, the first thread and the second thread share the same virtual address space; and the mapping canceling module is specifically configured to:

[0128] obtain mapping parameters corresponding to the first thread and the second thread respectively, and cancel the mapping relationship corresponding to the first thread if the mapping parameters of the first thread and the mapping parameters of the second thread are not equal.

[0129] Optionally, the apparatus further comprises:

[0130] a mapping parameter storage module, configured to store the mapping parameters of the first thread in a preset field of a thread context of the first thread when the running thread is switched from the first thread to the second thread.

[0131] Correspondingly, the mapping parameter obtaining unit is specifically configured to:

[0132] obtain the mapping parameters of the second thread based on the second thread, obtain a thread context of the first thread, and determine a value of a preset field in the thread context as the mapping parameters of the first thread.

[0133] Optionally, the apparatus further comprises:

[0134] a physical address determining module, configured to determine a physical address space corresponding to the second thread when the running thread is switched from the first thread to the second thread before obtaining the mapping parameters corresponding to the first thread and the second thread respectively.

[0135] Correspondingly, the mapping parameter obtaining unit is specifically configured to:

[0136] obtain the mapping parameters corresponding to the first thread and the second thread respectively when the physical address space is located on the external memory.

[0137] Optionally, an address space of the external memory is divided into a first address space and a second address space; and the memory mapping module is specifically configured to:

[0138] If the mapping parameter of the second thread is the first parameter, a mapping relationship between a virtual address space corresponding to the second thread and the first address space is established; and / or, if the mapping parameter of the second thread is the second parameter or the mapping parameter of the second thread is default, a mapping relationship between the virtual address space corresponding to the second thread and the second address space is established.

[0139] Optionally, the memory mapping module is specifically configured to:

[0140] According to the mapping parameter of the second thread, the extended memory management interface of the chip is configured to establish the mapping relationship corresponding to the second thread; and the mapping relationship corresponding to the second thread is stored.

[0141] The memory mapping device provided by the embodiment of the present application can be used to execute the memory mapping method provided by any of the above embodiments, and has similar implementation principles and technical effects, which will not be described here again.

[0142] Figure 5 A structural schematic diagram of a chip provided by the embodiment of the present application is shown in FIG. 1, and the chip provided by the embodiment of the present application includes: Figure 5

[0143] at least one processor 510, a memory 520 in communication with the at least one processor, and an external memory 530; the memory 520 stores computer execution instructions; the at least one processor 510 executes the computer execution instructions stored in the memory, so that the electronic device executes the method provided by any of the above embodiments.

[0144] Optionally, the memory 520 can be independent or integrated with the processor 510.

[0145] The implementation principles and technical effects of the chip provided by the embodiment of the present application can be referred to the above embodiments, which will not be described here again.

[0146] The embodiment of the present application further provides a computer readable storage medium, and the computer readable storage medium stores computer execution instructions; when the computer execution instructions are executed by a processor, the method provided by any of the above embodiments can be implemented.

[0147] The embodiment of the present application further provides a computer program product, which includes a computer program; when the computer program is executed by a processor, the method provided by any of the above embodiments can be implemented.

[0148] ​In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other manners. For example, the above described device embodiments are merely illustrative. For example, the division of the modules is merely logical function division. There can be another division manner for actual implementation. For example, a plurality of modules or features can be combined or integrated into another system, or some features can be ignored or not executed. In this way, the actual division manner of the modules can be varied in various embodiments.

[0149] The integrated modules with the form of software functional modules as mentioned above can be stored in a computer readable storage medium. The software functional modules stored in the storage medium can include a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to perform some steps of the methods described in the various embodiments of the present application.

[0150] It should be understood that the processor can be a central processing unit (CPU), or can also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), and the like. The general-purpose processor can be a microprocessor, or the processor can also be any conventional processor. The steps of the methods disclosed in the present application can be directly embodied as hardware processor execution, or can be executed by a combination of hardware and software modules in the processor. The memory can include a high-speed RAM memory, and can also include a non-volatile storage NVM, such as at least one disk memory, and can also be a U disk, a mobile hard disk, a read-only memory, a magnetic disk or an optical disk, and the like.

[0151] The storage medium can be implemented by any type of volatile or non-volatile storage devices or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk or optical disk. The storage medium can be any available medium that can be accessed by a general-purpose or special-purpose computer.

[0152] An example storage medium is coupled to the processor such that the processor can read information from, and can write information to, the storage medium. Of course, the storage medium can be a part of the processor. Consistent with the teachings provided herein, the processor can execute instructions embodied by computer code stored on the storage medium, and the storage medium can store computer code which, when executed by the processor, causes the processor to perform methods as described herein. The processor and the storage medium can be supplemented by, or incorporated in, ASICs (application- specific integrated circuits).

[0153] It should be noted that, as used in this document, the terms "includes" and / or "containing" or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements is not limited to those elements, but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element preceded by "comprises a" does not, without more constraints, foreclose the existence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0154] The above-mentioned sequence numbers of the embodiments of the present application are only for description, and do not represent the advantages and disadvantages of the embodiments.

[0155] Those skilled in the art can clearly understand the above-mentioned embodiment method by means of software and necessary general hardware platform, of course, it can also be realized by hardware, but in many cases, the former is a better embodiment. Based on such understanding, the technical solutions of the present application can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes a plurality of instructions for making a terminal device (which can be a mobile phone, computer, server, air conditioner, or network device) execute the method provided by each embodiment of the present application.

[0156] Other embodiments of the present application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. The present application is intended to cover any variations, uses, or adaptations of the application following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice in the art to which the application pertains. The specification and examples are to be regarded as exemplary only, and the true scope and spirit of the application are indicated by the following claims.

[0157] It should be understood that the present application is not limited to the precise construction that has been described above and illustrated in the accompanying drawings, and that various modifications and changes can be made by those skilled in the art without departing from the scope of the present application. The scope of the present application is limited only by the appended claims.

Claims

1. A memory mapping method, characterized by, The method is applied to a chip which is externally connected with an external memory, and the method comprises: When a running thread is switched from a first thread to a second thread, if a virtual address space corresponding to the first thread and a virtual address space corresponding to the second thread at least partially overlap, and a mapping parameter of the first thread and a mapping parameter of the second thread do not match, a mapping relationship corresponding to the first thread is released; wherein the mapping parameter is used to indicate a physical address space of the external memory used; According to the mapping parameter of the second thread, a mapping relationship between a virtual address corresponding to the second thread and a physical address of the external memory is established, so as to run the second thread based on the corresponding mapping relationship.

2. The method of claim 1, wherein, The first thread and the second thread share a same virtual address space; If the virtual address space corresponding to the first thread and the virtual address space corresponding to the second thread at least partially overlap, and the mapping parameter of the first thread and the mapping parameter of the second thread do not match, the mapping relationship corresponding to the first thread is released, comprising: The mapping parameter corresponding to the first thread and the mapping parameter corresponding to the second thread are acquired respectively; If the mapping parameter of the first thread and the mapping parameter of the second thread are not equal, the mapping relationship corresponding to the first thread is released.

3. The method of claim 2, wherein, The method further comprises: When the running thread is switched from the first thread to the second thread, the mapping parameter of the first thread is stored in a preset field of a thread context of the first thread; The mapping parameter of the first thread is acquired, comprising: Based on the second thread, the thread context of the first thread is acquired; The value of the preset field in the thread context is determined as the mapping parameter of the first thread.

4. The method of claim 2, wherein, Before the mapping parameter corresponding to the first thread and the mapping parameter corresponding to the second thread are acquired, the method further comprises: When the running thread is switched from the first thread to the second thread, the physical address space corresponding to the second thread is determined; The mapping parameter corresponding to the first thread and the mapping parameter corresponding to the second thread are acquired, comprising: When the physical address space is located on the external memory, the mapping parameter corresponding to the first thread and the mapping parameter corresponding to the second thread are acquired.

5. The method according to any one of claims 1 to 4, characterized in that, The address space of the external memory is divided into a first address space and a second address space; according to the mapping parameter of the second thread, the mapping relationship between the virtual address corresponding to the second thread and the physical address of the external memory is established, comprising: If the mapping parameter of the second thread is a first parameter, a mapping relationship between a virtual address space corresponding to the second thread and the first address space is established; and / or, If the mapping parameter of the second thread is a second parameter or the mapping parameter of the second thread is default, a mapping relationship between the virtual address space corresponding to the second thread and the second address space is established.

6. The method according to any one of claims 1 to 4, characterized in that, According to the mapping parameter of the second thread, the mapping relationship corresponding to the second thread is established, comprising: According to the mapping parameter of the second thread, an extended memory management interface of the chip is configured to establish the mapping relationship corresponding to the second thread; store the mapping relationship corresponding to the second thread.

7. A memory mapping device, characterized by The device is applied to a chip, the chip is circumscribed by an external memory, and the device comprises: a mapping release module, configured to, when a running thread is switched from a first thread to a second thread, if a virtual address space corresponding to the first thread and a virtual address space corresponding to the second thread at least partially overlap and mapping parameters of the first thread and mapping parameters of the second thread do not match, release a mapping relationship corresponding to the first thread; wherein the mapping parameters are used to indicate a physical address space of an external memory used; a memory mapping module, configured to, according to the mapping parameters of the second thread, establish a mapping relationship between a virtual address corresponding to the second thread and a physical address of the external memory, so as to run the second thread based on the corresponding mapping relationship.

8. A chip, characterized by comprise: an external memory circumscribed, a processor, and an internal memory in communication connection with the processor; the internal memory stores computer execution instructions; the processor executes the computer execution instructions stored in the internal memory, so as to realize the method according to any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, the computer readable storage medium stores computer execution instructions, and the computer execution instructions are executed by the processor to realize the method according to any one of claims 1-6.

10. A computer program product, characterised in that, comprise a computer program, and the computer program is executed by the processor to realize the method according to any one of claims 1-6.

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