Light emitting diode

Abstract

The light emitting diode disclosed in the application comprises: a semiconductor stack, the semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer arranged between the first semiconductor layer and the second semiconductor layer; an insulating layer formed on the transparent conductive layer, the insulating layer having a series of openings; a second electrode formed on the insulating layer and electrically connected with the second semiconductor layer, the second electrode comprising a second pad part and a second extension part; a current blocking layer arranged on the semiconductor stack and below the second extension part; wherein the current blocking layer comprises a first part and a second part adjacent to the first part, the first part and the insulating layer openings have an overlapping area in the projection direction of the semiconductor stack, the distance between the first part and the second extension part is T1, the distance between the second part and the second extension part is T2, and T1 is greater than T2.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a light emitting diode. BACKGROUND

[0002] Light emitting diode (Light Emitting Diode, LED for short) is a kind of semiconductor device that uses carrier recombination to release energy to form light, LED light emitting diode has many advantages such as low power consumption, color purity, long service life, small size, fast response time, energy saving and environmental protection, and is widely used in lighting, visible light communication and light emitting display and other scenes.

[0003] In a gallium nitride LED, p-GaN will usually cause a certain current congestion under the P-type electrode due to its low carrier mobility. Therefore, a current blocking layer is usually added below the P-type electrode to inhibit the over-injection of current and increase the current diffusion of the transparent conductive layer. The chip manufacturing process usually includes at least five processes of mesa etching (MESA), making a current blocking layer, making a transparent conductive layer (such as ITO), making an insulating layer and making an electrode. SUMMARY

[0004] The present application provides a light emitting diode, which can improve the uniformity and reliability of current diffusion of the light emitting diode.

[0005] Specifically, the light emitting diode provided by the embodiment of the present application comprises: a light emitting diode comprising: a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer arranged between the first semiconductor layer and the second semiconductor layer; a transparent conductive layer located on the current blocking layer and / or on the second semiconductor layer; an insulating layer formed on the transparent conductive layer, the insulating layer having a series of openings; a first electrode comprising a first electrode portion formed on the insulating layer and electrically connected to the first semiconductor layer; a second electrode comprising a second electrode portion and a second extension portion formed on the insulating layer and electrically connected to the second semiconductor layer; a current blocking layer arranged on the semiconductor stack and located below the second extension portion; wherein the current blocking layer comprises a first portion and a second portion adjacent to the first portion, the first portion and the second extension portion have an overlapping area in the projection direction of the semiconductor stack, the distance between the first portion and the second extension portion is T1, the distance between the second portion and the second extension portion is T2, and T1 is greater than T2.

[0006] Further, the difference between T1 and T2 is 0.5-15 μm.

[0007] Further, the first portion is 6-18 μm from the second extension, and the second portion is 3-10 μm from the second extension.

[0008] Further, the insulating layer opening includes a first opening to expose a portion of the surface of the transparent conductive layer, the first portion of the current blocking layer has an overlapping area in a projection direction of the first opening on the semiconductor stack, and in a direction parallel to the extension direction of the second extension, the second extension is 5-30 μm from the transparent conductive layer through the first opening.

[0009] Further, in a direction parallel to the extension direction of the second extension, the first portion is 5-30 μm wide, and the second portion is greater than 15 μm wide.

[0010] Further, the transparent conductive layer has a second opening to expose a portion of the surface of the second semiconductor layer, the insulating layer has a third opening to expose a portion of the surface of the second semiconductor layer, the second opening and the third opening have an overlapping area in a projection on the semiconductor stack, and the second pad portion is in contact with the semiconductor layer through the second opening and the third opening.

[0011] Further, the minimum distance between the third opening of the insulating layer and the second opening of the transparent conductive layer is less than 3 μm.

[0012] Further, the semiconductor stack includes a mesa formed through the second semiconductor layer and the active layer and one or more through holes to expose a portion of the surface of the first semiconductor layer there through, the first electrode includes a first pad portion and a first extension, the first pad portion is on the mesa, the first extension is on the insulating layer, and the first extension extends from the first pad portion to the second pad portion.

[0013] Further, the insulating layer covers the through hole sidewall of the semiconductor stack, the insulating layer has a fifth opening to expose a portion of the surface of the first semiconductor layer, the end of the first extension is in contact with the first semiconductor layer through the fifth opening, and in a direction parallel to the extension direction of the first extension, the end of the first extension is less than 10 μm from the fifth opening of the insulating layer.

[0014] Further, in a direction parallel to the extension direction of the second extension, the end of the second extension is 0-20 μm from the current blocking layer. BRIEF DESCRIPTION OF DRAWINGS

[0015] In order to more clearly illustrate the technical solutions of the present application, the drawings required to be used in the following embodiment description will be briefly introduced. Obviously, the drawings described in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0016] Figure 1 A top view of a light emitting diode according to an embodiment of the present application;

[0017] Figure 2 A top view of a light emitting diode according to an embodiment of the present application; Figure 1 A side sectional view along line A-A';

[0018] Figure 3 A side sectional view along line A-A'; Figure 1 A side sectional view along line B-B';

[0019] Figure 4 A side sectional view along line B-B'; Figure 1 An enlarged view of a portion C;

[0020] Figure 5 A SEM view of a prior art product.

[0021] Reference signs:

[0022] 110 substrate; 120 semiconductor stack; 121 first semiconductor layer; 122 active layer; 123 second semiconductor layer; 124 mesa; 125 via; 130 current blocking layer; 131 first portion; 132 second portion; 140 transparent conductive layer; 150 insulating layer; 160 first electrode; 161 first pad portion; 162 second extension portion; 170 second electrode; 171 second pad portion; 172 second extension portion; 151 first opening; 141 second opening; 152 third opening; 142 fourth opening; 153 fifth opening; 154 sixth opening. Embodiments

[0023] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0024] Reference is made to Figures 1 to 4 , Figure 1 A top view of a light emitting diode according to an embodiment of the present application, Figure 2 A top view of a light emitting diode according to an embodiment of the present application; Figure 1 A side sectional view along line A-A'; Figure 3For Figure 1 a side sectional view taken along line B-B'; Figure 4 For Figure 1 an enlarged view of a partial C. As shown in Figures 1 to 4 the light emitting diode 10 includes, for example, a substrate 110, a semiconductor stack 120, a current blocking layer 130, a transparent conductive layer 140, an insulating layer 150, a first electrode 160, and a second electrode 170.

[0025] As shown in Figures 1 to 4 the substrate 110 can be an insulating substrate, and preferably can be made of a transparent material or a translucent material or a non-transparent material. In the illustrated embodiment, the substrate 110 is a sapphire (Al2O3) substrate. In some embodiments, the substrate 110 can be a patterned sapphire substrate, but is not limited thereto. The substrate 110 can also be made of a conductive or semiconductive material. For example, the substrate 110 can be at least one of silicon carbide (SiC), silicon (Si), magnesium aluminum oxide (MgAl2O4), magnesium oxide (MgO), lithium aluminum oxide (LiAlO2), lithium gallium oxide (LiGaO2), and gallium nitride (GaN). In some embodiments, the substrate 110 can be thinned or removed to form a thin-film type LED light emitting diode.

[0026] In some embodiments, the upper surface of the substrate 110 can have a patterned structure (not shown in the drawings) that can improve the external light extraction efficiency and crystallinity of the semiconductor stack 120. Alternatively, the upper surface of the substrate 110 can be patterned into various shapes, such as a platform, a cone, a triangular pyramid, a hexagonal pyramid, a quasi-cone, a quasi-triangular pyramid, or a quasi-hexagonal pyramid, etc. In addition, the patterned structure of the upper surface of the substrate 110 can be selectively formed at each region or can be omitted. The material of the patterned structure can be the same as or different from that of the substrate 110. For example, the material of the patterned structure can be SiO2or the like, which has a lower refractive index than the material of the substrate 110, and is more advantageous for light extraction.

[0027] Further, in the present specification, the above and below positions are defined with the position of the substrate 110. It is assumed that the direction close to the substrate 110 is the lower direction, and the direction away from the substrate 110 is the upper direction. The above and below positions in the present specification are limited to the positional relationship of the components in the illustrated embodiment, and do not represent or imply that it must have a specific orientation.

[0028] The semiconductor stack 120 can be formed on the substrate 110 by a metal-organic chemical vapor deposition (MOCVD), a molecular beam epitaxy (MBE), a hydride vapor phase epitaxy (HVPE), a physical vapor deposition, or an ion plating method. The substrate 110 has opposite upper and lower surfaces, and the semiconductor stack 120 is formed on the upper surface of the substrate 110. The semiconductor stack 120 includes, in order along a stacking direction, a first semiconductor layer 121, an active layer 122 (or light-emitting layer 122, active layer 122), and a second semiconductor layer 123 formed on the upper surface of the substrate 110. In other embodiments, the semiconductor stack 120 can also be formed on the substrate 110 by a bonding layer, which is preferably a light-transmitting material.

[0029] The semiconductor stack 120 can provide light of a specific central emission wavelength, such as blue, green, or red light, or violet or ultraviolet light. In the illustrated embodiment, the semiconductor stack 120 is configured to provide blue light. In the illustrated embodiment, the first semiconductor layer 121 of the semiconductor stack 120 is an N-type semiconductor layer that can provide electrons to the active layer 122 under the action of an electric power source. In some embodiments, the N-type semiconductor layer of the first semiconductor layer 121 includes an N-type doped nitride layer. The N-type doped nitride layer can include one or more N-type impurities of group IV elements. The N-type impurities can be one or a combination of Si, Ge, and Sn.

[0030] In some embodiments, the active layer 122 can be a multiple quantum well (MQWs) structure formed by quantum well layers and quantum barrier layers stacked alternately. The active layer 122 can be a single quantum well structure or a multiple quantum well structure. The quantum barrier layer can be a GaN layer or an AlGaN layer. In some embodiments, the active layer 122 can include a multiple quantum well structure of GaN / AlGaN, InAlGaN / InAlGaN, or InGaN / AlGaN. To improve the light-emitting efficiency of the active layer 122, the depth of the quantum well, the number of pairs of quantum well and quantum barrier, the thickness, and / or other characteristics of the active layer 122 can be changed.

[0031] The second semiconductor layer 123 of the semiconductor stack 120 is a P-type semiconductor layer that can provide holes to the active layer 122 under the action of an electric power source. In some embodiments, the P-type semiconductor layer of the second semiconductor layer 123 includes a P-type doped nitride layer. The P-type doped nitride layer includes P-type impurities. The P-type impurities can include one or more P-type impurities of group II elements. The P-type impurities can be one or a combination of Mg, Zn, and Be. The second semiconductor layer 123 can be a single-layer structure or a multi-layer structure having different compositions. The semiconductor stack 120 is not limited to the above and other types of semiconductor stacks 120 can be selected according to actual needs.

[0032] In some embodiments, a buffer layer (not shown in the figures) can be provided between the substrate 110 and the semiconductor stack 120 to mitigate the lattice mismatch between the substrate 110 and the first semiconductor layer 121. In some embodiments, the buffer layer can comprise an undroped GaN (u-GaN) or an undroped AlGaN (u-AlGaN).

[0033] The buffer layer can be a single layer or a plurality of layers. The buffer layer can be formed by metal organic chemical vapor deposition, molecular beam epitaxy or physical vapor deposition (PVD). The PVD can include a sputter method, such as a reactive sputter method, or an evaporation method, such as an electron beam evaporation method or a thermal evaporation method. In an embodiment, the buffer layer can comprise an aluminum nitride (AlN) buffer layer formed by a sputter method on the substrate 110 having a patterned structure surface. The sputter method can form a dense buffer layer with high uniformity, and thus the AlN buffer layer can be deposited on the patterned structure surface of the substrate 110.

[0034] The semiconductor stack 120 can comprise a partially exposed region of the first semiconductor layer 121 formed by etching portions of the second semiconductor layer 123 and the active layer 122. For example, Figure 1 As shown, the semiconductor stack 120 can comprise a mesa 124 and one or more vias 125 formed through the second semiconductor layer 123 and the active layer 122 to expose a portion of the surface of the first semiconductor layer 121 therethrough. The vias 125 can be regularly arranged on the semiconductor stack 120. However, it should be understood that the present application is not limited thereto, and the configuration and number of the vias 125 can be varied in various ways.

[0035] The first and second electrodes 160 and 170 are provided for external electrical connection to the first and second semiconductor layers 121 and 123, respectively, and can be electrically connected to the first and second semiconductor layers 121 and 123, respectively. The first and second electrodes 160 and 170 can be located on the same side of the substrate 110 or on opposite sides of the substrate 110. Figures 3 to 5 It is disclosed that the first and second electrodes 160 and 170 are located on the same side of the substrate 110.

[0036] As Figure 1As shown, the light emitting diode includes a rectangle in a plan view, having a long side and a short side. The first electrode 160 includes a first pad portion 161; and one or more first extension portions 162 extending from the first pad portion 161 and extending toward the second pad portion 171 in a direction along the long side of the light emitting diode. The second electrode 170 includes a second pad portion 171; and one or more second extension portions 172 extending from the second pad portion 171 and extending toward the first pad portion 161 in a direction along the long side of the light emitting diode.

[0037] The current blocking layer 130 has a strip-shaped portion formed on the second semiconductor layer 123 and located under the second extension portion 172. The current blocking layer 130 has a shape similar to the second extension portion 172. The light emitting diode of the present embodiment forms the current blocking layer 130 under the second extension portion 172, which can suppress current over-injection near the bottom of the second extension portion 172 and increase the length and uniformity of current injection.

[0038] The material of the current blocking layer 130 includes at least one of transparent inorganic insulating materials such as silicon oxide, silicon nitride, silicon oxynitride, titanium oxide, or aluminum oxide. The current blocking layer 130 can also be a single layer or an alternating multi-layer structure. The single layer can be a material with a high light transmittance, for example, higher than 80%, such as silicon oxide. The current blocking layer 130 can also be a multi-layer structure combined to form a reflective material, for example, a Bragg reflector, with a reflectance higher than 60%. The thickness of the current blocking layer 130 can be selected from any thickness between 50 nm and 500 nm.

[0039] The transparent conductive layer 140 is located on the current blocking layer 130 and / or the surface of the second semiconductor layer 123, so that the current injected into the second electrode 170 is uniformly diffused to the entire surface of the second semiconductor layer 123, and the transparent conductive layer 140 can strengthen the ohmic contact with the second semiconductor layer 123. The material of the transparent conductive layer 140 can be ITO, InO, SnO, CTO, ATO, ZnO, GaP, or a combination thereof. The transparent conductive layer 140 can be formed by evaporation or sputtering. In the present embodiment, the thickness of the transparent conductive layer 140 is selected from a range of 5 nm to 500 nm. In addition, it is preferable to select from a range of 20 nm to 300 nm.

[0040] The insulating layer 150 is formed on the transparent conductive layer 140, covering the upper surface of the mesa 124, the sidewall of the via 125, and the sidewall connecting the mesa 124 and the upper surface of the transparent conductive layer 140, i.e., substantially covering the entire surface of the device. The material of the insulating layer 150 can be selected from SiO2, Si3N4, Al2O3, TiO2, etc., and in the present embodiment, SiO2 is selected.

[0041] In the LED structure described in this embodiment, the insulating layer 150 protects the LED surface on one hand and serves as a current blocking layer on the other, suppressing over-injection of current below the electrodes and increasing current diffusion in the transparent conductive layer 140. Considering both requirements, its thickness d is preferably λ / 4n×(2k-1), where λ is the emission wavelength of all source layers 122, n is the refractive index of the insulating layer 150, and k is a natural number greater than or equal to 1. A preferred value for k is 2 to 3, corresponding to a thickness of 150nm to 500nm. When the thickness of the insulating layer 150 is too small, it is less effective in acting as a current blocking layer and providing protection; when the thickness is too large, the material's own absorption will further increase light loss.

[0042] The first pad portion 161 of the first electrode 160 is located on the mesa 124 of the semiconductor stack 120, and the first extension portion 161 is located on the insulating layer 150. The second electrode 170 is located on the insulating layer 150.

[0043] like Figures 1 to 4 As shown, the insulating layer 150 includes a first opening 151 to expose a portion of the surface of the transparent conductive layer 140, and the second extension 172 contacts the transparent conductive layer 140 through the first opening 151. The insulating layer 150 below the second extension 172 acts as a current-blocking layer; when energized, most of the current is injected into the transparent conductive layer 140 through the first opening 151 via the second extension 172. Because the contact point between the second extension 172 and the transparent conductive layer 140 through the first opening 151 may be prone to burns or electrostatic breakdown under high current or high ESD conditions, especially at the step-crossing position of the current-blocking layer 130 below the first opening 151, ESD burn points are easily generated. Figure 5As shown, causing ESD performance to deteriorate, the ESD yield of the light emitting diode is reduced. Thus, in an embodiment, the current blocking layer 130 has a first portion 131 and a second portion 132 adjacent to the first portion 131. The first portion 131 has an overlapping area with the projection of the first opening 151 on the semiconductor stack 120, and the first portion 131 is located outside the first opening 151. The distance between the first portion 131 and the second extension 172 is T1, and the distance between the second portion 131 and the second extension 172 is T2, so that T1 is greater than T2 can spread the most of the current injected by the second extension 172 through the first opening 151 to a farther place, and can avoid excessive current accumulation in the transparent conductive layer below the first opening 151, so as to achieve the effect of adjusting the uniformity of current diffusion and improving the ability of the product to resist high-order ESD impact. In a preferred embodiment, T1 is greater than T2 by 0.5 μm to 15 μm, for example, greater than 0.5 μm, 1 μm, 2 μm, 5 μm, 10 μm, 15 μm. If T1 is more than 15 μm than T2, the area of the current blocking layer 130 is too large to absorb light, which affects the light efficiency of the light emitting diode. Further, T1 can be preferably 6 to 18 μm, and T2 can be preferably 3 to 10 μm.

[0044] In an embodiment, the distance between the second extension 172 and the transparent conductive layer 140 through the first opening 151 is between 5 to 30 μm. If less than 5 μm, the contact area between the second extension 172 and the transparent conductive layer 140 is too small, which is prone to current crowding effect and is not conducive to the uniform expansion of the current of the light emitting diode; if greater than 30 μm, the contact area between the extension electrode and the transparent conductive layer is large, which reduces the current regulation effect of the whole surface of the light emitting diode and affects the light efficiency of the product.

[0045] In an embodiment, in the direction parallel to the extension direction of the second extension 172, the width of the first portion 131 is T3, which can be 5 to 30 μm; and the width of the second portion is T4, which can be greater than 15 μm.

[0046] In an embodiment, the transparent conductive layer 140 comprises a second opening 141 to expose part of the surface of the second semiconductor layer 123, and the insulating layer 150 covering the transparent conductive layer 140 comprises a third opening 152 to expose part of the surface of the second semiconductor layer 123. The second opening 141 and the third opening 152 have an overlapping area on the projection of the semiconductor stack 120. The second pad portion 172 contacts the second semiconductor layer 123 through the second opening 141 and the third opening 152, which can increase the contact area between the second pad portion 172 and the second semiconductor layer 123, and the adhesion between the electrode and the nitride interface is good, which can reduce the risk of the second pad portion 172 falling off from the adhesion interface during wire bonding. The minimum distance between the third opening 152 and the second opening 141 is less than 3 μm.

[0047] In one embodiment, the transparent conductive layer 140 includes a fourth opening 142 to expose a portion of the surface of the second semiconductor layer 123, the fourth opening 142 has an overlapping area with the projection of the via hole 125 of the semiconductor stack 120 on the semiconductor stack 120. The fourth opening 142 is formed outside the via hole 125 of the semiconductor stack 120. The insulating layer 150 includes a fifth opening 153 to expose a portion of the surface of the first semiconductor layer 121, the fifth opening 153 has an overlapping area with the projection of the via hole 125 of the semiconductor stack 120 on the semiconductor stack 120. The fifth opening 153 is formed inside the via hole 125 of the semiconductor stack 120. The first extension 162 is formed on the insulating layer 150 and contacts the first semiconductor layer 121 through the fifth opening 153. The end of the first extension 162 is formed inside the fifth opening with the smallest distance to the second pad portion, and the distance between the end of the first extension 162 and the fifth opening is less than 10 μm in the direction parallel to the extension direction of the first extension 162.

[0048] In one embodiment, the distance between the end of the second extension 172 and the first opening 151 is less than 10 μm in the direction parallel to the extension direction of the second extension 172, and the distance between the end of the second extension 172 and the current spreading layer is 0-20 μm.

[0049] In one embodiment, the insulating layer 150 covering the mesa 124 of the semiconductor stack 120 has a sixth opening 154, which is annular. The first pad portion 161 is located on the insulating layer 150 covering the mesa 124 and contacts the first semiconductor layer 121 through the annular sixth opening 154, and the first extension 162 is formed on the second semiconductor layer 123 and contacts the first semiconductor layer 121 through the via hole 124.

[0050] In another embodiment, the first width T1 of the first portion 131 gradually increases from the extension direction of the second extension 172, which can avoid the possibility of the ESD explosion point caused by the gradual crowding of the current along the extension direction of the second extension 172.

Claims

1. A light emitting diode, comprising: a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer disposed between the first semiconductor layer and the second semiconductor layer; a current blocking layer disposed on the semiconductor stack; a transparent conductive layer on the current blocking layer and / or on the second semiconductor layer; an insulating layer formed on the transparent conductive layer, the insulating layer having a series of openings; a first electrode including a first pad portion formed on the insulating layer and electrically connected to the first semiconductor layer; a second electrode formed on the insulating layer and electrically connected to the second semiconductor layer, the second electrode including a second pad portion and a second extension portion, the current blocking layer being disposed under the second extension portion; wherein the current blocking layer includes a first portion and a second portion adjacent to the first portion, the first portion having an overlapping area with the insulating layer openings in a projection direction of the semiconductor stack, the first portion being a distance T1 from the second extension portion, the second portion being a distance T2 from the second extension portion, the T1 being greater than the T2, and a difference between the T1 and the T2 being 0.5-15 μm.

2. The light emitting diode of claim 1, wherein, The distance between the first portion and the second extension portion is 6-18 μm, and the distance between the second portion and the second extension portion is 3-10 μm.

3. The light emitting diode of claim 1, wherein, The insulating layer openings include a first opening to expose a portion of a surface of the transparent conductive layer, the first portion of the current blocking layer having an overlapping area with the first opening in a projection direction of the semiconductor stack, the second extension portion being in contact with the transparent conductive layer through the first opening in a direction parallel to an extension direction of the second extension portion at a distance of 5-30 μm.

4. The light emitting diode of claim 1, wherein, In a direction parallel to the extension direction of the second extension portion, the first portion has a width of 5-30 μm, and the second portion has a width greater than 15 μm.

5. The light emitting diode of claim 1, wherein, The transparent conductive layer has a second opening to expose a portion of a surface of the second semiconductor layer, the insulating layer has a third opening to expose a portion of a surface of the second semiconductor layer, the second opening and the third opening having an overlapping area in a projection direction of the semiconductor stack, and the second pad portion being in contact with the semiconductor layer through the second opening and the third opening.

6. The light emitting diode of claim 5, wherein, A minimum distance between the third opening of the insulating layer and the second opening of the transparent conductive layer is less than 3 μm.

7. The light emitting diode of claim 1, wherein, The semiconductor stack includes a mesa formed through the second semiconductor layer and the active layer and one or more vias to expose a portion of a surface of the first semiconductor layer through the vias, the first electrode includes a first pad portion on the mesa and a first extension portion on the insulating layer, the first extension portion extending from the first pad portion to the second pad portion.

8. The light emitting diode of claim 7, wherein, The insulating layer covers the semiconductor stack via sidewall, and has a fifth opening to expose a part of surface of the first semiconductor layer, and the end of the first extension part contacts the first semiconductor layer through the fifth opening, and the distance between the end of the first extension part and the fifth opening of the insulating layer is less than 10 μm in the direction parallel to the extension direction of the first extension part.

9. The light emitting diode of claim 1, wherein, The distance between the end of the second extension part and the current blocking layer is 0-20 μm in the direction parallel to the extension direction of the second extension part.

Images