LED drive circuit, LED control circuit, chip and electronic equipment

Abstract

The LED driving circuit, LED control circuit, chip and electronic device of the present application include a first current mirror circuit for receiving a first current signal; a clamping circuit connected to the two ends of the first current mirror circuit so that the first current mirror circuit amplifies the first current signal by a preset first multiple and then outputs a second current signal; a switch circuit for controlling the second current signal to be input into a corresponding light-emitting diode according to the LED control circuit; through the above-mentioned method, the two ends of the first current mirror circuit are clamped by the clamping circuit, so that the first current mirror circuit can work in the linear region and still be able to mirror the current well, thereby reducing the power supply voltage, which is beneficial to reducing the power consumption of the LED driver; at the same time, the lighting frequency of the light-emitting diode can be switched through the switch circuit, and one current mirror circuit can power multiple light-emitting diodes, further reducing the power consumption of the LED driver.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuits, and in particular to an LED driving circuit, an LED control circuit, a chip and an electronic device. Background Art

[0002] LED (Light-emitting diode) is widely used in our daily life, such as the temperature display of refrigerators and air conditioners, and the information display of electronic scales. From the perspective of electrical characteristics, LEDs of different colors can be regarded as light-emitting diodes with different voltage drops. They need to reach a certain conduction voltage to emit light, and have strong voltage stabilization capabilities. Among them, the voltage drop of red LEDs and yellow LEDs is below 2 to 2.2V, while the voltage drop of blue LEDs and white LEDs is around 3.0 to 3.2V. Under the same voltage, the higher the voltage drop of the LED, the more difficult it is to maintain the constant current characteristic. Compared with the voltage drive method, when the current drive method is used to drive the LED, the size of the current source determines the size of the current passing through the PN junction in the LED. The parasitic parameters of the LED have no effect on the junction voltage, so current drive is conducive to overcoming the problem of uneven brightness.

[0003] In the prior art, an LDO (low dropout regulator) type current mirror is generally used to drive the LED current. This LED driving method has high power consumption. Summary of the invention

[0004] The purpose of the present application is to provide an LED driving circuit, an LED control circuit, a chip and an electronic device to solve the technical problem of high power consumption of LED driving in the prior art.

[0005] The technical solution of the present application is as follows: Provide an LED driving circuit, comprising:

[0006] A first current mirror circuit, configured to receive a first current signal;

[0007] a clamping circuit connected to two ends of the first current mirror circuit, so that the first current mirror circuit amplifies the first current signal by a preset first multiple and then outputs a second current signal;

[0008] The switch circuit is used to control the second current signal to be input into the corresponding light emitting diode according to the LED control module.

[0009] Another technical solution of the present application is as follows: providing an LED control circuit, comprising a plurality of control modules, a plurality of light emitting diodes and the above-mentioned LED driving circuit;

[0010] The control module is used to control the first end of the at least one light emitting diode to be turned on;

[0011] The LED driving circuit is used to transmit the second current signal to the second end of at least one light emitting diode to be turned on.

[0012] Another technical solution of the present application is as follows: a chip is provided, comprising the above-mentioned LED driving circuit.

[0013] Another technical solution of the present application is as follows: an electronic device is provided, comprising the above-mentioned chip or the above-mentioned LED control circuit.

[0014] The LED driving circuit, LED control circuit, chip and electronic device of the present application include a first current mirror circuit for receiving a first current signal; a clamping circuit connected to the two ends of the first current mirror circuit so that the first current mirror circuit amplifies the first current signal by a preset first multiple and then outputs a second current signal; a switch circuit for controlling the second current signal to be input into a corresponding light-emitting diode according to an LED control module; in the above manner, the two ends of the first current mirror circuit are clamped by the clamping circuit, which is beneficial to reducing the power consumption of the LED driving. At the same time, the lighting frequency of the light-emitting diode can be switched by the switch circuit, and one current mirror circuit can power multiple light-emitting diodes, further reducing the power consumption of the LED driving. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is an application scenario diagram of the LED driving circuit of this application;

[0016] Figure 2 It is a structural schematic diagram of an LDO type current mirror in the prior art;

[0017] Figure 3 This is a schematic diagram of the structure of an LED driving circuit according to an embodiment of the present application;

[0018] Figure 4 This is a schematic diagram of the structure of a current output circuit in an LED driving circuit according to an embodiment of the present application;

[0019] Figure 5 It is a structural schematic diagram of another current output circuit in the LED driving circuit of one embodiment of the present application;

[0020] Figure 6 It is a structural schematic diagram of another current output circuit in the LED driving circuit of one embodiment of the present application;

[0021] Figure 7 This is a schematic diagram of the structure of an LED control circuit according to an embodiment of the present application;

[0022] Figure 8This is a structural schematic diagram of an LED control module in an LED control circuit according to an embodiment of the present application;

[0023] Fig. 9 A control timing diagram of an LED control circuit according to an embodiment of the present application;

[0024] Fig.10 A schematic diagram of the structure of a chip according to an embodiment of the present application;

[0025] Fig.11 It is a structural schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0026] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0027] In the embodiments of the present application, at least one refers to one or more; multiple refers to two or more. In the description of the present application, the words "first", "second", "third", etc. are only used for the purpose of distinguishing descriptions, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying an order.

[0028] References to "one embodiment" or "some embodiments" etc. described in this specification mean that one or more embodiments of the present application include a particular feature, structure or characteristic described in conjunction with the embodiment. Thus, in this specification, the terms "include", "comprises", "has" and their variations all mean "including but not limited to", unless otherwise specifically emphasized.

[0029] It should be noted that in the embodiments of the present application, "connection" can be understood as electrical connection, and the connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be either a direct connection between A and B or an indirect connection between A and B through one or more other electrical components.

[0030] The LED driving circuit 200 provided in this application can be applied in Figure 1In the electronic device 70 shown, the electronic device 70 may include a transmitting circuit 301 and a receiving circuit 302, wherein the transmitting circuit 301 includes an LED and an LED driving circuit 200; the LED light is emitted toward the skin, and is reflected through the skin tissue to form LED reflected light; the receiving circuit 302 includes a photoelectric sensor 321, a transimpedance amplifier 322, a programmable gain amplifier 323, a filtering circuit 324 and an analog-to-digital converter 325 connected in sequence, wherein the photoelectric sensor 321 receives the above-mentioned LED reflected light, and converts the received light signal into a current signal, the transimpedance amplifier 322 receives the current signal and converts the current signal into a voltage signal, the programmable gain amplifier 323 performs gain amplification on the voltage signal, the filtering circuit 324 filters the voltage signal, and the filtered voltage signal is converted into a digital signal via the analog-to-digital converter 325.

[0031] In the prior art, a low dropout regulator (LDO) type current mirror is generally used to drive the LED current. Figure 2 As shown, the voltage drop value on the sampling resistor R is clamped to the same as the positive terminal voltage VREF of the operational amplifier OP. To ensure that the sampling voltage can be accurately matched to the reference voltage, the cascaded power tube must operate in the saturation region, which requires that the source-drain voltage drop of the power tube is greater than its overdrive voltage, where the overdrive voltage is generally 0.2V. Due to the existence of the above voltage drop, the efficiency of the LDO current mirror decreases with the increase of current, and is only suitable for small and medium power applications. Figure 2 The voltage at point B changes with the load voltage and parasitic resistance of the LED. Due to the channel modulation effect, the power tube M1 cannot accurately replicate the current of the power tube M0, which leads to inaccurate output current. In addition, since the output impedance r0 of the power tube M1 is small and the current suppression ratio is low, the stability of the current output is poor.

[0032] The present application embodiment provides an LED driving circuit 200, see Figure 3 As shown, the LED driving circuit 200 includes a current output circuit 201 and a switch circuit 50 .

[0033] Among them, the current output circuit 201 includes a first current mirror circuit 10 and a clamp circuit 20; the first current mirror circuit 10 is used to receive a first current signal; the clamp circuit 20 is connected to both ends of the first current mirror circuit 10, so that the first current mirror circuit 10 amplifies the first current signal by a preset first multiple and then outputs a second current signal.

[0034] The switch circuit 50 is used to control the second current signal to be input into the corresponding light emitting diode according to the LED control module.

[0035] The LED driving circuit of this embodiment improves the current output circuit and uses a clamping circuit to clamp the voltage across the first current mirror circuit, which is beneficial to reducing the power consumption of the LED driving.

[0036] In some embodiments, the first current mirror circuit 10 includes: a first transistor MP0 and a second transistor MP1; a clamping circuit 20 is used to clamp the voltage at the first end of the first transistor MP0 and the voltage at the first end of the second transistor MP1, so that the first current mirror circuit 10 amplifies the first current signal by a preset first multiple and then outputs a second current signal.

[0037] In this embodiment, a clamping circuit is used to clamp the voltage at the first end of the first transistor and the voltage at the first end of the second transistor in the first current mirror circuit, so that the first transistor and the second transistor can still mirror the current well when working in the linear region, thereby reducing the power supply voltage and facilitating reducing the power consumption of the LED drive.

[0038] In some embodiments, the first current mirror circuit 10 further includes: a first current input terminal 11 and a first current output terminal 14; the second terminal of the first transistor MP0 is used to be connected to the second terminal of the second transistor MP1, and the third terminal of the first transistor MP0 is used to be connected to the third terminal of the second transistor MP1; the first terminal of the first transistor MP0 is connected to the first current input terminal 11, and the first transistor MP0 is used to transmit the first current signal to the second transistor MP1; the first terminal of the second transistor MP1 is connected to the first current output terminal 14, and the second transistor MP1 is used to amplify the first current signal by a preset multiple and output a second current signal.

[0039] As an implementation mode, the first transistor MP0 and the second transistor MP1 may be PMOS transistors. In the following descriptions of the first transistor MP0 and the second transistor MP1, the first transistor MP0 and the second transistor MP1 are all exemplified as PMOS transistors. Figure 4 As shown, the source (second end) of the first transistor MP0 and the source (second end) of the second transistor MP1 are connected to the power supply voltage, and the gate (third end) of the first transistor MP0 is connected to the gate (third end) of the second transistor MP1. The drain (first end) of the first transistor MP0 is connected to the first current input end 11, and the first transistor MP0 is used to transmit the first current signal to the second transistor MP1; the drain (first end) of the second transistor MP1 is connected to the first current output end 14, and the second transistor MP1 amplifies the first current signal by a preset multiple and outputs a second current signal. The clamping circuit 20 is used to clamp the voltage of the drain of the first transistor MP0 and the voltage of the drain of the second transistor MP1.

[0040] In some embodiments, the first current mirror circuit 10 further includes an output transistor MP3 , which is connected to the first current output terminal 14 and configured to output the second current signal output by the second transistor MP1 to the first current output terminal 14 .

[0041] As an implementation, see Figure 5 The output transistor MP3 may also be a PMOS transistor, and the drain of the output transistor MP3 is connected to the first current output terminal 14, and the source of the output transistor MP3 is connected to the drain of the second transistor MP1. The following description of the output transistor MP3 is based on the example that the output transistor MP3 is a PMOS transistor.

[0042] In some embodiments, the clamp circuit 20 includes a first input terminal 21 connected to the first terminal of the first transistor MP0 , a second input terminal 22 connected to the first terminal of the second transistor MP1 , and an output terminal 23 connected to the gate of the output transistor MP3 .

[0043] As an implementation, the clamp circuit 20 includes an operational amplifier OP, and the operational amplifier OP includes a first input terminal 21, a second input terminal 22, and an output terminal 23. The first input terminal 21 of the operational amplifier OP is connected to the first terminal of the first transistor MP0, the second input terminal is connected to the first terminal of the second transistor MP1, and the output terminal is connected to the gate of the output transistor MP3. For example, see Figure 5 The non-inverting input terminal of the operational amplifier OP is connected to the drain of the first transistor MP0, the inverting input terminal is connected to the drain of the second transistor MP1, and the output terminal is connected to the gate of the output transistor. That is, the voltage of the drain of the first transistor MP0 and the voltage of the drain of the second transistor MP1 are clamped by the operational amplifier OP, so that the first transistor and the second transistor can still mirror the current well when working in the linear region, reducing the power supply voltage, which is beneficial to reducing the power consumption of the LED drive.

[0044] As an alternative implementation, see Figure 4 As shown, the first current mirror circuit 10 further includes a first node 12 and a second node 13. The first current signal I enters the first current mirror circuit 10 from the first current input terminal 11, the first current input terminal 11 is connected to the first node 12, the drain of the first transistor MP0 is connected to the first node 12, and the gate of the first transistor MP0 is connected to the first current input terminal 11. The gate of the second transistor MP1 is connected to the gate of the first transistor MP0, the source of the second transistor MP1 is connected to the source of the first transistor MP0, the drain of the second transistor MP1 is connected to the second node 13, the source of the output transistor MP3 is connected to the second node 13, and the drain of the output transistor MP3 is connected to the first current output terminal 14.

[0045] In this embodiment, the first transistor MP0 and the second transistor MP1 are connected in common source and common gate, the output transistor MP3 is connected to the second transistor MP1, the first current signal I passes through the first transistor MP0, and is mirrored by the second transistor MP1 by a preset multiple to form the second current signal mI, and the second current signal mI is then output from the first current output terminal 14 through the output transistor MP3.

[0046] In this embodiment, the clamp circuit 20 includes a first input terminal 21 connected to the first node 12, a second input terminal 22 connected to the second node 13, and an output terminal 23 connected to the gate of the output transistor MP3. The clamp circuit 20 is used to clamp the voltages of the first node 12 and the second node 13, that is, the clamp circuit 20 makes the drain voltage of the first transistor MP0 and the drain voltage of the second transistor MP1 the same.

[0047] In an optional implementation, in order to reduce the power supply voltage, the first transistor MP0 and the second transistor MP1 can be operated in the linear region respectively.

[0048] Assume that the current flowing through the first transistor MP0 is I MP0 , so we have:

[0049]

[0050] Assume that the current flowing through the second transistor MP1 is I MP1 , so we have:

[0051]

[0052] Among them, u p is the electron mobility, c ox is the gate oxide capacitance per unit area, is the ratio of the width to the length of the first transistor MP0, is the ratio of the width to the length of the second transistor MP1, V GS0 and V GS1 are the gate-source voltage of the first transistor MP0 and the gate-source voltage of the second transistor MP1, respectively, and are the drain-source voltage of the first transistor MP0 and the drain-source voltage of the second transistor MP1 , respectively.

[0053] Due to the clamping circuit, the drain voltages of the first transistor MP0 and the second transistor MP1 are the same. and equal; and the first transistor MP0 and the second transistor MP1 are connected in common source and common gate. Therefore, V GS0 and V GS1 Equal; in addition So, I MP1 =mI MP0 , I MP0 =I, the second transistor MP1 mirrors the current of the first transistor MP0 by m times, and, due to the setting of the clamping circuit 20, the voltage of the second node 13 will not be affected by the changes of the load voltage and the load resistance, nor will it be affected by the channel modulation, and the first current signal I can be accurately amplified by m times, thereby improving the accuracy of the output current.

[0054] Assume the impedance of the second transistor MP1 is r 01 , the impedance of the output transistor MP3 is r o3 , the transconductance of the output transistor MP3 is g m3 , the gain of the operational amplifier OP is A V ,

[0055] Therefore, the output impedance R of the first current mirror circuit 10 is out =A V g m3 r o3 r 01 , the output transistor MP3 and the operational amplifier OP are set to output impedance R out Enlarged A V g m3 r o3 times, which improves the current suppression ratio and ensures the stability of the output current.

[0056] In some embodiments, see Figure 5 As shown, the first current mirror circuit 10 also includes an input transistor MP2, a first end of the input transistor MP2 is connected to the first current input end 11, a second end is connected to the first end of the first transistor, and a third end is respectively connected to the first current input end and the third end of the first transistor; the input transistor MP2 is used to output the first current signal to the first transistor MP0.

[0057] As an implementation, the input transistor MP2 may also be a PMOS transistor, the drain of the input transistor MP2 is connected to the first current input terminal 11, the source of the input transistor MP2 is connected to the drain of the first transistor MP0, and the gate of the input transistor MP2 is connected to the first current input terminal 11 and the gate of the first transistor MP0, respectively. The following description of the input transistor MP2 is based on the example that the input transistor MP2 is a PMOS transistor.

[0058] In an alternative embodiment, see Figure 5As shown, the first current mirror circuit 10 also includes an input transistor MP2 disposed between the first current input terminal 11 and the first node 12, the gate and drain of the input transistor MP2 are respectively connected to the first current input terminal 11, the source of the input transistor MP2 is connected to the first node 12, and the gate of the input transistor MP2 is connected to the gate of the first transistor MP0. In the above embodiment, the input transistor MP2 is connected in series with the first transistor MP0, the input transistor MP2 operates in the saturation region, the input transistor MP2 can adjust the voltage of the first node 12, that is, the input transistor MP2 can adjust the drain voltage of the first transistor MP0 and the second transistor MP1, so that the first transistor MP0 and the second transistor MP1 operate in the linear region, the voltage consumed by the second transistor MP1 can be controlled within 100mV, consumes a small voltage, and can accurately mirror the current.

[0059] In some embodiments, please refer to Figure 5 As shown, the current output circuit 201 of the LED driving circuit 200 further includes a second current mirror 30 connected to the first current mirror circuit 10, and the second current mirror 30 is used to amplify the first bias current signal by a preset second multiple and then output the first current signal.

[0060] In some embodiments, the second current mirror 30 includes a first current branch and a second current branch; the first current branch is used to transmit the first bias current signal to the second current branch; the second current branch is used to amplify the first bias current signal by a preset second multiple and output the first current signal.

[0061] As an implementation manner, the first current branch includes a third transistor MN0 and a fourth transistor MN2, and the second current branch includes a fifth transistor MN1 and a sixth transistor MN3. A first end of the third transistor MN0 is connected to a second end of the fourth transistor MN2, a second end of the third transistor MN0 is connected to a second end of the fifth transistor MN1, a third end of the third transistor MN0 is connected to a third end of the fifth transistor MN1, a first end of the fifth transistor MN1 is connected to a second end of the sixth transistor MN3; a third end of the sixth transistor MN3 is connected to a third end of the fourth transistor MN2, and a first end of the sixth transistor MN3 is connected to the first current mirror circuit 10.

[0062] The first current branch receives the first bias current signal through the first end of the fourth transistor MN2 and transmits it to the second current branch through the fifth transistor MN1. The fifth transistor MN1 amplifies the first bias current signal by a preset second multiple and outputs the first current signal through the sixth transistor MN3.

[0063] The second current mirror 30 further includes a second current input terminal 31, a third current input terminal 32 and a seventh transistor MN4. For example, the third to seventh transistors are all NMOS transistors, the drain (first terminal) of the third transistor MN0 is connected to the source (second terminal) of the fourth transistor MN2, the source (second terminal) of the third transistor MN0 is connected to the source (second terminal) of the fifth transistor MN1, and the gate (third terminal) of the third transistor MN0 is connected to the gate (third terminal) of the fifth transistor MN1; the drain (first terminal) of the fourth transistor MN2 is connected to the second current input terminal 31, the gate of the fourth transistor MN2 is connected to the third current input terminal 32, the gate (third terminal) of the sixth transistor MN3 is connected to the gate (third terminal) of the fourth transistor MN2, the source (second terminal) of the sixth transistor MN3 is connected to the drain (first terminal) of the fifth transistor MN1, and the drain (first terminal) of the sixth transistor MN3 is connected to the first current input terminal 11; the drain and gate of the seventh transistor MN4 are respectively connected to the third current input terminal 32, and the source of the seventh transistor MN4 is connected to the source of the third transistor MN0. Further, a source of the third transistor MN0 is grounded.

[0064] The drain of the sixth transistor MN3 is the output terminal of the second current mirror circuit 30 , and the sixth transistor MN3 is connected to the first current input terminal 11 of the first current mirror circuit 10 .

[0065] The second bias current I0 is input from the third current input terminal 32 to the seventh transistor MN4 to provide a bias voltage for the fourth transistor MN2 and the sixth transistor MN3. In this embodiment, the seventh transistor MN4 operates in the saturation region, and the fourth transistor MN2 and the sixth transistor MN3 can operate in the linear region or the saturation region.

[0066] In this embodiment, the third transistor MN0 is connected in series with the fourth transistor MN2, the fifth transistor MN1 is connected in series with the sixth transistor MN3, the first bias current I1 is input from the second current input terminal 31 to the third transistor MN0 via the fourth transistor MN2, and the first bias current I1 provides a bias voltage for the third transistor MN0 and the fifth transistor MN1. The first bias current I1 is mirrored by the fifth transistor MN1 by a preset second multiple and then output from the drain of the sixth transistor MN3 to the first current mirror circuit 10.

[0067] For example, the second multiple is preset to be n, then the current output by the second current mirror circuit 30 is nI1, and the current output by the first current mirror circuit 10 is mnI1.

[0068] In some embodiments, see Figure 6As shown, based on the second current mirror 30, the current output circuit 201 of the LED driving circuit 200 also includes a current regulating module 40 connected to the first current branch, that is, the current regulating module 40 connected to the second current input terminal 31, which is used to adjust the size of the first bias current I1 input to the first current branch, that is, the second current input terminal 31, and then adjust the size of the current nI1 output by the second current mirror 30 and the size of the output current mnI1 of the first current mirror circuit 10.

[0069] In an optional embodiment, the current regulation module 40 includes a first line 41, a second line 42, a plurality of first mirror branches 43, a third mirror branch 45 and a second mirror branch 44, wherein the plurality of first mirror branches 43 and the second mirror branch 44 are sequentially arranged between the first line 41 and the second line 42, each first mirror branch 43 includes a first PMOS transistor MP4 and a second PMOS transistor MP5, the source of the first PMOS transistor MP4 is connected to the first line 41, and the drain of the second PMOS transistor MP5 is connected to the second line 42; the second mirror branch 44 includes a third PMOS transistor MP6 and a fourth PMOS transistor MP7, the source of the third PMOS transistor MP6 is connected to the first line 41 , the drain of the fourth PMOS transistor MP7 is connected to the second line 42; the third mirror branch 45 includes a fifth PMOS transistor MP8 and a sixth PMOS transistor MP9, the source of the fifth PMOS transistor MP8 is connected to the first line 41, and the drain of the sixth PMOS transistor MP9 is connected to the second line 42; the gate of the third PMOS transistor MP6 is connected to the gate of the fifth PMOS transistor MP8, the gate of the fourth PMOS transistor MP7 is connected to the gate of the sixth PMOS transistor MP9, the gate of the first PMOS transistor MP4 is connected to the gate of the third PMOS transistor MP6 through the first switch 46, and the gate of the second PMOS transistor MP5 is connected to the gate of the fourth PMOS transistor MP7 through the second switch 47.

[0070] In this embodiment, the second mirror branch 44 and the third mirror branch 45 form a third current mirror structure, which amplifies the bias current I3 input from the sixth PMOS transistor MP9 in the third mirror branch 45 by n0 times; the second mirror branch 44 and each first mirror branch 43 respectively form a fourth current mirror structure, which amplifies the bias current I3 input from the lower PMOS transistor MP5 in the first mirror branch 43 by n0 times. x Zoom in xtimes, where x=4, 5, 6, ..., the number of first mirror branches 43 connected to the second mirror branch 44 is controlled by turning on and off the corresponding first switch 46 and the second switch 47, thereby controlling the number of fourth current mirror structures. Specifically, the more fourth current mirror structures are formed, the greater the first bias current output to the second current input terminal 31.

[0071] In some embodiments, the switching circuit 50 includes multiple switching modules 52 and multiple current output circuits 51, and the first end of each switching module 52 is connected to the first current mirror circuit 10, and the second end is connected to any current output circuit 51; wherein the current output circuit 51 is used to be connected to the LED control module; the switching module 52 is used to control the on and off of the current output circuit 51 according to the LED control module, and is used to input the second current signal into the corresponding light-emitting diode through the current output circuit 51 in the on state.

[0072] In this embodiment, each switch module 52 is connected to a corresponding current output circuit 51. When the switch module 52 is turned on, the current output circuit 51 connected to the switch module 52 is also in a conducting state, and the second current signal can be input into the corresponding light-emitting diode through the current output circuit 51.

[0073] For example, see Figure 7 , the switch module 52 can be a transmission gate, the number of the switch modules 52 is 3, the number of the corresponding current output lines 51 is also 3, and the current output lines 51 are all connected to the LED control module 202. Then, the switch module 52 can be controlled to be turned on or off according to the LED control module 202, thereby controlling the on and off of the current output line 51, and inputting the second current signal to the corresponding light-emitting diode through the switch module 52 and the current output line 51 in the on state. In this embodiment, the lighting frequency of the light-emitting diode can be switched through the LED control module, and a current mirror circuit can power multiple light-emitting diodes, further reducing the LED driving power consumption.

[0074] Figure 7 Schematic diagram of the structure of the LED control circuit of the embodiment of the present application. Figure 7 As shown, the LED control circuit includes an LED control module 202 having multiple control modules, multiple light-emitting diodes 62 and the above-mentioned LED driving circuit 200; wherein the control module is used to control the first end of at least one light-emitting diode 62 to be turned on, and the LED driving circuit 200 is used to transmit the second current signal to the second end of at least one light-emitting diode to be turned on. For details, please refer to the above-mentioned embodiment of the LED driving circuit 200, which will not be described one by one here.

[0075] In some embodiments, see Figure 8As shown, each control module includes a control circuit 61 and a pull-down switch 63, the control circuit 61 is connected to the pull-down switch 63, the first end of each light-emitting diode 62 is connected to one of the current output circuits 51, and the second end cathode of each light-emitting diode 62 is connected to one of the control circuits 61. The control module controls the first end of at least one light-emitting diode 62 to be turned on by controlling the state of the pull-down switch 63; the LED driving circuit 200 is used to transmit the second current signal to the second end of at least one light-emitting diode 62 to be turned on according to the state of the current output circuit 51.

[0076] In this embodiment, since the first end of the light emitting diode 62 is connected to the switch module 52 through the current output circuit 51, and the second end is connected to the pull-down switch 63 through the control circuit 61, the state of the light emitting diode 62 can be controlled by controlling the state of the switch module 52 and the pull-down switch 63, that is, the state of the light emitting diode 62 can be controlled by the state of the current output circuit 51 and the pull-down switch 63. When the pull-down switch outputs an effective level to the light emitting diode 62 through the control circuit 61, the switch module 52 connected to the light emitting diode 62 is turned on, and the current output circuit 51 is turned on, the light emitting diode 62 is turned on and emits light. Among them, the effective level can be a low level, and the level at which the switch module 52 is turned on can be a high level; the effective level can also be a high level, and the level at which the switch module 52 is turned on can be a low level.

[0077] As an implementation, the first end of the light emitting diode 62 may be an anode, and the second end may be a cathode.

[0078] In some embodiments, the number of light-emitting diodes 62 connected to different current output circuits 51 is the same, and the number of light-emitting diodes 62 connected to different control circuits 61 is the same.

[0079] In this embodiment, a plurality of light emitting diodes 62 share a first current mirror circuit 10. Specifically, a plurality of light emitting diodes 62 share a first current mirror circuit 10. By increasing the frequency of switching different light emitting diodes 62 to emit light, a visual effect of a plurality of light emitting diodes 62 lighting up at the same time is achieved. The following describes the LED control circuit by taking three current output circuits 51, three control circuits 61 and six light emitting diodes 62 as an example.

[0080] See also Figure 7 , Figure 8 and Fig. 9 As shown, Fig. 9Among them, ON[0], ON[1] and ON[2] are respectively used to control the on and off of the three switch modules 52, thereby controlling the current output of the three current output lines 51; LED_COM[0], LED_COM[1] and LED_COM[2] are respectively used to control the output signals of the three pull-down switches 63, thereby controlling the output signals on the three control lines 61.

[0081] In the first scanning cycle, LED_COM[0] is at a high level, pulling the first pull-down switch 63 (PAD0) to a low level. In the first half of the first scanning cycle, ON[1] is at a high level, and the first LED 62 is lit. In the second half of the first scanning cycle, ON[1] is at a low level, and the first LED 62 is off. ON[2] is at a high level, and the second LED 62 is lit.

[0082] In the second scanning cycle, the second LED 62 is off, LED_COM[1] is at a high level, and the second pull-down switch 63 (PAD1) is pulled to a low level. In the first half of the second scanning cycle, ON[0] is at a high level, and the third LED 62 is lit; in the second half of the second scanning cycle, ON[0] is at a low level, the third LED 62 is off, ON[2] is at a high level, and the fourth LED 62 is lit.

[0083] In the third scanning cycle, the 4th LED 62 is off, LED_COM[2] is at a high level, and the third pull-down switch 63 (PAD2) is pulled to a low level. In the first half of the third scanning cycle, ON[0] is at a high level, and the 5th LED 62 is lit; in the second half of the third scanning cycle, ON[0] is at a low level, the 5th LED 62 is off, ON[1] is at a high level, and the 6th LED 62 is lit.

[0084] In the LED control circuit of the present embodiment, multiple light-emitting diodes 62 share one current source, which greatly saves the number of current sources and reduces the current consumption during driving. The LED driving circuit 200 for driving the light-emitting diodes 62 in the present embodiment can drive multiple LEDs to emit light under a lower power supply voltage, and can still ensure stable current output. There is no need to use circuits such as charge pumps, which greatly saves costs and power consumption, and has high output impedance and high power supply rejection ratio.

[0085] Fig.10 Schematic diagram of the structure of a chip according to an embodiment of the present application. Fig.10 As shown, the chip 60 includes an LED driving circuit 200 .

[0086] Fig.11 Schematic diagram of the structure of an electronic device according to an embodiment of the present application. Fig.11As shown, the electronic device 70 includes a chip 60 or an LED control circuit.

[0087] Among them, the electronic device 70 can be but not limited to a weight scale, a body fat scale, a nutrition scale, an infrared electronic thermometer, a pulse oximeter, a human body composition analyzer, a mobile power supply, a wireless charger, a fast charger, a car charger, an adapter, a display, a USB (Universal Serial Bus) docking station, a stylus, a true wireless headset, a car central control screen, a car, a smart wearable device, a mobile terminal, and a smart home device. Smart wearable devices include but are not limited to smart watches, smart bracelets, cervical massagers, and TWS (True Wireless Stereo) headsets. Mobile terminals include but are not limited to smartphones, laptops, tablets, and POS (point of sales terminal). Smart home devices include but are not limited to smart sockets, smart rice cookers, smart sweepers, and smart lights.

[0088] The above is only an implementation method of the present application. It should be pointed out that a person skilled in the art can make improvements without departing from the inventive concept of the present application, but these improvements are within the scope of protection of the present application.

Claims

1. An LED driving circuit, characterized in that: include: A first current mirror circuit, configured to receive a first current signal; a second current mirror, configured to amplify the first bias current signal by a preset second multiple and then output the first current signal; the second current mirror comprises a first current branch and a second current branch, a second current input terminal, a third current input terminal, and a seventh transistor; The first current branch includes a third transistor and a fourth transistor, and the second current branch includes a fifth transistor and a sixth transistor; The second bias current is input to the seventh transistor via the third current input terminal to provide a bias voltage for the fourth transistor and the sixth transistor; The first bias current signal provides a bias voltage for the third transistor and the fifth transistor from the second current input terminal; The first current branch is used to transmit the first bias current signal to the second current branch; The second current branch is used to amplify the first bias current signal by the preset second multiple and output the first current signal; a clamping circuit connected to two ends of the first current mirror circuit, so that the first current mirror circuit amplifies the first current signal by a preset first multiple and then outputs a second current signal; The switch circuit is used to control the second current signal to be input into the corresponding light emitting diode according to the LED control module.

2. The LED driving circuit according to claim 1, characterized in that: The first current mirror circuit includes: a first transistor and a second transistor; The clamping circuit is used to clamp the voltage at the first end of the first transistor and the voltage at the first end of the second transistor, so that the first current mirror circuit amplifies the first current signal by the preset first multiple and then outputs a second current signal.

3. The LED driving circuit according to claim 2, characterized in that: The first current mirror circuit further includes: a first current input terminal and a first current output terminal; The second end of the first transistor is used to be connected to the second end of the second transistor, and the third end of the first transistor is used to be connected to the third end of the second transistor; The first end of the first transistor is connected to the first current input end, and the first transistor is used to transmit the first current signal to the second transistor; The first end of the second transistor is connected to the first current output end, and the second transistor is used to amplify the first current signal by a preset multiple and then output the second current signal.

4. The LED driving circuit according to claim 3, characterized in that: The first current mirror circuit also includes an output transistor, which is connected to the first current output terminal and is used to output the second current signal output by the second transistor to the first current output terminal.

5. The LED driving circuit according to claim 4, characterized in that: The clamping circuit includes an operational amplifier; The operational amplifier has a first input terminal connected to the first terminal of the first transistor, a second input terminal connected to the first terminal of the second transistor, and an output terminal connected to the gate of the output transistor.

6. The LED driving circuit according to claim 2, characterized in that: The first current mirror circuit further includes an input transistor, wherein a first end of the input transistor is connected to a first current input end, a second end is connected to a first end of the first transistor, and a third end is respectively connected to the first current input end and a third end of the first transistor; The input transistor is used to output the first current signal to the first transistor.

7. The LED driving circuit according to claim 1, characterized in that: The LED driving circuit also includes a current regulating module; The current regulating module is connected to the first current branch and is used to regulate the magnitude of a first bias current input to the first current branch.

8. The LED driving circuit according to claim 1, characterized in that: The switch circuit comprises a plurality of switch modules and a plurality of current output circuits; a first end of each switch module is connected to the first current mirror circuit, and a second end is connected to any of the current output circuits; The current output circuit is used to be connected to the LED control module; The switch module is used to control the on / off of the current output circuit according to the LED control module; and is used to input the second current signal into the corresponding light emitting diode through the current output circuit in the on state.

9. An LED control circuit, characterized in that: The LED control circuit comprises a plurality of control modules, a plurality of light emitting diodes and an LED driving circuit as claimed in any one of claims 1 to 8; The control module is used to control the first end of at least one light emitting diode to be turned on; The LED driving circuit is used to transmit the second current signal to the second end of at least one light emitting diode to be turned on.

10. The LED control circuit according to claim 9, characterized in that: Each of the control modules includes a pull-down switch and a control circuit, wherein the control circuit is connected to the pull-down switch; A first end of each of the light emitting diodes is connected to one of the current output circuits, and a second end of each of the light emitting diodes is connected to one of the control circuits; The control module controls the first end of the at least one light emitting diode to be turned on by controlling the state of the pull-down switch; The LED driving circuit is used for transmitting the second current signal to the second end of at least one light emitting diode to be turned on according to the state of the current output circuit.

11. The LED control circuit according to claim 10, characterized in that: The number of the light-emitting diodes connected to the current output circuit is the same, and the number of the light-emitting diodes connected to the control circuit is the same.

12. A chip, characterized in that: The LED driving circuit comprises the LED driving circuit according to any one of claims 1 to 8.

13. An electronic device, characterized in that: The invention comprises the chip according to claim 12 or the LED control circuit according to any one of claims 9 to 11.

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