General Constraint Information Syntax in Video Coding

Abstract

A method for processing video data, comprising: performing a bitstream consistency process that determines whether a bitstream comprising an encoded representation of video data conforms to a video coding standard, wherein the bitstream consistency process determines that the bitstream does not conform to the video coding standard when at least one of the following is true: a chroma-related constraint flag is equal to 0, and when no chroma components for a picture are present in the bitstream; or an inter-frame prediction-related constraint flag is equal to 0 when all slices of the bitstream are I slices.

Description

[0001] This application claims priority to U.S. application No. 17 / 219,147, filed on March 11, 2021, and U.S. provisional patent application No. 63 / 004,296, filed on April 2, 2020, and the entire contents of each of the above applications are incorporated by reference. Technical Field

[0002] This disclosure relates to video encoding and video decoding. Background Art

[0003] Digital video capabilities can be incorporated into a wide variety of devices, including digital televisions, digital live broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video game devices, video game consoles, cellular or satellite radio telephones (so-called "smartphones"), video teleconferencing devices, video streaming devices, and the like. Digital video devices implement video coding techniques, such as those described in the standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4 (Part 10, Advanced Video Coding (AVC)), ITU-T H.265 / High Efficiency Video Coding (HEVC), and extensions of such standards. By implementing such video coding techniques, video devices can more efficiently transmit, receive, encode, decode, and / or store digital video information.

[0004] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or remove redundancy inherent in video sequences. For block-based video coding, a video slice (e.g., a video picture or a portion of a video picture) may be partitioned into video blocks, which may also be referred to as coding tree units (CTUs), coding units (CUs), and / or coding nodes. Video blocks in an intra-coded (I) slice of a picture are encoded using spatial prediction relative to reference samples in neighboring blocks in the same picture. Video blocks in an inter-coded (P or B) slice of a picture may use spatial prediction relative to reference samples in neighboring blocks in the same picture or temporal prediction relative to reference samples in other reference pictures. Pictures may be referred to as frames, and reference pictures may be referred to as reference frames. Summary of the Invention

[0005] In summary, this disclosure describes techniques for signaling general constraint information syntax for video coding. The techniques of this disclosure can be applied to the Versatile Video Coding (VVC) standard and other future video coding standards. As described herein, this disclosure describes techniques that can enable a device to correctly determine whether a video decoder is configured to decode a bitstream. Making this determination can potentially enable a video decoder to decode more bitstreams than if the determination were not made correctly.

[0006] In one example, the present disclosure describes a method for processing video data, the method comprising: performing a bitstream consistency process, the bitstream consistency process determining whether a bitstream comprising an encoded representation of video data complies with a video decoding standard, wherein the bitstream consistency process determines that the bitstream does not comply with the video decoding standard when at least one of the following is true: a chroma-related constraint flag is equal to 0, and when no chroma component for a picture is present in the bitstream; or when all slices of the bitstream are I slices, the inter-frame prediction-related constraint flag is equal to 0.

[0007] In another example, the present disclosure describes a device for processing video data, the device comprising: a memory for storing a bitstream that complies with a video decoding standard and includes an encoded representation of the video data; and one or more processors implemented in circuitry and coupled to the memory, the one or more processors configured to: perform a bitstream consistency process that determines whether the bitstream complies with the video decoding standard, wherein the bitstream consistency process determines that the bitstream does not comply with the video decoding standard when at least one of the following is true: a chroma-related constraint flag is equal to 0, and when there is no chroma component for a picture in the bitstream; or when all slices of the bitstream are I slices, the inter-frame prediction-related constraint flag is equal to 0.

[0008] In another example, the present disclosure describes a device for processing video data, the device comprising: a unit for storing a bitstream comprising an encoded representation of the video data; and a unit for performing a bitstream consistency process, the bitstream consistency process determining whether the bitstream conforms to a video coding standard, wherein the bitstream consistency process determines that the bitstream does not conform to the video coding standard when at least one of the following is true: a chroma-related constraint flag is equal to 0, and when no chroma component for a picture is present in the bitstream; or when all slices of the bitstream are I slices, the inter-frame prediction-related constraint flag is equal to 0.

[0009] In another example, the present disclosure describes a computer-readable storage medium having instructions stored thereon that, when executed, cause one or more processors to store a bitstream comprising an encoded representation of video data; and perform a bitstream consistency process that determines whether the bitstream conforms to a video coding standard, wherein the bitstream consistency process determines that the bitstream does not conform to the video coding standard when at least one of the following is true: a chroma-related constraint flag is equal to 0, and when no chroma component for a picture is present in the bitstream; or an inter-prediction-related constraint flag is equal to 0 when all slices of the bitstream are I slices.

[0010] In another example, the present disclosure describes a method of processing video data, the method comprising: performing a bitstream conformance process that determines whether a bitstream comprising an encoded representation of the video data conforms to a video coding standard, wherein when a second syntax element indicates that only one slice is allowed per picture, the bitstream conformance process is capable of determining that the bitstream conforms to the video coding standard regardless of a value of a first syntax element that indicates whether only one sub-picture is allowed per sub-picture.

[0011] In another example, the present disclosure describes a method of processing video data, the method comprising: performing a bitstream conformance process, the bitstream conformance process determining whether a bitstream comprising an encoded representation of the video data conforms to a video coding standard, wherein when a chroma-related constraint flag is equal to 0 and when a chroma component for a picture is not present in the bitstream, the bitstream conformance process determines that the bitstream does not conform to the video coding standard.

[0012] In another example, the present disclosure describes a method for processing video data, the method comprising: performing a bitstream consistency process, the bitstream consistency process determining whether a bitstream comprising an encoded representation of the video data complies with a video decoding standard, wherein when an inter-frame prediction related constraint flag is equal to 0 (when all slices of the bitstream are I slices), the bitstream consistency process determines that the bitstream does not comply with the video decoding standard.

[0013] In another example, the present disclosure describes a method of processing video data, the method comprising: determining, based on a second syntax element indicating that no chroma components are present in the bitstream and a third syntax element indicating that all slices of the bitstream are I slices, that a first syntax element is omitted from a bitstream and inferred to be equal to 1, the first syntax element being one of: no_qtbtt_dual_tree_intra_constraint_flag, no_ccalf_constraint_flag, no_joint_cbcr_constraint_flag, no_cclm_constraint_flag, no_ref_wraparound_constraint_flag, no_temporal_mvp_constraint_flag int_flag, no_sbtmvp_constraint_flag, no_amvr_constraint_flag, no_bdof_constraint_flag, no_dmvr_constraint_flag, no_affine_motion_constraint_flag, no_bcw_constraint_flag, no_ciip_constraint_flag, no_fpel_mmvd_constraint_flag, or no_gpm_constraint_flag; and performing a bitstream conformance process that determines, based on the first syntax element, whether a bitstream including an encoded representation of video data conforms to a video coding standard.

[0014] In another example, the present disclosure describes a method of processing video data, the method comprising: performing a bitstream conformance process, the bitstream conformance process determining whether a bitstream comprising an encoded representation of the video data conforms to a video coding standard, wherein the bitstream conformance process indicates, based on a first syntax element in a sequence parameter set (SPS), that a coding tool is enabled, and determining that the bitstream does not conform to the video coding standard when a second syntax element of the bitstream indicates that the first syntax element should have a value indicating that the coding tool is not enabled.

[0015] In another example, the present disclosure describes a method for processing video data, the method comprising: performing a bitstream conformance process, the bitstream conformance process determining whether a bitstream including an encoded representation of the video data conforms to a video coding standard, wherein the bitstream conformance process determines that the bitstream does not conform to the video coding standard based on a first syntax element having a specific value indicating that a bitstream conformance requirement applies and based on that the bitstream conformance requirement is not satisfied, wherein the bitstream conformance requirement specifies one of the following: a second syntax element specifies that a video parameter set (VPS) identifier of a sequence parameter set (SPS) should be equal to 0, the second syntax element should be equal to 0, and a third syntax element plus 1 specifies that a maximum number of temporal sub-layers that may be present in each coded layer video sequence (CLVS) should be equal to 0, the third syntax element should be equal to 0, or the fourth syntax element should specify that all layers in a coded video sequence (CVS) are independently coded without inter-layer prediction.

[0016] In another example, the present disclosure describes a method for processing video data, the method comprising: performing a bitstream conformance process, the bitstream conformance process determining whether a bitstream including an encoded representation of video data conforms to a video coding standard, wherein the bitstream conformance process determines that the bitstream does not conform to the video coding standard based on a first syntax element having a specific value indicating that a bitstream conformance requirement applies and based on the bitstream conformance requirement not being met, wherein the bitstream conformance requirement specifies one of the following: no NAL unit having a NAL unit type equal to a video parameter set (VPS) network abstraction layer (NAL) unit type in a scoped output layer set should be present in the bitstream, or no NAL unit having a picture header NAL unit type in a scoped output layer set should be present in the bitstream.

[0017] In another example, the present disclosure describes an apparatus for processing video data, the apparatus comprising one or more means for performing any such method. A computer-readable storage medium having instructions stored thereon that, when executed, cause one or more processors to perform any such method.

[0018] The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a block diagram illustrating an example video encoding and decoding system that may perform the techniques of this disclosure.

[0020] Figure 2A and Figure 2Bis a conceptual diagram illustrating an example quadtree binary tree (QTBT) structure and a corresponding coding tree unit (CTU).

[0021] Figure 3 is a block diagram illustrating an example video encoder.

[0022] Figure 4 is a block diagram illustrating an example video decoder.

[0023] Figure 5 is a flowchart illustrating an example method for encoding a current block.

[0024] Figure 6 is a flow chart illustrating an example method for decoding a current block of video data.

[0025] Figure 7 is a flowchart illustrating an example process in accordance with one or more techniques of this disclosure. DETAILED DESCRIPTION

[0026] As described herein, VVC specifies that a video encoder may include a set of general constraint flags in a bitstream. The general constraint flags may include a chroma-related constraint flag and an inter-frame prediction-related constraint flag. The constraint flags may specify which decoding tools are used in the bitstream. However, when no chroma component is used in a picture of the bitstream, the chroma-related constraint flag should not indicate that chroma-related decoding tools may be used in the bitstream. Similarly, when the bitstream includes only I slices, the intra-frame prediction-related constraint flag should not indicate that inter-frame prediction-related decoding tools may be used in the bitstream. If a video decoder is not configured to use chroma-related decoding tools or inter-frame prediction-related decoding tools, providing an indication that chroma-related decoding tools or inter-frame prediction-related decoding tools may be used in the bitstream when the chroma-related decoding tools or inter-frame prediction-related decoding tools may not actually be used in the bitstream may cause a video decoder or other device to erroneously determine that the video decoder is unable to decode the bitstream. This may limit the functionality of the video decoder.

[0027] To address this technical problem, the present disclosure describes techniques for imposing specific constraints on the values of a chroma-related constraint flag and an inter-frame prediction-related constraint flag. These constraints can be verified in a bitstream consistency process. Therefore, according to one or more techniques of the present disclosure, a device can perform a bitstream consistency process that determines whether a bitstream including an encoded representation of video data complies with a video decoding standard. The bitstream consistency process determines that the bitstream does not comply with the video decoding standard when at least one of the following is true: the chroma-related constraint flag is equal to 0, and when there is no chroma component for the picture in the bitstream; or when all slices of the bitstream are I slices, the inter-frame prediction-related constraint flag is equal to 0. In some examples, if the bitstream does not comply with the video decoding standard, the device does not forward the bitstream to the video decoder for decoding.

[0028] Figure 1 is a block diagram illustrating an example video encoding and decoding system 100 that can perform the techniques of this disclosure. Generally speaking, the techniques of this disclosure relate to transcoding (encoding and / or decoding) video data. Generally, video data includes any data used to process video. Thus, video data can include original, unencoded video, encoded video, decoded (e.g., reconstructed) video, and video metadata (such as signaling data).

[0029] like Figure 1 As shown, in this example, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a destination device 116. Specifically, source device 102 provides the video data to destination device 116 via a computer-readable medium 110. Source device 102 and destination device 116 may include any of a variety of devices, including desktop computers, notebook computers (i.e., laptop computers), tablet computers, set-top boxes, telephone handsets such as smartphones, televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some cases, source device 102 and destination device 116 may be equipped for wireless communication and, therefore, may be referred to as wireless communication devices.

[0030] exist Figure 1In the example of , source device 102 includes video source 104, memory 106, video encoder 200 and output interface 108. Destination device 116 includes input interface 122, video decoder 300, memory 120 and display device 118. According to the present disclosure, the video encoder 200 of source device 102 and the video decoder 300 of destination device 116 can be configured to apply techniques related to general constraint information syntax in video decoding. Therefore, source device 102 represents an example of a video encoding device, while destination device 116 represents an example of a video decoding device. In other examples, the source device and destination device may include other components or arrangements. For example, source device 102 may receive video data from an external video source (such as an external camera). Similarly, destination device 116 may be connected to an external display device instead of including an integrated display device.

[0031] like Figure 1 The illustrated system 100 is merely an example. In general, any digital video encoding and / or decoding device can implement techniques involving general constraint information syntax in video coding. Source device 102 and destination device 116 are merely examples of such coding devices, where source device 102 generates coded video data for transmission to destination device 116. This disclosure refers to a "coding" device as a device that performs coding (e.g., encoding and / or decoding) of data. Thus, video encoder 200 and video decoder 300 represent examples of coding devices (specifically, a video encoder and a video decoder, respectively). In some examples, source device 102 and destination device 116 can operate in a substantially symmetrical manner, such that each of source device 102 and destination device 116 includes video encoding and decoding components. Thus, system 100 can support one-way or two-way video transmission between source device 102 and destination device 116, for example, for video streaming, video playback, video broadcasting, or video telephony.

[0032] Typically, video source 104 represents a source of video data (i.e., raw, unencoded video data) and provides a series of sequential pictures (also referred to as "frames") of the video data to video encoder 200, which encodes the data for the pictures. Video source 104 of source device 102 may include a video capture device, such as a camera, a video archive containing previously captured raw video, and / or a video feed interface for receiving video from a video content provider. As another alternative, video source 104 may generate computer graphics-based data as the source video, or a combination of real-time video, archived video, and computer-generated video. In each case, video encoder 200 encodes captured, pre-captured, or computer-generated video data. Video encoder 200 may rearrange the pictures from the order in which they were received (sometimes referred to as "display order") into a decoding order for decoding. Video encoder 200 may generate a bitstream comprising the encoded video data. Source device 102 may then output the encoded video data onto computer-readable medium 110 via output interface 108 to be received and / or retrieved by, for example, input interface 122 of destination device 116 .

[0033] Memory 106 of source device 102 and memory 120 of destination device 116 represent general purpose memories. In some examples, memories 106, 120 can store raw video data, e.g., raw video from video source 104 and raw decoded video data from video decoder 300. Additionally or alternatively, memories 106, 120 can store software instructions executable by, for example, video encoder 200 and video decoder 300, respectively. Although memory 106 and memory 120 are shown in this example as separate from video encoder 200 and video decoder 300, it should be understood that video encoder 200 and video decoder 300 can also include internal memory for functionally similar or equivalent purposes. Furthermore, memories 106, 120 can store, for example, encoded video data output from video encoder 200 and input to video decoder 300. In other words, memories 106, 120 can store a bitstream comprising an encoded representation of the video data. In some examples, portions of memory 106 , 120 may be allocated as one or more video buffers, eg, to store raw decoded and / or encoded video data.

[0034] The computer-readable medium 110 can represent any type of medium or device capable of transporting encoded video data from the source device 102 to the destination device 116. In one example, the computer-readable medium 110 represents a communication medium that enables the source device 102 to send the encoded video data directly to the destination device 116 in real time, for example, via a radio frequency network or a computer-based network. According to a communication standard such as a wireless communication protocol, the output interface 108 can demodulate the transmission signal including the encoded video data, and the input interface 122 can demodulate the received transmission signal. The communication medium can include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium can form part of a packet-based network such as a local area network, a wide area network, or a global network such as the Internet. The communication medium can include routers, switches, base stations, or any other device that can be useful for facilitating communication from the source device 102 to the destination device 116.

[0035] In some examples, source device 102 may output the encoded data from output interface 108 to storage device 112. Similarly, destination device 116 may access the encoded data from storage device 112 via input interface 122. Storage device 112 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, Blu-ray disc, DVD, CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data.

[0036] In some examples, source device 102 may output the encoded video data to a file server 114 or another intermediate storage device that may store the encoded video data generated by source device 102. Destination device 116 may access the stored video data from file server 114 via streaming or downloading. File server 114 may be any type of server device capable of storing encoded video data and transmitting the encoded video data to destination device 116. File server 114 may represent a web server (e.g., for a website), a file transfer protocol (FTP) server, a content delivery network device, or a network attached storage (NAS) device. Destination device 116 may access the encoded video data from file server 114 via any standard data connection, including an internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a digital subscriber line (DSL), a cable modem, etc.), or a combination of the two suitable for accessing the encoded video data stored on file server 114. File server 114 and input interface 122 may be configured to operate according to a streaming transmission protocol, a download transmission protocol, or a combination thereof.

[0037] The output interface 108 and the input interface 122 may represent wireless transmitters / receivers, modems, wired networking components (e.g., Ethernet cards), wireless communication components that operate according to any of the various IEEE 802.11 standards, or other physical components. In examples where the output interface 108 and the input interface 122 include wireless components, the output interface 108 and the input interface 122 may be configured to transmit data (such as encoded video data) according to a cellular communication standard (such as 4G, 4G-LTE (Long Term Evolution), Advanced LTE, 5G, etc.). In some examples where the output interface 108 includes a wireless transmitter, the output interface 108 and the input interface 122 may be configured to transmit data (such as encoded video data) according to other wireless standards (such as the IEEE 802.11 specifications, the IEEE 802.15 specifications (e.g., ZigBee LTE), and the like). TM ), Bluetooth TM Standards, etc.) to transmit data (such as encoded video data). In some examples, source device 102 and / or destination device 116 may include corresponding system-on-chip (SoC) devices. For example, source device 102 may include a SoC device for performing the functionality assigned to video encoder 200 and / or output interface 108, and destination device 116 may include a SoC device for performing the functionality assigned to video decoder 300 and / or input interface 122.

[0038] The techniques of the present disclosure can be applied to video decoding to support any of a variety of multimedia applications, such as over-the-air television broadcasting, cable television transmission, satellite television transmission, Internet streaming video transmission (such as Dynamic Adaptive Streaming over HTTP (DASH)), digital video encoded onto a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0039] The input interface 122 of the destination device 116 receives an encoded video bitstream from the computer-readable medium 110 (e.g., a communication medium, a storage device 112, a file server 114, etc.). The encoded video bitstream may include signaling information defined by the video encoder 200 (which is also used by the video decoder 300), such as syntax elements having values that describe characteristics and / or processing of video blocks or other coding units (e.g., slices, pictures, groups of pictures, sequences, etc.). The display device 118 displays the decoded pictures of the decoded video data to a user. The display device 118 may represent any of a variety of display devices, such as a cathode ray tube (CRT), a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0040] Despite Figure 1 2. Although not shown, in some examples, the video encoder 200 and the video decoder 300 can each be integrated with an audio encoder and / or audio decoder and can include appropriate MUX-DEMUX units or other hardware and / or software to process a multiplexed stream including both audio and video in a common data stream. If applicable, the MUX-DEMUX units can follow the ITU H.223 multiplexer protocol or other protocols such as the User Datagram Protocol (UDP).

[0041] The video encoder 200 and the video decoder 300 can each be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When the technology is partially implemented in software, the device can store instructions for the software in a suitable non-transitory computer-readable medium and, using one or more processors, execute the instructions in hardware to perform the technology of the present disclosure. Each of the video encoder 200 and the video decoder 300 can be included in one or more encoders or decoders, any of which can be integrated as part of a combined encoder / decoder (CODEC) in the corresponding device. The device including the video encoder 200 and / or the video decoder 300 can include an integrated circuit, a microprocessor, and / or a wireless communication device (such as a cellular phone).

[0042] The video encoder 200 and the video decoder 300 may operate according to a video coding standard such as ITU-T H.265 (also known as High Efficiency Video Coding (HEVC)) or an extension thereof such as multi-view and / or scalable video coding extensions. Alternatively, the video encoder 200 and the video decoder 300 may operate according to other proprietary or industry standards such as the ITU-T H.266 standard, also known as Versatile Video Coding (VVC). The latest draft of the VVC standard is described in the following document: Bross et al., “Versatile Video Coding (Draft 8)”, Joint Video Experts Group (JVET) of ITU-T SG 16WP 3 and ISO / IEC JTC 1 / SC 29 / WG 11, 17th Meeting: Brussels, Belgium, January 7-17, 2020, JVET-Q2001-vE (hereinafter referred to as “VVC Draft 8”). The reference software is called the VVC Test Model (VTM). This disclosure investigates and improves subclauses 7.3.3.2 and 7.4.4.2 of VVC Draft 8, version 15. Several proposed changes are included in this disclosure. At least one of the following proposed changes, or a combination of at least two of the following proposed changes, may be applied to the current VVC Working Draft (i.e., JVET-Q2001). However, the techniques of this disclosure are not limited to any particular coding standard.

[0043] Typically, the video encoder 200 and video decoder 300 can perform block-based decoding of a picture. The term "block" generally refers to a structure that includes data to be processed (e.g., to be encoded, decoded, or otherwise used in an encoding and / or decoding process). For example, a block can include a two-dimensional matrix of samples of luma and / or chroma data. Typically, the video encoder 200 and video decoder 300 can decode video data represented in a YUV (e.g., Y, Cb, Cr) format. That is, rather than decoding red, green, and blue (RGB) data for samples of a picture, the video encoder 200 and video decoder 300 can decode luma and chroma components, where the chroma components can include both a red hue chroma component and a blue hue chroma component. In some examples, the video encoder 200 converts the received RGB formatted data to a YUV representation before encoding, and the video decoder 300 converts the YUV representation to an RGB format. Alternatively, pre-processing and post-processing units (not shown) can perform these conversions.

[0044] In general, the present disclosure may relate to the decoding (e.g., encoding and decoding) of a picture to include the process of encoding or decoding the data of the picture. Similarly, the present disclosure may relate to the decoding of a block of a picture to include the process of encoding or decoding the data for the block (e.g., prediction and / or residual decoding). A coded video bitstream typically includes a series of values for syntax elements that represent decoding decisions (e.g., decoding modes) and the partitioning of a picture into blocks. Therefore, references to decoding a picture or block should generally be understood as decoding the values of the syntax elements used to form the picture or block.

[0045] HEVC defines various blocks, including coding units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video decoder (such as the video encoder 200) partitions a coding tree unit (CTU) into CUs according to a quadtree structure. That is, the video decoder partitions the CTU and CU into four equal, non-overlapping squares, and each node of the quadtree has zero or four child nodes. A node without child nodes may be referred to as a "leaf node," and the CU of such a leaf node may include one or more PUs and / or one or more TUs. The video decoder may further partition the PUs and TUs. For example, in HEVC, the residual quadtree (RQT) represents the partitioning of TUs. In HEVC, PU represents inter-frame prediction data, and TU represents residual data. An intra-predicted CU includes intra-frame prediction information, such as an intra-frame mode indication.

[0046] As another example, the video encoder 200 and the video decoder 300 can be configured to operate according to VVC. According to VVC, a video decoder (such as the video encoder 200) partitions a picture into multiple coding tree units (CTUs). The video encoder 200 can partition the CTU according to a tree structure (such as a quadtree-binary tree (QTBT) structure or a multi-type tree (MTT) structure). The QTBT structure removes the concept of multiple partitioning types, such as the separation between CU, PU, and TU in HEVC. The QTBT structure includes two levels: a first level partitioned according to quadtree partitioning, and a second level partitioned according to binary tree partitioning. The root node of the QTBT structure corresponds to the CTU. The leaf nodes of the binary tree correspond to the coding units (CUs).

[0047] In the MTT partitioning structure, blocks can be partitioned using quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more types of ternary tree (TT) (also known as ternary tree (TT)) partitioning. A ternary tree or ternary tree partitioning is a partitioning in which a block is divided into three sub-blocks. In some examples, the ternary tree or ternary tree partitioning divides the block into three sub-blocks without dividing the original block through the center. The partitioning types in MTT (e.g., QT, BT, and TT) can be symmetric or asymmetric.

[0048] In some examples, the video encoder 200 and the video decoder 300 may use a single QTBT or MTT structure to represent each of the luma component and the chroma components, while in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, such as one QTBT / MTT structure for the luma component and another QTBT / MTT structure for the two chroma components (or two QTBT / MTT structures for the respective chroma components).

[0049] The video encoder 200 and the video decoder 300 can be configured to use quadtree segmentation per HEVC, QTBT segmentation, MTT segmentation, or other segmentation structures. For the purpose of explanation, the technology of the present disclosure is described with respect to QTBT segmentation. However, it should be understood that the technology of the present disclosure can also be applied to video decoders configured to use quadtree segmentation or other types of segmentation.

[0050] In some examples, a CTU includes a coding tree block (CTB) of luma samples, two corresponding CTBs of chroma samples for a picture with three sample arrays, or a CTB of samples for a monochrome picture or a picture coded using three separate color planes and syntax structures for coding the samples. A CTB can be an NxN block of samples (for some value of N), such that dividing components into CTBs is a partitioning. A component is an array or a single sample from one of the three arrays (luma and two chroma) that make up a picture in 4:2:0, 4:2:2, or 4:4:4 color format, or an array or a single sample of an array that makes up a picture in monochrome format. In some examples, a coding block is an MxN block of samples (for some values of M and N), such that dividing a CTB into coding blocks is a partitioning.

[0051] Blocks (e.g., CTUs or CUs) can be grouped in a picture in various ways. As an example, a brick can refer to a rectangular area of a CTU row within a particular tile in a picture. A tile can be a rectangular area of a CTU within a particular tile column and a particular tile row in a picture. A tile column refers to a rectangular area of a CTU with a height equal to the height of the picture and a width specified by a syntax element (e.g., such as in a picture parameter set). A tile row refers to a rectangular area of a CTU with a height specified by a syntax element (e.g., such as in a picture parameter set) and a width equal to the width of the picture.

[0052] In some examples, a tile may be partitioned into multiple bricks, each of which may include one or more CTU rows within the tile. Tiles that are not partitioned into multiple bricks may also be referred to as bricks. However, bricks that are true subsets of a tile may not be referred to as tiles.

[0053] Tiles in a picture can also be arranged in slices. A slice can be an integer number of tiles of a picture that can be uniquely contained in a single Network Abstraction Layer (NAL) unit. In some examples, a slice includes a contiguous sequence of multiple complete tiles or just complete tiles of a tile.

[0054] This disclosure may use "NxN" and "N by N" interchangeably to refer to the sample size of a block (such as a CU or other video block) in terms of the vertical and horizontal dimensions, for example, 16x16 samples or 16 by 16 samples. Typically, a 16x16 CU will have 16 samples in the vertical direction (y=16) and 16 samples in the horizontal direction (x=16). Likewise, an NxNCU typically has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. The samples in a CU may be arranged in rows and columns. Furthermore, a CU does not necessarily need to have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU may include NxM samples, where M is not necessarily equal to N.

[0055] The video encoder 200 encodes video data representing prediction and / or residual information and other information for a CU. The prediction information indicates how the CU will be predicted in order to form a prediction block for the CU. The residual information typically represents the sample-by-sample difference between the samples of the CU before encoding and the prediction block.

[0056] To predict a CU, the video encoder 200 may typically form a prediction block for the CU through inter-frame prediction or intra-frame prediction. Inter-frame prediction typically refers to predicting a CU based on data of a previously decoded picture, while intra-frame prediction typically refers to predicting a CU based on previously decoded data of the same picture. To perform inter-frame prediction, the video encoder 200 may use one or more motion vectors to generate a prediction block. The video encoder 200 may typically perform a motion search to identify a reference block that closely matches the CU, for example, in terms of the difference between the CU and the reference block. The video encoder 200 may calculate a difference metric using the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), or other such difference calculations to determine whether the reference block closely matches the current CU. In some examples, the video encoder 200 may use unidirectional prediction or bidirectional prediction to predict the current CU.

[0057] Some examples of VVC also provide an affine motion compensation mode, which can be considered an inter-frame prediction mode. In affine motion compensation mode, the video encoder 200 can determine two or more motion vectors representing non-translational motion (such as zooming in or out, rotation, perspective motion, or other irregular motion types).

[0058] To perform intra prediction, the video encoder 200 can select an intra prediction mode to generate a prediction block. Some examples of VVC provide sixty-seven intra prediction modes, including various directional modes, as well as planar mode and DC mode. Typically, the video encoder 200 selects an intra prediction mode that describes the neighboring samples of the current block (e.g., the block of the CU) based on which the samples of the current block are to be predicted. Assuming that the video encoder 200 decodes CTUs and CUs in raster scan order (from left to right, from top to bottom), such samples may typically be above, above left, or to the left of the current block in the same picture as the current block.

[0059] The video encoder 200 encodes data indicating a prediction mode for the current block. For example, for inter-frame prediction mode, the video encoder 200 may encode data indicating which of various available inter-frame prediction modes to use, as well as motion information for the corresponding mode. For unidirectional or bidirectional inter-frame prediction, for example, the video encoder 200 may encode motion vectors using Advanced Motion Vector Prediction (AMVP) or Merge Mode. The video encoder 200 may use a similar mode to encode motion vectors for affine motion compensation mode.

[0060] After a prediction, such as intra prediction or inter prediction, for a block, the video encoder 200 may calculate residual data for the block. The residual data, such as a residual block, represents the sample-by-sample difference between the block and a prediction block for the block, which was formed using a corresponding prediction mode. The video encoder 200 may apply one or more transforms to the residual block to produce transformed data in a transform domain rather than a sample domain. For example, the video encoder 200 may apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. In addition, the video encoder 200 may apply a secondary transform, such as a mode-dependent non-separable secondary transform (MDNSST), a signal-dependent transform, a Karhunen-Loeve transform (KLT), etc., after the first transform. The video encoder 200 generates transform coefficients after applying the one or more transforms.

[0061] As described above, after any transform to produce transform coefficients, the video encoder 200 can perform quantization on the transform coefficients. Quantization generally refers to a process in which transform coefficients are quantized to potentially reduce the amount of data used to represent the transform coefficients, thereby providing further compression. By performing the quantization process, the video encoder 200 can reduce the bit depth associated with some or all transform coefficients. For example, the video encoder 200 can round down an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, the video encoder 200 can perform a bitwise right shift of the value to be quantized.

[0062] After quantization, the video encoder 200 may scan the transform coefficients to produce a one-dimensional vector from a two-dimensional matrix including the quantized transform coefficients. The scan may be designed to place transform coefficients with higher energy (and therefore lower frequency) at the front of the vector and transform coefficients with lower energy (and therefore higher frequency) at the back of the vector. In some examples, the video encoder 200 may scan the quantized transform coefficients using a predefined scan order to produce a serialized vector and then entropy encode the quantized transform coefficients of the vector. In other examples, the video encoder 200 may perform adaptive scanning. After scanning the quantized transform coefficients to form a one-dimensional vector, the video encoder 200 may entropy encode the one-dimensional vector, for example, according to context-adaptive binary arithmetic coding (CABAC). The video encoder 200 may also entropy encode the values of syntax elements used to describe metadata associated with the encoded video data for use by the video decoder 300 when decoding the video data.

[0063] To perform CABAC, the video encoder 200 may assign context within a context model to a symbol to be transmitted. The context may relate to, for example, whether the neighboring values of the symbol are zero values. The probability determination may be based on the context assigned to the symbol.

[0064] The video encoder 200 may also generate syntax data (such as block-based syntax data, picture-based syntax data, and sequence-based syntax data) in, for example, a picture header, a block header, a slice header, or other syntax data (such as a sequence parameter set (SPS), a picture parameter set (PPS), or a video parameter set (VPS)) to the video decoder 300. Similarly, the video decoder 300 may decode such syntax data to determine how to decode the corresponding video data.

[0065] In this way, the video encoder 200 can generate a bitstream that includes coded video data, such as syntax elements describing the partitioning of a picture into blocks (e.g., CUs) and prediction and / or residual information for the blocks. Ultimately, the video decoder 300 can receive the bitstream and decode the coded video data.

[0066] In general, the video decoder 300 performs a process that is reciprocal to the process performed by the video encoder 200 to decode the encoded video data of the bitstream. For example, the video decoder 300 can use CABAC to decode the values of syntax elements for the bitstream in a manner substantially similar to, but reciprocal to, the CABAC encoding process of the video encoder 200. The syntax elements can define partitioning information for partitioning a picture into CTUs and partitioning each CTU according to a corresponding partitioning structure (such as a QTBT structure) to define CUs of the CTU. The syntax elements can also define prediction and residual information for a block (e.g., a CU) of video data.

[0067] The residual information may be represented by, for example, quantized transform coefficients. The video decoder 300 may inverse quantize and inverse transform the quantized transform coefficients of the block to regenerate a residual block for the block. The video decoder 300 uses the signaled prediction mode (intra-frame prediction or inter-frame prediction) and related prediction information (e.g., motion information for inter-frame prediction) to form a prediction block for the block. The video decoder 300 may then combine the prediction block and the residual block (on a sample-by-sample basis) to regenerate the original block. The video decoder 300 may perform additional processing, such as a deblocking process to reduce visual artifacts along block boundaries.

[0068] In general, the present disclosure may involve "signaling" certain information (such as syntax elements). The term "signaling" may generally refer to the transmission of values for syntax elements and / or other data used to decode encoded video data. That is, video encoder 200 may signal values for syntax elements in a bitstream. Generally, signaling refers to generating values in a bitstream. As described above, source device 102 may transmit the bitstream to destination device 116 in substantially real time or in non-real time (such as may occur when storing syntax elements to storage device 112 for later retrieval by destination device 116).

[0069] Figure 2A and Figure 2Bis a conceptual diagram illustrating an example quadtree binary tree (QTBT) structure 130 and a corresponding coding tree (CTU) 132. Solid lines represent quadtree splits, while dashed lines indicate binary tree splits. In each split (i.e., non-leaf) node of the binary tree, a flag is signaled to indicate which split type (i.e., horizontal or vertical) is used, where, in this example, 0 indicates a horizontal split and 1 indicates a vertical split. For quadtree splits, since the quadtree node splits the block horizontally and vertically into 4 sub-blocks of equal size, there is no need to indicate the split type. Thus, the video encoder 200 can encode, and the video decoder 300 can decode, the following: syntax elements (such as split information) for the region tree level (i.e., solid lines) of the QTBT structure 130, and syntax elements (such as split information) for the prediction tree level (i.e., dashed lines) of the QTBT structure 130. The video encoder 200 may encode video data (such as prediction and transform data) for the CU represented by the terminal leaf node of the QTBT structure 130 , and the video decoder 300 may decode the video data.

[0070] generally, Figure 2B The CTU 132 may be associated with parameters defining the size of blocks corresponding to nodes at the first and second levels of the QTBT structure 130. These parameters may include a CTU size (indicating the size of the CTU 132 in samples), a minimum quadtree size (MinQTSize, which indicates the minimum allowed quadtree leaf node size), a maximum binary tree size (MaxBTSize, which indicates the maximum allowed binary tree root node size), a maximum binary tree depth (MaxBTDepth, which indicates the maximum allowed binary tree depth), and a minimum binary tree size (MinBTSize, which indicates the minimum allowed binary tree leaf node size).

[0071] The root node of the QTBT structure corresponding to a CTU can have four child nodes at the first level of the QTBT structure, each of which can be split according to a quadtree partitioning. That is, the nodes at the first level are either leaf nodes (no child nodes) or have four child nodes. The example of the QTBT structure 130 represents such nodes as including parent nodes and child nodes with solid branches. If the nodes at the first level are not larger than the maximum allowed binary tree root node size (MaxBTSize), these nodes can be further partitioned by the corresponding binary tree. The binary tree splitting of a node can be iterated until the node resulting from the split reaches the minimum allowed binary tree leaf node size (MinBTSize) or the maximum allowed binary tree depth (MaxBTDepth). The example of the QTBT structure 130 represents such nodes as having dashed branches. Binary tree leaf nodes are called decoding units (CUs), which are used for prediction (e.g., intra-picture or inter-picture prediction) and transformation without any further partitioning. As discussed above, CUs can also be referred to as "video blocks" or "blocks."

[0072] In one example of a QTBT partitioning structure, the CTU size is set to 128x128 (luminance sample and two corresponding 64x64 chroma samples), MinQTSize is set to 16x16, MaxBTSize is set to 64x64, MinBTSize (for both width and height) is set to 4, and MaxBTDepth is set to 4. Quadtree partitioning is first applied to the CTU to generate quadtree leaf nodes. Quadtree leaf nodes can have sizes from 16x16 (i.e., MinQTSize) to 128x128 (i.e., CTU size). If the quadtree leaf node is 128x128, then since the size exceeds MaxBTSize (i.e., 64x64 in this example), the leaf quadtree node will not be further split by the binary tree. Otherwise, the quadtree leaf node will be further split by the binary tree. Therefore, the quadtree leaf node is also the root node for the binary tree and has a binary tree depth of 0. When the binary tree depth reaches MaxBTDepth (4 in this example), no further splitting is allowed. When a binary tree node has a width equal to MinBTSize (4 in this example), this means that no further vertical splitting is allowed. Similarly, a binary tree node with a height equal to MinBTSize means that no further horizontal splitting is allowed for the binary tree node. As described above, the leaf nodes of the binary tree are called CUs and are further processed according to prediction and transformation without further segmentation.

[0073] As described above, if the video decoder is not configured to use chroma-related decoding tools or inter-frame prediction-related decoding tools, providing an indication that chroma-related decoding tools or inter-frame prediction-related decoding tools can be used in the bitstream when the chroma-related decoding tools or inter-frame prediction-related decoding tools may not actually be used in the bitstream may cause the video decoder or other device to erroneously determine that the video decoder cannot decode the bitstream. This may limit the functionality of the video decoder. This disclosure provides several suggestions for improving the general constraint information syntax:

[0074] (1) Semantic improvements to general constraint flags. This disclosure describes two example solutions:

[0075] a. Solution 1: Remove the bitstream conformance “When one_slice_per_pic_constraint_flag is equal to 1, the value of one_subpic_per_pic_constraint_flag shall be equal to 1”.

[0076] b. Solution 2: When max_chroma_format_constraint_idc is equal to 0 (ie, when there is no chroma component), constrain the chroma-related constraint flag to be equal to 1. When intra_only_constraint_flag is equal to 1 (ie, when slice_type is 1 for all slices), constrain the inter-prediction-related constraint flag to be equal to 1.

[0077] (2) Add general constraint flags for decoding tools.

[0078] (3) Add general constraint flags for individual layers and individual sublayers.

[0079] (4) Add general constraint flags for VPS and PH.

[0080] In VVC draft 8, one_slice_per_pic_constraint_flag equal to 1 specifies that each picture should contain only one slice. one_slice_per_pic_constraint_flag equal to 0 does not impose such a constraint. In addition, in VVC draft 8, one_subpic_per_pic_constraint_flag equal to 1 specifies that each picture should contain only one subpicture. one_subpic_per_pic_constraint_flag equal to 0 does not impose such a constraint. When one_slice_per_pic_constraint_flag is equal to 1, the value of one_subpic_per_pic_constraint_flag shall be equal to 1.

[0081] In the current general constraint syntax design, there is bitstream conformance to constrain one_subpic_per_pic_constraint_flag through one_slice_per_pic_constraint_flag as follows:

[0082] When one_slice_per_pic_constraint_flag is equal to 1, the value of one_subpic_per_pic_constraint_flag shall be equal to 1.

[0083] If there is no such consistency constraint on one_subpic_per_pic_constraint_flag, the video decoder 300 does not have defects (errors) in the process from the high-level parameter set to the low-level decoding process, but it may be beneficial to avoid the product from establishing a completely unreasonable profile. Therefore, this proposal provides two examples to solve this problem:

[0084] Example 1: Removing the bitstream conformance “When one_slice_per_pic_constraint_flag is equal to 1, the value of one_subpic_per_pic_constraint_flag shall be equal to 1”.

[0085] Thus, in some such examples, a device (e.g., source device 102, destination device 116, etc.) may perform a bitstream conformance process that determines whether a bitstream comprising an encoded representation of video data conforms to a video coding standard, wherein the bitstream conformance process determines that the bitstream does not conform to the video coding standard when the chroma-related constraint flag is equal to 0 and when no chroma component for a picture is present in the bitstream.

[0086] Example 2: When max_chroma_format_constraint_idc is equal to 0 (i.e., when there is no chroma component), the chroma-related constraint flag is constrained to be equal to 1. When intra_only_constraint_flag is equal to 1 (i.e., when slice_type should be 1 for all slices), the inter-prediction-related constraint flag is constrained to be equal to 1. The proposed changes to VVC 8 are shown by the <!> ... < / !> tags, as shown in Table 1 below:

[0087] Table 1

[0088]

[0089]

[0090] The semantics of the syntax elements mentioned in Table 1 above are provided in Table 2 below.

[0091] Table 2

[0092]

[0093]

[0094] Thus, in some such examples, a device (e.g., source device 102, destination device 116, etc.) may perform a bitstream conformance process that determines whether a bitstream comprising an encoded representation of video data complies with a video coding standard, wherein when a chroma-related constraint flag is equal to 0 and when chroma components for a picture are not present in the bitstream, the bitstream conformance process determines that the bitstream does not comply with the video coding standard. In some examples, a device may perform a bitstream conformance process that determines whether a bitstream comprising an encoded representation of video data complies with the video coding standard, wherein when an inter-prediction-related constraint flag is equal to 0 (when all slices of the bitstream are I-slices), the bitstream conformance process determines that the bitstream does not comply with the video coding standard.

[0095] In another example, the flag is conditional on max_chroma_format_constraint_idc=0 and intra_only_contraint_flag=1 as shown below:

[0096] When one_slice_per_pic_constraint_flag is equal to 1, signaling of one_subpic_per_pic_constraint_flag is omitted and is inferred to be equal to 1.

[0097] When max_chroma_format_constraint_idc is equal to 0, signaling of no_qtbtt_dual_tree_intra_constraint_flag is omitted and is inferred to be equal to 1.

[0098] When max_chroma_format_constraint_idc is equal to 0, the signaling of no_ccalf_constraint_flag is omitted and is inferred to be equal to 1.

[0099] When max_chroma_format_constraint_idc is equal to 0, signaling of no_joint_cbcr_constraint_flag is omitted and is inferred to be equal to 1.

[0100] When max_chroma_format_constraint_idc is equal to 0, the signaling of no_cclm_constraint_flag is omitted and is inferred to be equal to 1.

[0101] When intra_only_constraint_flag is equal to 1, signaling of no_ref_wraparound_constraint_flag is omitted and is inferred to be equal to 1.

[0102] When intra_only_constraint_flag is equal to 1, signaling of no_temporal_mvp_constraint_flag is omitted and is inferred to be equal to 1.

[0103] When intra_only_constraint_flag is equal to 1, signaling of no_sbtmvp_constraint_flag is omitted and is inferred to be equal to 1.

[0104] When intra_only_constraint_flag is equal to 1, signaling of no_amvr_constraint_flag is omitted and is inferred to be equal to 1.

[0105] When intra_only_constraint_flag is equal to 1, signaling of no_bdof_constraint_flag is omitted and is inferred to be equal to 1.

[0106] When intra_only_constraint_flag is equal to 1, signaling of no_dmvr_constraint_flag is omitted and is inferred to be equal to 1.

[0107] When intra_only_constraint_flag is equal to 1, signaling of no_affine_motion_constraint_flag is omitted and is inferred to be equal to 1.

[0108] When intra_only_constraint_flag is equal to 1, signaling of no_bcw_constraint_flag is omitted and is inferred to be equal to 1.

[0109] When intra_only_constraint_flag is equal to 1, signaling of no_ciip_constraint_flag is omitted and is inferred to be equal to 1.

[0110] When intra_only_constraint_flag is equal to 1, signaling of no_fpel_mmvd_constraint_flag is omitted and is inferred to be equal to 1.

[0111] When intra_only_constraint_flag is equal to 1, signaling of no_gpm_constraint_flag is omitted and is inferred to be equal to 1.

[0112] Thus, in some such examples, a device (e.g., source device 102, destination device 116, etc.) may determine that a first syntax element is omitted from the bitstream and inferred to be equal to 1 based on a second syntax element indicating that no chroma components are present in the bitstream and a third syntax element indicating that all slices of the bitstream are I slices, the first syntax element being one of: no_qtbtt_dual_tree_intra_constraint_flag, no_ccalf_constraint_flag, no_joint_cbcr_constraint_flag, no_cclm_constraint_flag, no_ref_wraparound_constraint_flag, no_temporal_mvp_constraint_flag aint_flag, no_sbtmvp_constraint_flag, no_amvr_constraint_flag, no_bdof_constraint_flag, no_dmvr_constraint_flag, no_affine_motion_constraint_flag, no_bcw_constraint_flag, no_ciip_constraint_flag, no_fpel_mmvd_constraint_flag, or no_gpm_constraint_flag; and performing a bitstream conformance process that determines, based on the first syntax element, whether a bitstream including an encoded representation of the video data conforms to a video coding standard.

[0113] The General Constraint Information syntax lacks several decoding tools to provide general constraint control. The missing flags are added to VVC 8 as shown in Table 3 below:

[0114] Table 3

[0115] general_constraint_info(){ Descriptor no_mrl_constraint_flag u(1) no_isp_constraint_flag u(1) no_mip_constraint_flag u(1) no_lfnst_constraint_flag u(1) no_mmvd_constraint_flag u(1) no_smvd_constraint_flag u(1) no_prof_constraint_flag u(1) no_palette_constraint_flag u(1) no_act_constraint_flag u(1) no_lmcs_constraint_flag u(1)

[0116] Table 4 below describes the semantics of the syntax elements listed in Table 3.

[0117] Table 4

[0118]

[0119]

[0120] The semantics of the syntax elements mentioned in Table 4 above are provided in Table 5 below.

[0121] Table 5

[0122]

[0123]

[0124] In another example, the flag is conditional on intra_only_contraint_flag=1, as shown below:

[0125] When intra_only_constraint_flag is equal to 1, signaling of no_mmvd_constraint_flag is omitted and is inferred to be equal to 1.

[0126] When intra_only_constraint_flag is equal to 1, signaling of no_smvd_constraint_flag is omitted and is inferred to be equal to 1.

[0127] When intra_only_constraint_flag is equal to 1, the signaling of no_prof_constraint_flag is omitted and is inferred to be equal to 1.

[0128] Thus, in some examples, a device (e.g., source device 102, destination device 116, etc.) may perform a bitstream conformance process that determines whether a bitstream comprising an encoded representation of video data conforms to a video coding standard, wherein the bitstream conformance process determines, based on a first syntax element in a sequence parameter set (SPS) indicating that a coding tool is enabled, that the bitstream does not conform to the video coding standard when a second syntax element of the bitstream indicates that the first syntax element should have a value indicating that the coding tool is not enabled. In such examples, the coding tool may be one of: intra prediction with multiple reference lines, intra prediction with sub-partitioning, matrix-based intra prediction, index-based selection of a low-frequency inseparable transform kernel, merge mode with motion vector differences, use of symmetric motion vector differences in motion vector decoding, prediction refinement with optical flow for affine motion compensation, palette prediction mode, adaptive color transform, or luma mapping with chroma scaling.

[0129] In some examples of the present disclosure, new general constraint flags are added to the general constraint information syntax to define the characteristics of a single layer and a single sub-layer. The proposed changes to VVC 8 are shown by the <!> ... < / !> tags, as shown in Table 6 below:

[0130] Table 6

[0131] general_constraint_info(){ Descriptor general_progressive_source_flag u(1) general_interlaced_source_flag u(1) general_non_packed_constraint_flag u(1) general_frame_only_constraint_flag u(1) general_non_projected_constraint_flag u(1) intra_only_constraint_flag u(1) max_bitdepth_constraint_idc u(4) max_chroma_format_constraint_idc u(2) <!>single_layer_constraint_flag< / !> <！>u(1)< / ！> <!>single_sublayer_constraint_flag< / !> <！>u(1)< / ！> <!>single_sublayer_per_layer_constraint_flag< / !> <！>u(1)< / ！> <!>no_inter_layer_pred_constraint_flag< / !> <！>u(1)< / ！> no_res_change_in_clvs_constraint_flag u(1) one_tile_per_pic_constraint_flag u(1) one_slice_per_pic_constraint_flag u(1) one_subpic_per_pic_constraint_flag u(1)

[0132] The semantics of the added syntax elements of Table 6 are given in Table 7 below:

[0133] Table 7

[0134]

[0135] The semantics of the syntax elements mentioned in Table 7 are provided in Table 8 below:

[0136] Table 8

[0137]

[0138] In another example, the flag is conditional on the single_layer_constraint_flag as shown below:

[0139] When single_layer_constraint_flag is equal to 1, the signaling of no_inter_layer_pred_constraint_flag is omitted and is inferred to be equal to 1.

[0140] Thus, in some such examples, a device (e.g., source device 102, destination device 116, etc.) may perform a bitstream conformance process that determines whether a bitstream including an encoded representation of video data conforms to a video coding standard. In these examples, the bitstream conformance process determines that the bitstream does not conform to the video coding standard based on a first syntax element (e.g., single_layer_constraint_flag, single_sublayer_constraint_flag, single_sublayer_per_layer_constraint_flag, or no_inter_layer_pred_constraint_flag) having a particular value indicating that a bitstream conformance requirement applies and based on the bitstream conformance requirement not being met. The bitstream conformance requirement specifies one of the following: the second syntax element (e.g., sps_video_parameter_set_id) specifies that the video parameter set (VPS) identifier of the sequence parameter set (SPS) should be equal to 0, the second syntax element should be equal to 0, and the third syntax element (e.g., sps_max_sublayers_minus1) plus 1 specifies that the maximum number of temporal sublayers that may be present in each coded layer video sequence (CLVS) should be equal to 0, the third syntax element should be equal to 0, or the fourth syntax element (e.g., vps_all_independent_layers_flag) should specify that all layers in the coded video sequence (CVS) are independently coded without inter-layer prediction.

[0141] In some examples of the present disclosure, no_vps_constraint_flag and no_ph_constraint_flag are added to the general constraint information syntax to define the characteristics of VPS and PH. The changes proposed on top of VVC 8 are shown by the <!> ... < / > tags, as shown in Table 9 below:

[0142] Table 9

[0143] general_constraint_info(){ Descriptor no_mixed_nalu_types_in_pic_constraint_flag u(1) no_trail_constraint_flag u(1) no_stsa_constraint_flag u(1) no_rasl_constraint_flag u(1) no_radl_constraint_flag u(1) no_idr_constraint_flag u(1) no_cra_constraint_flag u(1) no_gdr_constraint_flag u(1) <!>no_vps_constraint_flag< / !> <！>u(1)< / ！> <!>no_ph_constraint_flag< / !> <！>u(1)< / ！> no_aps_constraint_flag u(1)

[0144] The semantics of the syntax elements added in Table 9 are described in Table 10 below.

[0145] Table 10

[0146]

[0147] Thus, in this example, a device (e.g., source device 102, destination device 116, etc.) may perform a bitstream conformance process that determines whether a bitstream including an encoded representation of video data conforms to a video coding standard. In this example, the bitstream conformance process determines that the bitstream does not conform to the video coding standard based on a first syntax element (e.g., no_vps_constraint_flag, no_ph_constraint_flag, etc.) having a specific value indicating that a bitstream conformance requirement applies and based on the bitstream conformance requirement not being met. The bitstream conformance requirement specifies one of: no NAL units having a NAL unit type equal to a video parameter set (VPS) network abstraction layer (NAL) unit type in a scoped output layer set shall be present in the bitstream, or no NAL units having a picture header NAL unit type in a scoped output layer set shall be present in the bitstream.

[0148] Figure 3 is a block diagram illustrating an example video encoder 200 . Figure 3 This is provided for purposes of explanation and should not be considered limiting of the techniques as generally illustrated and described in this disclosure. For purposes of explanation, this disclosure describes the video encoder 200 in terms of techniques for VVC (ITU-T H.266 under development) and HEVC (ITU-T H.265). However, the techniques of this disclosure may be performed by video encoding devices configured for other video coding standards.

[0149] exist Figure 3In the example of FIG, the video encoder 200 includes a video data memory 230, a mode selection unit 202, a residual generation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filter unit 216, a decoded picture buffer (DPB) 218, and an entropy coding unit 220. Any one or all of the video data memory 230, the mode selection unit 202, the residual generation unit 204, the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the filter unit 216, the DPB 218, and the entropy coding unit 220 can be implemented in one or more processors or in processing circuitry. For example, the units of the video encoder 200 can be implemented as one or more circuits or logic elements, as part of a hardware circuit, or as part of a processor, ASIC, or FPGA. Furthermore, the video encoder 200 can include additional or alternative processors or processing circuitry to perform these functions and other functions.

[0150] The video data memory 230 may store video data to be encoded by the components of the video encoder 200. The video encoder 200 may receive video data from, for example, the video source 104 ( Figure 1 ) receives video data stored in the video data memory 230. The DPB 218 can act as a reference picture memory that stores reference video data for use when the video encoder 200 predicts subsequent video data. The video data memory 230 and the DPB 218 can be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM) (including synchronous DRAM (SDRAM)), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. The video data memory 230 and the DPB 218 can be provided by the same memory device or a separate memory device. In various examples, the video data memory 230 can be on-chip with other components of the video encoder 200 (as shown), or off-chip relative to those components.

[0151] In this disclosure, references to the video data memory 230 should not be construed as limited to memory internal to the video encoder 200 (unless specifically described as such) or memory external to the video encoder 200 (unless specifically described as such). Rather, references to the video data memory 230 should be understood as reference memory that stores video data received by the video encoder 200 for encoding (e.g., video data for a current block to be encoded). Figure 1 The memory 106 may also provide temporary storage for outputs from the various units of the video encoder 200 .

[0152] Shown Figure 3 The various units of the video encoder 200 are described to help understand the operations performed by the video encoder 200. These units can be implemented as fixed-function circuits, programmable circuits, or a combination thereof. Fixed-function circuits refer to circuits that provide specific functions and are pre-set for the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functionality in the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuits can execute software instructions (e.g., to receive parameters or output parameters), but the type of operations performed by fixed-function circuits is generally immutable. In some examples, one or more of these units can be different circuit blocks (fixed-function or programmable), and in some examples, one or more of these units can be integrated circuits.

[0153] The video encoder 200 may include an arithmetic logic unit (ALU), an elementary function unit (EFU), a digital circuit, an analog circuit, and / or a programmable core formed from a programmable circuit. In an example where the operation of the video encoder 200 is performed using software executed by a programmable circuit, the memory 106 ( Figure 1 ) may store instructions (eg, object code) for software that video encoder 200 receives and executes, or another memory (not shown) within video encoder 200 may store such instructions.

[0154] The video data memory 230 is configured to store the received video data. The video encoder 200 can retrieve the picture of the video data from the video data memory 230 and provide the video data to the residual generation unit 204 and the mode selection unit 202. The video data in the video data memory 230 can be the original video data to be encoded.

[0155] The mode selection unit 202 includes a motion estimation unit 222, a motion compensation unit 224, and an intra prediction unit 226. The mode selection unit 202 may include additional functional units for performing video prediction according to other prediction modes. As an example, the mode selection unit 202 may include a palette unit, an intra-block copy unit (which may be part of the motion estimation unit 222 and / or the motion compensation unit 224), an affine unit, a linear model (LM) unit, etc.

[0156] The mode selection unit 202 typically coordinates multiple encoding passes to test combinations of encoding parameters and the resulting rate-distortion values for such combinations. The encoding parameters may include the partitioning of a CTU into CUs, the prediction mode used for a CU, the transform type used for the residual data of a CU, the quantization parameter used for the residual data of a CU, etc. The mode selection unit 202 may ultimately select a combination of encoding parameters that has a better rate-distortion value than other tested combinations.

[0157] The video encoder 200 may partition a picture retrieved from the video data memory 230 into a series of CTUs and encapsulate one or more CTUs into a slice. The mode selection unit 202 may partition the CTUs of the picture according to a tree structure (such as the QTBT structure or quadtree structure of HEVC described above). As described above, the video encoder 200 may form one or more CUs by partitioning the CTUs according to the tree structure. Such CUs may also be generally referred to as "video blocks" or "blocks."

[0158] Typically, mode select unit 202 also controls its components (e.g., motion estimation unit 222, motion compensation unit 224, and intra prediction unit 226) to generate a prediction block for the current block (e.g., the current CU, or the overlapping portion of a PU and TU in HEVC). For inter-prediction of the current block, motion estimation unit 222 may perform a motion search to identify one or more closely matching reference blocks in one or more reference pictures (e.g., one or more previously decoded pictures stored in DPB 218). Specifically, motion estimation unit 222 may calculate values representing how similar potential reference blocks are to the current block, for example, based on sum of absolute differences (SAD), sum of squared differences (SSD), mean absolute difference (MAD), mean squared difference (MSD), etc. Motion estimation unit 222 may typically perform these calculations using the sample-by-sample difference between the current block and the reference block under consideration. Motion estimation unit 222 may identify the reference block with the lowest value resulting from these calculations, indicating the reference block that most closely matches the current block.

[0159] Motion estimation unit 222 may form one or more motion vectors (MVs) that define the position of a reference block in a reference picture relative to the position of a current block in the current picture. Motion estimation unit 222 may then provide the motion vectors to motion compensation unit 224. For example, for unidirectional inter prediction, motion estimation unit 222 may provide a single motion vector, while for bidirectional inter prediction, motion estimation unit 222 may provide two motion vectors. Motion compensation unit 224 may then use the motion vectors to generate a prediction block. For example, motion compensation unit 224 may use the motion vectors to retrieve data for the reference block. As another example, if the motion vectors have fractional sample precision, motion compensation unit 224 may interpolate the values for the prediction block based on one or more interpolation filters. Furthermore, for bidirectional inter prediction, motion compensation unit 224 may retrieve data for the two reference blocks identified by the respective motion vectors and combine the retrieved data, for example, by sample-by-sample averaging or weighted averaging.

[0160] As another example, for intra prediction or intra prediction decoding, the intra prediction unit 226 can generate a prediction block based on samples adjacent to the current block. For example, for directional mode, the intra prediction unit 226 can generally mathematically combine the values of adjacent samples and pad these calculated values across the current block in a defined direction to produce a prediction block. As another example, for DC mode, the intra prediction unit 226 can calculate the average of adjacent samples of the current block and generate a prediction block to include the obtained average for each sample of the prediction block.

[0161] Mode selection unit 202 provides the prediction block to residual generation unit 204. Residual generation unit 204 receives the original, unencoded version of the current block from video data memory 230 and the prediction block from mode selection unit 202. Residual generation unit 204 calculates the sample-by-sample difference between the current block and the prediction block. The resulting sample-by-sample difference defines a residual block for the current block. In some examples, residual generation unit 204 may also determine the difference between sample values in the residual block to generate the residual block using residual differential pulse coded modulation (RDPCM). In some examples, residual generation unit 204 may be formed using one or more subtractor circuits that perform binary subtraction.

[0162] In the example where the mode select unit 202 partitions the CU into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. The video encoder 200 and the video decoder 300 may support PUs of various sizes. As noted above, the size of a CU may refer to the size of the luma coding block of the CU, while the size of a PU may refer to the size of the luma prediction unit of the PU. Assuming that the size of a particular CU is 2Nx2N, the video encoder 200 may support PU sizes of 2Nx2N or NxN for intra prediction, and symmetrical PU sizes of 2Nx2N, 2NxN, Nx2N, NxN, or similar sizes for inter prediction. The video encoder 200 and the video decoder 300 may also support asymmetric partitioning for PU sizes of 2NxnU, 2NxnD, nLx2N, and nRx2N for inter prediction.

[0163] In an example where mode select unit 202 does not further partition a CU into PUs, each CU may be associated with a luma coding block and a corresponding chroma coding block. As described above, the size of a CU may refer to the size of the luma coding block of the CU. Video encoder 200 and video decoder 300 may support CU sizes of 2Nx2N, 2NxN, or Nx2N.

[0164] For other video coding techniques (such as intra-block copy mode coding, affine mode coding, and linear model (LM) mode coding, to name a few), mode selection unit 202 generates a prediction block for the current block being encoded via the corresponding unit associated with the coding technique. In some examples (such as palette mode coding), mode selection unit 202 may not generate a prediction block, but instead generate syntax elements that indicate how to reconstruct the block based on the selected palette. In such a mode, mode selection unit 202 may provide these syntax elements to entropy coding unit 220 for encoding.

[0165] As described above, the residual generation unit 204 receives video data for a current block and a corresponding prediction block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates the sample-by-sample difference between the prediction block and the current block.

[0166] The transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). The transform processing unit 206 may apply various transforms to the residual block to form the transform coefficient block. For example, the transform processing unit 206 may apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, the transform processing unit 206 may perform multiple transforms on the residual block, such as a primary transform and a secondary transform (such as a rotation transform). In some examples, the transform processing unit 206 does not apply a transform to the residual block.

[0167] The quantization unit 208 may quantize the transform coefficients in the transform coefficient block to produce a quantized transform coefficient block. The quantization unit 208 may quantize the transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. The video encoder 200 (e.g., via the mode selection unit 202) may adjust the degree of quantization applied to the transform coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization may result in a loss of information, and therefore, the quantized transform coefficients may have a lower precision than the original transform coefficients produced by the transform processing unit 206.

[0168] The inverse quantization unit 210 and the inverse transform processing unit 212 may apply inverse quantization and inverse transform, respectively, to the quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. The reconstruction unit 214 may generate a reconstructed block corresponding to the current block (albeit potentially with some degree of distortion) based on the reconstructed residual block and the prediction block generated by the mode selection unit 202. For example, the reconstruction unit 214 may add samples of the reconstructed residual block to corresponding samples from the prediction block generated by the mode selection unit 202 to generate a reconstructed block.

[0169] Filter unit 216 may perform one or more filtering operations on the reconstructed block. For example, filter unit 216 may perform a deblocking operation to reduce blocking artifacts along the edges of the CU. In some examples, the operations of filter unit 216 may be skipped.

[0170] The video encoder 200 stores the reconstructed blocks in the DPB 218. For example, in examples where the operation of the filter unit 216 is not required, the reconstruction unit 214 can store the reconstructed blocks in the DPB 218. In examples where the operation of the filter unit 216 is required, the filter unit 216 can store the filtered reconstructed blocks in the DPB 218. The motion estimation unit 222 and the motion compensation unit 224 can retrieve a reference picture formed from the reconstructed (and potentially filtered) blocks from the DPB 218 to perform inter-frame prediction on blocks of subsequently encoded pictures. In addition, the intra-frame prediction unit 226 can use the reconstructed blocks of the current picture in the DPB 218 to perform intra-frame prediction on other blocks in the current picture.

[0171] In general, entropy coding unit 220 may entropy encode syntax elements received from other functional components of video encoder 200. For example, entropy coding unit 220 may entropy encode quantized transform coefficient blocks from quantization unit 208. As another example, entropy coding unit 220 may entropy encode prediction syntax elements (e.g., motion information for inter-frame prediction or intra-frame mode information for intra-frame prediction) from mode selection unit 202. Entropy coding unit 220 may perform one or more entropy encoding operations on syntax elements, another example of video data, to generate entropy-encoded data. For example, entropy coding unit 220 may perform a context-adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable-to-variable (V2V) length coding operation, a syntax-based context-adaptive binary arithmetic coding (SBAC) operation, a probability interval partitioning entropy (PIPE) coding operation, an exponential Golomb coding operation, or another type of entropy encoding operation on the data. In some examples, entropy coding unit 220 may operate in a bypass mode in which syntax elements are not entropy encoded.

[0172] The video encoder 200 may output a bitstream including entropy-encoded syntax elements required for reconstructing blocks of a slice or picture. Specifically, the entropy encoding unit 220 may output a bitstream.

[0173] The operations described above are described with respect to blocks. Such descriptions should be understood as operations for luma coding blocks and / or chroma coding blocks. As described above, in some examples, the luma coding blocks and chroma coding blocks are the luma components and chroma components of a CU. In some examples, the luma coding blocks and chroma coding blocks are the luma components and chroma components of a PU.

[0174] In some examples, the operations performed for luma coding blocks do not need to be repeated for chroma coding blocks. As an example, the operations for identifying the motion vector (MV) and reference picture for the luma coding block do not need to be repeated to identify the MV and reference picture for the chroma blocks. Specifically, the MV for the luma coding block can be scaled to determine the MV for the chroma blocks, and the reference picture can be the same. As another example, the intra prediction process can be the same for luma coding blocks and chroma coding blocks.

[0175] Video encoder 200 represents an example of a device configured to encode video data, the device including: a memory configured to store the video data; and one or more processing units implemented in circuitry and configured to encode a bitstream. In some examples, video encoder 200 may also perform a bitstream conformance process according to any example of the present disclosure.

[0176] Figure 4 is a block diagram illustrating an example video decoder 300 that may perform the techniques of this disclosure. Figure 4 This is provided for purposes of explanation and does not limit the techniques as broadly illustrated and described in this disclosure. For purposes of explanation, this disclosure describes video decoder 300 based on the techniques of VVC (ITU-T H.266 under development) and HEVC (ITU-T H.265). However, the techniques of this disclosure can be performed by video coding devices configured for other video coding standards.

[0177] exist Figure 4 In the example of FIG, video decoder 300 includes a coded picture buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filter unit 312, and a decoded picture buffer (DPB) 134. Any or all of CPB memory 320, entropy decoding unit 302, prediction processing unit 304, inverse quantization unit 306, inverse transform processing unit 308, reconstruction unit 310, filter unit 312, and DPB 134 may be implemented in one or more processors or processing circuitry. For example, the units of video decoder 300 may be implemented as one or more circuits or logic elements as part of a hardware circuit, or as part of a processor, ASIC, or FPGA. Furthermore, video decoder 300 may include additional or alternative processors or processing circuitry to perform these and other functions.

[0178] The prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. The prediction processing unit 304 may include additional units that perform prediction according to other prediction modes. As an example, the prediction processing unit 304 may include a palette unit, an intra-block copy unit (which may form part of the motion compensation unit 316), an affine unit, a linear model (LM) unit, etc. In other examples, the video decoder 300 may include more, fewer, or different functional components.

[0179] CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by components of video decoder 300. For example, the video data may be encoded from computer readable medium 110 ( Figure 1 ) obtains video data stored in CPB memory 320. CPB memory 320 may include a CPB that stores coded video data (e.g., syntax elements) from a coded video bitstream. Furthermore, CPB memory 320 may store video data other than syntax elements for decoded pictures, such as temporary data representing outputs from various units of video decoder 300. DPB 314 typically stores decoded pictures, which video decoder 300 may output and / or use as reference video data when decoding subsequent data or pictures in the coded video bitstream. CPB memory 320 and DPB 314 may be formed from any of a variety of memory devices, such as DRAM (including SDRAM), MRAM, RRAM, or other types of memory devices. CPB memory 320 and DPB 314 may be provided by the same memory device or separate memory devices. In various examples, CPB memory 320 may be on-chip with other components of video decoder 300 or off-chip relative to those components.

[0180] Additionally or alternatively, in some examples, video decoder 300 may retrieve the video from memory 120 ( Figure 1 ) to retrieve the decoded video data. That is, memory 120 may utilize CPB memory 320 to store data as discussed above. Similarly, when some or all of the functionality of video decoder 300 is implemented in software to be executed by processing circuitry of video decoder 300, memory 120 may store instructions to be executed by video decoder 300.

[0181] Shown Figure 4 The various units shown in FIG. 300 help understand the operations performed by the video decoder 300. These units can be implemented as fixed function circuits, programmable circuits, or a combination thereof. [[ID=]66]Figure 3, fixed-function circuitry refers to circuitry that provides specific functionality and is pre-set in the operations that can be performed. Programmable circuitry refers to circuitry that can be programmed to perform various tasks and provides flexible functionality in the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuitry can execute software instructions (e.g., to receive parameters or output parameters), but the type of operations performed by the fixed-function circuitry is generally immutable. In some examples, one or more of these units may be different circuit blocks (fixed-function or programmable), and in some examples, one or more of these units may be integrated circuits.

[0182] The video decoder 300 may include an ALU, an EFU, digital circuits, analog circuits, and / or a programmable core formed from programmable circuits. In examples where the operation of the video decoder 300 is performed by software executed on the programmable circuits, on-chip or off-chip memory may store instructions (e.g., object code) for the software that the video decoder 300 receives and executes.

[0183] The entropy decoding unit 302 may receive the encoded video data from the CPB and perform entropy decoding on the video data to regenerate syntax elements. The prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, and the filter unit 312 may generate decoded video data based on the syntax elements extracted from the bitstream.

[0184] Typically, the video decoder 300 reconstructs a picture on a block-by-block basis. The video decoder 300 may perform a reconstruction operation on each block individually (wherein the block currently being reconstructed (ie, decoded) may be referred to as a "current block").

[0185] The entropy decoding unit 302 may entropy decode syntax elements defining the quantized transform coefficients of the quantized transform coefficient block and transform information, such as a quantization parameter (QP) and / or a transform mode indication. The inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine a degree of quantization and, likewise, a degree of inverse quantization for the inverse quantization unit 306 to apply. The inverse quantization unit 306 may, for example, perform a bitwise left shift operation to inverse quantize the quantized transform coefficients. The inverse quantization unit 306 may thereby form a transform coefficient block comprising the transform coefficients.

[0186] After the inverse quantization unit 306 forms the transform coefficient block, the inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, the inverse transform processing unit 308 may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the transform coefficient block.

[0187] In addition, prediction processing unit 304 generates a prediction block based on the prediction information syntax element entropy decoded by entropy decoding unit 302. For example, if the prediction information syntax element indicates that the current block is inter-predicted, motion compensation unit 316 may generate a prediction block. In this case, the prediction information syntax element may indicate a reference picture in DPB 314 from which to retrieve the reference block, and a motion vector that identifies the position of the reference block in the reference picture relative to the position of the current block in the current picture. Motion compensation unit 316 may generally generate a prediction block in the same manner as described for motion compensation unit 224 ( Figure 3 ) is performed in a manner substantially similar to that described in .

[0188] As another example, if the prediction information syntax element indicates that the current block is intra-predicted, the intra-prediction unit 318 may generate a prediction block according to the intra-prediction mode indicated by the prediction information syntax element. Again, the intra-prediction unit 318 may generally generate a prediction block in the same manner as described with respect to the intra-prediction unit 226 ( Figure 3 The intra prediction process is performed in a manner substantially similar to that described in the preceding claims. The intra prediction unit 318 may retrieve data of neighboring samples of the current block from the DPB 314.

[0189] The reconstruction unit 310 may reconstruct the current block using the prediction block and the residual block. For example, the reconstruction unit 310 may add samples of the residual block to corresponding samples of the prediction block to reconstruct the current block.

[0190] The filter unit 312 may perform one or more filter operations on the reconstructed block. For example, the filter unit 312 may perform a deblocking operation to reduce blocking artifacts along the edges of the reconstructed block. The operations of the filter unit 312 may not necessarily be performed in all examples.

[0191] The video decoder 300 may store the reconstructed block in the DPB 314. For example, in examples where the operation of the filter unit 312 is not performed, the reconstruction unit 310 may store the reconstructed block to the DPB 314. In examples where the operation of the filter unit 312 is performed, the filter unit 312 may store the filtered reconstructed block to the DPB 314. As discussed above, the DPB 314 may provide reference information (such as samples of the current picture for intra prediction and previously decoded pictures for subsequent motion compensation) to the prediction processing unit 304. In addition, the video decoder 300 may output a decoded picture (e.g., a decoded video) from the DPB 314 for use in, for example, Figure 1 Subsequent presentation on the display device 118 of the display device.

[0192] In this manner, video decoder 300 represents an example of a video decoding device that includes: a memory configured to store video data; and one or more processing units implemented in circuitry and configured to decode a bitstream. In some examples, video decoder 300 may also perform a bitstream conformance process according to any example of the present disclosure.

[0193] Figure 5 1 is a flowchart illustrating an example method for encoding a current block. The current block may include a current CU. Although with respect to the video encoder 200 ( Figure 1 and Figure 3 ) is described, but it should be understood that other devices may be configured to perform the same Figure 5 A similar approach to the one in the previous section.

[0194] In this example, the video encoder 200 initially predicts a current block (350). For example, the video encoder 200 may form a prediction block for the current block. The video encoder 200 may then calculate a residual block for the current block (532). To calculate the residual block, the video encoder 200 may calculate the difference between the original, unencoded block and the prediction block for the current block. The video encoder 200 may then transform the residual block and quantize the transform coefficients of the residual block (354). Next, the video encoder 200 may scan the quantized transform coefficients of the residual block (356). During or after the scan, the video encoder 200 may entropy encode the transform coefficients (358). For example, the video encoder 200 may encode the transform coefficients using CAVLC or CABAC. The video encoder 200 may then output the entropy encoded data for the block (360).

[0195] Figure 6is a flowchart illustrating an example method for decoding a current block of video data. The current block may include a current CU. Although with respect to the video decoder 300 ( Figure 1 and Figure 4 ) is described, but it should be understood that other devices may be configured to perform the same Figure 6 A similar approach to the one in the previous section.

[0196] The video decoder 300 may receive entropy-encoded data for a current block (such as entropy-encoded prediction information and entropy-encoded data of transform coefficients for a residual block corresponding to the current block) (370). The video decoder 300 may entropy decode the entropy-encoded data to determine the prediction information for the current block and to regenerate the transform coefficients for the residual block (372). The video decoder 300 may predict the current block (374), for example, by calculating a prediction block for the current block using an intra-prediction mode or an inter-prediction mode as indicated by the prediction information for the current block. The video decoder 300 may then inverse scan the regenerated transform coefficients (376) to create a block of quantized transform coefficients. The video decoder 300 may then inverse quantize the transform coefficients and apply an inverse transform to the transform coefficients to generate a residual block (378). Finally, the video decoder 300 may decode the current block by combining the prediction block and the residual block (380).

[0197] Figure 7 is a flowchart illustrating an example process in accordance with one or more techniques of this disclosure. Figure 7 The process may be performed by a system including one or more of source device 102, destination device 116, and / or another device. For example, some actions of the process may be performed by source device 102, some actions of the process may be performed by destination device 116, and so on. In addition, in some cases, only the actions of Figure 7 Some of the actions shown in the examples.

[0198] exist Figure 7 In an example, a system can obtain a bitstream (400) including an encoded representation of video data. For example, in one example, a system (e.g., video encoder 200) can obtain the bitstream by encoding the video data. In another example, the system can receive the bitstream, for example, from source device 102. In some examples, the system can store the bitstream on a computer-readable medium (e.g., a memory) and obtain the bitstream from the computer-readable medium.

[0199] In addition, Figure 7In an example, a system may perform a bitstream conformance process that determines whether a bitstream including an encoded representation of video data conforms to a video coding standard, such as VVC (402). As part of performing the bitstream conformance process, the system may determine that the bitstream does not conform to the video coding standard when at least one of the following is true: a chroma dependency constraint flag is equal to 0 and when no chroma components for a picture are present in the bitstream; or an inter-prediction dependency constraint flag is equal to 0 when all slices of the bitstream are I slices.

[0200] Therefore, in Figure 7 In some examples, the system can determine whether the chroma-related constraint flag is equal to 0 and whether there are no chroma components for the picture in the bitstream (404). In some examples, the chroma-related constraint flag is a syntax element that indicates whether the quadtree / binarytree flag must specify that a separate coding tree structure is not used for I slices (e.g., no_qtbtt_dual_tree_intra_constraint_flag). In some examples, the chroma-related constraint flag is a syntax element that indicates whether the cross-component adaptive loop filter flag must indicate that the cross-component adaptive loop filter is disabled (e.g., no_ccalf_constraint_flag). In some examples, the chroma-related constraint flag is a syntax element that indicates whether the joint decoding flag of the chroma residual must indicate that joint decoding of the chroma residual is disabled (e.g., no_joint_cbcr_constraint_flag). In some examples, the chroma-dependent constraint flag is a syntax element (eg, no_cclm_constraint_flag) that indicates whether a cross-component linear model intra prediction flag must indicate that cross-component linear model intra prediction from luma components to chroma components is disabled.

[0201] Additionally, the system may determine whether an inter prediction related constraint flag is equal to 0 and whether all slices in the bitstream are I slices (406). In some examples, the inter prediction related constraint flag is a syntax element (e.g., no_ref_wraparound_constraint_flag) that specifies whether a wraparound enable flag (e.g., sps_rel_wraparound_enabled_flag) must indicate that horizontal wraparound motion compensation is not applied in inter prediction. In some examples, the inter prediction related constraint flag is a syntax element (e.g., no_temporal_mvp_constraint_flag) that specifies whether a temporal motion vector prediction enable flag (e.g., sps_temporal_mvp_enabled_flag) must indicate that a temporal motion vector predictor is not used in a coded layer video sequence (CLVS). In some examples, the inter prediction related constraint flag is a syntax element that specifies whether a sub-block based temporal motion vector prediction enable flag (e.g., sps_sbtmvp_enabled_flag) must indicate that a sub-block based temporal motion vector predictor is not used in CLVS (e.g., no_sbtmvp_constraint_flag). In some examples, the inter prediction related constraint flag is a syntax element that specifies whether an adaptive motion vector difference resolution enable flag (e.g., sps_amvr_enabled_flag) must indicate that adaptive motion vector difference resolution is not used in motion vector coding (e.g., no_amvr_constraint_flag). In some examples, the inter prediction related constraint flag is a syntax element that specifies whether a bidirectional optical flow inter prediction flag (e.g., sps_bdof_enabled_flag) must indicate that bidirectional optical flow inter prediction is disabled (e.g., no_bdof_constraint_flag). In some examples, the inter prediction related constraint flag is a syntax element (e.g., no_dmvr_constraint_flag) that specifies whether the decoder motion vector refinement enabled flag (e.g., sps_dmvr_enabled_flag) must indicate that decoder motion vector refinement is disabled. In some examples, the inter prediction related constraint flag is a syntax element (e.g., no_affine_motion_constraint_flag) that specifies whether the affine enabled flag (e.g., sps_affined_enabled) must indicate that affine model-based motion compensation is not used in CLVS.In some examples, the inter-prediction related constraint flag is a syntax element (e.g., no_bcw_constraint_flag) that specifies whether a bi-prediction flag with coding unit (CU) weights (e.g., sps_bcw_enabled_flag) must indicate that bi-prediction with CU weights is not used in CLVS. In some examples, the inter-prediction related constraint flag is a syntax element (e.g., no_ciip_constraint_flag) that specifies whether a combined inter-picture merging and intra-picture prediction (CIIP) flag (e.g., sps_ciip_enabled_flag) must indicate that there is no flag indicating whether CIIP applies to the coding unit. In some examples, the inter-prediction related constraint flag is a syntax element (e.g., no_fpel_mmvd_constraint_flag) that specifies whether a merge mode flag with motion vector differences (e.g., sps_fpel_mmvd_enabled_flag) must specify that merge mode with motion vector differences can use fractional sample precision. In some examples, the inter prediction related constraint flag is a syntax element (eg, no_gpm_constraint_flag) that specifies whether a geometric partitioning based motion compensation flag (eg, sps_gpm_enabled_flag) must indicate that geometric partitioning based motion compensation is not used in CLVS.

[0202] In some examples, when performing a bitstream conformance process, the device may determine that a bitstream does not conform to a video coding standard based on a first syntax element (e.g., single_layer_constraint_flag) having a specific value indicating that a bitstream conformance requirement applies and based on the bitstream conformance requirement not being met and the bitstream conformance requirement specifying that a second syntax element (e.g., sps_video_parameter_set_id) specifies that a video parameter set (VPS) identifier of a sequence parameter set (SPS) should be equal to 0.

[0203] In some examples, a device may determine that a bitstream does not conform to a video coding standard based on a first syntax element (e.g., single_sublayer_constraint_flag) having a particular value (e.g., 1) indicating that the bitstream conformance requirement applies and the bitstream conformance requirement specifies that a second syntax element (e.g., sps_video_parameter_set_id) should be equal to 0 and a third syntax element (e.g., sps_max_sublayers_minus_1) plus 1 specifies that the maximum number of temporal sublayers that can be present in each coded layer video sequence (CLVS) should be equal to 0.

[0204] In some examples, the device may determine that the bitstream does not conform to the video coding standard based on a first syntax element (e.g., single_sublayer_per_layer_constraint_flag) having a particular value (e.g., 1) indicating that the bitstream conformance requirement applies and the bitstream conformance requirement specifies that a third syntax element (e.g., sps_max_sublayers_minus1) should be equal to 0.

[0205] In some examples, the device may determine that the bitstream does not conform to the video coding standard based on the first syntax element (e.g., single_layer_constraint_flag) having a particular value indicating that the bitstream conformance requirement applies and the bitstream conformance requirement specifies that the fourth syntax element (e.g., no_inter_layer_pred_constraint_flag) should specify that all layers in the CVS are independently coded without inter-layer prediction. In this example, the device may determine that the first syntax element is omitted from the bitstream and infer that the bitstream conformance requirement is applicable based on the fact that the fifth syntax element (e.g., single_layer_constraint_flag) specifies that the VPS identifier of the SPS should be equal to 0, which is a second requirement for bitstream conformance.

[0206] In some examples, the system may determine that a bitstream does not conform to a video coding standard based on a first syntax element (e.g., no_inter_layer_pred_constraint_flag) having a particular value (e.g., 1) indicating that the bitstream conformance requirement applies and the bitstream conformance requirement specifies that a fourth syntax element (e.g., no_inter_layer_pred_constraint_flag) should specify that all layers in a coded video sequence (CVS) are independently coded without inter-layer prediction.

[0207] exist Figure 7 In examples of , the system can determine whether the bitstream conformance process determines that the bitstream conforms to the video coding standard (408). In response to determining that the bitstream conforms to the video coding standard (the "yes" branch of 408), the system can provide the bitstream to the video decoder 300 (410). For example, in some examples, the system can output the bitstream to the computer-readable medium 110 for subsequent reception by the destination device 116. In some examples where the device includes the video decoder 300, the video decoder 300 can decode the bitstream. However, in response to determining that the bitstream does not conform to the video coding standard (the "no" branch of 408), the system can reject the bitstream (412). For example, the system can generate an error message. Thus, in Figure 7In an example, the device may generate an error message based on a determination that the bitstream does not comply with a video coding standard, send the bitstream to another device based on a determination that the bitstream complies with the video coding standard, or decode the bitstream based on a determination that the bitstream complies with the video coding standard.

[0208] The following is a non-limiting list of examples of one or more techniques in accordance with this disclosure.

[0209] Aspect 1A: A method of processing video data, comprising: performing a bitstream consistency process, the bitstream consistency process determining whether a bitstream comprising an encoded representation of the video data complies with a video decoding standard, wherein when a second syntax element indicates that only one slice is allowed per picture, the bitstream consistency process is capable of determining that the bitstream complies with the video decoding standard regardless of a value of a first syntax element, the first syntax element indicating whether only one sub-picture is allowed per sub-picture.

[0210] Aspect 2A: A method of processing video data, comprising: performing a bitstream consistency process, the bitstream consistency process determining whether a bitstream comprising an encoded representation of the video data complies with a video decoding standard, wherein when a chroma-related constraint flag is equal to 0 and when no chroma component for a picture is present in the bitstream, the bitstream consistency process determines that the bitstream does not comply with the video decoding standard.

[0211] Aspect 3A: The method according to aspect 2A, wherein the chroma-related constraint flag is one of the following: no_qtbtt_dual_tree_intra_constraint_flag, no_ccalf_constraint_flag, no_joint_cbcr_constraint_flag, or no_cclm_constraint_flag.

[0212] Aspect 4A: A method for processing video data, comprising: performing a bitstream consistency process, wherein the bitstream consistency process determines whether a bitstream including an encoded representation of the video data complies with a video decoding standard, wherein when an inter-frame prediction related constraint flag is equal to 0 (when all slices of the bitstream are I slices), the bitstream consistency process determines that the bitstream does not comply with the video decoding standard.

[0213] Aspect 5A: The method according to aspect 4A, wherein the chroma-related constraint flag is one of the following: no_ref_wraparound_constraint_flag, no_temporal_mvp_constraint_flag, no_sbtmvp_constraint_flag, no_amvr_constraint_flag, no_bdof_constraint_flag, no_dmvr_constraint_flag, no_affine_motion_constraint_flag, no_bcw_constraint_flag, no_ciip_constraint_flag, no_fpel_mmvd_constraint_flag or no_gpm_constraint_flag.

[0214] Aspect 6A: A method of processing video data, comprising: determining, based on a second syntax element indicating that no chroma components are present in a bitstream and a third syntax element indicating that all slices of the bitstream are I slices, that a first syntax element is omitted from the bitstream and inferred to be equal to 1, the first syntax element being one of the following: no_qtbtt_dual_tree_intra_constraint_flag, no_ccalf_constraint_flag, no_joint_cbcr_constraint_flag, no_cclm_constraint_flag, no_ref_wraparound_constraint_flag, no_temporal_mvp_constraint_flag g, no_sbtmvp_constraint_flag, no_amvr_constraint_flag, no_bdof_constraint_flag, no_dmvr_constraint_flag, no_affine_motion_constraint_flag, no_bcw_constraint_flag, no_ciip_constraint_flag, no_fpel_mmvd_constraint_flag, or no_gpm_constraint_flag; and performing a bitstream conformance process that determines, based on the first syntax element, whether a bitstream including an encoded representation of the video data conforms to a video coding standard.

[0215] Aspect 7A: A method for processing video data, comprising: performing a bitstream consistency process, the bitstream consistency process determining whether a bitstream including an encoded representation of the video data complies with a video decoding standard, wherein the bitstream consistency process indicates that a decoding tool is enabled based on a first syntax element in a sequence parameter set (SPS), and when a second syntax element of the bitstream indicates that the first syntax element should have a value indicating that the decoding tool is not enabled, determining that the bitstream does not comply with the video decoding standard.

[0216] Aspect 8A: A method according to aspect 7A, wherein the decoding tool is one of the following: intra-frame prediction with multiple reference lines, intra-frame prediction with sub-partitioning, matrix-based intra-frame prediction, index-based selection of low-frequency inseparable transform kernel, merge mode with motion vector difference, use of symmetric motion vector difference in motion vector decoding, prediction refinement with optical flow for affine motion compensation, palette prediction mode, adaptive color transform, or luma mapping with chroma scaling.

[0217] Aspect 9A: A method according to Aspect 7A, wherein: the decoding tool is one of the following: a merge mode with motion vector differences, using symmetric motion vector differences in motion vector decoding, or prediction refinement with optical flow for affine motion compensation, and the method further includes: determining that the second syntax element is omitted from the bitstream based on a third syntax element indicating that all slices of the bitstream are I slices and indicating that the first syntax element should have the value indicating that the decoding tool is not enabled.

[0218] Aspect 10A: A method of processing video data, comprising: performing a bitstream conformance process, the bitstream conformance process determining whether a bitstream including an encoded representation of the video data conforms to a video coding standard, wherein the bitstream conformance process determines that the bitstream does not conform to the video coding standard based on a first syntax element having a specific value indicating that a bitstream conformance requirement applies and based on the fact that the bitstream conformance requirement is not met, wherein the bitstream conformance requirement specifies one of the following: a second syntax element specifies that a video parameter set (VPS) identifier of a sequence parameter set (SPS) should be equal to 0, the second syntax element should be equal to 0, and a third syntax element plus 1 specifies that a maximum number of temporal sub-layers that may exist in each coded layer video sequence (CLVS) should be equal to 0, the third syntax element should be equal to 0, or a fourth syntax element should specify that all layers in a coded video sequence (CVS) are independently coded without inter-layer prediction.

[0219] Aspect 11A: A method according to Aspect 10A, wherein: the bitstream conformance requirement specifies that the fourth syntax element should specify that all layers in the CVS are independently decoded without inter-layer prediction, and the method further includes: determining that the first syntax element is omitted from the bitstream and is inferred to indicate that the bitstream conformance requirement is applicable based on the fact that the fifth syntax element specifies that the VPS identifier of the SPS should be equal to 0.

[0220] Aspect 12A: A method of processing video data, comprising: performing a bitstream conformance process, the bitstream conformance process determining whether a bitstream including an encoded representation of the video data conforms to a video decoding standard, wherein the bitstream conformance process determines that the bitstream does not conform to the video decoding standard based on a first syntax element having a specific value indicating that a bitstream conformance requirement applies and based on the fact that the bitstream conformance requirement is not met, wherein the bitstream conformance requirement specifies one of the following: no NAL unit having a NAL unit type equal to a video parameter set (VPS) network abstraction layer (NAL) unit type in an in-scope output layer set should be present in the bitstream, or no NAL unit having a picture header NAL unit type in the in-scope output layer set should be present in the bitstream.

[0221] Aspect 13A: The method according to any one of Aspects 1A-12A further includes at least one of the following: generating an error message based on a determination that the bitstream does not comply with the video decoding standard, sending the bitstream to another device based on a determination that the bitstream complies with the video decoding standard, or decoding the bitstream based on the determination that the bitstream complies with the video decoding standard.

[0222] Aspect 14A: A method comprising any combination of Aspects 1A-13A.

[0223] Aspect 15A: An apparatus for processing video data, the apparatus comprising one or more means for performing the method of any one of aspects 1A-14A.

[0224] Aspect 16A: The apparatus of aspect 15A, wherein the one or more units comprise one or more processors implemented in circuitry.

[0225] Aspect 17A: The apparatus according to any one of aspects 15A and 16A, further comprising: a memory for storing the video data.

[0226] Aspect 18A: The apparatus of any of aspects 15A-17A, further comprising: a display configured to display the decoded video data.

[0227] Aspect 19A: The device of any of aspects 15A-18A, wherein the device comprises one or more of: a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0228] Aspect 20A: The apparatus of any of aspects 15A-19A, wherein the apparatus comprises a video decoder.

[0229] Aspect 21A: The apparatus of any of aspects 15A-20A, wherein the apparatus comprises a video encoder.

[0230] Aspect 22A: A computer-readable storage medium having instructions stored thereon, which, when executed, cause one or more processors to perform the method of any of Aspects 1A-14A.

[0231] Aspect 1B: A method for processing video data, comprising: performing a bitstream consistency process, wherein the bitstream consistency process determines whether a bitstream including an encoded representation of the video data complies with a video decoding standard, wherein the bitstream consistency process determines that the bitstream does not comply with the video decoding standard when at least one of the following items is true: a chroma-related constraint flag is equal to 0, and when there is no chroma component for a picture in the bitstream; or when all slices of the bitstream are I slices, the inter-frame prediction-related constraint flag is equal to 0.

[0232] Aspect 2B: A method according to aspect 1B, wherein the chroma-related constraint flag is one of the following: a syntax element indicating whether a quadtree / binary tree flag must specify that a separate decoding tree structure is not used for I slices, a syntax element indicating whether a cross-component adaptive loop filter flag must indicate that a cross-component adaptive loop filter is disabled, a syntax element indicating whether a joint decoding flag of chroma residual must indicate that joint decoding of chroma residual is disabled, or a syntax element indicating whether a cross-component linear model intra-frame prediction flag must indicate that cross-component linear model intra-frame prediction from luma component to chroma component is disabled.

[0233] Aspect 3: The method according to any one of Aspects 1 and 2, wherein the intra-frame prediction related constraint flag is one of the following: a syntax element specifying whether a surround enable flag must indicate that horizontal surround motion compensation is not applied in inter-frame prediction, a syntax element specifying whether a temporal motion vector prediction enable flag must indicate that a temporal motion vector predictor is not used in a coded layer video sequence (CLVS), a syntax element specifying whether a sub-block based temporal motion vector prediction enable flag must indicate that a sub-block based temporal motion vector predictor is not used in the CLVS, a syntax element specifying whether an adaptive motion vector difference resolution enable flag must indicate that an adaptive motion vector difference resolution is not used in motion vector decoding, a syntax element specifying whether a bidirectional optical flow inter-frame prediction flag must indicate that bidirectional optical flow inter-frame prediction is disabled, a syntax element specifying a decoder A syntax element specifying whether the motion vector refinement enable flag must indicate that decoder motion vector refinement is disabled, a syntax element specifying whether the affine enable flag must indicate that affine model based motion compensation is not used in the CLVS, a syntax element specifying whether the bi-prediction with coding unit (CU) weights flag must indicate that bi-prediction with CU weights is not used in the CLVS, a syntax element specifying whether the combined inter-picture merging and intra-picture prediction (CIIP) flag must indicate that there is no flag indicating whether CIIP is applied to coding units, a syntax element specifying whether the merge mode with motion vector difference flag must specify that merge mode with motion vector difference can use fractional sample precision, or a syntax element specifying whether the motion compensation based on geometric partitioning flag must indicate that geometric partitioning based motion compensation is not used in the CLVS.

[0234] Aspect 4B: A method according to any one of Aspects 1B to 3B, wherein performing the bitstream conformance process further comprises determining that the bitstream does not conform to the video coding standard based on a first syntax element having a specific value indicating that a bitstream conformance requirement applies and based on that the bitstream conformance requirement is not met, wherein the bitstream conformance requirement specifies one of the following: a second syntax element specifies that a video parameter set (VPS) identifier of a sequence parameter set (SPS) should be equal to 0, the second syntax element should be equal to 0, and a third syntax element plus 1 specifies that the maximum number of temporal sub-layers that can exist in each coded layer video sequence (CLVS) should be equal to 0, the third syntax element should be equal to 0, or a fourth syntax element should specify that all layers in a coded video sequence (CVS) are independently coded without inter-layer prediction.

[0235] Aspect 5B: A method according to aspect 4B, wherein: the bitstream consistency requirement specifies that the fourth syntax element should specify that all layers in the CVS are independently decoded without inter-layer prediction, and the method further includes: based on the fact that the fifth syntax element specifies that the VPS identifier of the SPS should be equal to 0 is a second requirement for bitstream consistency, determining that the first syntax element is omitted from the bitstream and is inferred to indicate that the bitstream consistency requirement is applicable.

[0236] Aspect 6B: The method according to any one of Aspects 1B to 5B further includes: generating an error message based on a determination that the bitstream does not comply with the video decoding standard, sending the bitstream to another device based on a determination that the bitstream complies with the video decoding standard, or decoding the bitstream based on the determination that the bitstream complies with the video decoding standard.

[0237] Aspect 7B: A device for processing video data, comprising: a memory for storing a bitstream that complies with a video decoding standard and includes an encoded representation of the video data; and one or more processors implemented in a circuit and coupled to the memory, the one or more processors being configured to: perform a bitstream consistency process, the bitstream consistency process determining whether the bitstream complies with the video decoding standard, wherein the bitstream consistency process determines that the bitstream does not comply with the video decoding standard when at least one of the following is true: a chroma-related constraint flag is equal to 0, and when there is no chroma component for a picture in the bitstream; or when all slices of the bitstream are I slices, the inter-frame prediction-related constraint flag is equal to 0.

[0238] Aspect 8B: The apparatus according to aspect 7B, wherein the chroma-related constraint flag is one of: a syntax element indicating whether a quadtree / binarytree flag must specify that a separate decoding tree structure is not used for I slices, a syntax element indicating whether a cross-component adaptive loop filter flag must indicate that a cross-component adaptive loop filter is disabled, a syntax element indicating whether a joint decoding flag of chroma residual must indicate that joint decoding of chroma residual is disabled, or a syntax element indicating whether a cross-component linear model intra-frame prediction flag must indicate whether cross-component linear model intra-frame prediction from luma component to chroma component is disabled.

[0239] Aspect 9B: An apparatus according to any one of Aspects 7B and 8B, wherein the intra-frame prediction related constraint flag is one of the following: a syntax element specifying whether a surround enable flag must indicate that horizontal surround motion compensation is not applied in inter-frame prediction, a syntax element specifying whether a temporal motion vector prediction enable flag must indicate that a temporal motion vector predictor is not used in a coded layer video sequence (CLVS), a syntax element specifying whether a sub-block based temporal motion vector prediction enable flag must indicate that a sub-block based temporal motion vector predictor is not used in the CLVS, a syntax element specifying whether an adaptive motion vector difference resolution enable flag must indicate that an adaptive motion vector difference resolution is not used in motion vector decoding, a syntax element specifying whether a bidirectional optical flow inter-frame prediction flag must indicate that bidirectional optical flow inter-frame prediction is disabled, a syntax element specifying decoding A syntax element specifying whether the decoder motion vector refinement enable flag must indicate that decoder motion vector refinement is disabled, a syntax element specifying whether the affine enable flag must indicate that affine model based motion compensation is not used in the CLVS, a syntax element specifying whether the bi-prediction with coding unit (CU) weights flag must indicate that bi-prediction with CU weights is not used in the CLVS, a syntax element specifying whether the combined inter-picture merging and intra-picture prediction (CIIP) flag must indicate that there is no flag indicating whether CIIP is applied to coding units, a syntax element specifying whether the merge mode with motion vector difference flag must specify that merge mode with motion vector difference can use fractional sample precision, or a syntax element specifying whether the motion compensation based on geometric partitioning flag must indicate that geometric partitioning based motion compensation is not used in the CLVS.

[0240] Aspect 10B: An apparatus according to any one of Aspects 7B to 9B, wherein the one or more processors are configured to: as part of performing the bitstream conformance process, perform the following operations: determine that the bitstream does not conform to the video decoding standard based on a first syntax element having a specific value indicating that a bitstream conformance requirement applies and based on the fact that the bitstream conformance requirement is not met, wherein the bitstream conformance requirement specifies one of the following: a second syntax element specifies that a video parameter set (VPS) identifier of a sequence parameter set (SPS) should be equal to 0, the second syntax element should be equal to 0, and a third syntax element plus 1 specifies that the maximum number of temporal sub-layers that can exist in each coded layer video sequence (CLVS) should be equal to 0, the third syntax element should be equal to 0, or a fourth syntax element should specify that all layers in a coded video sequence (CVS) are independently coded without inter-layer prediction.

[0241] Aspect 11B: An apparatus according to aspect 10B, wherein: the bitstream consistency requirement specifies that the fourth syntax element should specify that all layers in the CVS are independently decoded without inter-layer prediction, and the method further includes: based on the fact that the fifth syntax element specifies that the VPS identifier of the SPS should be equal to 0 is a second requirement for bitstream consistency, determining that the first syntax element is omitted from the bitstream and is inferred to indicate that the bitstream consistency requirement is applicable.

[0242] Aspect 12B: A device according to any one of Aspects 7B to 11B, wherein the one or more processors are further configured to perform at least one of the following: generating an error message based on a determination that the bitstream does not comply with the video decoding standard, sending the bitstream to another device based on a determination that the bitstream complies with the video decoding standard, or decoding the bitstream based on the determination that the bitstream complies with the video decoding standard.

[0243] Aspect 13B: The device of any of Aspects 7B to 12B, wherein the device comprises one or more of: a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0244] Aspect 14B: An apparatus for processing video data, comprising: a unit for storing a bitstream comprising an encoded representation of the video data; and a unit for performing a bitstream consistency process, the bitstream consistency process determining whether the bitstream complies with a video coding standard, wherein the bitstream consistency process determines that the bitstream does not comply with the video coding standard when at least one of the following is true: a chroma-related constraint flag is equal to 0, and when no chroma component for a picture is present in the bitstream; or when all slices of the bitstream are I slices, an inter-frame prediction-related constraint flag is equal to 0.

[0245] Aspect 15B: The apparatus according to aspect 14B, wherein the chroma-related constraint flag is one of: a syntax element indicating whether a quadtree / binarytree flag must specify that a separate decoding tree structure is not used for I slices, a syntax element indicating whether a cross-component adaptive loop filter flag must indicate that a cross-component adaptive loop filter is disabled, a syntax element indicating whether a joint decoding flag of chroma residual must indicate that joint decoding of chroma residual is disabled, or a syntax element indicating whether a cross-component linear model intra-frame prediction flag must indicate whether cross-component linear model intra-frame prediction from luma component to chroma component is disabled.

[0246] Aspect 16B: An apparatus according to any one of aspects 14B and 15B, wherein the intra-frame prediction related constraint flag is one of the following: a syntax element specifying whether a surround enable flag must indicate that horizontal surround motion compensation is not applied in inter-frame prediction, a syntax element specifying whether a temporal motion vector prediction enable flag must indicate that a temporal motion vector predictor is not used in a coded layer video sequence (CLVS), a syntax element specifying whether a sub-block based temporal motion vector prediction enable flag must indicate that a sub-block based temporal motion vector predictor is not used in the CLVS, a syntax element specifying whether an adaptive motion vector difference resolution enable flag must indicate that an adaptive motion vector difference resolution is not used in motion vector decoding, a syntax element specifying whether a bidirectional optical flow inter-frame prediction flag must indicate that bidirectional optical flow inter-frame prediction is disabled, a syntax element specifying resolution A syntax element specifying whether the encoder motion vector refinement enable flag must indicate that decoder motion vector refinement is disabled, a syntax element specifying whether the affine enable flag must indicate that affine model based motion compensation is not used in the CLVS, a syntax element specifying whether the bi-prediction with coding unit (CU) weights flag must indicate that bi-prediction with CU weights is not used in the CLVS, a syntax element specifying whether the combined inter-picture merging and intra-picture prediction (CIIP) flag must indicate that there is no flag indicating whether CIIP is applied to coding units, a syntax element specifying whether the merge mode with motion vector difference flag must specify that merge mode with motion vector difference can use fractional sample precision, or a syntax element specifying whether the motion compensation based on geometric partitioning flag must indicate that geometric partitioning based motion compensation is not used in the CLVS.

[0247] Aspect 17B: A computer-readable storage medium having instructions stored thereon, which, when executed, cause one or more processors to perform the following operations: store a bitstream comprising an encoded representation of video data; and perform a bitstream consistency process, which determines whether the bitstream conforms to a video decoding standard, wherein the bitstream consistency process determines that the bitstream does not conform to the video decoding standard when at least one of the following is true: a chroma-related constraint flag is equal to 0, and when there is no chroma component for a picture in the bitstream; or when all slices of the bitstream are I slices, the inter-frame prediction-related constraint flag is equal to 0.

[0248] Aspect 18B: A computer-readable storage medium according to aspect 17B, wherein the chroma-related constraint flag is one of the following: a syntax element indicating whether a quadtree / binary tree flag must specify that a separate decoding tree structure is not used for I slices, a syntax element indicating whether a cross-component adaptive loop filter flag must indicate that a cross-component adaptive loop filter is disabled, a syntax element indicating whether a joint decoding flag of chroma residual must indicate that joint decoding of chroma residual is disabled, or a syntax element indicating whether a cross-component linear model intra-frame prediction flag must indicate whether cross-component linear model intra-frame prediction from luma component to chroma component is disabled.

[0249] Aspect 19B: A computer-readable storage medium according to aspect 18B, wherein the intra-frame prediction related constraint flag is one of the following: a syntax element specifying whether a surround enable flag must indicate that horizontal surround motion compensation is not applied in inter-frame prediction, a syntax element specifying whether a temporal motion vector prediction enable flag must indicate that a temporal motion vector predictor is not used in a coded layer video sequence (CLVS), a syntax element specifying whether a sub-block based temporal motion vector prediction enable flag must indicate that a sub-block based temporal motion vector predictor is not used in the CLVS, a syntax element specifying whether an adaptive motion vector difference resolution enable flag must indicate that an adaptive motion vector difference resolution is not used in motion vector decoding, a syntax element specifying whether a bidirectional optical flow inter-frame prediction flag must indicate that bidirectional optical flow inter-frame prediction is disabled, a syntax element specifying decoding A syntax element specifying whether the decoder motion vector refinement enable flag must indicate that decoder motion vector refinement is disabled, a syntax element specifying whether the affine enable flag must indicate that affine model based motion compensation is not used in the CLVS, a syntax element specifying whether the bi-prediction with coding unit (CU) weights flag must indicate that bi-prediction with CU weights is not used in the CLVS, a syntax element specifying whether the combined inter-picture merging and intra-picture prediction (CIIP) flag must indicate that there is no flag indicating whether CIIP is applied to coding units, a syntax element specifying whether the merge mode with motion vector difference flag must specify that merge mode with motion vector difference can use fractional sample precision, or a syntax element specifying whether the motion compensation based on geometric partitioning flag must indicate that geometric partitioning based motion compensation is not used in the CLVS.

[0250] It is to be appreciated that, depending on the examples, certain actions or events of any of the techniques described herein may be performed in a different order, may be added, combined, or omitted entirely (e.g., not all described actions or events are necessary to implement the techniques). Furthermore, in some examples, actions or events may be performed concurrently rather than sequentially, for example, through multithreading, interrupt handling, or multiple processors.

[0251] In the present disclosure, reference to ordinal terms (eg, first, second, etc.) does not necessarily indicate an order, but may be used only to distinguish individual items.

[0252] In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or sent via a computer-readable medium as one or more instructions or codes and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media, which corresponds to tangible media (such as data storage media) or communication media, including any media that facilitates the transfer of a computer program from one place to another, for example, according to a communication protocol. In this manner, computer-readable media may generally correspond to (1) a non-transitory tangible computer-readable storage medium, or (2) a communication medium such as a signal or carrier wave. A data storage medium may be any available medium that can be accessed by one or more computers or one or more processors to obtain instructions, codes, and / or data structures for implementing the techniques described in this disclosure. A computer program product may include a computer-readable medium.

[0253] By way of example and not limitation, such computer-readable storage media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. In addition, any connection is appropriately referred to as a computer-readable medium. For example, if instructions are sent from a website, server or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) or wireless technology (such as infrared, radio and microwave), the coaxial cable, fiber optic cable, twisted pair, DSL or wireless technology (such as infrared, radio and microwave) is included in the definition of medium. However, it should be understood that computer-readable storage media and data storage media do not include connections, carrier waves, signals or other temporary media, but instead are directed to non-temporary tangible storage media. As used herein, disks and optical disks include compact discs (CDs), laser discs, optical discs, digital versatile discs (DVDs), floppy disks and Blu-ray discs, wherein disks typically copy data magnetically, while optical discs use lasers to copy data optically. Combinations of the above should also be included within the scope of computer-readable media.

[0254] Instructions may be executed by one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other equivalent integrated or discrete logic circuits. Thus, the terms "processor" and "processing circuitry" as used herein may refer to any of the foregoing structures or any other structure suitable for implementing the techniques described herein. Additionally, in some aspects, the functionality described herein may be provided within dedicated hardware and / or software modules configured for encoding and decoding, or incorporated into a combined codec. Furthermore, the techniques may be implemented entirely in one or more circuits or logic elements.

[0255] The techniques of this disclosure can be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC), or a set of ICs (e.g., a chipset). Various components, modules, or units are described in this disclosure to emphasize functional aspects of a device configured to perform the disclosed techniques, but do not necessarily require implementation by different hardware units. Specifically, as described above, the various units may be combined in a codec hardware unit, or provided by a collection of interoperable hardware units (including one or more processors as described above) in combination with appropriate software and / or firmware.

[0256] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. A method for processing video data, the method comprising: performing a bitstream conformance process that determines whether a bitstream comprising an encoded representation of the video data conforms to a video coding standard, wherein performing the bitstream conformance process comprises determining that the bitstream does not conform to the video coding standard based on a first syntax element having a specific value indicating that a bitstream conformance requirement applies and based on the bitstream conformance requirement not being met, and wherein the bitstream conformance requirement specifies a second syntax element that should specify that all layers in a coded video sequence (CVS) are to be independently coded without inter-layer prediction.

2. The method according to claim 1, wherein The bitstream conformance process determines that the bitstream does not conform to the video coding standard when a chroma-related constraint flag is equal to 0 and when there is no chroma component for a picture in the bitstream, wherein the chroma-related constraint flag is one of the following: Indicates whether the quadtree / binarytree flag must specify a separate coding tree structure for syntax elements not used for I slices. a syntax element indicating whether the cross-component adaptive loop filter flag must indicate that the cross-component adaptive loop filter is disabled, A syntax element indicating whether the joint coding flag for chroma residual must indicate that joint coding of chroma residual is disabled, or A syntax element indicating whether the cross-component linear model intra prediction flag must indicate that cross-component linear model intra prediction from luma components to chroma components is disabled.

3. The method according to claim 1, wherein The bitstream conformance process determines that the bitstream does not conform to the video coding standard when an inter-prediction related constraint flag is equal to 0 and all slices of the bitstream are I slices, wherein the inter-prediction related constraint flag is one of the following: Specifies whether the surround enable flag must indicate a syntax element that does not apply horizontal surround motion compensation in inter prediction. Specifies whether the temporal motion vector prediction enable flag must indicate a syntax element that does not use the temporal motion vector predictor in the coded layer video sequence (CLVS). a syntax element specifying whether the sub-block based temporal motion vector prediction enable flag must indicate that the sub-block based temporal motion vector predictor is not used in said CLVS, Specifies whether the adaptive motion vector difference resolution enable flag must indicate a syntax element that does not use adaptive motion vector difference resolution in motion vector coding. Specifies whether the bidirectional optical flow inter prediction flag must indicate a syntax element that bidirectional optical flow inter prediction is disabled. Specifies whether the decoder motion vector refinement enable flag must indicate syntax elements that decoder motion vector refinement is disabled, Specifies whether the affine enabled flag must indicate a syntax element that does not use affine model based motion compensation in this CLVS. Specifies whether the bi-prediction flag with coding unit (CU) weights must indicate a syntax element that bi-prediction with CU weights is not used in this CLVS, Specifies whether the combined inter-picture merging and intra-picture prediction (CIIP) flag must indicate the absence of a syntax element indicating whether CIIP applies to a coding unit. Specifies whether the merge mode with motion vector differences flag must specify that merge mode with motion vector differences can use fractional sample precision syntax elements, or Specifies whether the geometric partitioning based motion compensation flag must indicate that a syntax element is not used in this CLVS.

4. The method according to claim 1, wherein: The bitstream conformance requirement specifies that the second syntax element shall specify that all layers in the CVS are independently coded without inter-layer prediction, and The method also includes determining, based on a third syntax element specifying that a video parameter set (VPS) identifier of a sequence parameter set (SPS) should be equal to 0 is a second requirement for bitstream conformance, that the first syntax element is omitted from the bitstream and inferred to indicate that the bitstream conformance requirement is applicable.

5. The method of claim 1 , further comprising at least one of the following: generating an error message based on a determination that the bitstream does not comply with the video coding standard, sending the bitstream to another device based on a determination that the bitstream complies with the video coding standard, or The bitstream is decoded based on the determination that the bitstream conforms to the video coding standard.

6. A device for processing video data, the device comprising: a memory for storing a bitstream compliant with a video coding standard comprising an encoded representation of the video data; as well as One or more processors implemented in circuitry and coupled to the memory, the one or more processors configured to: perform a bitstream conformance process that determines whether the bitstream conforms to a video coding standard, wherein the one or more processors are configured to, as part of performing the bitstream conformance process, determine that the bitstream does not conform to the video coding standard based on a first syntax element having a specific value indicating that a bitstream conformance requirement applies and based on the bitstream conformance requirement not being met, and wherein the bitstream conformance requirement specifies a second syntax element that should specify that all layers in a coded video sequence (CVS) are to be independently coded without inter-layer prediction.

7. The apparatus according to claim 6, wherein The bitstream conformance process determines that the bitstream does not conform to the video coding standard when a chroma-related constraint flag is equal to 0 and when there is no chroma component for a picture in the bitstream, wherein the chroma-related constraint flag is one of the following: Indicates whether the quadtree / binarytree flag must specify a separate coding tree structure for syntax elements not used for I slices, a syntax element indicating whether the cross-component adaptive loop filter flag must indicate that the cross-component adaptive loop filter is disabled, A syntax element indicating whether the joint coding flag for chroma residual must indicate that joint coding of chroma residual is disabled, or A syntax element indicating whether the cross-component linear model intra prediction flag must indicate that cross-component linear model intra prediction from luma components to chroma components is disabled.

8. The apparatus according to claim 6, wherein The bitstream conformance process determines that the bitstream does not conform to the video coding standard when an inter-prediction related constraint flag is equal to 0 and all slices of the bitstream are I slices, wherein the inter-prediction related constraint flag is one of the following: Specifies whether the surround enable flag must indicate a syntax element that does not apply horizontal surround motion compensation in inter prediction. Specifies whether the temporal motion vector prediction enable flag must indicate a syntax element that does not use the temporal motion vector predictor in the coded layer video sequence (CLVS). a syntax element specifying whether the sub-block based temporal motion vector prediction enable flag must indicate that the sub-block based temporal motion vector predictor is not used in said CLVS, Specifies whether the adaptive motion vector difference resolution enable flag must indicate a syntax element that does not use adaptive motion vector difference resolution in motion vector coding. Specifies whether the bidirectional optical flow inter prediction flag must indicate a syntax element that bidirectional optical flow inter prediction is disabled. Specifies whether the decoder motion vector refinement enable flag must indicate syntax elements that decoder motion vector refinement is disabled, Specifies whether the affine enabled flag must indicate a syntax element that does not use affine model based motion compensation in this CLVS. Specifies whether the bi-prediction flag with coding unit (CU) weights must indicate a syntax element that bi-prediction with CU weights is not used in this CLVS, Specifies whether the combined inter-picture merging and intra-picture prediction (CIIP) flag must indicate the absence of a syntax element indicating whether CIIP applies to a coding unit. Specifies whether the merge mode with motion vector differences flag must specify that merge mode with motion vector differences can use fractional sample precision syntax elements, or Specifies whether the geometric partitioning based motion compensation flag must indicate that a syntax element is not used in this CLVS.

9. The apparatus according to claim 6, wherein: The bitstream conformance requirement specifies that the second syntax element shall specify that all layers in the CVS are independently coded without inter-layer prediction, and The processor is further configured to determine that the first syntax element is omitted from the bitstream and inferred to indicate that the bitstream conformance requirement is applicable based on a third syntax element specifying that a video parameter set (VPS) identifier of a sequence parameter set (SPS) should be equal to 0 is a second requirement for bitstream conformance.

10. The apparatus according to claim 6, wherein The one or more processors are further configured to perform at least one of the following: generating an error message based on a determination that the bitstream does not comply with the video coding standard, sending the bitstream to another device based on a determination that the bitstream complies with the video coding standard, or The bitstream is decoded based on the determination that the bitstream conforms to the video coding standard.

11. The apparatus according to claim 6, wherein The device includes one or more of: a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

12. A device for processing video data, the device comprising: means for storing a bitstream comprising an encoded representation of said video data; as well as Unit for performing a bitstream conformance process that determines whether the bitstream conforms to a video coding standard, wherein the bitstream conformance process determines that the bitstream does not conform to the video coding standard based on a first syntax element having a specific value indicating that a bitstream conformance requirement applies and based on the bitstream conformance requirement not being met, and wherein the bitstream conformance requirement specifies a second syntax element that should specify that all layers in a coded video sequence (CVS) are independently coded without inter-layer prediction.

13. The apparatus according to claim 12, wherein The bitstream conformance process determines that the bitstream does not conform to the video coding standard when a chroma-related constraint flag is equal to 0 and when there is no chroma component for a picture in the bitstream, wherein the chroma-related constraint flag is one of the following: Indicates whether the quadtree / binarytree flag must specify a separate coding tree structure for syntax elements not used for I slices. a syntax element indicating whether the cross-component adaptive loop filter flag must indicate that the cross-component adaptive loop filter is disabled, A syntax element indicating whether the joint coding flag for chroma residual must indicate that joint coding of chroma residual is disabled, or A syntax element indicating whether the cross-component linear model intra prediction flag must indicate that cross-component linear model intra prediction from luma components to chroma components is disabled.

14. The apparatus according to claim 12, wherein The bitstream conformance process determines that the bitstream does not conform to the video coding standard when an inter-prediction related constraint flag is equal to 0 and all slices of the bitstream are I slices, wherein the inter-prediction related constraint flag is one of the following: Specifies whether the surround enable flag must indicate a syntax element that does not apply horizontal surround motion compensation in inter prediction. Specifies whether the temporal motion vector prediction enable flag must indicate a syntax element that does not use the temporal motion vector predictor in the coded layer video sequence (CLVS). a syntax element specifying whether the sub-block based temporal motion vector prediction enable flag must indicate that the sub-block based temporal motion vector predictor is not used in said CLVS, Specifies whether the adaptive motion vector difference resolution enable flag must indicate a syntax element that does not use adaptive motion vector difference resolution in motion vector coding. Specifies whether the bidirectional optical flow inter prediction flag must indicate a syntax element that bidirectional optical flow inter prediction is disabled. Specifies whether the decoder motion vector refinement enable flag must indicate syntax elements that decoder motion vector refinement is disabled, Specifies whether the affine enabled flag must indicate a syntax element that does not use affine model based motion compensation in this CLVS. Specifies whether the bi-prediction flag with coding unit (CU) weights must indicate a syntax element that bi-prediction with CU weights is not used in this CLVS, Specifies whether the combined inter-picture merging and intra-picture prediction (CIIP) flag must indicate the absence of a syntax element indicating whether CIIP applies to a coding unit. Specifies whether the merge mode with motion vector differences flag must specify that merge mode with motion vector differences can use fractional sample precision syntax elements, or Specifies whether the geometric partitioning based motion compensation flag must indicate that a syntax element is not used in this CLVS.

15. A non-transitory computer-readable storage medium having stored thereon instructions that, when executed, cause one or more processors to: storing a bitstream comprising an encoded representation of the video data; and performing a bitstream conformance process that determines whether the bitstream conforms to a video coding standard, wherein: The bitstream conformance process determines that the bitstream does not conform to the video coding standard based on a first syntax element having a specific value indicating that a bitstream conformance requirement applies and based on the bitstream conformance requirement not being met, and wherein the bitstream conformance requirement specifies a second syntax element that should specify that all layers in a coded video sequence (CVS) are independently coded without inter-layer prediction.

16. The non-transitory computer-readable storage medium of claim 15, wherein: The bitstream conformance process determines that the bitstream does not conform to the video coding standard when a chroma-related constraint flag is equal to 0 and when there is no chroma component for a picture in the bitstream, wherein the chroma-related constraint flag is one of the following: Indicates whether the quadtree / binarytree flag must specify a separate coding tree structure for syntax elements not used for I slices. a syntax element indicating whether the cross-component adaptive loop filter flag must indicate that the cross-component adaptive loop filter is disabled, A syntax element indicating whether the joint coding flag for chroma residual must indicate that joint coding of chroma residual is disabled, or A syntax element indicating whether the cross-component linear model intra prediction flag must indicate that cross-component linear model intra prediction from luma components to chroma components is disabled.

17. The non-transitory computer-readable storage medium of claim 16, wherein: The bitstream conformance process determines that the bitstream does not conform to the video coding standard when an inter-prediction related constraint flag is equal to 0 and all slices of the bitstream are I slices, wherein the inter-prediction related constraint flag is one of the following: Specifies whether the surround enable flag must indicate a syntax element that does not apply horizontal surround motion compensation in inter prediction. Specifies whether the temporal motion vector prediction enable flag must indicate a syntax element that does not use the temporal motion vector predictor in the coded layer video sequence (CLVS). a syntax element specifying whether the sub-block based temporal motion vector prediction enable flag must indicate that the sub-block based temporal motion vector predictor is not used in said CLVS, Specifies whether the adaptive motion vector difference resolution enable flag must indicate a syntax element that does not use adaptive motion vector difference resolution in motion vector coding. Specifies whether the bidirectional optical flow inter prediction flag must indicate a syntax element that bidirectional optical flow inter prediction is disabled. Specifies whether the decoder motion vector refinement enable flag must indicate syntax elements that decoder motion vector refinement is disabled, Specifies whether the affine enabled flag must indicate a syntax element that does not use affine model based motion compensation in this CLVS. Specifies whether the bi-prediction flag with coding unit (CU) weights must indicate a syntax element that bi-prediction with CU weights is not used in this CLVS, Specifies whether the combined inter-picture merging and intra-picture prediction (CIIP) flag must indicate the absence of a syntax element indicating whether CIIP applies to a coding unit. Specifies whether the merge mode with motion vector differences flag must specify that merge mode with motion vector differences can use fractional sample precision syntax elements, or Specifies whether the geometric partitioning based motion compensation flag must indicate that a syntax element is not used in this CLVS.

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