Software and hardware co-design method for spaceborne photon counting lidar detection and acquisition system
By using technical means such as ZYNQ chips and active passive hybrid quenching circuits in the satellite-based lidar system, the stability and anti-interference problems of satellite-based lidar in high vibration and harsh environments are solved, and the system is highly integrated and reliable operation is achieved.
Patent Information
- Application Number
- CN202211019274.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-08-24
- Publication Date
- 2025-04-25
- Estimated Expiration
- 2042-08-24
AI Technical Summary
Star-based lidars are difficult to maintain system stability and anti-interference capabilities in high vibration and harsh environments, and traditional industrial control computers are not suitable for use in space environments.
The fully programmable heterogeneous chip ZYNQ design integrates FPGA and ARM. The hardware part realizes laser synchronous trigger timing control, photon pulse counting and data cache in the FPGA. The ARM processor is responsible for data preprocessing and inversion. Through active and passive hybrid quenching circuits, bias monitoring and control circuits, temperature monitoring and TE refrigeration circuits, the working conditions of avalanche photodiodes are optimized.
It realizes the stable, highly integrated and strong anti-environmental interference capability of the satellite-based lidar system, ensuring reliable operation in the space environment.
Smart Images
Figure CN115343721B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of laser radar, and in particular relates to a software and hardware collaborative design method for a satellite-borne photon counting laser radar detection and acquisition system. Background Art
[0002] Laser radar is a combination of laser technology and radar technology. It can be used to detect the target distance, speed, atmospheric composition or gas pollutant content, etc., and can also perform three-dimensional imaging of the target. Atmospheric detection laser radar is based on the effects of aerosol Mie scattering and air molecule Rayleigh scattering generated when the laser is transmitted in the atmosphere. It detects the intensity of the back echo signal and inverts the distribution of aerosol concentration, water vapor, etc. in vertical space. The intensity of the echo signal is related to the laser emission energy, wavelength, telescope aperture, and optical path. For example, the larger the laser energy and telescope diameter, the stronger the echo signal. At this time, the acquisition system is mainly analog. The programmable logic device (FPGA) as the main controller mainly realizes the interface conversion, AD timing control, data cache, and cumulative averaging related to the AD converter, while the storage, inversion and analysis of the echo signal are completed by the industrial control computer. On the contrary, micro-pulse lidar (MPL) has the advantages of small size, light weight and low power consumption. The laser generally adopts a high repetition rate and low energy mode, and the echo signal received by the telescope is relatively very weak. At this time, the data acquisition system needs to combine photon counting to detect the far-field weak echo signal.
[0003] Unlike ground-based laser radars, space-borne laser radars need to withstand greater vibrations when launched with rockets. After entering the predetermined orbit, self-test, light alignment, detection, collection and control are all performed automatically, so higher requirements are placed on the system's seismic resistance, power consumption and stability. Industrial computers commonly used on the ground for inversion and control, equipped with operating systems, are affected by harsh environments and may freeze or experience other unstable situations, making them unsuitable for direct use in space environments. Summary of the invention
[0004] In order to realize the satellite-borne laser radar acquisition system, the software and hardware should be stable, highly integrated, and have strong anti-environmental interference capabilities. To this end, the present invention proposes a software and hardware collaborative design method for a satellite-borne photon counting laser radar detection and acquisition system. The specific scheme is as follows:
[0005] A software and hardware collaborative design method for a spaceborne photon counting lidar detection and acquisition system is proposed. The system is designed based on the fully programmable heterogeneous chip ZYNQ that integrates FPGA and ARM. The hardware part is implemented in the FPGA, which mainly completes functions such as laser synchronous trigger timing control, photon pulse counting, FIFO data cache and cumulative averaging. The photon pulse counting function is implemented inside the FPGA. The final photon number distribution data over time is converted into an AXI4-Stream data stream and sent to the DDR3SDRAM cache through the DMA controller. After ARM reads the data and completes preprocessing, it is written to the SSD solid-state storage through the FPGA.
[0006] Specifically, the system uses a fully solid-state, high-stability semiconductor Geiger-mode avalanche photodiode to receive the echo optical signal.
[0007] Specifically, the system includes an active and passive hybrid quenching circuit, which includes the following steps: S1, detecting the output of the pulse amplifier; S2, once detected, making the reverse bias of the avalanche photodiode lower than the avalanche breakdown voltage to complete quenching. This function is implemented by the monostable trigger circuit in the figure, and the pulse width is 10ns; S3, after a certain delay, making the APD reverse bias voltage higher than the avalanche voltage again. At this time, the detector is in the ready state, waiting for the arrival of the next photon.
[0008] Specifically, it also includes bias voltage monitoring and control circuits and temperature monitoring and TE cooling circuits.
[0009] Specifically, the system consists of three channels, namely the 532nm vertical channel, the 532nm horizontal channel and the 1064nm channel; all three channels use APD for detection, and the APD converts the incident single-photon signal into a weak narrow pulse. The signal is converted by the signal conditioning circuit into a standard LVTTL pulse signal with an amplitude of 3.3V and a pulse width of 10ns, which is sent to the counting system for counting and stored in the FIFO memory cache of the corresponding channel.
[0010] Specifically, the PS part of ZYNQ integrates a dual-core ARM Cortex-A9 processor, one of which acts as the control center of the system. It first initializes the internal modules, including the DMA controller, CAN bus controller, GPIO and photon counting module. After the initialization is completed, the system starts self-checking, such as whether the laser energy and wavelength are normal. If abnormal, the abnormal status will be sent to the satellite platform through the CAN bus.
[0011] Specifically, after the self-test is completed, the control system sets the reverse bias voltage of the avalanche photodiode. In order to ensure that the gain of the acquisition system detection does not change with time and to ensure consistency within the entire atmospheric detection distance range, the detector needs to work under constant voltage and constant temperature conditions. The detector bias and temperature values can be obtained through the feedback loop, and dynamic adjustments are made by increasing or decreasing parameters. The temperature control adopts the PID control algorithm and drives the TEC cooler in the PWM mode to keep the detector in a constant temperature box; the reverse bias voltage control is achieved by a digital potentiometer; when everything is ready, the controller enters the photon pulse acquisition state, and the photon arrival time values collected by the FPGA are accumulated in the photon counting module and converted into an AXI4-Stream data stream, which is stored in the DDR3 SDRAM cache in real time through the DMA controller in the ARM.
[0012] Specifically, the other ARM core is mainly used to implement data inversion and storage functions. Once the counting data stored by PL is received, it immediately enters the DMA interrupt service routine, sets the flag to notify the CPU to perform inversion operations, and stores the inversion results in the SSD, waiting for satellite instructions to read. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 It is a single-channel detection and acquisition system structure.
[0014] Figure 2 Circuit diagram of active and passive mixed quenching.
[0015] Figure 3 Detailed block diagram of the detection and acquisition system.
[0016] Figure 4 This is the overall block diagram of three-channel detection.
[0017] Figure 5 Flowchart of the control task executed by CPU1.
[0018] Figure 6 This is the CPU2 main program flow chart.
[0019] Figure 7 This is the flow chart of CPU2 DMA interrupt service program. DETAILED DESCRIPTION
[0020] like Figure 1-3As shown in the figure, a software and hardware co-design method for a satellite-borne photon counting laser radar detection and acquisition system is shown. The satellite-borne laser radar detection and acquisition system is designed based on the fully programmable heterogeneous chip ZYNQ that integrates FPGA and ARM. The hardware part is implemented in the FPGA, mainly completing the functions of laser synchronous trigger timing control, photon pulse counting, FIFO data cache and cumulative averaging. Among them, the photon pulse counting function is implemented inside the FPGA. The final distribution data of the number of photons over time is converted into an AXI4-Stream data stream and sent to the DDR3 SDRAM cache through the DMA controller. After the ARM reads the data and completes the preprocessing, it is written to the SSD solid-state storage through the FPGA. Based on the flexibility and strong control capability of ARM, the inversion and control are performed in the PS (Processing System, including the ARM Cortex-A9 dual-core processor) of the ZYNQ chip. The inversion algorithm is implemented based on the laser radar equation and the Fernald method, and the inverted data is synchronously stored in the SSD solid-state hard disk. Because it is all implemented on an embedded platform and does not need to be connected to an industrial computer, this method has the advantages of high stability, low power consumption, small size, and easy debugging. After optimized design, it can work stably in mobile environments such as airborne, satellite, and vehicle. Figure 1 shown.
[0021] Since the satellite-borne laser radar is limited by the output power of solar cells and cannot emit high-energy laser pulses, low-energy, high-repetition-rate lasers are the future development direction. In addition, the satellite is far away from the ground, and the echo signal received by the telescope is extremely weak. The PMT has poor shock resistance due to the existence of the internal vacuum tube. Therefore, the present invention adopts a fully solid-state, stable semiconductor Geiger mode avalanche photodiode to receive the echo light signal, but the APD has dead time and dark counts due to different manufacturing processes and working methods, which affects the detection efficiency and detection accuracy. The satellite-borne laser radar is far away from the ground, so the dark count requirements are very high. For this, an active and passive hybrid quenching circuit is adopted to reduce the dead time and increase the count rate. The bias monitoring and control circuit ensures that the APD is in a constant voltage working state. The temperature monitoring and TEC refrigeration circuit monitors the APD temperature, and makes it work in a -40°C constant temperature box through the TEC semiconductor refrigeration sheet, reducing the APD dark noise, thereby reducing the dark count value.
[0022] like Figure 2 As shown, active and passive mixed quenching circuit (reduce dead time and increase counting rate)
[0023] When the reverse bias working voltage is higher than the avalanche voltage, the avalanche photodiode enters the avalanche breakdown state once it detects a photon, and outputs a weak pulse signal at this time, which enters the subsequent pulse amplifier for amplification. The avalanche photodiode can only continue to detect the next photon signal when it exits the avalanche state. The waiting time between two detections is the dead time. The shorter the dead time, the greater the maximum count rate of the single-photon detector. Since the APD cannot actively exit the avalanche state, an external quenching circuit is required, and the quenching circuit is generally divided into passive quenching and active quenching. Passive quenching simply connects a resistor in series with the APD, and restores the APD reverse bias value to below the avalanche voltage value through the resistor shunt, so that the APD exits the avalanche breakdown state, but this method is slow, resulting in a long dead time, which in turn limits the maximum count rate of the single-photon detector. Active quenching detects the output of the APD in real time through an external circuit, and sets the APD reverse bias voltage according to the output state. The active and passive quenching circuit combines the advantages of active and passive quenching circuits and is divided into three steps: S1, detecting the output of the pulse amplifier; S2, once detected, making the reverse bias of the avalanche photodiode lower than the avalanche breakdown voltage to complete quenching. This function is implemented by the monostable trigger circuit in the figure, and the pulse width is 10ns; S3, after a certain delay, making the APD reverse bias voltage higher than the avalanche voltage again. At this time, the detector is in the ready state, waiting for the arrival of the next photon.
[0024] 2. Bias monitoring and control; (adjusting gain by adjusting bias)
[0025] The gain of the avalanche photodiode working in Geiger mode depends on the value of the applied reverse bias voltage. The greater the bias voltage, the greater the gain, and vice versa. Under normal working conditions, the controller makes it work under a reverse bias voltage of 225V, and the bias monitoring circuit monitors the voltage at both ends in real time. Due to the different number of photons received by the telescope in day / night, bright / dark environments, etc. When the photon signal cannot be detected, the controller adjusts the bias voltage according to the photon counting output value to maximize the signal-to-noise ratio.
[0026] 3. Temperature monitoring and TE cooling; (reduce dark noise)
[0027] Due to the influence of noise, the avalanche photodiode will also output a small number of counts when there is no light incident. The count value at this time is called the dark count. The dark count value is inversely proportional to the device temperature, that is, the higher the temperature, the larger the dark count. Therefore, a Peltier semiconductor refrigerator is used to cool the diode to minus 40°C, and a power drive circuit is designed to drive it. At the same time, a temperature sensor is used to monitor the APD temperature value. The refrigerator is driven based on the proportional-integral-differential algorithm (PID) to keep the diode in a constant temperature state and keep the dark count value at an extremely low level.
[0028] like Figure 4As shown in the figure, the system consists of three channels, namely 532nm vertical channel, 532nm horizontal channel and 1064nm channel. All three channels use APD for detection, which converts the incident single photon signal into a weak narrow pulse. The signal is converted into a standard LVTTL pulse signal with an amplitude of 3.3V and a pulse width of 10ns by the signal conditioning circuit and sent to the counting system for counting and stored in the FIFO memory buffer of the corresponding channel.
[0029] The PS part of ZYNQ integrates a dual-core ARM Cortex-A9 processor, one of which acts as the control center of the system. First, the internal modules are initialized, including the DMA controller, CAN bus controller, GPIO, and photon counting module (as an IP module in the FPGA, the register parameters are configured by the PS). After the initialization is completed, the system starts self-checking, such as whether the laser energy and wavelength are normal. If abnormal, the abnormal state is sent to the satellite platform through the CAN bus. After the self-check is completed, the control system sets the reverse bias voltage of the avalanche photodiode. In order to ensure that the gain of the acquisition system detection does not change with time and to ensure consistency within the entire atmospheric detection distance range, the detector needs to work under constant pressure and constant temperature conditions. The detector bias and temperature values can be obtained through the feedback loop, and dynamic adjustments are made by increasing or decreasing parameters. The temperature control adopts the PID control algorithm and drives the TEC cooler in PWM mode to keep the detector in a constant temperature box. The reverse bias voltage control is achieved by a digital potentiometer. When everything is ready, the controller enters the photon pulse collection state. The photon arrival time values collected by the FPGA are accumulated in the photon counting module and converted into an AXI4-Stream data stream, which is stored in the DDR3 SDRAM cache in real time through the DMA controller in the ARM.
[0030] like Figure 5-7 As shown, the other ARM core is mainly used to realize data inversion and storage functions. Once the counting data stored by PL is received, it immediately enters the DMA interrupt service program, sets the flag bit to notify the CPU to perform inversion operation, and stores the inversion result in the non-volatile memory SSD, waiting for the satellite command to read.
[0031] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.
Claims
1. A software and hardware collaborative design method for a spaceborne photon counting laser radar detection and acquisition system, characterized in that: The system is designed based on ZYNQ, a fully programmable heterogeneous chip integrating FPGA and ARM. The hardware part is implemented in FPGA, mainly completing functions such as laser synchronous trigger timing control, photon pulse counting, FIFO data cache and cumulative averaging. The photon pulse counting function is implemented inside the FPGA. The final distribution data of the number of photons over time is converted into an AXI4-Stream data stream and sent to the DDR3 SDRAM cache through the DMA controller. After ARM reads the data and completes preprocessing, it is written to the SSD solid-state storage through FPGA. The system includes an active-passive hybrid quenching circuit, including the following steps: S1, detecting the output of the pulse amplifier; S2, once detected, making the reverse bias of the avalanche photodiode lower than the avalanche breakdown voltage to complete quenching, this function is realized by the monostable trigger circuit in the figure, and the pulse width is 10ns; S3, after a certain delay, making the APD reverse bias voltage higher than the avalanche voltage again, at this time the detector is in a ready state, waiting for the arrival of the next photon; The system consists of three channels, namely 532nm vertical channel, 532nm horizontal channel and 1064nm channel. All three channels use APD for detection. APD converts the incident single photon signal into a weak narrow pulse. The signal is converted into a standard LVTTL pulse signal with an amplitude of 3.3V and a pulse width of 10ns by the signal conditioning circuit and sent to the counting system for counting and stored in the FIFO memory cache of the corresponding channel. The PS part of ZYNQ integrates a dual-core ARM Cortex-A9 processor, one of which acts as the control center of the system. It first initializes the internal modules, including the DMA controller, CAN bus controller, GPIO, and photon counting module. After the initialization is completed, the system starts self-checking, such as whether the laser energy and wavelength are normal. If abnormal, the abnormal status is sent to the satellite platform through the CAN bus; After the self-test is completed, the control system sets the reverse bias voltage of the avalanche photodiode. In order to ensure that the gain of the acquisition system detection does not change with time and to ensure consistency within the entire atmospheric detection distance range, the detector needs to work under constant voltage and constant temperature conditions. The detector bias and temperature values can be obtained through the feedback loop, and dynamic adjustments are made by increasing or decreasing parameters. The temperature control adopts the PID control algorithm and drives the TEC cooler in the PWM mode to keep the detector in a constant temperature box; the reverse bias voltage control is achieved by a digital potentiometer; when everything is ready, the controller enters the photon pulse acquisition state, and the photon arrival time values collected by the FPGA are accumulated in the photon counting module and converted into the AXI4-Stream data stream, which is stored in the DDR3 SDRAM cache in real time through the DMA controller in the ARM.
2. The method for co-designing software and hardware of a spaceborne photon counting laser radar detection and acquisition system according to claim 1, characterized in that: The system uses a fully solid-state, high-stability semiconductor Geiger-mode avalanche photodiode to receive the echo optical signal.
3. The method for co-designing software and hardware of a spaceborne photon counting laser radar detection and acquisition system according to claim 1, characterized in that: It also includes bias voltage monitoring and control circuits and temperature monitoring and TE cooling circuits.
4. The method for co-designing software and hardware of a spaceborne photon counting laser radar detection and acquisition system according to claim 1, characterized in that: The other ARM core is mainly used to implement data inversion and storage functions. Once the counting data stored by PL is received, it immediately enters the DMA interrupt service program, sets the flag to notify the CPU to perform inversion operations, and stores the inversion results in the SSD, waiting for satellite instructions to read.