A data exchange method, device and storage medium

Abstract

The application provides a data exchange method and device and a storage medium, and relates to the technical field of communication. The method comprises the following steps: receiving first object data; serially cross-writing the first object data in a primary memory according to a preset order of first objects, wherein the primary memory is shared by at least two first objects; if the data amount of the written first object data meets a preset data amount, cross-reading the first object data corresponding to a second object from the primary memory according to a preset order of the second object; and writing the first object data in a secondary memory according to the data format of the second object, wherein the secondary memory is shared by at least two second objects; wherein the first object is a cell, and the second object is an optical port, or the first object is an optical port, and the second object is a cell. The application can improve the data exchange efficiency and reduce the storage resource occupation amount.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of communication, in particular to a data exchange method and device and storage medium. BACKGROUND

[0002] In the process of data transmission, for the BBU(Building Base band Unit, baseband processing unit) device transmitting time domain data, data exchange between multi-carrier antenna data and fiber data, that is, CA(Carry Antenna, carrier antenna) exchange, is often needed. The CA exchange on the BBU side can be divided into uplink CA exchange and downlink CA exchange. For the uplink CA exchange, the fiber data of the optical port needs to be transmitted to the cell corresponding to the multi-carrier antenna through data exchange, and the cell needs to cache the data according to the data format of the multi-carrier antenna; for the downlink CA exchange, the cell data of the multi-carrier antenna needs to be transmitted to the optical port through data exchange, and the optical port needs to cache the data according to the data format of the fiber.

[0003] In the prior art, the optical port and the cell both use single-port RAM(Random Access Memory, random memory) for data caching. When data exchange is performed, the data exchange can only be performed on a single cell or a single optical port at a time, the data exchange efficiency is low, and a separate RAM needs to be allocated for each cell and each optical port, resulting in a large storage resource occupation. SUMMARY

[0004] The present application provides a data exchange method, device and storage medium to solve the problem of low data exchange efficiency and large storage resource occupation in the prior art.

[0005] According to a first aspect of the present application, a data exchange method is provided, applied to a baseband processing unit, and the method comprises:

[0006] receiving first object data;

[0007] serially cross-writing the first object data in a primary memory according to a preset order of the first object, the primary memory being shared by at least two first objects;

[0008] if the data amount of the written first object data meets a preset data amount, cross-reading the first object data corresponding to a second object from the primary memory according to a preset order of the second object;

[0009] writing the first object data in a secondary memory according to a data format of the second object, the secondary memory being shared by at least two second objects;

[0010] The first object is a cell, and the second object is an optical port, or the first object is an optical port, and the second object is a cell.

[0011] According to a second aspect of the present application, there is provided an apparatus comprising a memory, a transceiver, and a processor, wherein the memory is configured to store a computer program; the transceiver is configured to transceive data under control of the processor; and the processor is configured to read the computer program in the memory and perform the following operations:

[0012] receiving first object data;

[0013] serially and crossly writing the first object data in a primary memory according to a preset order of the first object, the primary memory being shared by at least two first objects;

[0014] if a data amount of the written first object data meets a preset data amount, crossly reading first object data corresponding to a second object from the primary memory according to a preset order of the second object;

[0015] writing the first object data in a secondary memory according to a data format of the second object, the secondary memory being shared by at least two second objects;

[0016] The first object is a cell, and the second object is an optical port, or the first object is an optical port, and the second object is a cell.

[0017] According to a third aspect of the present application, there is provided a data exchange apparatus applied to a baseband processing unit, the apparatus comprising:

[0018] a data receiving module configured to receive first object data;

[0019] a data writing module configured to serially and crossly write the first object data in a primary memory according to a preset order of the first object, the primary memory being shared by at least two first objects;

[0020] a data reading module configured to, if a data amount of the written first object data meets a preset data amount, crossly read first object data corresponding to a second object from the primary memory according to a preset order of the second object;

[0021] a data transferring module configured to write the first object data in a secondary memory according to a data format of the second object, the secondary memory being shared by at least two second objects;

[0022] The first object is a cell, and the second object is an optical port, or the first object is an optical port, and the second object is a cell.

[0023] According to a fourth aspect of the present application, a processor-readable storage medium is provided, which stores a computer program for causing a processor to execute the method described above.

[0024] The present application provides a data exchange method and device and storage medium, the method comprising: receiving first object data; serially cross-writing the first object data in a primary memory according to a preset order of the first object, the primary memory being shared by at least two first objects; if the amount of the written first object data meets a preset data amount, cross-reading the first object data corresponding to a second object from the primary memory according to a preset order of the second object; and writing the first object data in a secondary memory according to a data format of the second object, the secondary memory being shared by at least two second objects; wherein the first object is a cell, and the second object is an optical port, or the first object is an optical port, and the second object is a cell.

[0025] The present application can use two-level memories when performing data exchange in a baseband processing unit, share one primary memory by multiple first objects and one secondary memory by multiple second objects, then write first object data based on the primary memory, and when the written data meets a preset data amount, read the primary memory to transfer the first object data to the secondary memory according to the data format of the second object, thereby realizing data exchange for multiple first objects and multiple second objects at the same time, improving data exchange efficiency, and reducing storage resource occupation compared with the prior art of allocating a memory for each cell and each optical port, thereby improving storage resource utilization.

[0026] The above description is only a summary of the technical scheme of the present application, in order to more clearly understand the technical means of the present application, the content of the specification can be implemented, and in order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the following will describe the specific embodiments of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0027] In order to more clearly illustrate the technical scheme of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the description of the embodiments of the present application. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0028] Figure 1 is a specific step flow chart of a data exchange method provided by the embodiments of the present application;

[0029] Figure 2is a structural block diagram of a data exchange system provided by an embodiment of the present application;

[0030] Figure 3 is a downlink data exchange schematic diagram in a BBU device provided by an embodiment of the present application;

[0031] Figure 4 is an uplink data exchange schematic diagram in a BBU device provided by an embodiment of the present application;

[0032] Figure 5 is a structural diagram of an apparatus provided by the third embodiment of the present application;

[0033] Figure 6 is a structural diagram of a data exchange apparatus provided by the fourth embodiment of the present application. DETAILED DESCRIPTION

[0034] In the embodiments of the present application, the term "and / or" describes the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B can represent the three cases of A existing alone, A and B existing simultaneously, and B existing alone. The character " / " generally represents an "or" relationship between the associated objects before and after it.

[0035] In the embodiments of the present application, the term "a plurality of" means two or more, and other quantifiers are similar.

[0036] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor fall within the scope of protection of the present application.

[0037] Embodiment One

[0038] Reference Figure 1 which shows the specific step flowchart of a data exchange method provided by the first embodiment of the present application.

[0039] Step 101, receiving first object data;

[0040] Step 102, serially cross-writing the first object data in a primary memory according to a preset order of the first object, the primary memory being shared by at least two first objects;

[0041] Step 103, if the data amount of the written first object data meets a preset data amount, cross-reading the first object data corresponding to a second object from the primary memory according to a preset order of the second object;

[0042] In step 104, the first object data is written in a secondary memory according to a data format of the second object, and the secondary memory is shared by at least two second objects;

[0043] The first object is a cell, and the second object is an optical port, or the first object is an optical port, and the second object is a cell.

[0044] The data exchange method provided by the embodiment of the present application can be applied to a BBU (Building Base band Unit, baseband processing unit) device. The embodiment of the present application can improve the data exchange efficiency between an optical port and a cell and reduce the storage resource occupation.

[0045] In the embodiment of the present application, the first object data is exchanged data, the primary memory is a memory for writing the first object data, and the primary memory can be shared by multiple first objects. The secondary memory is used for writing the first object data which is stored, and the data format of the first object data written in the secondary memory conforms to the data format of the second object data. Similarly, the secondary memory can be shared by multiple second objects. In actual application, the storage space of the memory is limited, the more the number of shared objects is, the smaller the storage space allocated to each object is, and then, for a single object, the exchanged data amount is less when the data exchange is performed once. Therefore, in the case of improving the overall data exchange efficiency, the number of shared objects of the memory should be appropriate in consideration of the data exchange efficiency of a single object. The number of first objects sharing the primary memory and the number of second objects sharing the secondary memory can be determined according to the exchanged data amount, available storage resource information and other factors, and the embodiment of the present application does not make a specific limitation.

[0046] If the first object is a cell and the second object is an optical port, the cell data, that is, the first object data, can be stored in the secondary memory corresponding to the optical port according to the data format of the second object data, that is, the data format of the optical port data, by using the data exchange method provided by the embodiment of the present application, so as to realize the downlink data exchange in the BBU device. If the first object is an optical port and the second object is a cell, the optical port data, that is, the first object data, can be stored in the secondary memory corresponding to the cell according to the data format of the second object data, that is, the data format of the cell data, by using the data exchange method provided by the embodiment of the present application, so as to realize the uplink data exchange in the BBU device.

[0047] Taking that four first objects share one primary memory and four second objects share one secondary memory as an example, a structure block diagram of a data exchange system provided by the embodiment of the present application is shown in Figure 2 Figure 2 ​The data exchange method provided by the embodiment of the application is described in detail.

[0048] When the BBU device needs to exchange the first object data into the secondary storage corresponding to the second object, so that the second object performs data processing based on the first object data, the first object data is received from the first object, and the first object data is cross-written in the primary storage according to the preset order of the first object. As shown in Figure 2 , assuming that the first objects M0 to M3 share one primary storage, when the first object data is cross-written in the primary storage according to the order of M0 to M1, the first object data of the first object M0 can be written first, and then the first object data of the first object M1 is written, and so on, until the first object data of the first object M3 is written, and one round of data writing is completed. When the next round of first object data is written, the first object data is sequentially written according to the order of M0 to M3. Such cross-circulation continues until all the first object data corresponding to M0 to M3 is written into the primary storage.

[0049] When the first object data is written, the maximum writing data amount of each first object during each round of data writing can be determined according to the size of the primary storage and the number of the first objects, and the first object data is cross-written in the primary storage according to the preset order of the first object and the maximum writing data amount. Taking the first objects M0 to M3 in Figure 2 , for example, assuming that the maximum writing data amount of each first object during each round of data writing is m bit, in the first round of data writing, m bit of data of the first object M0 is written first, and then m bit of data of the first object M1 is written, and so on, when m bit of data of the first object M3 is written, one round of data writing is completed, and the next round of data writing is started, until all the first object data is written into the primary storage. If the remaining data amount of a certain first object is less than the maximum writing data amount during a certain round of data writing, data writing is performed according to the remaining data amount of the first object. The difference between the maximum writing data amount and the remaining data amount of the first object can be used as available data amount, which is allocated to other first objects, or the maximum writing data amount can be continued to be used to perform data writing operation on other first objects. If the remaining data amount of a certain first object is zero during a certain round of data writing, the first object data of the next first object is written according to the preset order of the first object.

[0050] When the data amount of the written first object data meets the preset data amount, data exchange is performed, and the first object data corresponding to the second object is cross-read from the primary memory according to the preset order of the second object. In the embodiment of the present application, there is a corresponding relationship between the first object and the second object, and each first object needs to exchange data into the corresponding second object, so that the second object can perform subsequent data processing operations according to the required first object data. Therefore, in the embodiment of the present application, when the first object data is read, the corresponding first object data is cross-read according to the preset order of the second object, and the read first object data is written into the secondary memory, so that the second object data in the secondary memory is stored in order, and the corresponding first object data can be obtained from the secondary memory for subsequent data processing operations.

[0051] In the embodiment of the present application, the first object data is read according to the preset order of the second object, and the read first object data is written into the secondary memory, so that the second object data in the secondary memory is stored in order, and the corresponding first object data can be obtained from the secondary memory for subsequent data processing operations. Figure 2 As shown in the second object N0 to N3, it is assumed that the second object N0 corresponds to the first object M0, the second object N1 corresponds to the first object M1, the second object N2 corresponds to the first object M2, and the second object N3 corresponds to the first object M3. According to the preset order of the second object, in the first round of data reading process, the first object data of M0 to M3 is read from the primary memory in turn, and when the data amount of the newly written first object data in the secondary memory meets the preset data amount, the first object data is continuously read from the primary memory according to the order of M0 to M3. In turn, until all the first object data in the primary memory is read.

[0052] When the first object data is read from the primary memory, the read first object data is written into the secondary memory in real time according to the data format of the second object data, so that the second object can perform data processing operations according to the first object data in the secondary memory.

[0053] In an optional embodiment of the present application, the primary memory includes a first port and a second port, and the step 102 of writing the first object data into the primary memory in series according to the preset order of the first object includes:

[0054] In step S11, the first object is divided into two object groups to obtain a first object group and a second object group, and the number of objects in the first object group is the same as the number of objects in the second object group.

[0055] In step S12, a first preset order of the first object group and a second preset order of the second object group are determined respectively.

[0056] In step S13, the first object data of each first object in the first object group is written into the first port of the primary memory according to the first preset order.

[0057] Step S14: writing the first object data of each first object in the second object group into the second port of the primary memory according to the second preset order.

[0058] The primary and secondary memories in the embodiments of the present invention can be either single-port or dual-port memories. Because dual-port memories have much larger storage space than single-port memories, dual-port memories are often used to improve data exchange efficiency. Dual-port memories allow data to be written and / or read simultaneously through both ports. Currently, mainstream dual-port memories include URAM (Ultra Random Access Memory) and BRAM (Block Random Access Memory). URAM has a capacity of 288Kb, a block depth of 4096K, and a bit width of 72 bits; BRAM has a capacity of 36Kb, a block depth of 1024K, and a bit width of 36 bits. During data exchange, data is typically stored by bit width, i.e., by bit. When storing data of the same bit width, a larger number of BRAMs are obviously required. Therefore, in practical applications, URAM can be used as the primary and / or secondary memories in the embodiments of the present invention to further conserve storage resources.

[0059] In an embodiment of the present invention, when a primary memory has two ports: a first port and a second port, the first objects can be divided into two groups, and the data of the first objects in one group can be written to the first port, while the data of the first objects in the other group can be written to the second port. Specifically, the first objects are first evenly divided into two object groups, denoted as the first object group and the second object group. Then, a first preset order is determined for each first object in the first object group, and a second preset order is determined for each second object in the second object group. The first object data of the first object group is written to the first port according to the first preset order, and the first object data of the second object group is written to the second port according to the second preset order.

[0060] by Figure 2 For example, consider the first objects M0 to M3 in the example. Consider first objects M0 and M1 as the first object group, and first objects M2 and M3 as the second object group. The first object data of the first object group is denoted as Port_a, and the first object data of the second object group is denoted as Port_b. Port_a is written to the first port in the order of M0 and M1, and Port_b is written to the second port in the order of M2 and M3. This allows data from at least two first objects to be written simultaneously during each write cycle, improving data writing efficiency and, consequently, data exchange efficiency.

[0061] In an alternative embodiment of the present application, the primary memory comprises ping memory and pong memory, and the step of serially and crossly writing the first object data in the primary memory according to the preset order of the first object comprises:

[0062] Step S21, serially and crossly writing the first object data in the ping memory according to the preset order of the first object;

[0063] Step S22, determining a first data variation of the first object data in the ping memory;

[0064] Step S23, if the first data variation meets a preset data amount, serially and crossly writing the first object data in the pong memory according to the preset order of the first object;

[0065] Step S24, determining a second data variation of the first object data in the pong memory;

[0066] Step S25, if the second data variation meets the preset data amount, continuing to serially and crossly write the first object data in the ping memory according to the preset order of the first object until all the received first object data is written into the memory.

[0067] When writing the first object data into the primary memory, if multiple rounds of writing operations are performed, the newly written data is likely to cover the previously written data, resulting in reading errors in subsequent data reading. In order to avoid this situation, the ping-pong memory can be used as the primary memory. Specifically, the first object data is first crossly written in the ping memory according to the preset order of the first object, and a first data variation of the first object data is calculated in real time, i.e. the data amount of the newly written first object data compared with the last round of data writing operation. If the first data variation meets a preset data amount, the first object data is continued to be crossly written in the pong memory according to the preset order of the first object, and a second data variation of the first object data in the pong memory is determined in real time. If the second data variation meets the preset data amount, the first object data is re-written in the ping memory. This cycle is repeated until all the first object data is written into the memory.

[0068] It should be noted that the preset data amount in the embodiment of the present application can be determined according to the actual storage space of the ping-pong memory and the data amount of the first object data to be written, which is not limited in the embodiment of the present application.

[0069] When the preset data amount of the first data is written in the ping memory, the first object data is written into the pong memory at the same time, and the first object data already written in the ping memory can be read, thereby improving the data exchange efficiency.

[0070] In an optional embodiment of the present application, the step 103 of cross-reading the first object data corresponding to the second objects from the primary storage according to the preset order of the second objects comprises:

[0071] The step S31 divides the second objects into two object groups, i.e., a third object group and a fourth object group, and the third object group has the same number of objects as the fourth object group.

[0072] The step S32 determines a third preset order of the third object group and a fourth preset order of the fourth object group, respectively.

[0073] The step S33 cross-reads the first object data corresponding to each second object in the third object group from the primary storage according to the third preset order.

[0074] The step S34 cross-reads the first object data corresponding to each second object in the fourth object group from the primary storage according to the fourth preset order.

[0075] In the embodiment of the present application, the dual-port memory can also be used as the secondary storage. Since there is a corresponding relationship between the first objects and the second objects in the embodiment of the present application, each first object needs to exchange data to the corresponding second object, so that the second object can perform subsequent data processing operations according to the required first object data. Therefore, when reading the first object data, the corresponding first object data also needs to be cross-read according to the preset order of the second objects, and the read first object data is written into the secondary storage, so that the second object data in the secondary storage is stored in order, which facilitates the second object to obtain the corresponding first object data from the secondary storage for subsequent data processing operations.

[0076] For the dual-port memory, the data reading operation can be performed from two ports at the same time. Specifically, each second object is divided into two object groups, i.e., a third object group and a fourth object group, and a third preset order of each second object in the third object group and a fourth preset order of each second object in the fourth object group are determined, respectively. Then, the first object data corresponding to each second object in the third object group is cross-read from the primary storage according to the third preset order, and the first object data corresponding to each second object in the fourth object group is cross-read from the primary storage according to the fourth preset order.

[0077] In the embodiment of the present application, the dual-port memory can also be used as the secondary storage. Since there is a corresponding relationship between the first objects and the second objects in the embodiment of the present application, each first object needs to exchange data to the corresponding second object, so that the second object can perform subsequent data processing operations according to the required first object data. Therefore, when reading the first object data, the corresponding first object data also needs to be cross-read according to the preset order of the second objects, and the read first object data is written into the secondary storage, so that the second object data in the secondary storage is stored in order, which facilitates the second object to obtain the corresponding first object data from the secondary storage for subsequent data processing operations. Figure 2As shown in the second objects N0 to N3, it is assumed that the second object N0 corresponds to the first object M0, the second object N1 corresponds to the first object M1, the second object N2 corresponds to the first object M2, and the second object N3 corresponds to the first object M3. The second objects N0 and N1 are divided into a third object group, and the second objects N2 and N3 are divided into a fourth object group. Then, in each round of data reading process, the first object data of M0 to M1 is read from the primary memory, and the first object data of M2 and M3 is synchronously read. In actual application, the reading operation of the first object data can be controlled by a reading controller. For example, Figure 2 As shown in the figure, the reading operation of the first object data corresponding to the second objects N0 and N1 is controlled by the reading controller 0, and the reading operation of the first object data corresponding to the second objects N2 and N3 is controlled by the reading controller 1. The enable signals sfp0-1 and sfp2-3 are input to the reading controller 0 and the reading controller 1 respectively. When the input enable signals are sfp0 and sfp2, the reading controller 0 reads the first object data corresponding to the second object N0 from the primary memory, that is, the data of the first object M0; and the reading controller 1 reads the first object data corresponding to the second object N2 from the primary memory, that is, the data of the first object M2. When the input enable signals are sfp1 and sfp3, the reading controller 0 reads the first object data corresponding to the second object N1 from the primary memory, that is, the data of the first object M1; and the reading controller 1 reads the first object data corresponding to the second object N3 from the primary memory, that is, the data of the first object M3. In this way, the first object data corresponding to two second object groups can be synchronously and crossly read, and the data exchange efficiency is improved.

[0078] In an optional embodiment of the present application, if the data amount of the written first object data meets the preset data amount, before crossly reading the first object data corresponding to the second objects from the primary memory according to the preset order of the second objects, the method further comprises:

[0079] In step S41, the correspondence between the first objects and the second objects is configured.

[0080] In step 103, if the data amount of the written first object data meets the preset data amount, the first object data corresponding to the second objects is crossly read from the primary memory according to the preset order of the second objects, which comprises:

[0081] In step S42, if the data amount of the written first object data meets the preset data amount, the first object data corresponding to the second objects is crossly read from the primary memory according to the preset order of the second objects according to the correspondence.

[0082] In the embodiment of the present application, before reading the first object data from the primary memory, the correspondence between the first object and the second object can be configured first, and then the first object data corresponding to the second object is read from the primary memory according to the correspondence between the first object and the second object and the preset order of the second object. The correspondence between the first object and the second object can be determined according to actual data exchange needs, so as to meet different data exchange needs.

[0083] As an example, referring to Figure 3 , a schematic diagram of downlink data exchange in a BBU device is shown. In the example of Figure 3 , the first object is a cell, and the second object is an optical port. As shown in Figure 3 , 16 cells (cell 0 to cell 15) share one primary memory, and 4 optical ports (optical port 0 to optical port 3) share one secondary memory. Assuming that the preset order of the cells is cell 0 to cell 15, and the preset order of the optical ports is optical port 0 to optical port 3. In order to realize downlink data exchange between the cells and the optical ports, the following steps are needed by using the data exchange method provided by the embodiment of the present application:

[0084] T1, receiving cell data. Specifically, the BBU device can receive cell data through a multi-carrier antenna.

[0085] T2, cross-writing cell data in the primary memory according to the preset order of the cells, that is, according to the order of cell 0 to cell 15. Specifically, the cross-writing of the cell data can be controlled by a periodic digital control signal. For example, when the output of the digital control signal is R0, the cell data of cell 0 is written in the primary memory; when the output of the digital control signal is R1, the cell data of cell 1 is written in the primary memory, and so on. When the output of the digital control signal is R15, the cell data of cell 15 is written in the primary memory, and one round of cell data writing operation is completed. The digital control signal starts the signal output of the next period, and the BBU device starts the next round of cell data writing operation according to the preset order of cell 0 to cell 15.

[0086] In addition, when a dual-port memory is used as the primary memory, the cell data can be written in the primary memory synchronously through two ports. Specifically, the two ports of the primary memory are denoted as port A and port B, as shown in Figure 3 , the cells 0 to 15 can be divided into two cell groups. Among them, the cells 0 to 7 are the first cell group, and the cells 8 to 15 are the second cell group. The cell data Port_a of the first cell group is cross-written into the port A, and the cell data Port_b of the second cell group is cross-written into the port B.

[0087] It should be noted that, Figure 3 In the downlink data exchange schematic diagram shown, data exchange is performed according to 3 chips as a basic unit. One chip contains 90*64bit data, 30bit is a CA bit, 3 chips contain 270*64bit data, that is, 576 CA bits. That is, 3 chips, that is, 270*64bit cell data are stored into the corresponding secondary memory of the optical port by one data exchange.

[0088] In the embodiment of the application, cell data is cross-written in the primary memory according to the preset order of the cells. In the specific writing process, the corresponding writing data amount can be allocated for each round of writing operation, and the maximum writing data amount of each cell in each round of writing operation can be further determined according to the corresponding writing data amount of each round of writing operation and the number of cells. For example, Figure 3 As shown, the corresponding writing data amount of each round of writing operation is determined to be 120bit, that is, 4 CA bits. After each round of data writing operation, 120bit cell data is written by port A and port B of the primary memory. If the maximum writing data amount of each cell in each round of writing operation is allocated according to the number of cells, the maximum writing data amount of cell 0 to cell 15 is 15bit. Therefore, when cross-writing cell data, 15bit cell data of cell 0 is written first, then 15bit cell data of cell 1 is written, and so on, until 15bit cell data of cell 15 is written, and one round of data writing operation is completed.

[0089] If the remaining data amount of a cell is less than the maximum writing data amount in a round of data writing process, data writing is performed according to the remaining data amount of the cell. The difference between the maximum writing data amount and the remaining data amount of the cell can be used as the available data amount, which is allocated to other cells, or the data writing operation can be continued to other cells according to the maximum writing data amount. If the remaining data amount of a cell is zero in a round of data writing process, cell data of the next cell is written according to the preset order of the cells.

[0090] In addition, when writing cell data, the ping-pong storage mode can also be used to store cell data by using two primary memories. One of the primary memories is called ping memory, and the other primary memory is called pong memory. As mentioned above, in the downlink data exchange process, the primary memory is used to store cell data, and the secondary memory is used to store the corresponding CA data. Therefore, when the ping memory is used to store cell data, the pong memory is used to store the corresponding CA data. Figure 3In the downlink data exchange diagram shown, data is exchanged in units of three chips. Therefore, when using ping-pong memory, three chips of cell data are first written to the ping memory in the preset order of cells 0 to 15. Then, the cell data is written to the pong memory in the preset order of cells 0 to 15, and the cell data already written to the ping memory is simultaneously read. When the three chips of cell data are written to the pong memory, the cell data is rewritten to the ping memory, and the cell data already written to the pong memory is simultaneously read. This cycle repeats until all cell data is written.

[0091] The ping-pong memory may be a single-port memory or a dual-port memory, which is not specifically limited in the embodiment of the present invention.

[0092] T3. If the amount of cell data written into the primary memory meets the preset amount, the cell data corresponding to each optical port is read from the primary memory in an interleaved manner according to the preset order of the optical ports. Figure 3 In the downlink data exchange diagram shown, data exchange is performed based on three chips as the basic unit, meaning the preset data volume is three chips (270*64 bits). Therefore, when the cell data written to the primary memory is three chips, the cell data corresponding to each optical port can be read from the primary memory in an interleaved manner according to the preset order of the optical ports, and data exchange can begin.

[0093] like Figure 3 As shown, it is assumed that optical port 0 corresponds to cells 0 to 3, optical port 1 corresponds to cells 4 to 7, optical port 2 corresponds to cells 8 to 11, and optical port 3 corresponds to cells 12 to 15. When reading the cell data corresponding to each optical port, the data reading operation can be controlled by the read controller. Specifically, the read controller 0 can be used to control the read operation of the cell data corresponding to optical port 0 and optical port 1, and the read controller 1 can be used to control the read operation of the cell data corresponding to optical port 2 and optical port 3. Enable signals sfp0-1 and sfp2-3 are input to read controller 0 and read controller 1 respectively. When the input enable signals are sfp0 and sfp2, read controller 0 reads the cell data corresponding to optical port 0 from the primary memory, that is, the data of cells 0 to 3; read controller 1 reads the cell data corresponding to optical port 2 from the primary memory, that is, the data of cells 8 to 11. When the input enable signals are sfp1 and sfp3, read controller 0 reads the cell data corresponding to optical port 1, that is, the data of cells 4 to 7, from the primary memory; read controller 1 reads the cell data corresponding to optical port 3, that is, the data of cells 12 to 15, from the primary memory. In this way, the cell data corresponding to the two cell groups can be read synchronously and cross-wise, improving data exchange efficiency.

[0094] T4, write the cell data in the secondary memory according to the data format of each optical port. Specifically, according to the preset order of optical port 0 to optical port 3, first read the cell data of cell 0 to cell 3 from the primary memory, and convert the read cell data into the secondary memory according to the data format of the optical port data; then, read the cell data of cell 4 to cell 7 from the primary memory, and convert it into the secondary memory according to the data format of the optical port data, and so on, until the cell data corresponding to optical port 3 is converted into the secondary memory, and a round of data exchange is completed.

[0095] Similarly, the secondary memory can also use a dual-port memory. Assuming that the two ports of the secondary memory are port C and port D, as shown in Figure 3 , the cell data corresponding to optical port 0 and optical port 1, i.e., cell data Port_a of cell 0 to cell 7, is converted in port C; the cell data corresponding to optical port 2 and optical port 3, i.e., cell data Port_b of cell 8 to cell 15, is converted in port D.

[0096] And before converting the cell data into the secondary memory, the storage space of the secondary memory can be allocated to optical port 0 to optical port 3 in advance, so that each optical port corresponds to a write address. After reading the cell data corresponding to the optical port, the read cell data is stored in the write address corresponding to the optical port in the secondary memory, which facilitates each optical port to directly obtain the corresponding cell data from the respective write address for subsequent data processing operations.

[0097] Through the above steps T1 to T4, the downlink data exchange between the cell and the optical port can be realized.

[0098] As another example, referring to Figure 4 , an uplink data exchange schematic diagram in a BBU device is shown. In Figure 4 the example shown, the first object is the optical port, and the second object is the cell. As shown in Figure 4 , 4 optical ports (optical port 0 to optical port 3) share one primary memory, and 16 cells (cell 0 to cell 15) share one secondary memory. Assuming that the preset order of the optical port is optical port 0 to optical port 3, and the preset order of the cell is cell 0 to cell 15. Using the data exchange method provided by the embodiment of the application, the uplink data exchange between the cell and the optical port needs to go through the following steps:

[0099] P1, receive optical port data. Specifically, the BBU device can receive optical port data from the RRU (Remote Radio Unit) through an optical fiber.

[0100] P2, cross-write the optical port data in the primary memory according to the preset order of the optical ports, i.e., according to the order of optical port 0 to optical port 3. When a dual-port memory is used as the primary memory, the optical port data can be written synchronously in the two ports of the primary memory. Specifically, as shown in Figure 3 , the optical port 0 to optical port 3 can be divided into two optical port groups. Among them, the optical port 0 and the optical port 1 are the first optical port group, and the optical port 2 and the optical port 3 are the second optical port group. The optical port data Port_a of the first optical port group is cross-written in the port A, and the optical port data Port_b of the second optical port group is cross-written in the port B.

[0101] As shown in the downlink data exchange process of Figure 3 , when the uplink data exchange is performed, the amount of data written in each round of write operation is determined to be 120 bits, i.e., 4 CA bits. After each round of data write operation, the port A and the port B of the primary memory each write 120 bits of cell data. If the maximum write data amount of each optical port in each round of write operation is allocated according to the number of optical ports, the maximum write data amount of each optical port is 60 bits. The specific cross-write process can refer to the cross-write process of cell data in Figure 3 . The embodiments of the present application will not be further described here.

[0102] P3, if the amount of optical port data written in the primary memory meets the preset data amount, cross-read the optical port data corresponding to each cell from the primary memory according to the preset order of the cells. As shown in the downlink data exchange process of Figure 3 , in the uplink data exchange diagram as shown in Figure 4 , the data exchange is performed according to 3 chips as a basic unit, i.e., the preset data amount is 3 chips (270*64 bits). Therefore, when the optical port data written in the primary memory is 3 chips, the cross-reading of the optical port data corresponding to each cell from the primary memory according to the preset order of the cells can be started, and the data exchange can be started. The specific data reading process can refer to the data reading process of the downlink data exchange as shown in Figure 3 . The embodiments of the present application will not be further described here.

[0103] P4, write the optical port data in the secondary memory according to the data format of each cell. As shown in Figure 4As shown, a plurality of cells correspond to one optical port, and the correspondence between the optical port and the write address corresponding to each cell in the secondary storage can be pre-configured before the optical port data is transferred to the secondary storage. The corresponding optical port data is read according to the preset order of the cells, and the read optical port data is written into the corresponding cell write address in the secondary storage. Specifically, assuming that cell 0 to cell 3 correspond to optical port 0, cell 4 to cell 7 correspond to optical port 1, cell 8 to cell 11 correspond to optical port 2, and cell 12 to cell 15 correspond to optical port 3. According to the preset order of cell 0 to cell 15, the optical port data corresponding to cell 0, i.e. the data of optical port 0, is first read from the primary storage, and then the read data is stored in the write address of cell 0 in the secondary storage. Then, the optical port data corresponding to cell 1, i.e. the data of optical port 0, is read from the primary storage, and then the read data is stored in the write address of cell 1 in the secondary storage. In this way, the data of cell 15 corresponding to optical port 3 is written into the write address of cell 15 in the secondary storage, and one round of data transfer is completed. Through data exchange, each cell has transferred the corresponding optical port data in the secondary storage, so that the optical port data can be directly read from the corresponding write address in the subsequent data processing process, thereby improving the efficiency of reading data of each cell in the secondary storage.

[0104] Through the above steps P1 to P4, the uplink data exchange between the cells and the optical ports can be realized.

[0105] In summary, the embodiment of the present application can perform data exchange in the baseband processing unit, use two-level storage, use one primary storage for a plurality of first objects and use one secondary storage for a plurality of second objects, then write first object data based on the primary storage, and when the written data meets the preset data amount, transfer the first object data to the secondary storage according to the data format of the second object by reading the primary storage, thereby realizing simultaneous data exchange between the plurality of first objects and the plurality of second objects, improving the data exchange efficiency, and reducing the storage resource occupation compared to the prior art of allocating a memory for each cell and each optical port, thereby improving the storage resource utilization.

[0106] It should be noted that the technical solutions provided by the embodiments of the present application can be applied to various systems, especially 5G systems. For example, the applicable systems can be global system of mobile communication (GSM) systems, code division multiple access (CDMA) systems, wideband code division multiple access (WCDMA) general packet radio service (GPRS) systems, long term evolution (LTE) systems, LTE frequency division duplex (FDD) systems, LTE time division duplex (TDD) systems, long term evolution advanced (LTE-A) systems, universal mobile systems (UMTS), worldwide interoperability for microwave access (WiMAX) systems, 5G new radio (NR) systems, etc. Among these various systems, there are terminal devices and network devices. The system can also include a core network part, such as an evolved packet system (EPS), a 5G system (5GS), etc.

[0107] Embodiment two

[0108] Reference Figure 5 It shows the structure diagram of an apparatus provided by an embodiment three of the present application, specifically including:

[0109] The memory 300 is configured to store a computer program.

[0110] The transceiver 310 is configured to receive and send data under the control of the processor 320.

[0111] The processor 320 is configured to read the computer program in the memory 300 and perform the following operations:

[0112] A11, receiving first object data;

[0113] A12, according to the preset order of the first object, serially cross-write the first object data in the first-level memory, and the first-level memory is shared by at least two first objects.

[0114] A13, if the data amount of the first object data written satisfies a preset data amount, cross-reading first object data corresponding to the second object from the primary memory according to a preset order of the second object;

[0115] A14, writing the first object data into a secondary memory according to a data format of the second object, the secondary memory being shared by at least two second objects;

[0116] Wherein, the first object is a cell, and the second object is an optical port, or the first object is an optical port, and the second object is a cell.

[0117] Optionally, the primary memory comprises a first port and a second port, and A12 comprises:

[0118] dividing the first objects into two object groups to obtain a first object group and a second object group, the number of objects in the first object group being the same as the number of objects in the second object group;

[0119] determining a first preset order of the first object group and a second preset order of the second object group respectively;

[0120] writing first object data of each first object in the first object group into the first port of the primary memory according to the first preset order;

[0121] writing first object data of each first object in the second object group into the second port of the primary memory according to the second preset order.

[0122] Optionally, the primary memory comprises a ping memory and a pong memory, and A12 comprises:

[0123] writing first object data into the ping memory according to a preset order of the first object;

[0124] determining a first data variation amount of the first object data in the ping memory;

[0125] if the first data variation amount satisfies a preset data amount, writing first object data into the pong memory according to the preset order of the first object;

[0126] determining a second data variation amount of the first object data in the pong memory;

[0127] If the second data change amount satisfies the preset data amount, the first object data continues to be serially and cross-written in the ping memory according to the preset order of the first object until all the received first object data are written into the memory.

[0128] Optionally, the step A13 of cross-reading the first object data corresponding to the second object from the primary memory according to a preset order of the second object includes:

[0129] Dividing the second object into two object groups evenly to obtain a third object group and a fourth object group, wherein the object data of the third object group has the same number of objects as that of the fourth object group;

[0130] respectively determining a third preset order of the third object group and a fourth preset order of the fourth object group;

[0131] Cross-reading, from the primary memory, first object data corresponding to each second object in the third object group according to the third preset order;

[0132] According to the fourth preset order, the first object data corresponding to each second object in the fourth object group is cross-read from the primary memory.

[0133] Optionally, the processor is further configured to read the computer program in the memory and perform the following operations:

[0134] Configuring a correspondence between the first object and the second object;

[0135] If the amount of the written first object data satisfies the preset amount of data, cross-reading the first object data corresponding to the second object from the primary memory according to the preset order of the second object includes:

[0136] If the amount of the written first object data meets the preset data amount, the first object data corresponding to the second object is cross-read from the primary memory according to the preset order of the second object and the corresponding relationship.

[0137] Among them, Figure 5In particular embodiments, bus interface serves as an interface to bus architecture providing a communication framework for letting the various circuits of the implementation 300 communicate with each other as well as with other apparatuses. The bus interface provides an interface to system memory and / or memory shared by various circuits and the processor(s) 320. Transceiver 310 can be multiple components including a transmitter which may

[0138] Processor 320 can be a central processing unit (CPU), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic device, processor 320 can also be a multi-core processor.

[0139] It should be noted that the above-mentioned device provided by the embodiment of the present application can realize all the method steps realized by the above-mentioned method embodiment, and can achieve the same technical effects, and the same parts and beneficial effects of the method embodiment in this embodiment will not be described in detail.

[0140] Embodiment three

[0141] Reference Figure 6 It shows a structure diagram of a data exchange device provided by the fourth embodiment of the present application, and specifically includes:

[0142] The data receiving module 401 is configured to receive first object data.

[0143] The data writing module 402 is configured to serially cross-write the first object data in a primary memory according to a preset order of the first object, and the primary memory is shared by at least two first objects.

[0144] The data reading module 403 is configured to cross-read the first object data corresponding to a second object from the primary memory according to a preset order of the second object if the data amount of the written first object data meets a preset data amount.

[0145] The data storing module 404 is configured to write the first object data in a second memory according to a data format of the second object, and the second memory is shared by at least two second objects.

[0146] The first object is a cell, and the second object is an optical port, or the first object is an optical port, and the second object is a cell.

[0147] Optionally, the first memory comprises a first port and a second port, and the data writing module 402 comprises:

[0148] The first grouping sub-module is configured to divide the first objects into two object groups, to obtain a first object group and a second object group, and the number of objects in the first object group is the same as the number of objects in the second object group.

[0149] The first order determining sub-module is configured to determine a first preset order of the first object group and a second preset order of the second object group respectively.

[0150] The first data writing sub-module is configured to write the first object data of each first object in the first object group in the first port of the first memory according to the first preset order.

[0151] The second data writing sub-module is configured to write the first object data of each first object in the second object group in the second port of the first memory according to the second preset order.

[0152] Optionally, the first memory comprises a ping memory and a pong memory, and the data writing module 402 comprises:

[0153] The third data writing sub-module is configured to write the first object data in the ping memory in series and cross according to a preset order of the first object.

[0154] The first data change amount determining sub-module is configured to determine a first data change amount of the first object data in the ping memory.

[0155] The fourth data writing sub-module is configured to write the first object data in the pong memory in series and cross according to the preset order of the first object, if the first data change amount meets a preset data amount.

[0156] The second data change amount determining sub-module is configured to determine a second data change amount of the first object data in the pong memory.

[0157] The fifth data writing sub-module is configured to continue to write the first object data in the ping memory in series and cross according to the preset order of the first object, if the second data change amount meets the preset data amount, until all the received first object data is written in the memory.

[0158] Optionally, the data reading module 403 comprises:

[0159] a second grouping sub-module, configured to divide the second objects into two object groups evenly, to obtain a third object group and a fourth object group, the third object group having the same number of object data as the fourth object group;

[0160] a second sequence determining sub-module, configured to determine a third preset sequence of the third object group and a fourth preset sequence of the fourth object group respectively;

[0161] a first data reading sub-module, configured to read the first object data corresponding to each second object in the third object group from the primary memory in a cross manner according to the third preset sequence;

[0162] a second data reading sub-module, configured to read the first object data corresponding to each second object in the fourth object group from the primary memory in a cross manner according to the fourth preset sequence.

[0163] Optionally, the apparatus further comprises:

[0164] a relationship configuring module, configured to configure a corresponding relationship between the first objects and the second objects;

[0165] the data reading module 403 comprises:

[0166] a third data reading sub-module, configured to read the first object data corresponding to the second objects from the primary memory in a cross manner according to the corresponding relationship and a preset sequence of the second objects, if the amount of the written first object data meets a preset data amount.

[0167] It should be noted that the division of the modules and units in the embodiments of the present application is schematic, and is merely a logical function division. In actual implementation, another division manner can be adopted. In addition, each functional module and each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can be physically present independently, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0168] The integrated unit, if implemented in the form of a software function unit and sold or used as an independent product, can be stored in a processor-readable storage medium. Based on such an understanding, the technical solutions of the present application, essentially or in other words, the part that contributes to the prior art or the whole or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to perform all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0169] It should be noted that the above-mentioned device provided by the embodiments of the present application can realize all the method steps realized by the method embodiments and achieve the same technical effects. Therefore, the same parts and beneficial effects of the method embodiments will not be described in detail.

[0170] The embodiments of the present application further provide a processor-readable storage medium, which stores a computer program. The computer program is used for causing a processor to execute the above-mentioned method.

[0171] The processor-readable storage medium can be any available medium or data storage device that the processor can access, including but not limited to a magnetic storage (such as a floppy disk, a hard disk, a magnetic tape, a magneto-optical disk (MO), etc.), an optical storage (such as a CD, a DVD, a BD, a HVD, etc.), and a semiconductor memory (such as a ROM, an EPROM, an EEPROM, a non-volatile memory (NAND FLASH), a solid-state disk (SSD)), etc.

[0172] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can adopt a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer usable storage media (including but not limited to magnetic disk storage and optical storage, etc.) containing computer usable program codes.

[0173] The computer executable instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operations to be performed on the computer or other programmable data processing apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable data processing apparatus implement the functions specified in the flowchart block or blocks. Figure 1 The flowchart and / or block diagram in the drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to the present application. In this regard, each block in the flowchart and / or block diagrams can represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical functions. It should also be noted that each block of the flowchart and / or block diagrams and Figure 1 The flowchart and / or block diagram in the drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to the present application. In this regard, each block in the flowchart and / or block diagrams can represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical functions. It should also be noted that each block of the flowchart and / or block diagrams and

[0174] The computer executable instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operations to be performed on the computer or other programmable data processing apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable data processing apparatus implement the functions specified in the flowchart block or blocks. Figure 1 The flowchart and / or block diagram in the drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to the present application. In this regard, each block in the flowchart and / or block diagrams can represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical functions. It should also be noted that each block of the flowchart and / or block diagrams and Figure 1 The flowchart and / or block diagram in the drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to the present application. In this regard, each block in the flowchart and / or block diagrams can represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical functions. It should also be noted that each block of the flowchart and / or block diagrams and

[0175] It should be noted that, as used in this text, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, exclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0176] The embodiments of the present application described above are merely intended to illustrate the principles of the present application, and the present application is not limited to the above-described embodiments. The above-described embodiments are merely illustrative, and are not restrictive, and those skilled in the art can make many modifications without departing from the spirit and scope of the present application, and all such modifications are intended to fall within the scope of the present application.

Claims

1. A data exchange method, characterized in that: Applied to a baseband processing unit, the method includes: receiving first object data; Writing first object data serially and crosswise in a primary memory according to a preset order of the first objects, the primary memory being shared by at least two first objects; the primary memory comprising a ping memory and a pong memory; writing first object data serially and crosswise in the primary memory according to the preset order of the first objects comprises: writing first object data serially and crosswise in the ping memory according to the preset order of the first objects; determining a first data change amount of the first object data in the ping memory; if the first data change amount satisfies a preset data amount, writing first object data serially and crosswise in the pong memory according to the preset order of the first objects; determining a second data change amount of the first object data in the pong memory; if the second data change amount satisfies a preset data amount, continuing to write first object data serially and crosswise in the ping memory according to the preset order of the first objects until all received first object data are written into the memory; When the amount of the first object data written in the ping memory meets a preset amount, while writing the first object data into the pong memory, interleavedly read the first object data corresponding to the second object from the first object data already written in the ping memory in the primary memory according to a preset order of the second object; Writing the first object data into a secondary storage according to a data format of a second object, wherein the secondary storage is shared by at least two second objects; The first object is a cell and the second object is an optical port, or the first object is an optical port and the second object is a cell.

2. The method according to claim 1, characterized in that The primary memory includes a first port and a second port, and the first object data is serially and cross-written in the primary memory according to a preset order of the first object, including: Dividing the first objects into two object groups evenly to obtain a first object group and a second object group, wherein the number of objects in the first object group is the same as the number of objects in the second object group; respectively determining a first preset order of the first object group and a second preset order of the second object group; Writing the first object data of each first object in the first object group into the first port of the primary memory according to the first preset order; According to the second preset order, the first object data of each first object in the second object group is written into the second port of the primary memory.

3. The method according to claim 1, characterized in that The step of cross-reading the first object data corresponding to the second object from the primary memory according to the preset order of the second object includes: Dividing the second object into two object groups evenly to obtain a third object group and a fourth object group, wherein the object data of the third object group has the same number of objects as that of the fourth object group; respectively determining a third preset order of the third object group and a fourth preset order of the fourth object group; Cross-reading, from the primary memory, first object data corresponding to each second object in the third object group according to the third preset order; According to the fourth preset order, the first object data corresponding to each second object in the fourth object group is cross-read from the primary memory.

4. The method according to claim 1, wherein If the amount of the written first object data satisfies the preset amount, before cross-reading the first object data corresponding to the second object from the primary memory according to the preset order of the second object, the method further includes: Configuring a correspondence between the first object and the second object; If the amount of the written first object data satisfies the preset amount of data, cross-reading the first object data corresponding to the second object from the primary memory according to the preset order of the second object includes: If the amount of the written first object data meets the preset data amount, the first object data corresponding to the second object is cross-read from the primary memory according to the preset order of the second object and the corresponding relationship.

5. A data exchange device, characterized in that: Applied to baseband processing units, including memory, transceiver, and processor: a memory for storing computer programs; a transceiver for transmitting and receiving data under the control of the processor; A processor is configured to read the computer program in the memory and perform the following operations: receiving first object data; Writing first object data serially and crosswise in a primary memory according to a preset order of the first objects, the primary memory being shared by at least two first objects; the primary memory comprising a ping memory and a pong memory, and writing first object data serially and crosswise in the primary memory according to the preset order of the first objects comprising: writing first object data serially and crosswise in the ping memory according to the preset order of the first objects; determining a first data change amount of the first object data in the ping memory; if the first data change amount satisfies a preset data amount, writing first object data serially and crosswise in the pong memory according to the preset order of the first objects; determining a second data change amount of the first object data in the pong memory; if the second data change amount satisfies a preset data amount, continuing to write first object data serially and crosswise in the ping memory according to the preset order of the first objects until all received first object data are written into the memory; When the amount of the first object data written in the ping memory meets a preset amount, while writing the first object data into the pong memory, interleavedly read the first object data corresponding to the second object from the first object data already written in the ping memory in the primary memory according to a preset order of the second objects; Writing the first object data into a secondary storage according to a data format of a second object, wherein the secondary storage is shared by at least two second objects; The first object is a cell and the second object is an optical port, or the first object is an optical port and the second object is a cell.

6. The device according to claim 5, characterized in that The primary memory includes a first port and a second port, and the first object data is serially and cross-written in the primary memory according to a preset order of the first object, including: Dividing the first objects into two object groups evenly to obtain a first object group and a second object group, wherein the number of objects in the first object group is the same as the number of objects in the second object group; respectively determining a first preset order of the first object group and a second preset order of the second object group; Writing the first object data of each first object in the first object group into the first port of the primary memory according to the first preset order; According to the second preset order, the first object data of each first object in the second object group is written into the second port of the primary memory.

7. The device according to claim 5, characterized in that The step of cross-reading the first object data corresponding to the second object from the primary memory according to the preset order of the second object includes: Dividing the second object into two object groups evenly to obtain a third object group and a fourth object group, wherein the object data of the third object group has the same number of objects as that of the fourth object group; respectively determining a third preset order of the third object group and a fourth preset order of the fourth object group; Cross-reading, from the primary memory, first object data corresponding to each second object in the third object group according to the third preset order; According to the fourth preset order, the first object data corresponding to each second object in the fourth object group is cross-read from the primary memory.

8. The device according to claim 5, characterized in that The processor is further configured to read the computer program in the memory and perform the following operations: Configuring a correspondence between the first object and the second object; If the amount of the written first object data satisfies a preset amount of data, cross-reading the first object data corresponding to the second object from the primary memory according to a preset order of the second object includes: If the amount of the written first object data meets the preset data amount, the first object data corresponding to the second object is cross-read from the primary memory according to the preset order of the second object and the corresponding relationship.

9. A data exchange device, characterized in that: Applied to a baseband processing unit, the device comprises: A data receiving module, configured to receive first object data; A data writing module is configured to serially and cross-write first object data in a primary memory according to a preset order of the first objects, wherein the primary memory is shared by at least two first objects; the primary memory includes a ping memory and a pong memory, and the serially and cross-writing first object data in the primary memory according to the preset order of the first objects comprises: serially and cross-writing the first object data in the ping memory according to the preset order of the first objects; determining a first data change amount of the first object data in the ping memory; if the first data change amount meets the preset data amount, serially and cross-writing the first object data in the pong memory according to the preset order of the first objects; determining a second data change amount of the first object data in the pong memory; if the second data change amount meets the preset data amount, continuing to serially and cross-write the first object data in the ping memory according to the preset order of the first objects until all received first object data are written into the memory; a data reading module configured to, when the amount of the first object data written in the ping memory meets a preset amount, simultaneously with writing the first object data into the pong memory, interleavely read the first object data corresponding to the second object from the first object data already written in the ping memory in the primary memory in accordance with a preset order of the second objects; a data transfer module, configured to write the first object data into a secondary storage according to a data format of a second object, wherein the secondary storage is shared by at least two second objects; The first object is a cell and the second object is an optical port, or the first object is an optical port and the second object is a cell.

10. A processor-readable storage medium, characterized in that: The processor-readable storage medium stores a computer program, and the computer program is used to enable a processor to execute the data exchange method according to any one of claims 1 to 4.

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