Interconnect structures and methods of forming the same

Abstract

An interconnect structure includes a dielectric layer and a metal line located in the dielectric layer. The metal line has a first straight edge and a second straight edge extending in a lengthwise direction of the metal line. The first straight edge is parallel to the second straight edge. A via is located below and joined to the metal line. The via has a third straight edge located below and vertically aligned with the first straight edge, and a first curved edge and a second curved edge connected to opposite ends of the third straight edge. Embodiments of the present application also relate to methods of forming an interconnect structure.

Description

Technical Field

[0001] Embodiments of this application relate to interconnect structures and methods of forming them. Background Technology

[0002] Interconnect structures, including metal lines and vias, are used to interconnect devices such as transistors as functional circuits. As the size and spacing of metal lines and vias shrink, critical dimension (CD) uniformity control and overlap control of via patterns become more important and challenging, especially when the spacing is less than approximately 40 nm. The reduction in via size is limited due to optical effects. CD uniformity is also strongly influenced by random effects.

[0003] Typically, the formation of metal wires and vias involves two processes: trenching first and via-first. In trenching first, the trench pattern is formed before the via pattern is formed. In via-first, the via pattern is formed before the trench pattern is formed. Both methods have problems. In trenching first, the via formation process window is limited due to the surface morphology created by the trench pattern. The via-to-trench spacing window is also adversely affected by via overlap offset. In via-first, the overlap offset between the trench pattern and the corresponding via pattern can lead to leakage between the resulting metal wires filling the trench. Furthermore, residues of the undercoating antireflective coating in the via may be difficult to remove and may remain in the via. Summary of the Invention

[0004] Some embodiments of this application provide a method for forming an interconnect structure, comprising: forming a dielectric layer over a substrate; forming a first hard mask over the dielectric layer; forming a second hard mask over the first hard mask; etching the second hard mask to form a first opening in the second hard mask, wherein the first opening has a first width; forming a third hard mask over the second hard mask to fill the first opening; etching the third hard mask and the first hard mask to form a trench in the third hard mask and a second opening in the first hard mask, wherein the trench includes a portion located directly above the first opening, wherein the first opening is located directly above the second opening, and wherein the trench has a second width less than the first width of the first opening, and the second opening has a third width less than or equal to the second width of the trench; performing a first etching process on the dielectric layer to extend the trench and the second opening into the dielectric layer; and forming metal lines and vias in the trench and the second opening, respectively.

[0005] Other embodiments of this application provide an interconnect structure comprising: a dielectric layer; a metal line located in the dielectric layer, wherein the metal line includes a first straight edge and a second straight edge extending in the longitudinal direction of the metal line, wherein the first straight edge and the second straight edge are parallel to each other; and a via located below the metal line and engaging with the metal line, wherein the via includes: a third straight edge located below the first straight edge and perpendicularly aligned with the first straight edge; and a first curved edge and a second curved edge connected to the opposite end of the third straight edge.

[0006] Further embodiments of this application provide an interconnect structure including: a first metal line and a second metal line, the first metal line and the second metal line being adjacent to each other and parallel; a first via located below the first metal line, wherein the entire first via is located in a first region directly below the first metal line, and the first via includes: a first curved edge located directly below the first metal line; and a first straight edge perpendicularly aligned with an edge of the first metal line, wherein the first straight edge engages with the first curved edge; and a second via located below the second metal line, wherein the entire second via is located in a second region directly below the second metal line, and the second via includes: a second curved edge located directly below the second metal line; and a second straight edge perpendicularly aligned with an additional edge of the second metal line, wherein the second straight edge engages with the second curved edge. Attached Figure Description

[0007] When with attachment Figure 1 When reading this invention, the various aspects will be best understood from the following detailed description. It should be noted that, in accordance with standard industry practice, the various components are not drawn to scale. In fact, for clarity of explanation, the dimensions of the various components may be arbitrarily increased or decreased.

[0008] Figure 1 , Figure 2A , Figure 2B , Figure 3 , Figure 4A , Figure 4B , Figure 5A , Figure 5B , Figure 6 , Figure 7A , Figure 7B , Figure 8 , Figure 9A , Figure 9B , Figure 10A and Figure 10B Cross-sectional and top views are shown, illustrating an intermediate stage in the formation of an interconnect structure according to some embodiments.

[0009] Figure 11A , Figure 11B, Figure 12A , Figure 12B , Figure 13A and Figure 13B Cross-sectional and top views are shown, illustrating an intermediate stage in the formation of an interconnect structure according to some embodiments.

[0010] Figure 14A , Figure 14B , Figure 15A , Figure 15B , Figure 16A and Figure 16B Cross-sectional and top views are shown, illustrating an intermediate stage in the formation of an interconnect structure according to some embodiments.

[0011] Figure 17A , Figure 17B , Figure 18A , Figure 18B , Figure 19A and Figure 19B Cross-sectional and top views are shown, illustrating an intermediate stage in the formation of an interconnect structure according to some embodiments.

[0012] Figure 20 The process flow for forming interconnect structures according to some embodiments is shown. Detailed Implementation

[0013] The following disclosure provides numerous different embodiments or examples for implementing various features of the invention. Specific examples of components and arrangements will be described below to simplify the invention. Of course, these are merely examples and are not intended to limit the invention. For example, in the following description, forming a first component above or on a second component may include embodiments where the first and second components are in direct contact, or embodiments where an additional component is formed between the first and second components such that the first and second components are not in direct contact. Furthermore, reference numerals and / or characters may be repeated in various instances of the invention. Such repetition is for simplicity and clarity and does not in itself indicate a relationship between the various embodiments and / or configurations discussed.

[0014] Furthermore, for ease of description, spatially relative terms such as "below," "under," "lower part," "above," and "upper part" may be used herein to describe the relationship between one element or component and another (or other elements or components) as shown in the figures. Spatially relative terms are intended to cover different orientations of the device in use or operation other than those depicted in the figures. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative descriptors used therein may be interpreted accordingly.

[0015] Interconnect structures and methods for forming them are provided. According to some embodiments of the invention, an interconnect structure is formed using a via-first process, wherein a via pattern is formed in a first hard mask. A trench pattern is then formed in a second hard mask above the first hard mask. The second hard mask and the first hard mask are used as etching masks to form vias in an underlying dielectric layer, such that the vias are limited not only by the via pattern but also by the trench pattern. The resulting metal vias are thus self-aligned with the corresponding overlying metal lines. Therefore, the distance between a metal line and a corresponding adjacent via remains no greater than the distance between adjacent metal lines. Thus, leakage is controlled, and potential bridging is eliminated. The embodiments discussed herein are intended to provide examples enabling the making or use of the subject matter of the invention, and those skilled in the art will readily understand that modifications can be made while remaining within the intended scope of the different embodiments. Similar reference numerals are used to indicate similar elements throughout the various views and illustrative embodiments. Although method embodiments may be discussed as being performed in a particular order, other method embodiments may be performed in any logical order.

[0016] Figure 1 , Figure 2A , Figure 2B , Figure 3 , Figure 4A , Figure 4B , Figure 5A , Figure 5B , Figure 6 , Figure 7A , Figure 7B , Figure 8 , Figure 9A , Figure 9B , Figure 10A and Figure 10B Cross-sectional and top views are shown illustrating intermediate stages in the formation of interconnect structures according to some embodiments of the present invention. Corresponding processes are also schematically illustrated in... Figure 20 The process flow shown is as follows.

[0017] Figure 1 A cross-sectional view of package assembly 10 is shown. The package assembly can be a device wafer or an interposer wafer, and is therefore referred to as wafer 10 in the following discussion. Package assembly 10 can also be of another type, such as a reconstructed wafer (in which a device die is packaged), a package substrate, etc. When package assembly 10 is a device wafer, the portion shown may be part of a device die. Package assembly 10 may include active devices (such as transistors and / or diodes) and possibly passive devices (such as capacitors, inductors, resistors, etc.).

[0018] According to some embodiments of the present invention, wafer 10 includes a semiconductor substrate 12 and components formed on the top surface of the semiconductor substrate 12. The semiconductor substrate 12 may be formed of crystalline semiconductor materials such as silicon, germanium, or silicon-germanium and / or III-V compound semiconductor materials such as GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, GaInAsP, etc. The semiconductor substrate 12 may also be a bulk silicon substrate or a silicon-on-insulator (SOI) substrate. Shallow trench isolation (STI) regions (not shown) may be formed in the semiconductor substrate 12 to isolate active regions in the semiconductor substrate 12. Although not shown, through-holes may be formed to extend into the semiconductor substrate 12, wherein the through-holes are used to electrically interconnect components on opposite sides of the semiconductor substrate 12. An integrated circuit device 14 may be formed on the top surface of the semiconductor substrate 12, the integrated circuit device including active devices such as transistors and / or passive devices such as capacitors, resistors, etc.

[0019] A dielectric layer 16 is formed. In such a case... Figure 20 In the process flow 200 shown, the corresponding process is illustrated as process 202. According to some embodiments of the invention, the dielectric layer 16 is formed of a low-k dielectric material having a dielectric constant (k value) below about 3.5, below about 3.0, or even lower. The dielectric layer 16 may be formed of black diamond (a registered trademark of Applied Materials), a carbon-containing low-k dielectric material, hydrogen silsesquioxane (HSQ), methyl silsesquioxane (MSQ), etc. According to some embodiments of the invention, forming the dielectric layer 16 includes depositing a dielectric material containing a pore-forming agent, followed by a curing process to remove the pore-forming agent, thus making the remaining IMD layer 16 porous.

[0020] Conductive components 22 are formed in the IMD 16. According to some embodiments, each of the conductive components 22 includes at least a diffusion barrier layer and a copper- or tungsten-containing material above the diffusion barrier layer. The diffusion barrier layer may be formed of titanium, titanium nitride, tantalum, tantalum nitride, etc., and has the function of preventing copper from diffusing from the copper-containing material into the IMD 16. Optionally, the conductive component 22 may be unbarriered and may be formed of cobalt, tungsten, ruthenium, etc. The conductive component 22 may have a single-damascene structure or a double-damascene structure. The conductive component 22 can be formed by a direct metal etching process. A dielectric layer 16 is applied after the conductive component is formed.

[0021] According to some embodiments, dielectric layer 16 is an intermetallic dielectric (IMD) layer, and conductive component 22 is a metal line and / or via. According to alternative embodiments, dielectric layer 16 is an interlayer dielectric layer, and conductive component 22 is a contact plug. Additional components may or may not be present between dielectric layer 16 and device 14, and these additional components are represented as structure 15, which may include dielectric layers such as contact etch stop layers, interlayer dielectrics, etch stop layers, and IMDs. Structure 15 may also include contact plugs, vias, metal lines, etc.

[0022] Dielectric layer 24 is deposited over dielectric layer 16 and conductor 22. Dielectric layer 24 can be used as an etch stop layer (ESL), and is therefore referred to as etch stop layer or ESL 24 throughout this specification. Etch stop layer 24 may include nitrides, silicon-carbon based materials, carbon-doped oxides, oxygen-doped carbides, metal-containing dielectrics, etc. For example, the material of ESL 24 may include SiCN, SiOCN, SiOC, AlO x AlN, AlCN, or combinations thereof. ESL 24 can be a single layer formed of a homogeneous material, or a composite layer comprising multiple dielectric layers. According to some embodiments of the present invention, ESL 24 comprises an aluminum nitride (AlN) layer, a SiOC layer above the AlN layer, and an aluminum oxide (AlO) layer above the SiOC layer. x )layer.

[0023] A dielectric layer 26 is deposited over ESL 24. According to some exemplary embodiments of the invention, dielectric layer 26 is formed of a silicon-containing dielectric material such as silicon oxide. Dielectric layer 26 may be formed of a low-k dielectric material and is therefore referred to hereinafter as low-k dielectric layer 26. Low-k dielectric layer 26 may be formed using a material selected from the same group of candidate materials for forming dielectric layer 16 or a material different from the material of dielectric layer 16. When selected from the same group of candidate materials, the materials of dielectric layers 16 and 24 may be the same or different from each other.

[0024] A first hard mask 28, a second hard mask 30, and a third hard mask 32 are sequentially deposited above the dielectric layer 26. Figure 20 In the illustrated process flow 200, the corresponding process is shown as process 204. Hard masks 28, 30, and 32 can be deposited using plasma-enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), chemical vapor deposition (CVD), etc. According to some embodiments, the thickness T1 of hard mask 28 is in the range of about 1 nm to about 100 nm, the thickness T2 of hard mask 30 is in the range of about 10 nm to about 200 nm, and the thickness T3 of hard mask 32 is in the range of about 1 nm to about 100 nm.

[0025] According to some embodiments, the candidate material for the hard mask 28 may include AlO2.x SiO x , SiN, SiOC, SiON, SiOCN, TiN, TiO x Alternatively, a combination thereof. Hard mask 30 is formed of a material different from that of hard mask 28, such that the etch selectivity ER30 / ER28 in subsequent etching of hard mask 30 can be greater than 1, for example, greater than about 5, 10, or higher, wherein the etch selectivity ER30 / ER28 is the ratio of the etch rate ER30 of hard mask 30 to the etch rate ER28 of hard mask 28. It should be understood that the etch selectivity ER30 / ER28 is related to the materials of hard mask 28 and hard mask 30, and also to the etching chemicals used in the etching process. Greater etch selectivity may stem from a greater material difference between the materials of hard mask 28 and hard mask 30. According to some embodiments, hard mask 30 is made of AlO₂. x SiO x It is formed from SiN, SiOC, SiON, SiOCN, TiN, TiO, BN, AlN, or combinations thereof.

[0026] Hard mask 32 may be formed of a material different from that of hard masks 30 and 28. The etch selectivity values ​​ER32 / ER30 (in the etching of hard mask 32) and ER32 / ER28 (in the etching of hard mask 32) may both be greater than 1, where ER32 is the etch rate of hard mask 32. The etch selectivity value may also be greater than about 5, 10, or higher. According to some embodiments, hard mask 32 is made of materials selected from AlN and AlO. x SiO x Materials formed from SiN, SiOC, SiON, SiOCN, or combinations thereof.

[0027] Further reference Figure 1 This can form a three-layer etch mask 34. Figure 20In the illustrated process flow 200, the corresponding process is shown as process 206. The etching mask 34 may include a bottom layer (sometimes referred to as the lower layer) 34BL, an intermediate layer 34ML above the bottom layer 34BL, and a top layer (sometimes referred to as the upper layer) 34TL above the intermediate layer 34ML. The lower layer 34BL, intermediate layer 34ML, and top layer 34TL may also be referred to as a bottom antireflective coating (BARC), an intermediate mask layer, and a top photoresist layer, respectively. According to some embodiments, the bottom layer 34BL is formed from a carbon-containing material (by CVD), while the top layer 34TL is formed from a photoresist (by spin coating), which may include organic or inorganic materials. The bottom layer 34BL has been crystallized or cross-linked to form the top layer 34TL. The intermediate layer 34ML may be formed from a mixture of inorganic silicon-containing materials, which may be nitrides (such as silicon nitride), oxides of nitride (such as silicon oxynitride), oxides (such as silicon oxide), etc. The intermediate layer 34ML may also be an inorganic film (such as silicon) deposited by CVD. The intermediate layer 34ML has high etch selectivity relative to the top layer 34TL and the bottom layer 34BL. Therefore, the top layer 34TL can be used as an etch mask for patterning the intermediate layer 34ML, and the intermediate layer 34ML can be used as an etch mask for patterning the bottom layer 34BL. According to some embodiments, the intermediate layer 34ML can be omitted when the etch selectivity of 34BL over 34TL is sufficient for patterning. The top layer 34TL is patterned to form openings 36, which define via openings in the hard mask 32.

[0028] Hard masks 28, 30, and 32 can be formed as completely flat layers spanning the entire wafer 10 to reduce the focusing window for subsequent photolithography processes. According to some embodiments, the lateral dimension (width) W1 of the opening 36 can be between approximately 15 nm and approximately 40 nm. According to some embodiments, the opening 36 is circular when viewed from above. According to alternative embodiments, the opening 36 can have other top-view shapes, such as rectangular, rounded rectangles, elliptical, etc.

[0029] In subsequent processes, the pattern of the etched mask 34 is transferred to the underlying hard mask 32. (As shown in...) Figure 20 In the illustrated process flow 200, the corresponding process is shown as process 208. First, a patterned top layer 34TL is used as an etching mask to etch an intermediate layer 34ML, such that an opening 36 extends into the intermediate layer 34ML. After etching through the intermediate layer 34ML, a bottom layer 34BL is further patterned, during which the intermediate layer 34ML is used as an etching mask. During the patterning of the bottom layer 34BL, the top layer 34TL is consumed. The intermediate layer 34ML may be partially or completely consumed during the patterning of the bottom layer 34BL. During the patterning of the bottom layer 34BL, the opening 36 extends downwards, thereby exposing the underlying hard mask 32.

[0030] Next, the hard mask 32 is patterned by etching, with the bottom layer 34BL (and the intermediate layer 34ML, if not completely consumed) used as the etching mask. The patterning of the hard mask 32 stops at the hard mask 30, which serves as the etch stop layer. The opening 36 thus extends into the hard mask 32. A portion of the opening 36 in the hard mask 32 is also referred to hereinafter as the first (via) opening. After the patterning of the hard mask 32, the remaining portion of the bottom layer 34BL is removed. Figure 2A and Figure 2B The resulting structure is shown in the figure. Figure 2B Show Figure 2A The top view of the structure shown, in which, Figure 2A The cross-sectional view shown is from Figure 2B The reference section 2A-2A was obtained.

[0031] refer to Figure 3 Deposit the fourth hard mask 40. In such a way... Figure 20 In the process flow 200 shown, the corresponding process is illustrated as process 210. Hard mask 40 is formed of a material different from hard mask 32, such that the etch selectivity ER40 / ER32 is greater than 1.0, and may be greater than about 5, 10, or higher in subsequent etch processes used to form trenches. Furthermore, hard mask 40 may be formed of the same or different material as hard mask 28, or may include the above materials. According to some embodiments, hard mask 40 is made of AlN, AlO x SiO x Materials may be formed or included in combination of SiN, SiOC, SiON, SiOCN, TiN, TiO, etc.

[0032] refer to Figure 4A This can form a three-layer etch mask 42. In, for example... Figure 20 In the illustrated process flow 200, the corresponding process is shown as process 212. The etching mask 42 may include a bottom layer 42BL, an intermediate layer 42ML above the bottom layer 42BL, and a top layer 42TL above the intermediate layer 42ML. The materials for the bottom layer 42BL, the intermediate layer 42ML, and the top layer 42TL may be selected from the same group of candidate materials used to form the bottom layer 34BL, the intermediate layer 34ML, and the top layer 34TL, respectively. The top layer 42TL is patterned to form trenches 44 (including portions 44A and 44B), which are used to define trenches in the hard mask 40. According to some embodiments, the lateral dimension (width) W2 of the trench 44 is smaller than the dimension (width) W1 of the via opening 36 in the hard mask 32. For example, the ratio W2 / W1 may be in the range of about 0.7 to about 0.9. The width W2 may be less than about 36 nm, or may be in the range of about 13 nm to about 30 nm.

[0033] Figure 4B Show Figure 4A The top view of the structure shown, in which, Figure 4A The cross-sectional view shown is from Figure 4B The reference section 4A-4A was obtained. In the top view, the through-hole opening 36 may extend laterally beyond the boundaries of one or both of the +X and -X directions. A portion of each of the through-hole openings 36 lies directly below the corresponding groove 44, and the through-hole opening 36 also includes portions extending laterally beyond the opposing straight edges of the groove 44. Figure 4A and Figure 4B As shown, trench 44 includes trench portions 44B and 44A. Trench portion 44B is located directly above the via opening 36. Trench portion 44A overlaps with the hard mask 32 and is offset perpendicularly to the via opening 36.

[0034] In subsequent processes, the pattern of the etched mask 42 is transferred to the underlying hard mask 40. (As shown in...) Figure 20 In the process flow 200 shown, the corresponding process is shown as process 214. Patterning includes transferring a pattern in the top layer 42TL to the intermediate layer 42ML and the bottom layer 42BL, and then using the pattern as an etching mask to etch a hard mask 40 and extend trenches 44 downwards.

[0035] refer to Figure 5A The downward extension of trench portion 44A stops on hard mask 32. On the other hand, since there is no hard mask 32 directly below, the downward extension of trench portion 44B does not stop. Therefore, trench portion 44B penetrates hard mask 40 to reach hard mask 30, and then the hard mask is etched so that trench 44 engages via opening 36 to form a new narrowed via opening 36' in hard mask 30. Via opening 36' is also referred to as second via opening 36'. Etching of hard mask 30 stops on hard mask 28. This can be achieved by selecting a suitable etch gas that attacks both hard masks 40 and 30 but not hard masks 32 and 28. Figure 5A The etching process shown.

[0036] Figure 5B Show Figure 5A The top view of the structure shown, in which, Figure 5A The cross-sectional view shown is from Figure 5B The reference section 5A-5A was obtained. Figure 5A and Figure 5BSince hard mask 32 serves as the etching mask for etching hard masks 40 and 30, a via opening 36' is formed when a via 36 is formed in hard mask 32, but not when hard mask 32 is present. Therefore, in the formation of the via opening 36, the combination of etching mask 40 and hard mask 32 serves as the etching mask defining the position and size of the via opening 36'. The via opening 36' is thus self-aligned with the trench 44 because the via opening 36' is located directly below the trench 44 and is not formed without the trench 44 being formed. Therefore, the width W2 of the via opening 36' is less than the width W1 of the opening 36 and equal to the width W2 of the trench 44 (within the range of process variations). Figure 5B As shown, the left and right edges (parallel to the Y direction) of the through-hole opening 36' are defined by the edges of the groove 44 and can therefore be straight, while the other two edges are not limited by the groove 44 and may be curved. After the hard mask 40 is patterned, the remainder of the bottom layer 42BL is removed.

[0037] Next, as Figure 6 As shown, an etching process is performed to etch the hard mask 32 so that the trench portion 44A penetrates the hard mask 32 and stops on the hard mask 30. Figure 20 In the process flow 200 shown, the corresponding process is also shown as process 214.

[0038] Figure 7A The via opening 36' extends downward into the hard mask 28 and the dielectric layer 26, and the trench portion 44A extends downward into the hard mask 30. According to some embodiments, the downward extension of the via opening 36' and the trench portion 44A is performed by a two-step etching process, wherein different etching gases are used in the two steps. In the first step, the via opening 36' is extended downward, which includes etching through the hard mask 28, followed by etching the dielectric layer 26, such that the via opening 36' stops at an intermediate level between the top and bottom surfaces of the dielectric layer 26. As shown in... Figure 20 In the process flow 200 shown, the corresponding process is illustrated as process 216. Etching of the hard mask 28 and the dielectric layer 26 can be achieved using the same etching gas or different etching gases. In the first etching step, the hard mask 30 is not etched so that the trench portion 44A remains to stop on the hard mask 30. In the second etching step, a different etching gas is selected to etch through the hard mask 30 without etching the hard mask 28 and the dielectric layer 26. Figure 20 In the process flow 200 shown, the corresponding process is illustrated as process 218. Therefore, the second etching step causes the trench portion 44A to stop on the hard mask 28. On the other hand, during the second etching process, the depth of the via opening 36' remains unchanged. Figure 7B Show Figure 7AThe top view of the structure shown, in which, Figure 7A The cross-sectional view shown is from Figure 7B The reference section 7A-7A was obtained. It should be understood that the formation... Figure 7A and Figure 7B The discussion of the structure in the text is an example, and there are methods for forming it. Figure 7A and Figure 7B Other processes for the structure shown are also within the scope of this invention.

[0039] According to alternative embodiments, instead of using a two-step etching process to extend the via opening 36' and trench portion 44A downwards, a single-step etching process can be used. According to these embodiments, the thickness T1 of the hard mask 28 is relatively small compared to the thickness T2 of the hard mask 30; for example, the ratio T1 / T2 is less than about 1. Furthermore, the etching selectivity ER30 / ER28 is relatively small; for example, the etching selectivity ER30 / ER28 is less than about 5, or may be in the range between about 0.3 and about 3. The end result is simultaneous etching of hard masks 30 and 28, and because hard mask 28 is thinner, the portion of hard mask 28 directly beneath the trench portion 44B is etched first. Then, the dielectric layer 26 is etched. When the via opening 36' reaches the desired depth in the dielectric layer 26, portions of hard masks 30 and 28 still remain directly beneath the trench portion 44A to protect the underlying dielectric layer 26.

[0040] Next, refer to Figure 8 The pattern of trench portions 44A and 44B is transferred to hard mask 28 by etching. The combination of hard masks 32 and 40 is used as the etching mask to perform the etching. Figure 20 In the process flow 200 shown, the corresponding process is also shown as process 220.

[0041] Figure 9A and Figure 9B Cross-sectional and top views are shown respectively of the transfer of trench portions 44A and 44B in dielectric layer 26. The transfer of trench 44 is achieved by using hard mask 28 (and hard mask 30, if still present) as... Figure 8 The etching of dielectric layer 26 is performed using an etching mask (as shown). The bottom of trench 44 is located at an intermediate layer between the top and bottom surfaces of dielectric layer 26. According to some embodiments, etching of dielectric layer 26 is performed using an etching gas selected from C4F6, C4F8, C5F8, CF4, CHF3, CH2F2, NF3, N2, O2, Ar, He, and combinations thereof. Simultaneously, trench 44 is formed, with via opening 36' extending to the bottom of dielectric layer 26 and exposing etch stop layer 24. Figure 20 In the process flow 200 shown, the corresponding process is shown as process 222.

[0042] Next, the etch stop layer 24 is removed in an etching process, which may include a dry etching process and / or a wet etching process. The conductive component 22 is thus exposed to the via opening 36'.

[0043] Figure 9B Show Figure 9A The top view of the structure shown. Figure 9A The cross-sectional view shown is from Figure 9B The reference section 9A-9A is used. It should be understood that the trench 44 includes a portion 44A that is vertically offset from the through-hole opening 36' and a portion 44B located directly above the through-hole opening 36'. Furthermore, the width W3 of the trench portions 44A and 44B is equal to the width W4 of the through-hole opening 36' (within the range of process variations).

[0044] Figure 10A and Figure 10B The diagram illustrates the formation of a conductive material filling the through-hole opening 36' and trench 44 to form the through-hole 50 and metal wire 52. (The diagram is incomplete and requires further context.) Figure 20 In the process flow 200 shown, the corresponding process is shown as process 224. Figure 10B Show Figure 10A The top view of the structure shown. Figure 10A The cross-sectional view shown is from Figure 10B The reference section 10A-10A is obtained. According to some embodiments, a metallic material such as cobalt, tungsten, ruthenium, or combinations thereof is deposited. Deposition can be performed using a barrier-free process, wherein no barrier is formed, and the metallic material contacts the conductive component 22 and the dielectric layer 26. According to an alternative embodiment, the conductive material may include at least a diffusion barrier layer 46A and a metallic material 46B on the diffusion barrier layer. The diffusion barrier layer 46A may be formed of titanium, titanium nitride, tantalum, tantalum nitride, etc. The metallic material 46B may be formed of copper or include copper, and other materials such as tungsten, cobalt, ruthenium, etc., may also be used.

[0045] In subsequent processes, planarization processes such as CMP or mechanical polishing are performed to remove excess conductive material above the dielectric layer 26. The planarization process can be performed until the dielectric layer 26 is exposed. This forms the via 50 and the metal line 52.

[0046] like Figure 10A and Figure 10B As shown, the through-hole 50 is self-aligned with the metal line 52, wherein the width W4 of the through-hole 50 and its edge (parallel to the Y direction) are limited by the edge (parallel to the Y direction) of the metal line 52. According to some embodiments, the metal line 52 includes a straight edge 52E1, and the straight edge 50E1 of the through-hole 50 is perpendicularly aligned with the straight edge 52E1. The through-hole 50 also includes a curved edge 52E2 that overlaps with the metal line 52. Figure 10BAccording to some embodiments, the curved edge 52E2 is circular and can match the circle 54 shown as a dashed line.

[0047] Figure 11A , Figure 11B , Figure 12A , Figure 12B , Figure 13A and Figure 13B , Figure 14A , Figure 14B , Figure 15A , Figure 15B , Figure 16A and Figure 16B as well as Figure 17A , Figure 17B , Figure 18A , Figure 18B , Figure 19A and Figure 19B The diagram shows a cross-sectional view of an intermediate stage in the formation of a self-aligned interconnect structure according to an optional embodiment of the invention. Unless otherwise stated, the materials and forming processes of the components in these embodiments are substantially the same as those of the same components indicated by the same reference numerals in the foregoing embodiments shown in the foregoing figures. Therefore, details regarding the forming processes and materials of the components shown in these embodiments can be found in the discussion of the foregoing embodiments.

[0048] Figure 11A , Figure 11B , Figure 12A , Figure 12B , Figure 13A and Figure 13B Some intermediate stages are shown. These embodiments are similar to the aforementioned embodiments, except that the groove pattern is offset perpendicularly to the corresponding underlying through-hole opening in one direction. The initial steps of these embodiments are... Figure 1 , Figure 2A , Figure 2B and Figure 3 The results are basically the same. Next, as shown... Figure 11A and Figure 11B As shown in the cross-sectional and top views, an etching mask 42 is formed. Trench 44 is formed in the top layer 42TL. Figure 11A Show Figure 11B Section 11A-11A is shown in the figure. According to some embodiments, the width W2 of the trench 44 is still smaller than the width W1 of the opening 36 in the hard mask 32. Furthermore, due to overlap offset, the trench 44 is perpendicularly offset to the corresponding lower opening 36. Therefore, instead of allowing the opening 36 to extend laterally beyond the opposite edge of the corresponding upper trench 44, the opening 36 extends laterally beyond the edge of the corresponding upper trench 44 in the -X direction and is recessed with the edge of the corresponding upper trench 44 in the +X direction.

[0049] In subsequent processes, execute Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The process is shown. The resulting structure is shown in... Figure 12A and Figure 12B In the figures, cross-sectional and top views are shown, respectively. A through-hole opening 36' is formed, and a trench 44 is extended into the hard mask 30 by etching. Figure 12A and Figure 12B Corresponding to Figure 7A and Figure 7B The difference lies in the cross-section shown. Figure 12A and Figure 12B The groove 44 in the middle is offset in the +X direction relative to the through hole opening 36' below. The groove portion 44A can be... Figure 12B Found, and Figure 12A Not shown in the image.

[0050] Subsequent processes and references Figure 8 , Figure 9A , Figure 9B , Figure 10A and Figure 10B The processes shown and discussed are essentially the same. The resulting through-hole 50 and metal wire 52 are... Figure 13A and Figure 13B As shown in the figure, Figure 13A Show Figure 13B Section 13A-13A in the middle. For example... Figure 13B As shown, the left edge 50E1 of the through hole 50 is a straight edge, which is perpendicularly aligned with the left straight edge 52E1 of the corresponding metal line 52. The right edge 50E1' of the through hole 50 is recessed from the corresponding right edge of the metal line 52 and is not limited by the corresponding groove. Therefore, the right edge 50E1' of the through hole 50 (in the X direction, Figure 13B The edges 50E2 in the +Y and -Y directions can be curved and rounded. According to some embodiments, the right edge and the edges in the +Y and -Y directions can be part of the same curved edge that matches the circle 54. The width W2' of the through-hole opening 36' is less than the width W2 of the groove 44.

[0051] like Figure 13A and Figure 13B As shown, when overlap occurs and the trench pattern shifts from the corresponding via opening pattern, the spacing S1 between the metal line and the adjacent via remains unchanged, unlike conventional processes. This eliminates the potential problem of increased leakage between adjacent metal lines / vias due to reduced spacing.

[0052] Figure 14A , Figure 14B , Figure 15A , Figure 15B , Figure 16A and Figure 16B Some intermediate stages according to optional embodiments are shown. These embodiments are similar to the foregoing embodiments, except that the spacing of the through-hole openings is too small. The initial steps of these embodiments are similar to... Figure 1 , Figure 2A , Figure 2B and Figure 3 The results are basically the same. Next, as shown... Figure 14A and Figure 14B As shown, they respectively show a cross-sectional view and a top view, forming an etch mask 42, wherein a trench 44 is formed in the top layer 42TL. Figure 14A Show Figure 14B The cross section 14A-14A is shown. According to some embodiments, the width W2 of the trench 44 is still smaller than the width W1 of the opening 36 in the hard mask 32. However, the spacing S2 between adjacent openings 36 is too small. For example, the ratio S2 / W2 may be less than about 1. The ratio S2 / W1 may be less than about 0.7, where W1 is the width of the via opening 36. The spacing S2 may also be less than about 25 nm.

[0053] In subsequent processes, execute Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The process is shown. The resulting structure is shown in... Figure 15A and Figure 15B In the figures, cross-sectional and top views are shown, respectively. A through-hole opening 36' is formed, and a trench 44 is extended into the hard mask 30 by etching. Figure 15A and Figure 15B Corresponding to Figure 7A and Figure 7B .

[0054] Subsequent processes and references Figure 8 , Figure 9A , Figure 9B , Figure 10A and Figure 10B The processes shown and discussed are essentially the same. The resulting through-hole 50 and metal wire 52 are... Figure 16A and Figure 16B As shown in the figure, Figure 16A Show Figure 16B Section 16A-16A in the middle. For example... Figure 16B As shown, the left and right edges 50E1 of the through-hole 50 are both straight edges, which are perpendicularly aligned with the straight edge 52E1 of the metal line 52. The edges 50E2 in the +Y and -Y directions can be curved and rounded, and overlap with the metal line 52. The curved edge 50E2 engages with the straight edge 50E1. According to some embodiments, the curved edge 50E2 of the through-hole 50 can match a circle 54 having a spacing S2.

[0055] like Figure 16A and Figure 16B As shown, the spacing S2 between the via openings is too small. If a conventional forming process were used, the spacing S2 would be the spacing between the metal line 52 and its corresponding adjacent via 50. A small spacing S2 could lead to increased leakage or bridging between the metal line and the adjacent via. By employing an embodiment of the present invention, the spacing S2' between the metal line and the adjacent via is defined by the spacing S1 between the adjacent metal lines 52, and the spacing S2' does not increase with the enlargement of the via pattern. This eliminates the potential problems of increased leakage and bridging.

[0056] Figure 17A , Figure 17B , Figure 18A , Figure 18B , Figure 19A and Figure 19B Some intermediate stages according to optional embodiments are shown. These embodiments are similar to the previous embodiments, except that the adjacent through-hole openings in the hard mask 32 are large enough that they interlock with each other. The initial steps of these embodiments are similar to... Figure 1 , Figure 2A , Figure 2B and Figure 3 The results are essentially the same. The obtained structure is... Figure 17A and Figure 17B As shown, they are cross-sectional views and top views, respectively. Figure 17B A large opening including two joining openings 36 is shown. The joining of adjacent openings 36 may be caused by optical effects, where small via openings with small dimensions in both the X and Y directions can be enlarged to be larger than the pattern in the corresponding photomask. Next, an etch mask 42 is formed, and trenches 44 are formed in the top layer 42TL.

[0057] In subsequent processes, execute Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The process is shown. The resulting structure is shown in... Figure 18A and Figure 18B In the figures, cross-sectional and top views are shown, respectively. A through-hole opening 36' is formed, and a trench 44 is extended into the hard mask 30 by etching. Figure 18A and Figure 18B Corresponding to Figure 7A and Figure 7B .

[0058] Subsequent processes and references Figure 8 , Figure 9A , Figure 9B , Figure 10A and Figure 10B The processes shown and discussed are essentially the same. The resulting through-hole 50 and metal wire 52 are... Figure 19Aand Figure 19B As shown in the figure, Figure 19A Show Figure 19B Section 19A-19A is shown in the diagram. The left and right edges 50E1 of the through-hole 50 are both straight edges, perpendicularly aligned with the straight edge 52E1 of the corresponding upper metal line 52. The edge 50E2 of the through-hole 50 can be curved and rounded, overlapping the upper metal line 52. According to some embodiments, the curved edge 50E2 may match a circle 54 that at least contacts or partially overlaps with each other. By employing embodiments of the invention, the spacing S2' between the metal line and the adjacent through-hole is equal to the spacing S1 between adjacent metal lines. This eliminates the bridging problem between the metal line and adjacent through-hole that occurs in conventional forming processes.

[0059] Embodiments of the present invention have several advantageous features. By employing a pre-via method that combines a via opening pattern in a first hard mask with a trench pattern in a second hard mask to define the edge of a conductive via, the conductive via's edge is defined by the edge of the corresponding upper metal line. Therefore, regardless of how much wider the via opening pattern is than the corresponding trench pattern, the spacing between the metal line and its adjacent via does not increase. This eliminates leakage and potential bridging between adjacent metal lines and vias.

[0060] According to some embodiments of the present invention, the method includes: forming a dielectric layer over a substrate; forming a first hard mask over the dielectric layer; forming a second hard mask over the first hard mask; etching the second hard mask to form a first opening in the second hard mask, wherein the first opening has a first width; forming a third hard mask over the second hard mask to fill the first opening; etching the third hard mask and the first hard mask to form a trench in the third hard mask and a second opening in the first hard mask, wherein the trench includes a portion located directly above the first opening, wherein the first opening is located directly above the second opening, and wherein the trench has a second width smaller than the first width of the first opening, and the second opening has a third width smaller than or equal to the second width of the trench; performing a first etching process on the dielectric layer to extend the trench and the second opening into the dielectric layer; and forming a metal line and a via in the trench and the second opening, respectively. In an embodiment, the first opening extends laterally beyond the second opening in the first direction perpendicular to the longitudinal direction of the trench. In one embodiment, the first opening extends laterally beyond the second opening in a second direction perpendicular to the longitudinal direction of the trench, wherein the first direction and the second direction are opposite to each other. In another embodiment, the first opening is recessed from a corresponding edge of the trench in a second direction perpendicular to the longitudinal direction of the trench, wherein the first direction and the second direction are opposite to each other. In another embodiment, the method further includes forming a fourth hard mask over the dielectric layer, wherein the first hard mask is formed over the fourth hard mask, and wherein the fourth hard mask serves as an etch stop layer when etching the third hard mask and the first hard mask to form the trench. In another embodiment, the method further includes performing a second etch process on the dielectric layer to extend the second opening into the top of the dielectric layer and form a via opening, wherein the fourth hard mask serves as an etch mask when etching the dielectric layer. In one embodiment, the method further includes: etching the fourth hard mask to extend the trench through the fourth hard mask, wherein the first etching process is performed on the dielectric layer after the second etching process is performed on the dielectric layer and the fourth hard mask is etched. In one embodiment, the dielectric layer is not etched during the etching of the fourth hard mask. In one embodiment, the metal line includes a first edge and a second edge extending along the longitudinal direction of the metal line, wherein the first edge and the second edge are opposite to each other, and wherein the via includes a third edge and a fourth edge that are parallel to each other and perpendicularly aligned with the first edge and the second edge, respectively.In one embodiment, the metal wire includes a first edge and a second edge extending along the longitudinal direction of the metal wire, wherein the first edge and the second edge are opposite to each other, and wherein the through hole includes: a third edge located below the first edge of the metal wire and perpendicularly aligned with the first edge; and a fourth edge perpendicularly aligned with the position between the first edge and the second edge.

[0061] According to some embodiments of the present invention, the structure includes: a dielectric layer; a metal wire located in the dielectric layer, wherein the metal wire includes a first straight edge and a second straight edge extending in the longitudinal direction of the metal wire, wherein the first straight edge and the second straight edge are parallel to each other; and a via located below and engaging with the metal wire, wherein the via includes: a third straight edge located below the first straight edge and perpendicularly aligned with the first straight edge; and a first curved edge and a second curved edge, the first curved edge and the second curved edge being connected to opposite ends of the third straight edge. In an embodiment, the metal wire extends laterally beyond the first curved edge and the second curved edge in the longitudinal direction. In an embodiment, the via further includes a fourth straight edge located below the second straight edge and perpendicularly aligned with the second straight edge, wherein the first curved edge and the second curved edge are further connected to opposite ends of the fourth straight edge. In an embodiment, the via includes a curved edge, the first curved edge and the second curved edge being part of the curved edge, and the opposite ends of the third straight edge being connected to the curved edge. In an embodiment, the entire curved edge is continuously curved. In an embodiment, the first curved edge matches a circle.

[0062] According to some embodiments of the present invention, the structure includes: a first metal wire and a second metal wire, the first metal wire and the second metal wire being adjacent to each other and parallel; a first through-hole located below the first metal wire, wherein the entire first through-hole is located in a first region directly below the first metal wire, and the first through-hole includes: a first curved edge located directly below the first metal wire; and a first straight edge perpendicularly aligned with an edge of the first metal wire, wherein the first straight edge engages with the first curved edge; and a second through-hole located below the second metal wire, wherein the entire second through-hole is located in a second region directly below the second metal wire, and the second through-hole includes: a second curved edge located directly below the second metal wire; and a second straight edge perpendicularly aligned with an additional edge of the second metal wire, wherein the second straight edge engages with the second curved edge. In embodiments, the first curved edge matches a first circle, and the second curved edge matches a second circle. In embodiments, the first circle and the second circle at least contact or partially overlap. In one embodiment, the first through-hole further includes a third curved edge, wherein the first curved edge and the third curved edge are joined to opposite ends of the first straight edge, wherein the third curved edge overlaps with the first metal wire, and the first metal wire extends laterally beyond both the first curved edge and the third curved edge.

[0063] The foregoing outlines features of several embodiments to enable those skilled in the art to better understand various aspects of the invention. Those skilled in the art should understand that they can readily use this invention as a basis to design or modify other processes and structures for implementing the same purposes and / or achieving the same advantages as the embodiments described herein. Those skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of the invention, and that various changes, substitutions, and alterations can be made therein without departing from the spirit and scope of the invention.

Claims

1. A method for forming an interconnect structure, comprising: A dielectric layer is formed above the substrate; A first hard mask is formed above the dielectric layer; A second hard mask is formed above the first hard mask; The second hard mask is etched to form a first opening in the second hard mask, wherein the first opening has a first width; A third hard mask is formed above the second hard mask to fill the first opening; The third hard mask and the first hard mask are etched to form a trench in the third hard mask and a second opening in the first hard mask, wherein the trench includes a portion located directly above the first opening, wherein the first opening is located directly above the second opening, and wherein the trench has a second width smaller than the first width of the first opening, and the second opening has a third width smaller than or equal to the second width of the trench. A first etching process is performed on the dielectric layer to extend the trench and the second opening into the dielectric layer; and Metal wires and through holes are formed in the trench and the second opening, respectively. The metal wire includes a first edge and a second edge extending along the longitudinal direction of the metal wire, wherein the first edge and the second edge are opposite to each other, and wherein the through hole includes: The third edge is located below the first edge of the metal wire and is perpendicularly aligned with the first edge; and A fourth edge is disposed between the first edge and the second edge and recessed from the second edge, wherein the fourth edge is a continuous curved edge and connects to the opposite end of the third edge.

2. The method according to claim 1, wherein, The first opening extends laterally beyond the second opening in a first direction perpendicular to the longitudinal direction of the groove.

3. The method according to claim 2, wherein, The first opening extends laterally beyond the second opening in a second direction perpendicular to the longitudinal direction of the groove, wherein the first direction and the second direction are opposite to each other.

4. The method according to claim 2, wherein, The first opening is recessed from the corresponding edge of the groove in a second direction perpendicular to the longitudinal direction of the groove, wherein the first direction and the second direction are opposite to each other.

5. The method of claim 1, further comprising forming a fourth hard mask over the dielectric layer, wherein, The first hard mask is formed over the fourth hard mask, and wherein the fourth hard mask serves as an etch stop layer when the third hard mask and the first hard mask are etched to form the trench.

6. The method of claim 5, further comprising performing a second etching process on the dielectric layer to extend the second opening into the top of the dielectric layer and form a via opening, wherein, The fourth hard mask is used as an etching mask when etching the dielectric layer.

7. The method according to claim 6, further comprising: The fourth hard mask is etched to extend the trench through the fourth hard mask, wherein the first etching process is performed on the dielectric layer after the second etching process is performed on the dielectric layer and the fourth hard mask is etched.

8. The method according to claim 7, wherein, The dielectric layer is not etched during the etching of the fourth hard mask.

9. The method according to claim 1, wherein, The through hole is located within the lateral range of the metal wire.

10. The method according to claim 1, wherein, The through hole is offset perpendicularly relative to the metal wire.

11. An interconnection structure, comprising: Dielectric layer; A metal wire, located in the dielectric layer, wherein the metal wire includes a first straight edge and a second straight edge extending in the longitudinal direction of the metal wire, wherein the first straight edge and the second straight edge are parallel to each other; and A through-hole is located below and engages with the metal wire, wherein the through-hole includes: a third straight edge located below and perpendicularly aligned with the first straight edge; a first curved edge and a second curved edge connected to opposite ends of the third straight edge; and a third curved edge connecting the first curved edge and the second curved edge and recessed from the second straight edge, wherein the first curved edge, the second curved edge and the third curved edge form a continuous curved edge.

12. The interconnection structure according to claim 11, wherein, The metal wire extends laterally beyond the first and second curved edges in the longitudinal direction.

13. The interconnection structure according to claim 11, wherein, The through hole is located within the lateral range of the metal wire.

14. The interconnection structure according to claim 11, wherein, The through hole is offset perpendicularly relative to the metal wire.

15. The interconnection structure according to claim 14, wherein, The through-hole contains copper.

16. The interconnection structure according to claim 11, wherein, The continuous curved edges match the circle.

17. An interconnection structure, comprising: A first metal wire and a second metal wire, the first metal wire and the second metal wire being adjacent to each other and parallel; A first through-hole is located below the first metal wire, wherein the entire first through-hole is located in a first region directly below the first metal wire, and the first through-hole includes: a first curved edge located directly below the first metal wire, disposed between opposite edges of the first metal wire and recessed from the edge of the first metal wire; and a first straight edge perpendicularly aligned with the edge of the first metal wire, wherein the first straight edge engages with the first curved edge, wherein the first curved edge is a continuous curved edge and connects to the opposite end of the first straight edge; and A second through-hole is located below the second metal wire, wherein the entire second through-hole is located in a second region directly below the second metal wire, and the second through-hole includes: a second curved edge located directly below the second metal wire; and a second straight edge perpendicularly aligned with an additional edge of the second metal wire, wherein the second straight edge engages with the second curved edge.

18. The interconnection structure according to claim 17, wherein, The first curved edge matches the first circle, and the second curved edge matches the second circle.

19. The interconnection structure according to claim 18, wherein, The first circle and the second circle are at least in contact or partially overlap.

20. The interconnection structure according to claim 17, wherein, The through hole is located within the lateral range of the metal wire.

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