A data caching method, system, device, apparatus and storage medium

Abstract

The present disclosure provides a data caching method, system, device, equipment and storage medium. The method comprises: obtaining the layer number of each convolutional network layer of a convolutional neural network and the clock multiplication number corresponding to each layer number; for each layer number, if the clock multiplication number corresponding to the layer number is greater than 1, when the target convolutional network layer identified by the layer number is processing data, the data to be processed of the target convolutional network layer is split into N equal parts, and the target convolutional network layer is configured with N times frequency clock, so that the target convolutional network layer calculates the N parts of data to be processed in turn with N times frequency clock. The method realizes the reduction of waste of cache resources of the computing and storage integrated device while ensuring the computing efficiency.

Description

Technical Field

[0001] This disclosure relates to the field of in-memory computing technology, and in particular to a data caching method, system, apparatus, device and storage medium. Background Technology

[0002] Convolutional deep neural networks (CNNs) are often used to perform computations on large amounts of data. However, CNNs have high computational complexity, requiring repeated access to off-chip caches during data processing. This repeated access leads to significant energy loss during data transmission, reducing the computational efficiency of the neural network. Therefore, in-memory computing (IMC) devices, which combine data caching and computation capabilities, are increasingly being applied to neural network technology. Since IMC devices integrate data caching and computation functions, their application in neural networks eliminates the need for repeated access to off-chip caches during data processing, thus reducing energy loss during data transmission and improving the computational efficiency of the neural network.

[0003] However, the cache capacity of in-memory computing devices is no less than the maximum data volume that the largest network layer in a neural network can process; that is, the cache capacity of an in-memory computing device depends on the maximum data volume that the largest network layer in the neural network can process. When the maximum data volume that each layer in a neural network can process varies significantly, this characteristic of the cache capacity of an in-memory computing device is clearly a significant waste of resources. For example, neural network A includes network layers 1-5, with network layer 1 being the largest network layer. The cache capacity of the in-memory computing device is no less than the maximum data volume that network layer 1 can process. If the maximum data volume that network layers 2-5 can process is much smaller than that of network layer 1, then for network layers 2-5, the large cache capacity of the in-memory computing device is a significant waste of resources. Furthermore, reducing the amount of data cached by the largest network layer each time to reduce resource waste would inevitably prolong data processing time, thus affecting the computational efficiency of the neural network.

[0004] Therefore, how to reduce the waste of cache resources in in-memory computing devices while ensuring computing efficiency has become an urgent problem to be solved. Summary of the Invention

[0005] This disclosure provides a data caching method, system, apparatus, device, and storage medium to at least solve the above-mentioned technical problems existing in the prior art.

[0006] According to a first aspect of this disclosure, a data caching method is provided, applied to a convolutional neural network composed of in-memory computing devices, the method comprising:

[0007] Obtain the layer number of each convolutional network layer in the convolutional neural network and the clock multiplication factor corresponding to each layer number;

[0008] For each layer number, if the clock multiplier corresponding to the layer number is greater than 1, then when the target convolutional network layer identified by the layer number is processing data, the data to be processed in the target convolutional network layer is split into N equal parts, and an N-fold clock is configured for the target convolutional network layer, so that the target convolutional network layer calculates the N parts of data to be processed sequentially with an N-fold clock.

[0009] Specifically, when processing data in the target convolutional network layer, the in-memory computing device caches at most one-Nth of the data to be processed in the target convolutional network layer; the cache capacity of the in-memory computing device is greater than or equal to one-Mth of the maximum processable data size of the largest convolutional network layer in the convolutional neural network, and less than the maximum processable data size of the largest convolutional network layer, where M is the clock multiplier corresponding to the largest convolutional network layer, M≥N, and N is the clock multiplier corresponding to the layer number.

[0010] In one possible implementation, before obtaining the layer number of each convolutional network layer and the clock multiplication factor corresponding to each layer number, the method further includes:

[0011] Determine the maximum amount of data that each convolutional network layer of the convolutional neural network can process;

[0012] For each convolutional network layer, when the maximum amount of data that the convolutional network layer can process is greater than the cache capacity of the in-memory computing device, the clock multiplier corresponding to the convolutional network layer is determined, and the clock multiplier, the layer number of the convolutional network layer, and the network type of the convolutional neural network are stored accordingly; wherein, the value obtained by dividing the maximum amount of data that the convolutional network layer can process by the clock multiplier is not greater than the cache capacity of the in-memory computing device;

[0013] The process of obtaining the layer number of each convolutional network layer and the corresponding clock multiplier for each layer number includes:

[0014] To determine the network type of a convolutional neural network;

[0015] From the preset table of network type and network layer correspondence, find the layer number of each convolutional network layer corresponding to the network type and the clock multiplication factor corresponding to each layer number.

[0016] In one possible implementation, for each layer number, if the clock multiplier corresponding to the layer number is greater than 1, then when processing data in the target convolutional network layer identified by the layer number, the data to be processed in the target convolutional network layer is split into N equal parts, and an N-fold clock is configured for the target convolutional network layer, so that the target convolutional network layer sequentially calculates the N parts of data to be processed using an N-fold clock, including:

[0017] Set the floor number counter to zero;

[0018] Determine whether the clock multiplier corresponding to the layer number counted by the layer number counter is greater than 1; wherein, the convolutional network layer identified by the layer number is the target convolutional network layer;

[0019] If so, configure an N-fold clock for the target convolutional network layer, split the data to be processed in the target convolutional network layer into N equal parts, so that the target convolutional network layer calculates the N parts of data to be processed sequentially with an N-fold clock, and increments the count of the layer number counter by 1;

[0020] Determine whether the layer number counted by the layer number counter is consistent with the total layer number of the convolutional neural network;

[0021] If not, return to the step of determining whether the clock multiplier corresponding to the layer number counted by the layer number counter is greater than 1;

[0022] If so, for the next convolutional neural network, return to the step of obtaining the layer number of each convolutional network layer and the clock multiplication factor corresponding to each layer number, until the data processing of each convolutional neural network is completed.

[0023] In one possible implementation, after determining whether the clock multiplier corresponding to the layer number counted by the layer number counter is greater than 1, the method further includes:

[0024] If not, configure a clock with a frequency multiplied by one for the target convolutional network layer so that the target convolutional network layer calculates the data to be processed at a frequency multiplied by one, and increment the count of the layer number counter by 1.

[0025] According to a second aspect of this disclosure, a data caching system is provided for use in a convolutional neural network composed of in-memory computing devices, the system comprising:

[0026] The control unit is used to obtain the layer number of each convolutional network layer of the convolutional neural network and the clock multiplier corresponding to each layer number; for each layer number, if the clock multiplier corresponding to the layer number is greater than 1, when processing data in the target convolutional network layer identified by the layer number, the data to be processed in the target convolutional network layer is split into N equal parts, and a clock configuration instruction for the target convolutional network layer is sent to the clock configuration unit.

[0027] The clock configuration unit is configured to configure an N-fold clock for the target convolutional network layer after receiving the clock configuration instruction sent by the control unit, so that the target convolutional network layer can sequentially calculate N copies of data to be processed at an N-fold clock frequency.

[0028] A row cache unit is used to cache the data to be processed in the target convolutional network layer when the target convolutional network layer calculates N copies of data to be processed sequentially at a clock frequency of N times.

[0029] Specifically, when processing data in the target convolutional network layer, the in-memory computing device caches at most one-Nth of the data to be processed in the target convolutional network layer; the cache capacity of the in-memory computing device is greater than or equal to one-Mth of the maximum processable data size of the largest convolutional network layer in the convolutional neural network, and less than the maximum processable data size of the largest convolutional network layer, where M is the clock multiplier corresponding to the largest convolutional network layer, M≥N, and N is the clock multiplier corresponding to the layer number.

[0030] In one embodiment, the control unit is further configured to determine the maximum amount of data that each convolutional network layer of the convolutional neural network can process; for each convolutional network layer, when the maximum amount of data that the convolutional network layer can process is greater than the cache capacity of the in-memory computing device, to determine the clock multiplier corresponding to the convolutional network layer, and to store the clock multiplier, the layer number of the convolutional network layer, and the network type of the convolutional neural network accordingly; wherein, the value obtained by dividing the maximum amount of data that the convolutional network layer can process by the clock multiplier is not greater than the cache capacity of the in-memory computing device;

[0031] The control unit is specifically used to obtain the network type of the convolutional neural network; and to find the layer number of each convolutional network layer corresponding to the network type and the clock multiplication factor corresponding to each layer number from a preset network type and network layer correspondence information table.

[0032] According to a third aspect of this disclosure, a data caching device is provided, applied to a convolutional neural network composed of in-memory computing devices, the device comprising:

[0033] The information acquisition module is used to acquire the layer number of each convolutional network layer of the convolutional neural network and the clock multiplication factor corresponding to each layer number;

[0034] The data splitting module is used to split the data to be processed in the target convolutional network layer into N equal parts when processing data in the target convolutional network layer identified by the layer number if the clock multiplier corresponding to the layer number is greater than 1, and to configure the target convolutional network layer with an N-fold clock so that the target convolutional network layer calculates the N parts of the data to be processed sequentially with an N-fold clock.

[0035] Specifically, when processing data in the target convolutional network layer, the in-memory computing device caches at most one-Nth of the data to be processed in the target convolutional network layer; the cache capacity of the in-memory computing device is greater than or equal to one-Mth of the maximum processable data size of the largest convolutional network layer in the convolutional neural network, and less than the maximum processable data size of the largest convolutional network layer, where M is the clock multiplier corresponding to the largest convolutional network layer, M≥N, and N is the clock multiplier corresponding to the layer number.

[0036] In one possible embodiment, the device further includes:

[0037] The clock multiplier determination module is used to determine the maximum amount of data that each convolutional network layer of the convolutional neural network can process. For each convolutional network layer, when the maximum amount of data that the convolutional network layer can process is greater than the cache capacity of the in-memory computing device, the clock multiplier corresponding to the convolutional network layer is determined, and the clock multiplier, the layer number of the convolutional network layer, and the network type of the convolutional neural network are stored accordingly. The maximum amount of data that the convolutional network layer can process divided by the clock multiplier is not less than the cache capacity of the in-memory computing device.

[0038] The information acquisition module is specifically used to acquire the network type of the convolutional neural network; and to find the layer number of each convolutional network layer corresponding to the network type and the clock multiplication factor corresponding to each layer number from a preset network type and network layer correspondence information table.

[0039] According to a fourth aspect of this disclosure, an electronic device is provided, comprising:

[0040] At least one processor; and

[0041] A memory communicatively connected to the at least one processor; wherein,

[0042] The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the methods described in this disclosure.

[0043] According to a fifth aspect of this disclosure, a non-transitory computer-readable storage medium is provided storing computer instructions for causing the computer to perform the methods described in this disclosure.

[0044] The data caching method, system, apparatus, device, and storage medium disclosed herein can determine the corresponding clock multiplier for each convolutional network layer of a convolutional neural network. Before data processing is performed in each convolutional network layer of the convolutional neural network, the clock multiplier corresponding to each convolutional network layer can be obtained. Then, if the corresponding clock multiplier is greater than 1, when processing data in the target convolutional network layer, the data to be processed in the target convolutional network layer is split into N equal parts, and an N-fold clock is configured for the target convolutional network layer, so that the target convolutional network layer sequentially calculates the N parts of data to be processed at an N-fold clock. Wherein, the clock multiplier M corresponding to the largest convolutional network layer is greater than 1, and the cache capacity of the in-memory computing device is greater than or equal to 1 / M of the maximum processable data size of the largest convolutional network layer in the convolutional neural network and less than the maximum processable data size of the largest convolutional network layer, M≥N, and N is the clock multiplier corresponding to the layer number of the target convolutional network layer. In other words, in this disclosure, the cache capacity of the in-memory computing device is less than the maximum processable data volume of the largest convolutional network layer. For convolutional network layers whose maximum processable data volume exceeds the cache capacity of the in-memory computing device, this disclosure can split the data to be processed in these convolutional network layers, so that the cache capacity of the in-memory computing device can meet the data caching requirements of these convolutional network layers during data computation. Furthermore, this disclosure can configure a corresponding clock multiplier for convolutional network layers whose maximum processable data volume exceeds the cache capacity of the in-memory computing device, thereby increasing the data computation rate of these convolutional network layers and ensuring overall data processing efficiency. Therefore, although the data caching method, system, device, equipment, and storage medium of this disclosure reduce the cache capacity of the in-memory computing device, they also ensure the overall data processing efficiency of the convolutional neural network. That is, this disclosure can reduce the waste of cache resources of the in-memory computing device while ensuring computational efficiency.

[0045] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0046] The above and other objects, features, and advantages of this disclosure will become readily apparent from the following detailed description of exemplary embodiments, taken in conjunction with the accompanying drawings. Several embodiments of this disclosure are illustrated in the drawings by way of example and not limitation, in which:

[0047] In the accompanying drawings, the same or corresponding reference numerals indicate the same or corresponding parts.

[0048] Figure 1 A schematic diagram of a CNN network cache is shown;

[0049] Figure 2This illustration shows a schematic diagram of an implementation flow of the data caching method provided in an embodiment of the present disclosure;

[0050] Figure 3 A schematic diagram of clock configuration control provided in an embodiment of this disclosure is shown;

[0051] Figure 4 This diagram illustrates the data splitting process for convolutional network layers provided in an embodiment of the present disclosure.

[0052] Figure 5 This illustration shows a lookup representation intent provided by an embodiment of the present disclosure;

[0053] Figure 6 A schematic diagram of a data caching system provided in an embodiment of this disclosure is shown;

[0054] Figure 7 A schematic diagram of a data caching device provided in an embodiment of this disclosure is shown;

[0055] Figure 8 A schematic diagram of the composition structure of an electronic device according to an embodiment of the present disclosure is shown. Detailed Implementation

[0056] To make the objectives, features, and advantages of this disclosure more apparent and understandable, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0057] Figure 1 A schematic diagram of a CNN network cache is shown, such as Figure 1 As shown, one of the network layers in a CNN (Convolutional Neural Networks) includes N channels, from channel 0 to channel N-1. The input data in the network layer has a length of W and a width of H, and the convolutional kernel is 3×3. Figure 1In the input data of the network layers, the label in each small cell is used to identify the row and column number of the data. For example, "r0c0" indicates that the data is in row 0 and column 0. The data of each layer of the CNN network is cached in rows before being input into the in-memory computing device. That is, the cache capacity of the in-memory computing device needs to meet the data volume of each layer of the CNN. To enable the in-memory computing device to cache data from each layer of the CNN network, the cache capacity of the in-memory computing device is usually set to be no less than the maximum processable data volume of the largest layer in the CNN network. However, when the maximum processable data volume of each layer in the CNN network varies significantly, this characteristic of the cache capacity of the in-memory computing device is obviously a significant waste of resources. Existing methods to reduce the waste of in-memory computing device resources prolong data processing time and affect the computational efficiency of the neural network. To reduce the waste of in-memory computing device cache resources while ensuring computational efficiency, this disclosure provides a data caching method, system, device, equipment, and storage medium. The method provided in this disclosure can be applied to convolutional neural networks composed of in-memory computing devices.

[0058] The technical solutions of the embodiments of this disclosure will now be described with reference to the accompanying drawings.

[0059] Figure 2 This illustration shows a schematic diagram of an implementation flow of the data caching method provided in an embodiment of this disclosure, such as... Figure 2 As shown, the method is applied to a convolutional neural network composed of in-memory computing devices, including:

[0060] S201, obtain the layer number of each convolutional network layer of the convolutional neural network and the clock multiplication factor corresponding to each layer number.

[0061] In this disclosure, convolutional networks include, but are not limited to, CNN (Convolutional Neural Networks), RNN (Recurrent Neural Networks), DNN (Deep Neural Networks), and VGG (Visual Geometry Group) networks. Each convolutional neural network may include multiple network layers, which may specifically be convolutional layers, pooling layers, or fully connected layers.

[0062] In this disclosure, the layer number and corresponding clock multiplier of each network layer can be pre-configured according to the structure of each network layer of the convolutional neural network. The clock multiplier corresponding to each network layer is used to accelerate the processing of the network layer's data according to the corresponding clock multiplier.

[0063] Table 1 is the network layer configuration table of the VGG-z8 network provided in this disclosure. As shown in Table 1, the structural order of each network layer of the VGG-z8 network is Conv1, Conv2, Conv3, Conv4, Conv5, fc1, fc2 and fc3. Then, the network layer numbers “ly1”, “ly2”, “ly3”, “ly4”, “ly5”, “ly6”, “ly7” and “ly8” can be assigned to Conv1, Conv2, Conv3, Conv4, Conv5, fc1, fc2 and fc3 respectively.

[0064] Table 1: Network Layer Configuration Table for VGG-z8 Networks

[0065] Network layer Size of data to be cached Conv1 288Byte Conv2 2880 Bytes Conv3 1344 Byte Conv4 1152 bytes Conv5 960Byte fc1 576 bytes fc2 128 bytes fc3 64Byte

[0066] In one possible implementation, before obtaining the layer number of each convolutional network layer and the clock multiplication factor corresponding to each layer number, the data caching method provided in this disclosure may further include the following steps A1-A2:

[0067] Step A1: Determine the maximum amount of data that each convolutional network layer of the convolutional neural network can process.

[0068] Specifically, the maximum amount of data that each layer of a convolutional neural network can process can be obtained from the configuration information of the convolutional neural network.

[0069] As shown in Table 1, for the VGG-z8 network, the maximum data size that each network layer needs to be cached can be obtained from the VGG-z8 network configuration information as the maximum data size that each layer can process. That is, the maximum data size that the VGG-z8 network layer Conv1 can process is 288 bytes, the maximum data size that the network layer Conv2 can process is 2880 bytes, the maximum data size that the network layer Conv3 can process is 1344 bytes, the maximum data size that the network layer Conv4 can process is 1152 bytes, the maximum data size that the network layer Conv5 can process is 960 bytes, the maximum data size that the network layer fc1 can process is 576 bytes, the maximum data size that the network layer fc2 can process is 128 bytes, and the maximum data size that the network layer fc3 can process is 64 bytes.

[0070] Step A2: For each convolutional network layer, when the maximum amount of data that the convolutional network layer can process is greater than the cache capacity of the in-memory computing device, determine the clock multiplier corresponding to the convolutional network layer, and store the clock multiplier, the layer number of the convolutional network layer, and the network type of the convolutional neural network accordingly.

[0071] The maximum amount of data that the convolutional network layer can process, divided by the clock multiplier, is not greater than the cache capacity of the in-memory computing device.

[0072] In this embodiment of the disclosure, for a convolutional network layer whose maximum processable data volume is greater than the cache capacity of the in-memory computing device, the principle for determining the clock multiplier corresponding to the convolutional network layer is as follows: the clock multiplier corresponding to the convolutional network layer is an integer value greater than the target quotient, where the target quotient = the maximum processable data volume of the convolutional network layer / the cache capacity of the in-memory computing device.

[0073] As shown in Table 1, if the cache capacity of the in-memory computing device is 1280 bytes, then the maximum amount of data that the convolutional network layers Conv2 and Conv3 can process is greater than the cache capacity of the in-memory computing device. Therefore, in order to ensure that the in-memory computing device can cache all the data to be processed in the convolutional network layers Conv2 and Conv3 during data processing, the data to be processed in the convolutional network layers Conv2 and Conv3 needs to be split. Furthermore, in order to ensure data processing efficiency, the corresponding clock multipliers for the convolutional network layers Conv2 and Conv3 need to be determined so that the split data to be processed can be accelerated according to the clock multiplier.

[0074] For the Convolutional Network layer Conv2, the quotient of the maximum amount of data that Conv2 can process divided by the cache capacity of the in-memory computing device can be calculated as 2880Byte / 1280Byte = 2.25. Then, the clock multiplier corresponding to Conv2 can be selected as an integer greater than 2.25. For example, the clock multiplier corresponding to Conv2 can be determined to be 3 or 4, etc.

[0075] For the Convolutional Network layer Conv3, the maximum amount of data that Conv3 can process can be divided by the cache capacity of the in-memory computing device. The quotient is 1344Byte / 1280Byte = 1.055. Then, the clock multiplier corresponding to Conv3 can be selected as an integer greater than 1.05. For example, the clock multiplier corresponding to Conv3 can be determined to be 2 or 3, etc.

[0076] After determining the clock multiplier corresponding to the convolutional network layer, the clock multiplier, layer number, and network type of the convolutional neural network can be stored accordingly. Network types include, but are not limited to, CNN, DNN, VGG, and RNN. For example, if the clock multiplier corresponding to convolutional network layer Conv2 in Table 1 is determined to be 3, the clock multiplier corresponding to convolutional network layer Conv3 is determined to be 2, the network type corresponding to Conv2 and Conv3 is VGG-z8, the layer number of Conv2 is "ly2", and the layer number of Conv3 is "ly3", then the convolutional network layer Conv2, the clock multiplier of 3, the layer number "ly2", and the VGG-z8 network can be stored accordingly, as can the convolutional network layer Conv3, the clock multiplier of 2, the layer number "ly3", and the VGG-z8 network.

[0077] For convolutional network layers whose maximum data processing capacity is no greater than the cache capacity of in-memory computing devices, the clock multiplier corresponding to the convolutional network layer can be directly determined as 1.

[0078] The process of obtaining the layer number of each convolutional network layer and the corresponding clock multiplier of each layer number can specifically include the following steps B1-B2:

[0079] Step B1: Obtain the network type of the convolutional neural network.

[0080] Step B2: From the preset network type and network layer correspondence information table, find the layer number of each convolutional network layer corresponding to the network type and the clock multiplication factor corresponding to each layer number.

[0081] Table 2 presents a table of network types and their corresponding network layers provided in this disclosure. As shown in Table 2, the layer numbers of each convolutional network layer "Conv1"-"Conv5" and "fc1"-"fc3" and their corresponding clock multipliers can be found based on the network type "VGG-z8". For example, the layer number of the convolutional network layer "Conv2" in the "VGG-z8" convolutional neural network is "Ly2" and its clock multiplier is 3. Similarly, based on the network type "CNN", the layer numbers of each convolutional network layer "Input layer", "CONV layer", "ReLU", and "Pooling layer" in the CNN network and their corresponding clock multipliers can be found. For example, the layer number of the convolutional network layer "CONV layer" in the "CNN" convolutional neural network is "L2" and its clock multiplier is 2.

[0082] Table 2: Correspondence between Network Type and Network Layer

[0083]

[0084]

[0085] S202, for each layer number, if the clock multiplier corresponding to the layer number is greater than 1, then when the target convolutional network layer identified by the layer number is processing data, the data to be processed in the target convolutional network layer is split into N equal parts, and an N-fold clock is configured for the target convolutional network layer, so that the target convolutional network layer calculates the N parts of the data to be processed sequentially with an N-fold clock.

[0086] Specifically, when processing data in the target convolutional network layer, the in-memory computing device caches at most 1 / N of the data to be processed in the target convolutional network layer; the cache capacity of the in-memory computing device is greater than or equal to 1 / M of the maximum processable data size of the largest convolutional network layer in the convolutional neural network, and less than the maximum processable data size of the largest convolutional network layer, where M is the clock multiplier corresponding to the largest convolutional network layer, M≥N, and N is the clock multiplier corresponding to the layer number. Taking Table 1 as an example, the largest convolutional network layer in Table 1 is "Conv2". If the clock multiplier corresponding to "Conv2" is determined to be 3, then for the VGGz8 network, M=3.

[0087] To reduce resource waste, this disclosure allows the cache capacity of the in-memory computing device to be less than the maximum processable data size of the largest convolutional network layer in the convolutional neural network, and greater than or equal to one-Mth of the maximum processable data size of the largest convolutional network layer in the convolutional neural network.

[0088] Figure 3 A schematic diagram of clock configuration control provided in an embodiment of this disclosure is shown. Figure 3 The control unit can obtain information such as the layer number and corresponding clock multiplication factor of each network layer of the convolutional neural network. The dynamic clock configuration unit can configure the corresponding clock multiplication factor for the convolutional network layer according to the instructions issued by the control unit. The row cache unit can cache the data to be processed by the convolutional neural network to the in-memory computing device according to the clock multiplication factor configured by the dynamic clock configuration unit when the convolutional network layer is processing data.

[0089] like Figure 3As shown, to enable the in-memory computing device to cache all currently unprocessed data during data processing at each convolutional network layer of the convolutional neural network, for convolutional network layers whose maximum processable data size exceeds the cache capacity of the in-memory computing device, the unprocessed data at that convolutional network layer can be split into multiple data parts with a number equal to the clock multiplier corresponding to that convolutional network layer. Furthermore, the control unit can issue a clock configuration command to the dynamic clock configuration unit, causing the dynamic clock configuration unit to configure the corresponding clock multiplier for that convolutional network layer. During data processing at that convolutional network layer, the split data parts can be processed one by one. To ensure data processing efficiency, the dynamic clock configuration unit can send the clock multiplier configured for that convolutional network layer to the row cache unit. When the convolutional network layer accelerates the processing of each data part according to the corresponding clock multiplier, the row cache unit can cache each split data part in the in-memory computing device.

[0090] For a convolutional network layer whose maximum processable data size is no greater than the cache capacity of the in-memory computing device, since the in-memory computing device can cache all the data to be processed in the convolutional network layer, it is not necessary to split the data to be processed in the convolutional network layer. Therefore, the control unit can issue a clock configuration instruction to the dynamic clock configuration unit to configure a clock multiplier of 1, so that the dynamic clock configuration unit configures a clock multiplier of 1 for the convolutional network layer.

[0091] Figure 4 This illustration shows a schematic diagram of the data splitting process for a convolutional network layer provided in an embodiment of this disclosure, such as... Figure 4 As shown, for each layer number, if the clock multiplier corresponding to the layer number is greater than 1, then when processing data in the target convolutional network layer identified by the layer number, the data to be processed in the target convolutional network layer is split into N equal parts, and an N-fold clock is configured for the target convolutional network layer, so that the target convolutional network layer sequentially calculates the N parts of data to be processed using an N-fold clock, including:

[0092] S401, set the floor number counter to zero.

[0093] In this embodiment of the disclosure, a layer number counter can be set, and data splitting processing can be performed on each convolutional network layer of each convolutional neural network according to the count of the layer number counter.

[0094] S402, determine whether the clock multiplier corresponding to the layer number counted by the layer number counter is greater than 1.

[0095] The convolutional network layer identified by the layer number is the target convolutional network layer.

[0096] If the clock multiplier corresponding to the layer number is greater than 1, it means that the amount of data to be processed in the convolutional network layer corresponding to that layer number is greater than the cache capacity of the in-memory computing device. Therefore, in order for the in-memory computing device to cache all the data to be processed in each operation of the convolutional network layer, it is necessary to split the data to be processed in the convolutional network layer.

[0097] If the clock multiplier corresponding to the layer number counted by the layer number counter is not greater than 1, it means that the amount of data to be processed in the convolutional network layer corresponding to that layer number is not greater than the cache capacity of the in-memory computing device. In this case, a clock multiplier of 1 can be configured for the target convolutional network layer so that the target convolutional network layer can calculate the data to be processed using a clock multiplier of 1, and the count of the layer number counter will be incremented by 1.

[0098] S403, if so, configure an N-fold clock for the target convolutional network layer, split the data to be processed in the target convolutional network layer into N equal parts, so that the target convolutional network layer calculates the N parts of the data to be processed sequentially with an N-fold clock, and increments the count of the layer number counter by 1.

[0099] Where N is the clock multiplier corresponding to the target convolutional network layer.

[0100] Figure 5 This illustration shows a lookup representation intent provided by an embodiment of the present disclosure, such as... Figure 5 As shown, this disclosure allows you to look up the total layer number, special layer number, and clock multiplication factor corresponding to each layer number in various lookup tables (such as lookup tables 1-3) based on the network type of the convolutional neural network. The special layer number refers to a layer number whose corresponding clock multiplication factor is greater than 1.

[0101] For a target convolutional network layer with a clock multiplier greater than 1, the data to be processed in the target convolutional network layer can be divided into N equal parts. The state machine can send the layer number and the corresponding clock multiplier to the clock configuration register and the line cache control register. The clock configuration register can configure the target convolutional network layer with a clock multiplier of N. Then, the target convolutional network layer can calculate the N parts of data to be processed in sequence according to the clock multiplier of N. The line cache control register can cache the data to be processed by the target convolutional network layer each time to the in-memory computing device.

[0102] S404, determine whether the layer number counted by the layer number counter is consistent with the total layer number of the convolutional neural network.

[0103] The layer number counted by the layer number counter is consistent with the total layer number of the convolutional neural network, indicating that all convolutional network layers of the current convolutional neural network have completed data processing, and the next convolutional neural network can then be processed.

[0104] If the layer number counted by the layer number counter is inconsistent with the total layer number of the convolutional neural network, it indicates that there are still convolutional network layers in the current convolutional neural network that have not completed data processing.

[0105] S405, if not, return to the step of determining whether the clock multiplier corresponding to the layer number counted by the layer number counter is greater than 1.

[0106] S406, If yes, for the next convolutional neural network, return to the step of obtaining the layer number of each convolutional network layer and the clock multiplication factor corresponding to each layer number, until the data processing of each convolutional neural network is completed.

[0107] Using the method provided in this disclosure, the corresponding clock multiplier can be determined for each convolutional network layer of a convolutional neural network. Before data processing is performed in each convolutional network layer, the clock multiplier corresponding to each convolutional network layer can be obtained. If the corresponding clock multiplier is greater than 1, then when processing data in the target convolutional network layer, the data to be processed in the target convolutional network layer is split into N equal parts, and an N-fold clock is configured for the target convolutional network layer, so that the target convolutional network layer sequentially calculates the N parts of data to be processed using an N-fold clock. Wherein, the clock multiplier M corresponding to the largest convolutional network layer is greater than 1, the cache capacity of the in-memory computing device is greater than or equal to 1 / M of the maximum processable data size of the largest convolutional network layer in the convolutional neural network and less than the maximum processable data size of the largest convolutional network layer, M≥N, and N is the clock multiplier corresponding to the layer number of the target convolutional network layer. In other words, in this disclosure, the cache capacity of the in-memory computing device is less than the maximum processable data volume of the largest convolutional network layer. For convolutional network layers whose maximum processable data volume exceeds the cache capacity of the in-memory computing device, this disclosure can split the data to be processed in these convolutional network layers, so that the cache capacity of the in-memory computing device can meet the data caching requirements of these convolutional network layers during data computation. Furthermore, this disclosure can configure a corresponding clock multiplier for convolutional network layers whose maximum processable data volume exceeds the cache capacity of the in-memory computing device, thereby increasing the data computation rate of these convolutional network layers and ensuring overall data processing efficiency. Therefore, although the data caching method, system, device, equipment, and storage medium of this disclosure reduce the cache capacity of the in-memory computing device, they also ensure the overall data processing efficiency of the convolutional neural network. That is, this disclosure can reduce the waste of cache resources of the in-memory computing device while ensuring computational efficiency.

[0108] Based on the same inventive concept, and according to the data caching method provided in the above embodiments of this disclosure, another embodiment of this disclosure also provides a data caching system applied to a convolutional neural network composed of in-memory computing devices, the schematic diagram of which is shown below. Figure 6As shown, it specifically includes:

[0109] The control unit 601 is used to obtain the layer number of each convolutional network layer of the convolutional neural network and the clock multiplier corresponding to each layer number; for each layer number, if the clock multiplier corresponding to the layer number is greater than 1, when processing data in the target convolutional network layer identified by the layer number, the data to be processed in the target convolutional network layer is split into N equal parts, and a clock configuration instruction for the target convolutional network layer is sent to the clock configuration unit.

[0110] The clock configuration unit 602 is configured to configure an N-fold clock for the target convolutional network layer after receiving the clock configuration instruction sent by the control unit, so that the target convolutional network layer calculates N copies of data to be processed sequentially at an N-fold clock frequency.

[0111] The row cache unit 603 is used to cache the data to be processed in the target convolutional network layer when the target convolutional network layer calculates N copies of data to be processed sequentially at a clock frequency of N times.

[0112] Specifically, when processing data in the target convolutional network layer, the in-memory computing device caches at most one-Nth of the data to be processed in the target convolutional network layer; the cache capacity of the in-memory computing device is greater than or equal to one-Mth of the maximum processable data size of the largest convolutional network layer in the convolutional neural network, and less than the maximum processable data size of the largest convolutional network layer, where M is the clock multiplier corresponding to the largest convolutional network layer, M≥N, and N is the clock multiplier corresponding to the layer number.

[0113] The system provided in this disclosure uses a memory computing device whose cache capacity is less than the maximum processable data volume of the largest convolutional network layer. For convolutional network layers whose maximum processable data volume exceeds the cache capacity of the memory computing device, this disclosure can split the data to be processed in these convolutional network layers, ensuring that the cache capacity of the memory computing device can meet the data caching requirements of these convolutional network layers during data computation. Furthermore, this disclosure can configure a corresponding clock multiplier for convolutional network layers whose maximum processable data volume exceeds the cache capacity of the memory computing device, thereby increasing the data computation rate of these convolutional network layers and ensuring overall data processing efficiency. Therefore, although the data caching method, system, device, equipment, and storage medium of this disclosure reduce the cache capacity of the memory computing device, they also ensure the overall data processing efficiency of the convolutional neural network. In other words, this disclosure can reduce the waste of cache resources of the memory computing device while ensuring computational efficiency.

[0114] In one embodiment, the control unit 601 is further configured to determine the maximum amount of data that each convolutional network layer of the convolutional neural network can process; for each convolutional network layer, when the maximum amount of data that the convolutional network layer can process is greater than the cache capacity of the in-memory computing device, to determine the clock multiplier corresponding to the convolutional network layer, and to store the clock multiplier, the layer number of the convolutional network layer, and the network type of the convolutional neural network accordingly; wherein, the value obtained by dividing the maximum amount of data that the convolutional network layer can process by the clock multiplier is not greater than the cache capacity of the in-memory computing device;

[0115] The control unit 601 is specifically used to obtain the network type of the convolutional neural network; and to find the layer number of each convolutional network layer corresponding to the network type and the clock multiplication factor corresponding to each layer number from a preset network type and network layer correspondence information table.

[0116] In one embodiment, the control unit 601 is specifically configured to: set the layer number counter to zero; determine whether the clock multiplier corresponding to the layer number counted by the layer number counter is greater than 1; wherein the convolutional network layer identified by the layer number is the target convolutional network layer; if so, control the clock configuration unit 602 to configure an N-fold clock for the target convolutional network layer, split the data to be processed of the target convolutional network layer into N equal parts, so that the target convolutional network layer sequentially calculates the N parts of data to be processed at an N-fold clock, and increments the count of the layer number counter by 1; determine whether the layer number counted by the layer number counter is consistent with the total layer number of the convolutional neural network; if not, return to the step of determining whether the clock multiplier corresponding to the layer number counted by the layer number counter is greater than 1; if so, for the next convolutional neural network, return to the step of obtaining the layer number of each convolutional network layer and the clock multiplier corresponding to each layer number, until the data processing of each convolutional neural network is completed.

[0117] In one embodiment, the control unit 601 is specifically configured, after determining that the clock multiplier corresponding to the layer number counted by the layer number counter is not greater than 1, to control the clock configuration unit 602 to configure a clock with a frequency multiplier for the target convolutional network layer, so that the target convolutional network layer calculates the data to be processed with a clock with a frequency multiplier, and increments the count of the layer number counter by 1.

[0118] Based on the same inventive concept, and according to the data caching method provided in the above embodiments of this disclosure, another embodiment of this disclosure also provides a data caching device applied to a convolutional neural network composed of in-memory computing devices, the structural schematic diagram of which is shown below. Figure 7 As shown, it specifically includes:

[0119] The information acquisition module 701 is used to acquire the layer number of each convolutional network layer of the convolutional neural network and the clock multiplication factor corresponding to each layer number;

[0120] The data splitting module 702 is used to split the data to be processed in the target convolutional network layer into N equal parts when processing data in the target convolutional network layer identified by the layer number if the clock multiplier corresponding to the layer number is greater than 1, and to configure the target convolutional network layer with an N-fold clock so that the target convolutional network layer calculates the N parts of the data to be processed sequentially with an N-fold clock.

[0121] Specifically, when processing data in the target convolutional network layer, the in-memory computing device caches at most one-Nth of the data to be processed in the target convolutional network layer; the cache capacity of the in-memory computing device is greater than or equal to one-Mth of the maximum processable data size of the largest convolutional network layer in the convolutional neural network, and less than the maximum processable data size of the largest convolutional network layer, where M is the clock multiplier corresponding to the largest convolutional network layer, M≥N, and N is the clock multiplier corresponding to the layer number.

[0122] Using the apparatus provided in this disclosure, the cache capacity of the in-memory computing device is less than the maximum processable data volume of the largest convolutional network layer. For convolutional network layers whose maximum processable data volume exceeds the cache capacity of the in-memory computing device, this disclosure can split the data to be processed in these convolutional network layers, so that the cache capacity of the in-memory computing device can meet the data caching requirements of these convolutional network layers during data computation. Furthermore, this disclosure can configure a corresponding clock multiplier for convolutional network layers whose maximum processable data volume exceeds the cache capacity of the in-memory computing device, thereby increasing the data computation rate of these convolutional network layers and ensuring overall data processing efficiency. Therefore, although the data caching method, system, apparatus, device, and storage medium of this disclosure reduce the cache capacity of the in-memory computing device, they also ensure the overall data processing efficiency of the convolutional neural network. That is, this disclosure can reduce the waste of cache resources of the in-memory computing device while ensuring computational efficiency.

[0123] In one possible embodiment, the device further includes:

[0124] A clock multiplier determination module (not shown in the figure) is used to determine the maximum amount of data that each convolutional network layer of the convolutional neural network can process. For each convolutional network layer, when the maximum amount of data that the convolutional network layer can process is greater than the cache capacity of the in-memory computing device, the clock multiplier corresponding to the convolutional network layer is determined, and the clock multiplier, the layer number of the convolutional network layer, and the network type of the convolutional neural network are stored accordingly. The maximum amount of data that the convolutional network layer can process divided by the clock multiplier is not less than the cache capacity of the in-memory computing device.

[0125] The information acquisition module 701 is specifically used to acquire the network type of the convolutional neural network; and to find the layer number of each convolutional network layer corresponding to the network type and the clock multiplication factor corresponding to each layer number from a preset network type and network layer correspondence information table.

[0126] In one possible implementation, the data splitting module 702 is specifically used to: set the layer number counter to zero; determine whether the clock multiplier corresponding to the layer number counted by the layer number counter is greater than 1; wherein the convolutional network layer identified by the layer number is the target convolutional network layer; if so, configure an N-fold clock for the target convolutional network layer, split the data to be processed of the target convolutional network layer into N equal parts, so that the target convolutional network layer calculates the N parts of the data to be processed sequentially with an N-fold clock, and increments the count of the layer number counter by 1; determine whether the layer number counted by the layer number counter is consistent with the total layer number of the convolutional neural network; if not, return to the step of determining whether the clock multiplier corresponding to the layer number counted by the layer number counter is greater than 1; if so, for the next convolutional neural network, return to the step of obtaining the layer number of each convolutional network layer of the convolutional neural network and the clock multiplier corresponding to each layer number, until the data processing of each convolutional neural network is completed.

[0127] In one possible implementation, the data splitting module 702 is specifically used to configure a clock with a frequency multiplier of one for the target convolutional network layer after determining whether the clock multiplier corresponding to the layer number counted by the layer number counter is greater than 1, so that the target convolutional network layer calculates the data to be processed with a clock with a frequency multiplier of one, and increments the count of the layer number counter by 1.

[0128] According to embodiments of this disclosure, this disclosure also provides an electronic device and a readable storage medium.

[0129] Figure 8A schematic block diagram of an example electronic device 800 that can be used to implement embodiments of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0130] like Figure 8 As shown, device 800 includes a computing unit 801, which can perform various appropriate actions and processes based on a computer program stored in read-only memory (ROM) 802 or a computer program loaded from storage unit 808 into random access memory (RAM) 803. RAM 803 may also store various programs and data required for the operation of device 800. The computing unit 801, ROM 802, and RAM 803 are interconnected via bus 804. Input / output (I / O) interface 805 is also connected to bus 804.

[0131] Multiple components in device 800 are connected to I / O interface 805, including: input unit 806, such as keyboard, mouse, etc.; output unit 807, such as various types of monitors, speakers, etc.; storage unit 808, such as disk, optical disk, etc.; and communication unit 809, such as network card, modem, wireless transceiver, etc. Communication unit 809 allows device 800 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0132] The computing unit 801 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 801 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 801 performs the various methods and processes described above, such as the data caching method. For example, in some embodiments, the data caching method may be implemented as a computer software program tangibly contained in a machine-readable medium, such as storage unit 808. In some embodiments, part or all of the computer program may be loaded and / or installed on device 800 via ROM 802 and / or communication unit 809. When the computer program is loaded into RAM 803 and executed by the computing unit 801, one or more steps of the data caching method described above may be performed. Alternatively, in other embodiments, the computing unit 801 may be configured to perform the data caching method by any other suitable means (e.g., by means of firmware).

[0133] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), system-on-a-chip (SoCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0134] The program code used to implement the methods of this disclosure may be written in any combination of one or more programming languages. This program code may be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code may be executed entirely on a machine, partially on a machine, as a standalone software package partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0135] In the context of this disclosure, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can be, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0136] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the computer. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0137] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as a data server), or computing systems that include middleware components (e.g., an application server), or computing systems that include frontend components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with embodiments of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., a communication network). Examples of communication networks include local area networks (LANs), wide area networks (WANs), and the Internet.

[0138] Computer systems can include clients and servers. Clients and servers are generally located far apart and typically interact via communication networks. Client-server relationships are created by computer programs running on the respective computers and having a client-server relationship with each other. Servers can be cloud servers, servers in distributed systems, or servers incorporating blockchain technology.

[0139] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this disclosure can be achieved, and this is not limited herein.

[0140] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this disclosure, "a plurality of" means two or more, unless otherwise explicitly specified.

[0141] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A data caching method, characterized by, The method is applied to a convolutional neural network composed of a memory-compute integrated device, and the method comprises: determining the maximum processable data amount of each convolutional network layer of the convolutional neural network; for each convolutional network layer, when the maximum processable data amount of the convolutional network layer is greater than the cache capacity of the memory-compute integrated device, determining the clock frequency multiplication number corresponding to the convolutional network layer, and storing the clock frequency multiplication number, the layer number of the convolutional network layer, and the network type of the convolutional neural network correspondingly; wherein the value obtained by dividing the maximum processable data amount of the convolutional network layer by the clock frequency multiplication number is not greater than the cache capacity of the memory-compute integrated device; obtaining the layer number of each convolutional network layer of the convolutional neural network and the clock frequency multiplication number corresponding to each layer number; for each layer number, if the clock frequency multiplication number corresponding to the layer number is greater than 1, when data processing is performed on the target convolutional network layer identified by the layer number, the to-be-processed data of the target convolutional network layer is split into N equal parts, and the target convolutional network layer is configured with a clock with N times frequency, so that the target convolutional network layer calculates the N parts of to-be-processed data in turn with the clock with N times frequency; wherein, when data processing is performed on the target convolutional network layer, at most one N-th of the to-be-processed data of the target convolutional network layer is cached in the memory-compute integrated device; the cache capacity of the memory-compute integrated device is greater than or equal to one M-th of the maximum processable data size of the largest convolutional network layer in the convolutional neural network, and is less than the maximum processable data size of the largest convolutional network layer, M is the clock frequency multiplication number corresponding to the largest convolutional network layer, M≥N, and N is the clock frequency multiplication number corresponding to the layer number.

2. The method of claim 1, wherein, The obtaining of the layer number of each convolutional network layer of the convolutional neural network and the clock frequency multiplication number corresponding to each layer number comprises: obtaining the network type of the convolutional neural network; from a preset network type and network layer corresponding information table, finding the layer number of each convolutional network layer corresponding to the network type and the clock frequency multiplication number corresponding to each layer number.

3. The method of claim 1, wherein, The step of, for each layer number, if the clock frequency multiplication number corresponding to the layer number is greater than 1, when data processing is performed on the target convolutional network layer identified by the layer number, the to-be-processed data of the target convolutional network layer is split into N equal parts, and the target convolutional network layer is configured with a clock with N times frequency, so that the target convolutional network layer calculates the N parts of to-be-processed data in turn with the clock with N times frequency, comprises: setting a layer number counter to zero; determining whether the clock frequency multiplication number corresponding to the layer number counted by the layer number counter is greater than 1; wherein the convolutional network layer identified by the layer number is a target convolutional network layer; if yes, configuring the target convolutional network layer with a clock with N times frequency, splitting the to-be-processed data of the target convolutional network layer into N equal parts, so that the target convolutional network layer calculates the N parts of to-be-processed data in turn with the clock with N times frequency, and increasing the count of the layer number counter by 1; determining whether the layer number counted by the layer number counter is consistent with the total layer number of the convolutional neural network; if not, returning to perform the step of determining whether the clock frequency multiplication number corresponding to the layer number counted by the layer number counter is greater than 1; If yes, the step of obtaining the layer number of each convolutional network layer of the convolutional neural network and the clock frequency multiplication number corresponding to each layer number is returned for the next convolutional neural network, until the data processing of each convolutional neural network ends.

4. The method of claim 3, wherein, After the determination of whether the clock frequency multiplication number corresponding to the layer number counted by the layer number counter is greater than 1, the method further comprises: If no, a clock with a frequency of one is configured for the target convolutional network layer, so that the target convolutional network layer calculates the data to be processed at a clock with a frequency of one, and the count of the layer number counter is incremented by 1.

5. A data caching system, characterized by, The system is applied to a convolutional neural network composed of a memory-computing integrated device, and the system comprises: A control unit is configured to determine the maximum processable data amount of each convolutional network layer of the convolutional neural network; for each convolutional network layer, when the maximum processable data amount of the convolutional network layer is greater than the cache capacity of the memory-computing integrated device, the clock frequency multiplication number corresponding to the convolutional network layer is determined, and the clock frequency multiplication number, the layer number of the convolutional network layer, and the network type of the convolutional neural network are stored correspondingly; wherein the value obtained by dividing the maximum processable data amount of the convolutional network layer by the clock frequency multiplication number is not greater than the cache capacity of the memory-computing integrated device; The control unit is further configured to obtain the layer number of each convolutional network layer of the convolutional neural network and the clock frequency multiplication number corresponding to each layer number; for each layer number, if the clock frequency multiplication number corresponding to the layer number is greater than 1, when a target convolutional network layer identified by the layer number performs data processing, the data to be processed of the target convolutional network layer is split into N equal parts, and a clock configuration instruction for the target convolutional network layer is sent to a clock configuration unit; The clock configuration unit is configured to, after receiving the clock configuration instruction sent by the control unit, configure a clock with a frequency of N times for the target convolutional network layer, so that the target convolutional network layer calculates the N parts of data to be processed in turn at a clock with a frequency of N times. A row buffer unit is configured to, when the target convolutional network layer calculates the N parts of data to be processed in turn at a clock with a frequency of N times, buffer the data to be processed of the target convolutional network layer. Wherein, at most one N-th of the data to be processed of the target convolutional network layer is buffered in the memory-computing integrated device when the target convolutional network layer performs data processing; the cache capacity of the memory-computing integrated device is greater than or equal to one M-th of the maximum processable data size of the largest convolutional network layer in the convolutional neural network, and is less than the maximum processable data size of the largest convolutional network layer, M is the clock frequency multiplication number corresponding to the largest convolutional network layer, M≥N, and N is the clock frequency multiplication number corresponding to the layer number.

6. The system of claim 5, wherein The control unit is specifically configured to obtain the network type of the convolutional neural network; and find the layer number of each convolutional network layer and the clock frequency multiplication number corresponding to each layer number corresponding to the network type from a preconfigured network type and network layer correspondence information table.

7. A data cache apparatus, characterized by The device is applied to a convolutional neural network composed of a memory-computing integrated device, and the device comprises: The frequency multiplication number determination module is configured to determine a maximum processable data amount of each convolutional network layer of the convolutional neural network; for each convolutional network layer, when the maximum processable data amount of the convolutional network layer is greater than the cache capacity of the storage-computing integrated device, a clock frequency multiplication number corresponding to the convolutional network layer is determined, and the clock frequency multiplication number, the layer number of the convolutional network layer, and the network type of the convolutional neural network are stored correspondingly; wherein the maximum processable data amount of the convolutional network layer divided by the clock frequency multiplication number is not less than the cache capacity of the storage-computing integrated device; The information acquisition module is configured to acquire the layer number of each convolutional network layer of the convolutional neural network and the clock frequency multiplication number corresponding to each layer number. The data splitting module is configured to, for each layer number, if the clock frequency multiplication number corresponding to the layer number is greater than 1, split the to-be-processed data of the target convolutional network layer into N equal parts when the target convolutional network layer performs data processing, and configure the target convolutional network layer with a clock of N frequency multiplication, so that the target convolutional network layer calculates the N parts of to-be-processed data in turn with the clock of N frequency multiplication. The storage-computing integrated device can at most cache one Nth of the to-be-processed data of the target convolutional network layer when the target convolutional network layer performs data processing; the cache capacity of the storage-computing integrated device is greater than or equal to one Mth of the maximum processable data size of the largest convolutional network layer in the convolutional neural network, and is less than the maximum processable data size of the largest convolutional network layer, M is the clock frequency multiplication number corresponding to the largest convolutional network layer, M≥N, N is the clock frequency multiplication number corresponding to the layer number.

8. The apparatus of claim 7, wherein, The information acquisition module is specifically configured to acquire the network type of the convolutional neural network; and find the layer number of each convolutional network layer and the clock frequency multiplication number corresponding to each layer number from a preset network type and network layer corresponding information table corresponding to the network type.

9. An electronic device, comprising: The information acquisition module is specifically configured to acquire the network type of the convolutional neural network; and find the layer number of each convolutional network layer and the clock frequency multiplication number corresponding to each layer number from a preset network type and network layer corresponding information table corresponding to the network type. At least one processor; and The memory is in communication with the at least one processor; wherein The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method of any one of claims 1-4.

10. A non-transitory computer-readable storage medium having stored thereon computer instructions, wherein, The computer instructions are used to enable the computer to execute the method of any one of claims 1-4.

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