Method for packaging tsv products

Abstract

This invention discloses a TSV product packaging method, relating to the field of substrate product packaging design technology. It provides a method to increase chip capacity by stacking more chips within a limited space. The method includes: attaching a first TSV chip and a second TSV chip to a first substrate at predetermined positions, with a gap between them; attaching a first FC chip to an adapter substrate at predetermined positions, and cutting the substrate to obtain an adapter substrate containing only the first FC chip; placing the adapter substrate on top of the first and second TSV chips, with the first FC chip located between them and its upper surface facing the upper surface of the first substrate; and sequentially placing a second FC chip, a third FC chip, and a fourth FC chip on the adapter substrate.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of TSV packaging design of adapter substrate, and more particularly to a TSV product packaging method. BACKGROUND

[0002] The thickness and size of the finished chip of the Memory product are getting smaller and smaller. In the basic design process, if the capacity of the chip is to be large, more and more chips need to be stacked in the limited space. Therefore, in addition to thinning the thickness of the chip, the space utilization of the chip can also be considered. SUMMARY

[0003] The embodiment of the present application provides a TSV product packaging method, which can provide a method for increasing the capacity of the chip and stacking more chips in the limited space.

[0004] The embodiment of the present application provides a TSV product packaging method, which comprises:

[0005] The first TSV chip and the second TSV chip are pasted on the first substrate according to the set position, and a gap is left between the first TSV chip and the second TSV chip;

[0006] The first FC chip is pasted on the adapter substrate according to the set position, and the adapter substrate including only the first FC chip is obtained by cutting;

[0007] The adapter substrate is arranged on the upper layer of the first TSV chip and the second TSV chip, the first FC chip is located between the first TSV chip and the second TSV chip, and the upper surface of the first FC chip is opposite to the upper surface of the first substrate;

[0008] The second FC chip, the third FC chip and the fourth FC chip are sequentially arranged on the adapter substrate.

[0009] Preferably, the first FC chip is located between the first TSV chip and the second TSV chip, and the two sides of the first FC chip are not in contact with the first TSV chip and the second TSV chip.

[0010] Preferably, the third FC chip is located between the second FC chip and the fourth FC chip, and the two sides of the third FC chip are not in contact with the second FC chip and the fourth FC chip.

[0011] Preferably, the length, width and thickness of the first FC chip and the third FC chip are consistent.

[0012] Preferably, the length, width and thickness of the first TSV chip and the second TSV chip are consistent; and / or

[0013] The length, width and thickness of the second FC chip and the fourth FC chip are consistent.

[0014] Preferably, the setting the adapter substrate on the upper layer of the first TSV chip and the second TSV chip specifically comprises:

[0015] The adapter substrate is set on the upper layer of the first TSV chip and the second TSV chip through a flip process.

[0016] The embodiment of the present application provides a TSV product packaging method, characterized in that comprising: pasting a first TSV chip and a second TSV chip according to a set position on a first substrate, and leaving a gap between the first TSV chip and the second TSV chip; pasting a first FC chip according to a set position on an adapter substrate, and obtaining the adapter substrate including only the first FC chip through cutting; setting the adapter substrate on the upper layer of the first TSV chip and the second TSV chip, the first FC chip is located between the first TSV chip and the second TSV chip, and the upper surface of the first FC chip is opposite to the upper surface of the first substrate; sequentially setting a second FC chip, a third FC chip and a fourth FC chip on the adapter substrate. The method sets the TSV chip on the first substrate, sets the adapter substrate pasted with the first FC chip on the TSV chip, and then sequentially sets three FC chips on the adapter substrate, so that different size chips are stacked together, the space utilization of the chips on one substrate is increased, and the problems of stacking a large number of chips in a limited space and increasing the space utilization of the chips are solved. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0018] Figure 1 The TSV product packaging method flowchart provided by the embodiment of the present application;

[0019] Figure 2 The TSV product packaging structure schematic diagram provided by the embodiment of the present application;

[0020] Figure 3A The TSV chip setting structure schematic diagram provided by the embodiment of the present application on the first substrate;

[0021] Figure 3BA first FC chip structure provided by the embodiment of the present application is arranged on a conversion substrate.

[0022] Figure 3C A conversion substrate structure provided by the embodiment of the present application is cut to include only a single first FC chip.

[0023] Figure 3D A conversion substrate provided by the embodiment of the present application is arranged on a TSV chip upper layer structure.

[0024] Figure 3E A second FC chip structure provided by the embodiment of the present application is arranged on a conversion substrate.

[0025] Figure 3F A third FC chip structure provided by the embodiment of the present application is arranged on a conversion substrate.

[0026] Wherein, 101 is a first substrate, 102 is a chip bump, 103-1 is a first TSV chip, 103-2 is a second TSV chip, 104 is a substrate bump, 105 is a conversion substrate, 106 is a first FC chip, 107 is a second FC chip, 108 is a third FC chip, and 109 is a fourth FC chip. DETAILED DESCRIPTION

[0027] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0028] Figure 1 A TSV product packaging method flowchart provided by the embodiment of the present application, Figure 2 A TSV product packaging structure provided by the embodiment of the present application, Figure 3A A TSV chip structure provided by the embodiment of the present application is arranged on a first substrate. Figure 3B A first FC chip structure provided by the embodiment of the present application is arranged on a conversion substrate. Figure 3C A conversion substrate structure provided by the embodiment of the present application is cut to include only a single first FC chip. Figure 3D A conversion substrate provided by the embodiment of the present application is arranged on a TSV chip upper layer structure. Figure 3E A second FC chip structure provided by the embodiment of the present application is arranged on a conversion substrate. Figure 3F A third FC chip structure provided by the embodiment of the present application is arranged on a conversion substrate. The following will be described in combination with Figure 2 ,Figures 3A-3F For example, the TSV product packaging method provided by the embodiment of the application is described in detail.

[0029] Specifically, as shown in the figure, Figure 1 The TSV product packaging method provided by the embodiment of the application comprises the following steps:

[0030] Step 101, according to the set position, the first TSV chip and the second TSV chip are pasted on the first substrate, and a gap is left between the first TSV chip and the second TSV chip;

[0031] Step 102, according to the set position, the first FC chip is pasted on the adapter substrate, and the adapter substrate including only the first FC chip is obtained by cutting;

[0032] Step 103, the adapter substrate is arranged on the upper layer of the first TSV chip and the second TSV chip, the first FC chip is located between the first TSV chip and the second TSV chip, and the upper surface of the first FC chip is opposite to the upper surface of the first substrate;

[0033] Step 104, the second FC chip, the third FC chip and the fourth FC chip are arranged on the adapter plate in sequence.

[0034] In step 101, as shown in the figure, Figure 3A The first TSV (Through-Silicon Via, vertical electrical interconnection through silicon substrate) chip 103-1 and the second TSV chip 103-2 are pasted on the provided first substrate 101 according to the set position, and it should be pointed out that the setting position of the first TSV chip 103-1 and the second TSV chip 103-2 on the first substrate 101 is pre-set, and again, the setting position of the first TSV chip 103-1 and the second TSV chip 103-2 on the first substrate 101 is not limited.

[0035] Further, since the upper side of the first substrate 101 also needs to be provided with the adapter substrate 105, and the lower side of the adapter substrate 105 also pastes the first FC (Flip Chip, flip chip) chip 106, therefore, a gap needs to be left between the first TSV chip 103-1 and the second TSV chip 103-2, and the width of the gap needs to be greater than the width of the first FC chip 106 arranged on the adapter substrate 105. It should be pointed out that the width of the gap here refers to the distance between the first TSV chip 103-1 and the second TSV chip 103-2, and accordingly, the width of the first FC chip 106 refers to the width of the first FC chip 106 when the first FC chip 106 is arranged between the first TSV chip 103-1 and the second TSV chip 103-2.

[0036] It should be noted that when the first TSV chip and the second TSV chip are disposed on the first substrate, the first TSV chip, the second TSV chip and the first substrate also include chip bumps, that is, there are chip bumps between the first TSV chip and the first substrate, and there are chip bumps between the second TSV chip and the first substrate.

[0037] In step 102, as Figure 3B As shown, the first FC chip 106 is first attached to the adapter substrate 105. After multiple first FC chips 106 are attached to the designated positions on the adapter substrate 105, the adapter substrate 105 can be UV-cut, as shown. Figure 3C As shown, the adapter substrate 105 is cut into an adapter substrate 105 that includes only one first FC chip 106.

[0038] It should be noted that, in the embodiments of the present invention, for example, multiple chips can be set on the first substrate by chip stacking. Therefore, although the size of the adapter substrate, which only includes a first FC chip, obtained by UV cutting is smaller than that of the first substrate, three chips of different sizes can still be attached to one side of it. Furthermore, the size of the chips set on the adapter substrate is not specifically limited.

[0039] In step 103, as Figure 3D The aforementioned adapter substrate 105, consisting of only one first FC chip 106, is flip-chip mounted on top of the first TSV chip 103-1 and the second TSV chip 103-2. It should be noted that when mounting the adapter substrate 105 on top of the first TSV chip 103-1 and the second TSV chip 103-2, it is necessary to ensure that the first FC chip is located between the first and second TSV chips, and that the distances between the first FC chip and the first and second TSV chips are equal. Furthermore, the upper surface of the first FC chip 106 is opposite to the upper surface of the first substrate 101.

[0040] Furthermore, a substrate bump 104 is also included between the first TSV chip 103-1, the second TSV chip 103-2, and the adapter substrate 105, and a corresponding substrate bump 104 is also included between the first TC chip and the adapter substrate 105.

[0041] In step 104, as Figure 3E and 3F As shown, on the other side of the adapter substrate 105, that is, on the side where the first FC chip 106 is not provided, the second FC chip 107, the third FC chip 108 and the fourth FC chip 109 are sequentially provided.

[0042] It should be noted that the second FC chip, the third FC chip and the fourth FC chip arranged on the other side of the adapter substrate have gaps therebetween, that is, the third FC chip does not contact the second FC chip and the fourth FC chip, and further, the second FC chip, the third FC chip and the fourth FC chip and the adapter substrate all include substrate bumps therebetween.

[0043] Further, the second FC chip 107 and the fourth FC chip 109 have the same size and are located directly above the first TSV chip 103-1 and the second TSV chip 103-2 respectively, and the third FC chip 108 above the first FC chip 106 has the same size as the first FC chip 106, and finally a TSV product packaging structure of a plurality of stackable chips as shown in FIG. 8 is obtained. Figure 2

[0044] In summary, the embodiment of the present application provides a TSV product packaging method, characterized in that, comprising: pasting a first TSV chip and a second TSV chip according to a set position on a first substrate, and leaving a gap between the first TSV chip and the second TSV chip; pasting a first FC chip according to a set position on an adapter substrate, and obtaining an adapter substrate including only the first FC chip by cutting; arranging the adapter substrate on an upper layer of the first TSV chip and the second TSV chip, the first FC chip is located between the first TSV chip and the second TSV chip, and the upper surface of the first FC chip is opposite to the upper surface of the first substrate; sequentially arranging a second FC chip, a third FC chip and a fourth FC chip on the adapter substrate. The method arranges TSV chips on the first substrate, and then arranges an adapter substrate with a pasted first FC chip on the TSV chips, and then sequentially arranges three FC chips on the adapter substrate, so as to stack chips of different sizes together, increase the space utilization of chips on a substrate, and solve the problems of stacking a large number of chips in a limited space and increasing the space utilization of chips.

[0045] Although preferred embodiments of the application have been described, those skilled in the art will be able to make additional changes and modifications to these embodiments once they have the basic inventive concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0046] Obviously, those skilled in the art can make various modifications and variations to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.​

Claims

1. A TSV product packaging method, characterized in that, include: A first TSV chip and a second TSV chip are attached to a first substrate at predetermined positions, with a gap between the first TSV chip and the second TSV chip. A first FC chip is attached to a predetermined position on the adapter substrate, and an adapter substrate containing only the first FC chip is obtained by cutting. The adapter substrate is disposed on the upper layer of the first TSV chip and the second TSV chip, the first FC chip is located between the first TSV chip and the second TSV chip, and the upper surface of the first FC chip is opposite to the upper surface of the first substrate. A second FC chip, a third FC chip, and a fourth FC chip are sequentially disposed on the adapter substrate; The first FC chip is located between the first TSV chip and the second TSV chip, and neither side of the first FC chip is in contact with the first TSV chip or the second TSV chip; the third FC chip is located between the second FC chip and the fourth FC chip, and neither side of the third FC chip is in contact with the second FC chip or the fourth FC chip. The second FC chip and the fourth FC chip have the same size, and the second FC chip and the fourth FC chip are respectively located directly above the first TSV chip and the second TSV chip. The third FC chip is located above the first FC chip, and the first FC chip and the third FC chip have the same size. The process of attaching a first FC chip to a predetermined position on the adapter substrate and then cutting it to obtain an adapter substrate containing only the first FC chip specifically involves: First, the first FC chip is pasted onto the adapter substrate. After pasting multiple first FC chips at a set position on the adapter substrate, the adapter substrate is UV cut to cut the adapter substrate into an adapter substrate containing only one first FC chip. The adapter substrate obtained by UV cutting contains only one of the first FC chips. Its size is smaller than that of the first substrate, but three chips of different sizes are attached to one side of it.

2. The packaging method as described in claim 1, characterized in that, The first FC chip and the third FC chip have the same length, width and thickness.

3. The packaging method as described in claim 1, characterized in that, The first TSV chip and the second TSV chip have the same length, width, and thickness; and / or The second FC chip and the fourth FC chip have the same length, width and thickness.

4. The packaging method as described in claim 1, characterized in that, The step of placing the adapter substrate on top of the first TSV chip and the second TSV chip specifically includes: The adapter substrate is disposed on the upper layer of the first TSV chip and the second TSV chip using a flip-chip process.

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