Method for preparing heterojunction solar cell and heterojunction solar cell

The N-type doped layer is prepared by combining VHF-PECVD and RF-PECVD, which solves the problems of poor crystallinity and high cost during the deposition of microcrystalline silicon layer in the prior art, and achieves high efficiency, low cost and high stability of heterojunction batteries.

CN115360267BActive Publication Date: 2025-03-28SUZHOU MAXWELL TECH CO LTD
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Patent Information

Application Number
CN202211034337.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-08-26
Publication Date
2025-03-28
Estimated Expiration
2042-08-26

AI Technical Summary

Technical Problem

In the prior art, RF-PECVD and VHF-PECVD alone cannot meet the industrial high efficiency, low cost and high stability requirements of heterojunction batteries, especially in the deposition process of microcrystalline silicon layer, there are problems of poor crystallinity, large hydrogen consumption and ion bombardment.

Method used

An N-type doped layer is prepared by combining VHF-PECVD and RF-PECVD. By using VHF-PECVD and RF-PECVD processes in different process chambers, the first N-type doped layer and the second N-type doped layer are formed, thereby improving the permeability and electrical conductivity of the microcrystalline silicon film layer.

Benefits of technology

This method not only improves the efficiency and film quality of heterojunction solar cells, but also reduces production costs, solving the problem that RF-PECVD or VHF-PECVD alone cannot meet the high efficiency, low cost and high stability requirements.

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Abstract

The present application discloses a method for preparing a heterojunction solar cell and a heterojunction solar cell, belonging to the field of solar cells. The method for preparing a heterojunction solar cell comprises: forming a first intrinsic layer on a first surface of a semiconductor substrate, forming a second intrinsic layer on a second surface of the semiconductor substrate, the first surface being opposite to the second surface; forming an N-type doping layer on the surface of the first intrinsic layer, and forming a P-type doping layer on the surface of the second intrinsic layer; wherein, forming the N-type doping layer comprises: forming a first N-type doping layer on the first intrinsic layer by a very high frequency plasma enhanced chemical vapor deposition process; forming a second N-type doping layer on the first N-type doping layer by a radio frequency plasma enhanced chemical vapor deposition process. The present application can reduce production costs while ensuring the coating effect, and can alleviate the problem that the current use of RF‑PECVD or VHF‑PECVD alone cannot meet the high efficiency, low cost and high stability requirements of heterojunction battery industrialization.
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Description

Technical Field

[0001] The present application belongs to the technical field of solar cells, and specifically relates to a method for preparing a heterojunction solar cell and a heterojunction solar cell. Background Art

[0002] As global energy issues become increasingly prominent, solar cell devices have been popularized and widely used in the world. Heterojunction solar cells, also known as HJT cells (Hetero-Junction with intrinsic Thin-layer) or SHJ cells, have many advantages such as simple structure or preparation process, high open circuit voltage, high conversion efficiency, and low temperature coefficient, and have become a new hot spot in the photovoltaic field in recent years.

[0003] In the related technology, large-scale mass production of heterojunction solar cell technology generally uses radio frequency plasma enhanced chemical vapor deposition (RF-PECVD) to deposit amorphous silicon N layer or P layer to form the emitter and back field. If the battery conversion efficiency is to be further improved, the N layer or P layer needs to be upgraded to a microcrystalline silicon process. At present, microcrystalline silicon deposition, especially the deposition of N-type microcrystalline silicon layer, is usually prepared by RF-PECVD. However, this method has problems such as thick microcrystalline incubation layer, poor crystallinity, large amount of hydrogen consumption, and strong ion bombardment will cause other adverse effects on solar cells, which limits the development of microcrystalline process and breakthroughs in battery efficiency. In addition, some companies apply very high frequency plasma enhanced chemical vapor deposition (VHF-PECVD) to microcrystalline silicon deposition, which has the advantages of high crystallinity, small ion bombardment, and fast deposition rate; however, VHF-PECVD also has problems such as high design and manufacturing costs and poor uniformity of large-area coating. Whether it can be applied to large-scale mass production remains to be tested. Therefore, the use of RF-PECVD or VHF-PECVD alone cannot meet the requirements of high efficiency, low cost and high stability for the industrialization of heterojunction batteries. Summary of the invention

[0004] In view of the above problems, the present invention aims to solve at least one of the technical problems in the related art to a certain extent. To this end, the present invention provides a method for preparing a heterojunction solar cell and a heterojunction solar cell, which can ensure the coating effect and reduce the cost, and at least alleviate the problem that the use of RF-PECVD or VHF-PECVD alone cannot meet the requirements of high efficiency, low cost and high stability of heterojunction battery industrialization.

[0005] In order to solve the above technical problems, this application is implemented as follows:

[0006] According to one aspect of the present application, a method for preparing a heterojunction solar cell is provided, the method comprising:

[0007] forming a first intrinsic layer on a first surface of a semiconductor substrate, and forming a second intrinsic layer on a second surface of the semiconductor substrate, wherein the first surface is opposite to the second surface;

[0008] forming an N-type doped layer on a surface of the first intrinsic layer away from the semiconductor substrate, and forming a P-type doped layer on a surface of the second intrinsic layer away from the semiconductor substrate;

[0009] The step of forming an N-type doped layer comprises:

[0010] forming a first N-type doped layer on the first intrinsic layer by using a very high frequency plasma enhanced chemical vapor deposition process;

[0011] A second N-type doping layer is formed on the first N-type doping layer by using a radio frequency plasma enhanced chemical vapor deposition process.

[0012] In some embodiments, the first N-type doping layer accounts for 20% to 80% of the thickness of the entire N-type doping layer.

[0013] In some embodiments, a thickness ratio of the first N-type doping layer to the second N-type doping layer is 1:1.

[0014] In some embodiments, forming the first N-type doping layer and forming the second N-type doping layer are performed in different process chambers.

[0015] In some embodiments, the process chamber includes at least a first process chamber, a second process chamber, a third process chamber, and a fourth process chamber;

[0016] In the first process chamber and the second process chamber, a first N-type doping layer is prepared by using a very high frequency plasma enhanced chemical vapor deposition process;

[0017] In the third process chamber and the fourth process chamber, a second N-type doping layer is prepared by using a radio frequency plasma enhanced chemical vapor deposition process.

[0018] In some embodiments, the process conditions for forming the first N-type doping layer include:

[0019] The frequency of the VHF power supply is 20~50MHz, and the power density is 10~500mW / cm 2, the substrate surface temperature is 120-300° C., the deposition time is 1-1500 s, the reaction gas pressure is 0.5-10 Torr; the gases involved in the reaction include silane, hydrogen, phosphine and carbon dioxide, the silane flow rate is 10-500 sccm, the hydrogen flow rate is 200-10000 sccm, the phosphine flow rate is 0-5000 sccm, and the carbon dioxide flow rate is 0-2000 sccmV; and / or,

[0020] The process conditions for forming the second N-type doping layer include:

[0021] The frequency of the RF power source is 13-14 MHz, and the power density is 10-500 mW / cm 2 , the substrate surface temperature is 120-300° C., the deposition time is 1-1500 s, and the reaction gas pressure is 0.5-10 Torr; the gases involved in the reaction include silane, hydrogen, phosphine and carbon dioxide, the silane flow rate is 10-500 sccm, the hydrogen flow rate is 200-10000 sccm, the phosphine flow rate is 0-5000 sccm, and the carbon dioxide flow rate is 0-2000 sccm.

[0022] In some embodiments, forming a P-type doped layer includes:

[0023] Forming a first P-type doped layer on the second intrinsic layer by using a very high frequency plasma enhanced chemical vapor deposition process; forming a second P-type doped layer on the first P-type doped layer by using a radio frequency plasma enhanced chemical vapor deposition process;

[0024] Alternatively, the P-type doping layer is formed on the second intrinsic layer by using a very high frequency or radio frequency plasma enhanced chemical vapor deposition process.

[0025] In some embodiments, after forming a P-type doped layer on a surface of the second intrinsic layer away from the semiconductor substrate, the method further includes:

[0026] forming a first transparent conductive layer and a second transparent conductive layer on the N-type doped layer and the P-type doped layer respectively;

[0027] A first electrode and a second electrode are formed on the first transparent conductive layer and the second transparent conductive layer, respectively.

[0028] According to another aspect of the present application, a heterojunction solar cell is provided, which is prepared by the above-mentioned method for preparing a heterojunction solar cell, and the heterojunction solar cell comprises:

[0029] Semiconductor substrate;

[0030] The first surface of the semiconductor substrate is provided with a first intrinsic layer, an N-type doped layer, a first transparent conductive layer and a first electrode in sequence;

[0031] A second intrinsic layer, a P-type doped layer, a second transparent conductive layer and a second electrode are sequentially arranged on the second surface of the semiconductor substrate.

[0032] In some embodiments, the thickness of the first intrinsic layer is 5 nm to 20 nm, and the thickness of the second intrinsic layer is 5 nm to 20 nm;

[0033] And / or, the first intrinsic layer and the second intrinsic layer are both intrinsic amorphous silicon layers;

[0034] And / or, the N-type doped layer is a hydrogenated microcrystalline silicon layer doped with a Group V element and an oxygen element;

[0035] And / or, the thickness of the N-type doping layer is 10 nm to 35 nm;

[0036] And / or, the thickness of the P-type doping layer is 5 nm to 40 nm;

[0037] And / or, the semiconductor substrate is an N-type silicon-based substrate.

[0038] In some embodiments, the P-type doped layer is an amorphous or microcrystalline silicon layer doped with a Group III element.

[0039] It should be noted that the above numerical ranges all include endpoint values.

[0040] Implementing the technical solution of the present invention has at least the following beneficial effects:

[0041] In the embodiment of the present application, the preparation method of the heterojunction solar cell provided includes the step of preparing an N-type doping layer, and the method of forming the N-type doping layer includes: forming a first N-type doping layer on a first intrinsic layer by a very high frequency plasma enhanced chemical vapor deposition (VHF-PECVD) process, forming a second N-type doping layer on the first N-type doping layer by a radio frequency plasma enhanced chemical vapor deposition (RF-PECVD) process, and the first N-type doping layer and the second N-type doping layer constitute an N-type doping layer. Thus, by preparing the N-type doping layer by combining VHF-PECVD and RF-PECVD, the permeability and conductivity of the microcrystalline silicon film layer can be improved, which not only ensures the film quality of the N-type doping layer, ensures the efficiency of the heterojunction solar cell, but also reduces the cost, and can alleviate the problem that the current use of RF-PECVD or VHF-PECVD alone to prepare the N-type doping layer cannot meet the high efficiency, low cost or high stability requirements of the heterojunction battery industrialization.

[0042] Additional aspects and advantages of the present application will be given in part in the following description, and in part will become obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 is a schematic flow chart of a method for preparing a heterojunction solar cell provided by some embodiments of the present invention;

[0044] Figure 2 is another schematic flow chart of a method for preparing a heterojunction solar cell provided in some embodiments of the present invention;

[0045] Figure 3 It is a schematic diagram of the process of coating an N-type doped layer provided by some embodiments of the present invention;

[0046] Figure 4 Schematic diagram of microcrystalline silicon growth;

[0047] Figure 5 It is a schematic diagram of the structure of a heterojunction solar cell provided by some embodiments of the present invention.

[0048] Description of reference numerals:

[0049] 10- semiconductor substrate;

[0050] 20 - first intrinsic layer; 30 - N-type doping layer; 40 - first transparent conductive layer; 50 - first electrode;

[0051] 60 - second intrinsic layer; 70 - P-type doping layer; 80 - second transparent conductive layer; 90 - second electrode. DETAILED DESCRIPTION

[0052] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0053] The endpoints and any values ​​of the ranges disclosed in this article are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of each range, the endpoint values ​​of each range or the individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges.

[0054] Plasma enhanced chemical vapor deposition (PECVD) includes radio frequency enhanced plasma chemical vapor deposition (RF-PECVD) and very high frequency plasma chemical vapor deposition (VHF-PECVD). In the related art, RF-PECVD or VHF-PECVD process is used to prepare N-type doped layer, that is, N-type doped microcrystalline silicon layer. Both methods have their own advantages and disadvantages. For example, under the existing microcrystalline silicon process conditions, the crystallinity of RF-PECVD coating is poor, and more hydrogen is required to be consumed. At the same time, strong ion bombardment may cause other adverse effects on solar cells; while VHF-PECVD is costly and has poor coating uniformity, and may not be suitable for large-scale mass production. Therefore, the use of two power sources alone cannot meet the requirements of efficiency, cost and stability. The inventors of this application proposed improvements to the preparation process of heterojunction solar cells based on the study of the advantages and disadvantages of the above methods.

[0055] In view of this, the technical solution of the embodiment of the present application provides a method for preparing a heterojunction solar cell and a heterojunction solar cell. The technical solution of the embodiment of the present application adopts a VHF+RF (very high frequency + radio frequency) power supply combination in the industrial PECVD coating to perform continuous coating in a cavity, based on the characteristics that the early incubation layer is difficult to crystallize during the growth of microcrystalline silicon, which can alleviate the above problems. The specific technical solution is described below.

[0056] See also Figures 1 to 5 As shown, in some embodiments, a method for preparing a heterojunction solar cell is provided, the method comprising:

[0057] Forming a first intrinsic layer 20 on a first surface of the semiconductor substrate 10, and forming a second intrinsic layer 60 on a second surface of the semiconductor substrate 10, wherein the first surface is opposite to the second surface;

[0058] An N-type doped layer 30 is formed on a surface of the first intrinsic layer 20 facing away from the semiconductor substrate 10 , and a P-type doped layer 70 is formed on a surface of the second intrinsic layer 60 facing away from the semiconductor substrate 10 ; that is, an N-type doped layer 30 is formed on the first intrinsic layer 20 , and a P-type doped layer 70 is formed on the second intrinsic layer 60 .

[0059] The forming of the N-type doping layer 30 includes:

[0060] forming a first N-type doped layer on the first intrinsic layer by using a very high frequency plasma enhanced chemical vapor deposition process;

[0061] The second N-type doping layer is formed on the first N-type doping layer by using radio frequency plasma enhanced chemical vapor deposition process. The N-type doping layer 30 is composed of the first N-type doping layer and the second N-type doping layer.

[0062] The preparation method of the heterojunction solar cell provided by the embodiment of the present invention, on the one hand, first uses VHF power supply to coat the interface part where the N-type doped layer (microcrystalline N layer) contacts the first intrinsic layer (amorphous i layer), which can achieve rapid crystallization compared with RF power supply, reduce the thickness of the incubation layer, improve the permeability and conductivity of the microcrystalline silicon film layer, and reduce the bombardment of the amorphous i layer by high-energy ions. On the other hand, by utilizing the law of microcrystalline silicon columnar growth, when the crystal image appears in the film, the RF power supply is switched to continue coating; in this way, based on the existing crystal image, RF-PECVD can achieve a coating effect close to that of VHF power supply; that is, the use of RF power supply in the later stage can also obtain a microcrystalline silicon film with high crystallinity, good conductivity and excellent light transmittance. At the same time, RF power supply has obvious advantages in large-area uniformity, is suitable for large-size cavities, and is conducive to large-scale mass production. In addition, the RF power supply itself has a low cost, a simple cavity structure, and good stability, which makes up for the shortcomings of VHF power supply.

[0063] Therefore, the present invention prepares the N-type doped layer by combining VHF-PECVD and RF-PECVD, which can improve the permeability and conductivity of the microcrystalline silicon film layer, thereby ensuring the film quality of the N-type doped layer, ensuring the efficiency of the heterojunction solar cell, and reducing the cost.

[0064] The method provided by the embodiment of the present invention is suitable for application in the field of solar cells, and can be applied to the preparation of various solar cells, such as heterojunction cells (HIT / HJT). The method of the present invention is described in detail below mainly using HIT / HJT cells as an example, but those skilled in the art can understand that the method of the present invention is not limited to application in HIT / HJT cells, but is suitable for application in various solar cells.

[0065] In some embodiments of the present application, the semiconductor substrate 10 is an N-type silicon-based substrate. In an embodiment of the present invention, the semiconductor substrate 10 may be a silicon substrate, such as a single crystal silicon substrate, a polycrystalline silicon substrate, or a quasi-single crystal silicon substrate, and the embodiment of the present invention does not limit the specific type of the semiconductor substrate. The semiconductor substrate 10 may be P-type doped or N-type doped, that is, the semiconductor substrate may be a P-type semiconductor substrate or an N-type semiconductor substrate. The heterojunction solar cell of an embodiment of the present invention may be an N-type heterojunction solar cell, or may be a P-type heterojunction solar cell. Exemplarily, in some embodiments, the heterojunction solar cell may be an N-type heterojunction solar cell, and the semiconductor substrate 10 may be an N-type silicon-based substrate (also referred to as an N-type silicon wafer).

[0066] In some embodiments, the first intrinsic layer 20 and the second intrinsic layer 60 are both intrinsic amorphous silicon layers (intrinsic amorphous i-layers).

[0067] In some embodiments, the N-type doped layer 30 is a hydrogenated microcrystalline silicon layer (μc-Si:H) doped with a Group V element and an oxygen element. Oxygen doping is performed during the process of manufacturing hydrogenated microcrystalline silicon. For example, a gas such as carbon dioxide provides an oxygen source to form silicon oxide, thereby improving the optical properties of the N-type doped layer 30. In the field of solar energy, it can also be called a hydrogenated microcrystalline silicon oxide layer (uc-SiO x :H). Optionally, the above-mentioned Group V element includes one or more of nitrogen, phosphorus, arsenic, and antimony. Preferably, in this embodiment, the Group V element is phosphorus. In this embodiment, the N-type doped layer 30 is a hydrogenated microcrystalline silicon layer doped with phosphorus and oxygen.

[0068] In some embodiments, the P-type doped layer 70 is an amorphous or microcrystalline silicon layer doped with a group III element. The group III element includes one or more of indium, boron, aluminum, and gallium. Preferably, in this embodiment, the group III element is boron. In this embodiment, the P-type doped layer 70 is an amorphous silicon layer or a microcrystalline silicon layer doped with boron.

[0069] It should be noted that in this embodiment, there is no specific limitation on the materials of the first intrinsic layer 20, the second intrinsic layer 60, the N-type doped layer 30, the P-type doped layer 70 and other film layers, and they can be selected by themselves. For example, the several types of materials listed above can be used, or in other implementations, other types of materials can also be used.

[0070] According to the embodiment, the semiconductor substrate 10 includes two oppositely disposed surfaces, namely, a first surface and a second surface, wherein the first surface may be the front surface of the semiconductor substrate, and the second surface may be the back surface of the semiconductor substrate. The front surface (light-receiving surface) of the semiconductor substrate 10 is the surface facing the sun, that is, the surface facing the sunlight, and the back surface (backlight surface) of the semiconductor substrate 10 is the surface facing away from the sun.

[0071] In some specific embodiments, a method for preparing a heterojunction solar cell comprises the following steps:

[0072] S100, providing a semiconductor substrate 10, the semiconductor substrate 10 includes a first surface and a second surface arranged opposite to each other, the first surface is a front surface, and the second surface is a back surface; forming a first intrinsic layer 20 on the front surface of the semiconductor substrate 10, and forming a second intrinsic layer 60 on the back surface of the semiconductor substrate 10.

[0073] Optionally, both the first intrinsic layer 20 and the second intrinsic layer 60 are intrinsic amorphous i-layers. The amorphous i-layer refers to an undoped intrinsic amorphous silicon layer, which mainly plays the role of passivating dangling bonds on the surface of the silicon wafer.

[0074] It should be noted that, in this embodiment, there is no specific limitation on the method of depositing the first intrinsic layer 20 and the second intrinsic layer 60. For example, the deposition method may be chemical vapor deposition (CVD), such as PEVCD or Cat-CVD (catalytic chemical vapor deposition), or thermal oxidation, or atomic layer deposition (ALD), etc. The specific working principle is well known to those skilled in the art and will not be described in detail.

[0075] Optionally, the semiconductor substrate 10 provided is a textured semiconductor substrate. Exemplarily, providing the semiconductor substrate 10 includes: providing an N-type silicon-based substrate, cleaning and textured the N-type silicon-based substrate to form a textured surface structure on the clean surface of the N-type silicon-based substrate. Then, the N-type silicon-based substrate after cleaning and textured can be used to deposit an intrinsic amorphous i-layer on both sides.

[0076] It should be understood that the above-mentioned method of cleaning and texturing the silicon wafer is well known to those skilled in the art, and this embodiment does not limit this and will not be described in detail here.

[0077] Optionally, the thickness of the first intrinsic layer 20 is 5 nm to 20 nm. Further, the thickness of the first intrinsic layer 20 may be 5 nm to 10 nm. For example, the first intrinsic layer may be 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, 12 nm, 15 nm, 16 nm, 18 nm, 20 nm, etc.

[0078] Optionally, the thickness of the second intrinsic layer 60 is 5 nm to 20 nm. Further, the thickness of the second intrinsic layer 60 may be 5 nm to 8 nm. For example, the first intrinsic layer may be 5 nm, 5.5 nm, 6 nm, 6.5 nm, 7 nm, 8 nm, 9 nm, 10 nm, 15 nm, 18 nm, 20 nm, etc.

[0079] S200 , preparing an N-type doped layer 30 . That is, forming the N-type doped layer 30 on the surface of the first intrinsic layer 20 away from the semiconductor substrate 10 .

[0080] Optionally, the N-type doped layer 30 is a hydrogenated microcrystalline silicon layer doped with phosphorus and oxygen. The N-type doped layer 30 can be used as a window layer and a field passivation layer on the front of the solar cell. It should be noted that the doping amounts of oxygen and phosphorus in the N-type doped layer 30 are not specifically limited and can be selected and set according to actual needs.

[0081] Optionally, the thickness of the N-type doping layer 30 is 10 to 35 nm. Further, the thickness of the N-type doping layer 30 is preferably 15 to 25 nm. For example, the N-type doping layer may be 10 nm, 12 nm, 15 nm, 16 nm, 18 nm, 20 nm, 22 nm, 25 nm, 28 nm, 30 nm, 35 nm, etc. By making the thickness of the N-type doping layer within this range, it is easy to implement and convenient to adjust the process operating conditions, which helps to reduce costs and can avoid the N-type doping layer being too thick or too thin to affect the conversion efficiency of the heterojunction solar cell.

[0082] According to this embodiment, in the process of forming the N-type doping layer 30, a first N-type doping layer is formed on the first intrinsic layer by a VHF-PECVD process; and a second N-type doping layer is formed on the first N-type doping layer by an RF-PECVD process. The formation of the first N-type doping layer and the formation of the second N-type doping layer are performed in different process chambers. That is, the VHF-PECVD process and the RF-PECVD process can be performed in different process chambers. In this way, by using a chamber-by-chamber continuous coating method for coating the N-type doping layer, the production speed and output can be improved. For example, the N-type doping layer can be sequentially coated in sections in four PECVD machines.

[0083] The use of different process chambers for continuous film coating in separate chambers can make the process flow smoother and more efficient. It is not necessary to adjust the equipment parameters after completing the growth step of the first N-type doped layer before implementing the next step to grow the second N-type doped layer. In addition, if the same chamber is used for growth, the environment in the chamber is different due to different process conditions. It takes time to switch from one environment to another, and when the environment changes, it is easy to affect the growth of the film layer, which is easy to cause the risk of cross contamination and may affect the quality of the film layer and the efficiency of the battery.

[0084] Optionally, the process chamber includes at least a first process chamber, a second process chamber, a third process chamber, and a fourth process chamber. For example, a first N-type doped layer may be prepared by a VHF-PECVD process in the first process chamber and the second process chamber, and a second N-type doped layer may be prepared by an RF-PECVD process in the third process chamber and the fourth process chamber.

[0085] It should be noted that the specific number of process chambers is not limited in this embodiment. For example, four process chambers as described above may be used. Of course, in other embodiments, three, five, six, seven or more process chambers may be used. When multiple process chambers are used, the power supply configurations of multiple machines may also be changed as needed.

[0086] In some other embodiments, the process chamber further includes a fifth process chamber. For example, a first N-type doping layer may be prepared by a VHF-PECVD process in the first process chamber, the second process chamber, and the third process chamber, and a second N-type doping layer may be prepared by an RF-PECVD process in the fourth process chamber and the fifth process chamber. In some other embodiments, the process chamber further includes a fifth process chamber and a sixth process chamber. For example, a first N-type doping layer may be prepared by a VHF-PECVD process in the first process chamber, the second process chamber, and the third process chamber, and a second N-type doping layer may be prepared by an RF-PECVD process in the fourth process chamber, the fifth process chamber, and the sixth process chamber; or, a first N-type doping layer may be prepared by a VHF-PECVD process in the first process chamber, the second process chamber, the third process chamber, and the fourth process chamber, and a second N-type doping layer may be prepared by an RF-PECVD process in the fifth process chamber and the sixth process chamber.

[0087] The method of the present invention is described in detail below mainly by taking the case where the process chamber includes four process chambers as an example. The principle of using other numbers of process chambers for coating is also the same and will not be elaborated here.

[0088] Specifically, Figure 2 or Figure 3 As shown, in some embodiments, step S200 includes:

[0089] S210. In a first process chamber, VHF-PECVD is used to grow a portion of the first N-type doped layer on the first intrinsic layer on the front side of the semiconductor substrate; in a second process chamber, VHF-PECVD is used to continue growing another portion of the first N-type doped layer on the portion of the first N-type doped layer that has been generated.

[0090] S220. In the third process chamber, a portion of the second N-type doped layer is continued to grow on the first N-type doped layer generated in step S210 by using RF-PECVD. In the fourth process chamber, another portion of the second N-type doped layer is continued to grow on the portion of the second N-type doped layer that has been generated by using RF-PECVD.

[0091] In this embodiment, four PEVCD machines are used to perform segmented coating in sequence. The four machines can each complete a quarter of the coating thickness. The first two PEVCD machines can use VHF-PECVD machines, and the last two PEVCD machines can use RF-PECVD machines. The power supply configuration of the machine can be replaced and modified according to needs.

[0092] Exemplarily, at the beginning of the coating process, the N-type silicon wafer with amorphous i layer deposited on both sides completed in step S100 is first placed in the tray corresponding to the VHF-PECVD carrier, and the carrier is transferred to the first process chamber through the LL chamber (such as the pre-treatment chamber) by automated equipment to start the coating (coating of N-type doped layer) process.

[0093] The first coating chamber for the preparation of the N-type doped layer is a VHF-PECVD chamber. The coating process includes steps such as vacuuming, ventilation preheating of the N-type silicon wafer, uniform reaction gas, and ignition discharge coating. In the first process chamber, after the VHF-PECVD process is used to complete a quarter of the coating thickness, the carrier plate transfers the N-type silicon wafer to the second process chamber for further coating. In the second process chamber, the VHF-PECVD process is used to complete a quarter of the coating thickness. Then, the carrier plate transfers the N-type silicon wafer to the third process chamber for further coating. In the third process chamber, the RF-PECVD process is used to complete a quarter of the coating thickness; then, the carrier plate transfers the N-type silicon wafer to the fourth process chamber for further coating. In the fourth process chamber, the RF-PECVD process is used to complete a quarter of the coating thickness. Thus, after passing through four process chambers in sequence, the coating of all N-type doped layers is completed. The operating parameters of each process chamber, such as process duration, pressure, power, atmosphere and other conditions, can be adjusted individually. The power configurations of the four machines can also be changed as needed. No specific requirements are made for the specific PECVD coating process.

[0094] according to Figure 4 The growth law of microcrystalline silicon shown in the figure shows that it is difficult to crystallize in the early incubation zone, so the first process chamber and the second process chamber use VHF-PECVD with better crystallinity. In the later stage, it is easier to crystallize in the transition zone and the columnar growth zone, and RF-PECVD can be used to improve uniformity and reduce costs. According to different experimental requirements, the proportion of the VHF-PECVD coating thickness to the total thickness of the N-type doped layer can be 0% to 100%, where 0% and 100% are pure RF coating and pure VHF coating, respectively, and 0% and 100% are not included in this embodiment. The thickness of the part coated with VHF can be changed, and the rest are coated with RF.

[0095] It should be pointed out that the coating thickness of the N-type doped layer completed in each process chamber can be adjusted according to actual needs, that is, the ratio of coating by VHF-PECVD and RF-PECVD can be adjusted according to actual needs.

[0096] Optionally, the first N-type doping layer prepared by the VHF-PECVD process accounts for 20% to 80% of the thickness of the entire N-type doping layer. Exemplarily, the thickness of the VHF-PECVD coating may account for 25%, 40%, 50%, 60%, 75%, 80%, etc. of the total thickness of the N-type doping layer, and the remaining part is plated by the RF-PECVD process. Preferably, the thickness ratio of the first N-type doping layer to the second N-type doping layer is 1:1. For example, the thickness of the entire N-type doping layer is d, and in the first process chamber and the second process chamber, the VHF-PECVD process is used to prepare a first N-type doping layer with a thickness of 50%*d. Specifically, in the first process chamber, the VHF-PECVD process is used to prepare a first N-type doping layer with a thickness of 25%*d; in the second process chamber, the VHF-PECVD process is used to prepare a first N-type doping layer with a thickness of 25%*d. In the third process chamber and the fourth process chamber, a second N-type doping layer with a thickness of 50%*d is prepared by RF-PECVD process. Specifically, in the third process chamber, a second N-type doping layer with a thickness of 25%*d is prepared by RF-PECVD process; in the fourth process chamber, a second N-type doping layer with a thickness of 25%*d is prepared by RF-PECVD process.

[0097] In practical applications, for example, the residence time of the N-type silicon wafer in each process chamber can be controlled according to the operation time. For example, if the total time required to prepare the N-type doping layer is 40 seconds, the N-type silicon wafer can be allowed to stay in each process chamber for 10 seconds to prepare an N-type doping layer with a thickness of 25%*d in each process chamber.

[0098] In this embodiment, when four process chambers are used for coating, the coating can be performed in an evenly distributed manner, that is, the coating thickness of each process chamber can account for 25% of the total thickness of the N-type doped layer. In this way, the operation control is convenient, the uniformity is good, and it is easy to adjust. Of course, in other embodiments, the ratio is not limited to this, but can be selected and set according to actual needs.

[0099] Optionally, the process conditions for forming the first N-type doped layer, that is, the operating conditions for preparing the first N-type doped layer by the VHF-PECVD process in the first process chamber and the second process chamber, respectively, may include: the frequency of the VHF power supply is 20 to 50 MHz, the power density is 10 to 500 mW / cm 2, the substrate surface temperature is 120-300°C, the deposition time is 1-1500s, and the reaction gas pressure is 0.5-10Torr; the gases involved in the reaction include silane (SiH4), hydrogen (H2), phosphine (PH3) and carbon dioxide (CO2), etc., and the corresponding silane flow rate is 10-500sccm, the hydrogen flow rate is 200-10000sccm, the phosphine flow rate is 0-5000sccm, and the carbon dioxide flow rate is 0-2000sccm.

[0100] In addition, the N-type or P-type doping gas source is a gas containing elements from Group III / V, and the oxygen element comes from other oxygen-containing gases such as CO2.

[0101] Optionally, the process conditions for forming the second N-type doped layer, that is, the operating conditions for preparing the second N-type doped layer by RF-PECVD process in the third process chamber and the fourth process chamber, respectively, may include: the frequency of the RF power supply is 13 to 14 MHz, preferably 13.56 MHz, and the power density is 10 to 500 mW / cm 2 , the substrate surface temperature is 120-300°C, the deposition time is 1-1500s, and the reaction gas pressure is 0.5-10Torr; the gases involved in the reaction include silane (SiH4), hydrogen (H2), phosphine (PH3) and carbon dioxide (CO2), etc., and the corresponding silane flow rate is 10-500sccm, the hydrogen flow rate is 200-10000sccm, the phosphine flow rate is 0-5000sccm, and the carbon dioxide flow rate is 0-2000sccm. In addition, the N-type or P-type doping gas source is a gas containing group III / V elements, and the oxygen element comes from other oxygen-containing gases such as CO2.

[0102] It should be understood that the main difference between the process conditions for forming the first N-type doped layer and the process conditions for forming the second N-type doped layer is that the power supply frequencies used are different, while other parameter conditions may be the same or slightly different. Exemplarily, the frequency of the very high frequency power supply is 20 to 50 MHz, for example, it can be 20 MHz, 25 MHz, 30 MHz, 35 MHz, 40 MHz, 50 MHz, etc. The frequency of the radio frequency power supply is 13 to 14 MHz, for example, it can be 13.0 MHz, 13.2 MHz, 13.4 MHz, 13.56 MHz, 13.8 MHz, 14 MHz, etc., preferably 13.56 MHz.

[0103] Under the above operating conditions, especially in the frequency range of the VHF power supply and the frequency range of the RF power supply, the N-type doped layer prepared can improve the transmittance and conductivity of the microcrystalline silicon film layer, and can ensure the film quality of the N-type doped layer.

[0104] In addition, the specific operating conditions of the above-mentioned VHF-PECVD process and RF-PECVD process can also be adjusted according to actual conditions as long as they do not limit the purpose of the present invention.

[0105] In this embodiment, each process chamber can be connected with an automated linkage device, and no manual transfer is required, and the automatic transportation of silicon wafers can be realized. For example, after the vacuum in the first process chamber is broken, the silicon wafers in the first process chamber can be automatically transferred to the second process chamber, with a high degree of automation and high production efficiency. In addition, a clean shed can be built between the first process chamber and the second process chamber, and the linkage platform between the two can be built through the clean shed to control the cleanliness of the environment.

[0106] S300 , preparing a P-type doped layer 70 . That is, forming the P-type doped layer 70 on the surface of the second intrinsic layer 60 away from the semiconductor substrate 10 .

[0107] Optionally, the P-type doped layer 70 is an amorphous silicon layer or a microcrystalline silicon layer doped with boron.

[0108] Optionally, the thickness of the P-type doping layer 70 is 5 to 40 nm. Further, the thickness of the P-type doping layer 70 is preferably 8 to 35 nm. For example, the P-type doping layer 70 can be 5 nm, 8 nm, 10 nm, 12 nm, 15 nm, 20 nm, 25 nm, 28 nm, 30 nm, 35 nm, 40 nm, etc. By making the P-type doping layer within this range, it is easy to implement and convenient to adjust the process operating conditions, which helps to reduce costs and avoid the P-type doping layer being too thick or too thin to affect the conversion efficiency of the heterojunction solar cell.

[0109] It should be noted that, in this embodiment, there is no specific limitation on the method for depositing the P-type doping layer 70. For example, the deposition method may be chemical vapor deposition (CVD), such as PECVD or Cat-CVD (catalytic chemical vapor deposition), etc. The specific working principle is well known to those skilled in the art and will not be described in detail.

[0110] Optionally, forming the P-type doping layer 70 includes: forming a first P-type doping layer on the second intrinsic layer by a very high frequency plasma enhanced chemical vapor deposition process; and forming a second P-type doping layer on the first P-type doping layer by a radio frequency plasma enhanced chemical vapor deposition process.

[0111] According to this embodiment, when preparing the P-type doping layer 70, a method similar to the preparation of the N-type doping layer can be adopted, that is, the P-type doping layer is prepared by combining VHF-PECVD and RF-PECVD. The specific operation method and principle can refer to the description of the preparation of the N-type doping layer mentioned above, and will not be repeated here.

[0112] Optionally, a very high frequency plasma enhanced chemical vapor deposition process is used to form the P-type doping layer 70 on the second intrinsic layer 60. Optionally, a radio frequency plasma enhanced chemical vapor deposition process is used to form the P-type doping layer 70 on the second intrinsic layer 60.

[0113] S400, preparing a transparent conductive layer and a metal electrode.

[0114] Specifically, step S400 includes:

[0115] The first transparent conductive layer 40 and the second transparent conductive layer 80 are formed on the N-type doping layer 30 and the P-type doping layer 70 , respectively; that is, the first transparent conductive layer 40 is formed on the N-type doping layer 30 , and the second transparent conductive layer 80 is formed on the P-type doping layer 70 .

[0116] The first electrode 50 and the second electrode 90 are formed on the first transparent conductive layer 40 and the second transparent conductive layer 80 , respectively; that is, the first electrode 50 is formed on the first transparent conductive layer 40 , and the second electrode 90 is formed on the second transparent conductive layer 80 .

[0117] It should be noted that, in this embodiment, there is no specific limitation on the method for forming the first transparent conductive layer 40, the second transparent conductive layer 80, the first electrode 50 and the second electrode 90. For example, the first transparent conductive layer 40 and the second transparent conductive layer 80 may be prepared by PVD (physical vapor deposition), and the first electrode 50 and the second electrode 90 may be prepared by screen printing.

[0118] Exemplarily, in a PVD process chamber, a physical vapor deposition process is used to deposit a first transparent conductive layer 40 on the N-type doped layer 30, and a second transparent conductive layer 80 on the P-type doped layer 70. Both the first transparent conductive layer 40 and the second transparent conductive layer 80 are transparent oxide conductive layers. Then, a silver paste is printed on the transparent oxide conductive layers on the front and back sides of the semiconductor substrate by screen printing, and sintered to form corresponding silver grid line electrodes.

[0119] It should be noted that in this embodiment, the material of the first transparent conductive layer 40 is not specifically limited and can be set at will. For example, the material of the first transparent conductive layer 40 can be tin-doped indium oxide (ITO), or fluorine-doped tin oxide (FTO), or aluminum-doped zinc oxide (AZO), or boron-doped zinc oxide (BZO). Similarly, in this embodiment, the material of the second transparent conductive layer 80 is not specifically limited and can be set at will. For example, the material of the second transparent conductive layer 80 can be tin-doped indium oxide (ITO), or fluorine-doped tin oxide (FTO), or aluminum-doped zinc oxide (AZO), or boron-doped zinc oxide (BZO), etc.

[0120] The materials of the above-mentioned first electrode 50 and the second electrode 90 are both metal electrodes, and the metal electrode materials can be silver (Ag), nickel (Ni), copper (Cu), etc., but the present application is not limited to this. In other embodiments of the present application, the materials of the first electrode and the second electrode can also be other conductive materials, preferably materials with good conductivity and low resistivity, depending on the specific circumstances.

[0121] See also Figure 5 As shown, in some embodiments, a heterojunction solar cell is provided, the heterojunction solar cell comprising: a semiconductor substrate 10, the semiconductor substrate 10 comprising a first surface and a second surface arranged opposite to each other, wherein the first surface is a front surface and the second surface is a back surface;

[0122] The front surface of the semiconductor substrate 10 is provided with a first intrinsic layer 20, an N-type doped layer 30, a first transparent conductive layer 40 and a first electrode 50 in sequence;

[0123] A second intrinsic layer 60 , a P-type doped layer 70 , a second transparent conductive layer 80 and a second electrode 90 are sequentially disposed on the back side of the semiconductor substrate 10 .

[0124] Those skilled in the art can understand that the heterojunction solar cell and the aforementioned method for preparing a heterojunction solar cell are based on the same inventive concept, and the features and advantages described above for the method for preparing a heterojunction solar cell are also applicable to the heterojunction solar cell. Therefore, the heterojunction solar cell has at least the same or different features and advantages as the aforementioned method for preparing a heterojunction solar cell, which will not be described in detail herein.

[0125] Optionally, the semiconductor substrate 10 is an N-type silicon-based substrate.

[0126] Optionally, the thickness of the first intrinsic layer 20 is 5-20 nm, preferably 5-10 nm; the thickness of the second intrinsic layer 60 is 5-20 nm, preferably 5-8 nm. Optionally, both the first intrinsic layer 20 and the second intrinsic layer 60 are intrinsic amorphous silicon layers.

[0127] Optionally, the thickness of the N-type doping layer 30 is 10 to 35 nm, preferably 15 to 25 nm. Optionally, the N-type doping layer 30 is a hydrogenated microcrystalline silicon layer doped with phosphorus and oxygen.

[0128] Optionally, the thickness of the P-type doping layer 70 is 5 to 40 nm, preferably 8 to 35 nm. Optionally, the P-type doping layer 70 is an amorphous or microcrystalline silicon layer doped with boron.

[0129] According to step S200 in the method provided in the embodiment of the present application, different proportions of VHF-PECVD or RF-PECVD in the coating process will have a certain impact on the coating effect. For this reason, this embodiment has carried out multiple groups of test verifications, and the proportion of VHF-PECVD coating thickness to the total thickness of the N-type doped layer is 100% (all VHF-PECVD), 50%, 25% and 0% (all RF-PECVD) for testing. The test results are shown in Table 1 below.

[0130] Table 1

[0131] condition Eta Voc(V) Isc(A) FF Full VHF coating 25.60% 0.748 10.97 85.5% VHF accounts for 50% 25.55% 0.749 10.92 85.7% VHF 25% 25.44% 0.748 10.93 85.3% All RF coatings 25.22% 0.748 10.83 85.4%

[0132] It can be seen from the data in Table 1 that the coating method using a combination of VHF-PECVD and RF-PECVD can achieve an effect close to that of coating an oxidized microcrystalline N layer using only VHF-PECVD, and the efficiency of the solar cells obtained by the two methods is almost the same, indicating that the present invention not only ensures the film quality of the N-type doped layer, but also ensures the efficiency of the heterojunction solar cell, and reduces the cost compared to the method using VHF-PECVD alone.

[0133] In the present invention, in the process of preparing the N-type doped layer, the front part is beneficial to the high crystallinity of VHF to reduce the thickness of the amorphous incubation layer and reduce ion bombardment, and the rear part uses RF power to ensure the uniformity of coating while lowering the cost and the comprehensive coating effect is close to that of pure VHF power. Therefore, it can alleviate the problem that the current use of RF-PECVD or VHF-PECVD alone to prepare the N-type doped layer cannot meet the high efficiency, low cost or high stability requirements of the heterojunction battery industrialization.

[0134] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally a class, and the number of objects is not limited. For example, the first object can be one or more. In addition, the term "and / or" used in this article is only a kind of association relationship describing associated objects, indicating that three relationships can exist, for example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone.

[0135] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A method for preparing a heterojunction solar cell, characterized in that: The method comprises: forming a first intrinsic layer on a first surface of a semiconductor substrate, and forming a second intrinsic layer on a second surface of the semiconductor substrate, wherein the first surface is opposite to the second surface; forming an N-type doped layer on a surface of the first intrinsic layer away from the semiconductor substrate, and forming a P-type doped layer on a surface of the second intrinsic layer away from the semiconductor substrate; The N-type doped layer is a hydrogenated microcrystalline silicon layer doped with a Group V element and an oxygen element; The step of forming an N-type doped layer comprises: forming a first N-type doped layer on the first intrinsic layer by using a very high frequency plasma enhanced chemical vapor deposition process; forming a second N-type doped layer on the first N-type doped layer by using a radio frequency plasma enhanced chemical vapor deposition process; Forming the first N-type doped layer and forming the second N-type doped layer are performed in different process chambers; The process conditions for forming the first N-type doping layer include: The frequency of the VHF power supply is 20-50 MHz, the power density is 10-500 mW / cm2, the substrate surface temperature is 120-300°C, the deposition time is 1-1500 s, and the reaction gas pressure is 0.5-10 Torr; the gases involved in the reaction include silane, hydrogen, phosphine and carbon dioxide, the silane flow rate is 10-500 sccm, the hydrogen flow rate is 200-10000 sccm, the phosphine flow rate is 0-5000 sccm, and the carbon dioxide flow rate is 0-2000 sccmV; and / or, The process conditions for forming the second N-type doping layer include: The frequency of the RF power supply is 13-14 MHz, the power density is 10-500 mW / cm2, the substrate surface temperature is 120-300°C, the deposition time is 1-1500 s, and the reaction gas pressure is 0.5-10 Torr; the gases involved in the reaction include silane, hydrogen, phosphine and carbon dioxide, the silane flow rate is 10-500 sccm, the hydrogen flow rate is 200-10000 sccm, the phosphine flow rate is 0-5000 sccm, and the carbon dioxide flow rate is 0-2000 sccm; The first N-type doping layer accounts for 20% to 80% of the thickness of the entire N-type doping layer.

2. The method for preparing a heterojunction solar cell according to claim 1, characterized in that: The thickness ratio of the first N-type doping layer to the second N-type doping layer is 1:

1.

3. The method for preparing a heterojunction solar cell according to claim 1, characterized in that: The process chamber at least includes a first process chamber, a second process chamber, a third process chamber and a fourth process chamber; In the first process chamber and the second process chamber, a first N-type doping layer is prepared by using a very high frequency plasma enhanced chemical vapor deposition process; In the third process chamber and the fourth process chamber, a second N-type doping layer is prepared by using a radio frequency plasma enhanced chemical vapor deposition process.

4. The method for preparing a heterojunction solar cell according to any one of claims 1 to 3, characterized in that: Forming a P-type doped layer, comprising: Forming a first P-type doped layer on the second intrinsic layer by using a very high frequency plasma enhanced chemical vapor deposition process; forming a second P-type doped layer on the first P-type doped layer by using a radio frequency plasma enhanced chemical vapor deposition process; Alternatively, the P-type doping layer is formed on the second intrinsic layer by using a very high frequency or radio frequency plasma enhanced chemical vapor deposition process.

5. The method for preparing a heterojunction solar cell according to any one of claims 1 to 3, characterized in that: After forming a P-type doped layer on a surface of the second intrinsic layer away from the semiconductor substrate, the method further includes: forming a first transparent conductive layer on the N-type doped layer, and forming a second transparent conductive layer on the P-type doped layer; A first electrode is formed on the first transparent conductive layer, and a second electrode is formed on the second transparent conductive layer.

6. A heterojunction solar cell, prepared by the method for preparing a heterojunction solar cell according to any one of claims 1 to 5, characterized in that: include: Semiconductor substrate; The first surface of the semiconductor substrate is provided with a first intrinsic layer, an N-type doped layer, a first transparent conductive layer and a first electrode in sequence; A second intrinsic layer, a P-type doped layer, a second transparent conductive layer and a second electrode are sequentially arranged on the second surface of the semiconductor substrate.

7. The heterojunction solar cell according to claim 6, characterized in that: The thickness of the first intrinsic layer is 5nm to 20nm, and the thickness of the second intrinsic layer is 5nm to 20nm; And / or, the first intrinsic layer and the second intrinsic layer are both intrinsic amorphous silicon layers; And / or, the N-type doped layer is a hydrogenated microcrystalline silicon layer doped with a Group V element and an oxygen element; And / or, the thickness of the N-type doping layer is 10 nm to 35 nm; And / or, the thickness of the P-type doping layer is 5 nm to 40 nm; And / or, the semiconductor substrate is an N-type silicon-based substrate.

Citation Information

Patent Citations

  • Method for manufacturing heterojunction solar cell and heterojunction solar cell

    CN114497260A