Micro light emitting device and method of manufacturing the same
By designing an island-shaped composite reflector in a miniature light-emitting device, the emission angle is expanded, the voltage is reduced, and the photoelectric conversion efficiency is improved, thus solving the problems of high application cost and heat generation caused by the small emission angle of Mini-LED chips.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XIAMEN CHANGELIGHT CO LTD
- Filing Date
- 2022-08-19
- Publication Date
- 2026-05-12
AI Technical Summary
The narrow light-emitting angle of Mini-LED chips leads to high costs, thicker screens, and heat generation issues in applications.
A miniature light-emitting device is designed by stacking a first metal reflective layer on a transparent conductive layer to form an island-like structure, combining a passivation layer and an insulating reflective layer to form a composite reflector to expand the light emission angle, and improving the lateral current conduction efficiency through alloying processes.
It expands the light emission angle, reduces voltage, improves photoelectric conversion efficiency, reduces normal light emission, and reduces screen thickness and heat generation.
Smart Images

Figure CN115360278B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of light-emitting diodes, and more particularly to a micro light-emitting device and its fabrication method. Background Technology
[0002] With the continuous development of semiconductor light-emitting technology, the applications of LEDs are changing rapidly, especially in display technology. At the same time, due to the need for high resolution in LED displays, the spacing and size of LED chips are becoming smaller and smaller, such as Mini-LEDs and other micro-light-emitting devices.
[0003] MiniLED refers to LED chips with dimensions on the order of 100 micrometers, primarily used in backlighting and direct-view displays. In terms of size, a single MiniLED chip ranges from 50 to 200 μm, with a pixel pitch of approximately 0.5 to 1 mm. Compared to traditional LED chip backlighting products, this smaller pixel pitch allows for the integration of more LED backlight beads onto a single display screen. This divides the screen into more finely divided backlight zones, facilitating more precise localized light emission adjustment and achieving contrast levels approaching those of OLED screens. Furthermore, compared to OLED screens, Mini-LED backlit screens offer advantages such as longer lifespan and reduced burn-in resistance.
[0004] However, Mini-LED chips have a light-emitting angle of 130 to 140°. In order to achieve a better display effect, more backlight beads and backlight design need to be integrated, making it difficult to make the thickness thinner. At the same time, the accumulation of multiple backlight beads can also generate more heat, requiring higher heat dissipation from the device. Therefore, it is difficult to apply Mini-LED to larger screens.
[0005] In view of this, the inventors have specifically designed a micro light-emitting device and its fabrication method, which leads to this invention. Summary of the Invention
[0006] The purpose of this invention is to provide a micro light-emitting device and its preparation method, so as to solve the problems of high cost, large screen thickness and heat generation caused by the small light emission angle of micro light-emitting devices.
[0007] To achieve the above objectives, the technical solution adopted by the present invention is as follows:
[0008] A micro light-emitting device includes a substrate and a plurality of LED array units disposed on the surface of the substrate and isolated from each other by trenches, wherein the LED array units include:
[0009] An epitaxial stack includes a first type semiconductor layer, an active region, and a second type semiconductor layer stacked sequentially along a first direction, wherein a local area of the epitaxial stack is etched to a portion of the first type semiconductor layer to form a groove and a mesa; the first direction is perpendicular to the substrate and extends from the substrate toward the epitaxial stack.
[0010] A transparent conductive layer is disposed on the platform and has an island-shaped structure;
[0011] A first metallic reflective layer is stacked on the side of the transparent conductive layer facing away from the platform.
[0012] A passivation layer is formed on the side surface of the first metal reflective layer opposite to the transparent conductive layer, and has a first electrode contact hole and a second electrode contact hole; wherein the second electrode contact hole is located above the platform, and the first electrode contact hole exposes a portion of the surface of the groove.
[0013] A first electrode is deposited in the first electrode contact hole and electrically connected to the first type of semiconductor layer;
[0014] The second electrode is deposited in the second electrode contact hole and electrically connected to the second type of semiconductor layer, and the second electrode is disposed far away from the first electrode.
[0015] Preferably, the first metal reflective layer and the transparent conductive layer form an ohmic contact with the second type semiconductor layer through an alloying process.
[0016] Preferably, the first metal reflective layer has at least one through hole, and the passivation layer is embedded in the through hole.
[0017] Furthermore, the first metal reflective layer includes a metal reflector and a metal blocking layer stacked sequentially, wherein the reflective metal includes a high reflectivity metal, such as Ag or Al; and the metal blocking layer includes one or more of TiW and Pt stacked together.
[0018] Preferably, the passivation layer has a patterned structure, and the patterned structure does not overlap with the projection of the via on the substrate surface.
[0019] Preferably, it further includes a second metal reflective layer and an insulating reflective layer; wherein the second metal reflective layer is disposed on the surface of the patterned structure, and the insulating reflective layer covers the second metal reflective layer.
[0020] Furthermore, the second metal reflective layer includes a highly reflective metal, such as Ag or Al.
[0021] Preferably, the insulating reflective layer covers the sidewalls of the epitaxial stack.
[0022] Preferably, the insulating reflective layer comprises a DBR reflector.
[0023] Preferably, the passivation layer has a tapered or bowl-shaped patterned structure.
[0024] Preferably, the passivation layer comprises SiO2, SiC, AlN, SiONx, or SiN. x One or more of them.
[0025] Preferably, the passivation layer is stacked on the substrate in such a way that it is held against the sidewalls of the trench.
[0026] Preferably, the passivation layer surrounds the periphery of the epitaxial stack.
[0027] Preferably, the nano-transparent conductive layer has a nano-island structure.
[0028] Preferably, a first contact metal is provided on the bottom surface of the groove, and the first electrode is stacked on the surface of the first contact metal. The first contact metal is used to reduce the height difference when depositing the first electrode and the second electrode.
[0029] Preferably, the first contact metal includes one or more combinations of metals such as Cr, Ni, Al, Ti, Pt, and Au.
[0030] The present invention also provides a method for fabricating a micro light-emitting device, the method comprising the following steps:
[0031] S01, Provide a substrate;
[0032] S02. Growing an epitaxial stack, wherein the epitaxial stack comprises a first type semiconductor layer, an active layer, and a second type semiconductor layer sequentially stacked on the surface of the substrate;
[0033] S03. By etching the epitaxial stack, a portion of the first type semiconductor layer is exposed, thereby forming a plurality of grooves and mesa, wherein the grooves and mesa are disposed opposite to each other;
[0034] S04. By deeply etching the epitaxial stack to expose the substrate surface, a plurality of epitaxial stacks are formed by spacing them between each other through trenches;
[0035] S05. Deposit a transparent conductive layer on the mesa of each of the independent epitaxial stacks, wherein the transparent conductive layer includes island-shaped transparent conductive layers;
[0036] S06. A first metal reflective layer is formed on the surface of the transparent conductive layer, and the first metal reflective layer has at least one through hole;
[0037] The first metal reflective layer includes a metal reflector and a metal blocking layer stacked sequentially.
[0038] S07. Fabricate a first contact metal, which is formed on the bottom surface of the groove;
[0039] S08. A passivation layer is formed on the surface of the first metal reflective layer by embedding the via. The passivation layer has a patterned structure, and the patterned structure does not overlap with the projection of the via on the substrate surface.
[0040] S09. A second metal reflective layer is formed on the patterned surface of the passivation layer;
[0041] S10. Fabricate an insulating reflective layer, wherein the insulating reflective layer covers the second metal reflective layer;
[0042] S11. A first electrode contact hole and a second electrode contact hole are formed by etching process; wherein, the second electrode contact hole is located above the mesa and exposes the first metal reflective layer, and the first electrode contact hole exposes the first contact metal;
[0043] S12. Fabricate a first electrode and a second electrode, wherein the first electrode is deposited in the first electrode contact hole and extends to the surface of the insulating reflective layer, and the second electrode is deposited in the second electrode contact hole and extends to the surface of the insulating reflective layer, and the first electrode and the second electrode are disposed far apart.
[0044] Preferably, step S06 further includes an alloying process, in which the first metal reflective layer and the transparent conductive layer form an ohmic contact with the second type semiconductor layer through an alloying process. Specifically, the alloying process includes, but is not limited to, rapid annealing in a nitrogen atmosphere using RTA, with an alloying temperature range of 400℃-600℃, including endpoint values.
[0045] As can be seen from the above technical solution, the micro light-emitting device provided by the present invention expands the light emission angle by stacking a first metal reflective layer on the surface of a transparent conductive layer with an island-like structure, so that the light reflected downward by the first metal reflective layer forms a diffuse reflection effect at the island-like structure; while the first metal reflective layer and the transparent conductive layer form an ohmic contact with the second type semiconductor layer through an alloying process, the first metal reflective layer has conductive properties and its resistance value is lower than that of the transparent conductive layer, which is more conducive to the lateral conduction of current, thereby reducing the voltage and further improving the photoelectric conversion efficiency of the micro light-emitting device.
[0046] Secondly, by setting the first metal reflective layer to have at least one through hole, and embedding the passivation layer into the through hole, the normal light is reduced by opening the first metal reflective layer, while the normal light is absorbed by embedding the passivation layer in the through hole area, thereby further weakening the normal light.
[0047] The micro-light-emitting device further includes a second metal reflective layer and an insulating reflective layer. The passivation layer has a patterned structure, and the patterned structure does not overlap with the projection of the via on the substrate surface. The second metal reflective layer is disposed on the surface of the patterned structure, and the insulating reflective layer covers the second metal reflective layer. Thus, the patterned structure of the second metal reflective layer and the passivation layer forms a patterned composite reflector to further enhance diffuse reflection and increase the emission angle. Simultaneously, the insulating reflective layer ensures sufficient light reflection, avoiding brightness loss.
[0048] The present invention also provides a method for preparing a micro-light-emitting device, which achieves the beneficial effects of the above-mentioned micro-light-emitting element while being simple and convenient to manufacture and easy to mass-produce. Attached Figure Description
[0049] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0050] Figure 1 This is a schematic diagram of the structure of the micro-light-emitting device provided in an embodiment of the present invention;
[0051] Figures 2.1 to 2.12 This is a schematic diagram of the structure corresponding to the steps of the fabrication method of the micro-light-emitting device provided in the embodiments of the present invention;
[0052] Figure 3 The transparent conductive layer with a nano-island structure provided in the embodiments of the present invention; the symbols in the figure are explained as follows: 1, substrate; 2, first type semiconductor layer; 3, active region; 4, second type semiconductor layer; 5.1, groove; 5.2, mesa; 6, trench; 7, transparent conductive layer; 8.1, metal mirror; 8.2, metal barrier layer; 8.3, through hole; 9, first contact metal; 10, passivation layer; 10.1, patterned structure; 11, second metal reflective layer; 12, insulating reflective layer; 13, first electrode contact hole; 14, second electrode contact hole; 15, first electrode; 16, second electrode. Detailed Implementation
[0053] To make the content of this invention clearer, the following description, in conjunction with the accompanying drawings, further illustrates the invention. This invention is not limited to this specific embodiment. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without inventive effort are within the scope of protection of this invention.
[0054] like Figure 1 As shown, a micro light-emitting device includes a substrate 1 and a plurality of LED array units disposed on the surface of the substrate 1 and isolated from each other by trenches 6. The LED array units include:
[0055] The epitaxial stack includes a first type semiconductor layer 2, an active region 3, and a second type semiconductor layer 4 stacked sequentially along a first direction, and a local area of the epitaxial stack is etched to a portion of the first type semiconductor layer 2 to form a groove 5.1 and a mesa 5.2; the first direction is perpendicular to the substrate 1 and points from the substrate 1 to the epitaxial stack.
[0056] A transparent conductive layer 7 is disposed on the platform 5.2 and has an island-shaped structure;
[0057] A first metallic reflective layer is stacked on the surface of the transparent conductive layer 7 facing away from the platform 5.2;
[0058] The passivation layer 10 is formed on the side surface of the first metal reflective layer away from the transparent conductive layer 7, and has a first electrode 15 contact hole 13 and a second electrode 16 contact hole 14; wherein the second electrode 16 contact hole 14 is located above the mesa 5.2, and the first electrode 15 contact hole 13 exposes part of the surface of the groove 5.1.
[0059] The first electrode 15 is deposited in the first electrode 15 contact hole 13 and electrically connected to the first type semiconductor layer 2;
[0060] The second electrode 16 is deposited in the contact hole 14 and electrically connected to the second type semiconductor layer 4, and the second electrode 16 and the first electrode 15 are disposed far apart from each other.
[0061] It should be emphasized that, in order to highlight the technical inventive points of this invention, in the embodiments of this invention, Figure 1 This illustration only shows one LED array unit in the micro-light-emitting device. In actual use, the surface of substrate 1 contains tens of thousands of LED array units, depending on the specific situation. This application does not limit this.
[0062] It should be noted that the type of substrate 1 is not limited in the micro light-emitting element of this embodiment. For example, substrate 1 can be, but is not limited to, sapphire substrate 1, silicon substrate 1, etc. In addition, the types of the epitaxial stacked first type semiconductor layer 2, active region 3 and second type semiconductor layer 4 are also not limited in the micro light-emitting element of this embodiment. For example, the first type semiconductor layer 2 can be, but is not limited to, a gallium nitride layer, and correspondingly, the second type semiconductor layer 4 can be, but is not limited to, a gallium nitride layer.
[0063] It is worth mentioning that, in the above embodiments, the material of the transparent conductive layer 7 can be ITO, ZnO, IWO, AZO, etc., depending on the specific circumstances, and this application does not limit it.
[0064] Based on the above embodiments, in one embodiment of this application, the first metal reflective layer and the transparent conductive layer 7 form an ohmic contact with the second type semiconductor layer 4 through an alloying process.
[0065] Based on the above embodiments, in one embodiment of this application, the first metal reflective layer has at least one through hole 8.3, and the passivation layer 10 is embedded in the through hole 8.3.
[0066] Furthermore, the first metal reflective layer includes a metal reflector 8.1 and a metal blocking layer 8.2 stacked sequentially, wherein the reflective metal includes a high reflectivity metal, such as Ag or Al; and the metal blocking layer 8.2 includes one or more of TiW and Pt stacked together.
[0067] Based on the above embodiments, in one embodiment of this application, the passivation layer 10 has a patterned structure 10.1, and the patterned structure 10.1 and the projection of the via 8.3 on the surface of the substrate 1 do not overlap.
[0068] Based on the above embodiments, in one embodiment of this application, a second metal reflective layer 11 and an insulating reflective layer 12 are further included; wherein, the second metal reflective layer 11 is disposed on the surface of the patterned structure 10.1, and the insulating reflective layer 12 covers the second metal reflective layer 11.
[0069] Furthermore, the second metal reflective layer 11 includes a highly reflective metal, such as Ag or Al.
[0070] Based on the above embodiments, in one embodiment of this application, the insulating reflective layer 12 covers the sidewall of the epitaxial stack.
[0071] Based on the above embodiments, in one embodiment of this application, the insulating reflective layer 12 includes a DBR reflector.
[0072] Based on the above embodiments, in one embodiment of this application, the passivation layer 10 has a tapered or bowl-shaped patterned structure 10.1.
[0073] Based on the above embodiments, in one embodiment of this application, the passivation layer 10 includes SiO2, SiC, AlN, SiONx, and SiN. x One or more of them.
[0074] Based on the above embodiments, in one embodiment of this application, the passivation layer 10 is stacked on the substrate 1 in such a way that it is held on the sidewall of the trench 6.
[0075] Based on the above embodiments, in one embodiment of this application, the passivation layer 10 surrounds the periphery of the epitaxial stack.
[0076] like Figure 3 As shown, based on the above embodiments, in one embodiment of this application, the nano-transparent conductive layer 7 has a nano-island structure.
[0077] Based on the above embodiments, in one embodiment of this application, a first contact metal 9 is further provided on the bottom surface of the groove 5.1, and the first electrode 15 is stacked on the surface of the first contact metal 9. The first contact metal 9 is used to reduce the height difference when depositing the first electrode 15 and the second electrode 16.
[0078] In one embodiment of this application, the first contact metal 9 includes one or more combinations of metals such as Cr, Ni, Al, Ti, Pt, and Au.
[0079] This invention also provides a method for fabricating a micro light-emitting device, the method comprising the following steps:
[0080] S01, such as Figure 2.1 As shown, a substrate 1 is provided;
[0081] It should be noted that the type of substrate 1 is not limited in the micro light-emitting element of this embodiment. For example, substrate 1 can be, but is not limited to, sapphire substrate 1, silicon substrate 1, etc.
[0082] S02, such as Figure 2.2 As shown, an epitaxial stack is grown, comprising a first type semiconductor layer 2, an active layer, and a second type semiconductor layer 4 sequentially stacked on the surface of a substrate 1.
[0083] It should be noted that the types of the first type semiconductor layer 2, the active region 3, and the second type semiconductor layer 4 in the epitaxial stacked micro light-emitting element in this embodiment are not limited. For example, the first type semiconductor layer 2 may be, but is not limited to, a gallium nitride layer, and correspondingly, the second type semiconductor layer 4 may be, but is not limited to, a gallium nitride layer.
[0084] S03, such as Figure 2.3 As shown, by etching the epitaxial stack, a portion of the first type semiconductor layer 2 is exposed, thereby forming a number of grooves 5.1 and mesas 5.2, with the grooves 5.1 and mesas 5.2 arranged opposite to each other;
[0085] In one embodiment of this application, etching the epitaxial stack to form a plurality of grooves 5.1 and mesa 5.2 includes using an inductively coupled plasma (ICP) process, with etching gases including Cl2, Ar, and O2. However, this application does not limit this process and the specific method depends on the circumstances.
[0086] S04, such as Figure 2.4 As shown, by deep etching the epitaxial stack to the surface of the bare substrate 1, a number of epitaxial stacks are formed by spacing them together through trenches 6.
[0087] In one embodiment of this application, the epitaxial stack is deeply etched to the surface of the exposed substrate 1 to form a plurality of epitaxial stacks arranged at intervals through trenches 6; this includes using an inductively coupled plasma (ICP) process, with etching gases including Cl2, Ar, and O2. However, this application does not limit this, and the specific method depends on the circumstances.
[0088] S05, such as Figure 2.5 As shown, a transparent conductive layer 7 is deposited on the mesa 5.2 of each independent epitaxial stack, wherein the transparent conductive layer 7 includes island-shaped transparent conductive layers 7;
[0089] In one embodiment of this application, the material of the transparent conductive layer 7 may be ITO, ZnO, IWO, AZO, etc., and its formation process may be electron beam evaporation, sputtering evaporation, etc., depending on the specific circumstances. This application does not limit it in this regard.
[0090] S06, such as Figure 2.6 As shown, a first metal reflective layer is formed on the surface of the transparent conductive layer 7, and the first metal reflective layer has at least one through hole 8.3;
[0091] The first metal reflective layer includes a metal reflector 8.1 and a metal blocking layer 8.2 stacked sequentially; the reflective metal includes a high reflectivity metal, such as Ag or Al; the metal blocking layer 8.2 includes one or more of TiW and Pt stacked together.
[0092] S07, such as Figure 2.7 As shown, the first contact metal 9 is fabricated and formed on the bottom surface of the groove 5.1;
[0093] In one embodiment of this application, the first contact metal 9 includes one or more combinations of metals such as Cr, Ni, Al, Ti, Pt, and Au.
[0094] S08, such as Figure 2.8 As shown, a passivation layer 10 is fabricated on the surface of the first metal reflective layer by embedding a via 8.3. The passivation layer 10 has a patterned structure 10.1, and the projections of the patterned structure 10.1 and the via 8.3 on the surface of the substrate 1 do not overlap.
[0095] In one embodiment of this application, the passivation layer 10 includes SiO2, SiC, AlN, SiONx, and SiN. x One or more of the following; its patterned structure 10.1 is conical or bowl-shaped; and the passivation layer 10 is stacked on the substrate 1 and surrounds the epitaxial stack in such a way that it is held on the sidewalls of the trench 6.
[0096] S09, such as Figure 2.9 As shown, a second metal reflective layer 11 is fabricated on the surface of the patterned structure 10.1 of the passivation layer 10;
[0097] In one embodiment of this application, the second metal reflective layer 11 includes a highly reflective metal, such as Ag or Al.
[0098] S10, such as Figure 2.10 As shown, an insulating reflective layer 12 is fabricated, and the insulating reflective layer 12 covers the second metal reflective layer 11;
[0099] In one embodiment of this application, the insulating reflective layer 12 includes a DBR reflector.
[0100] S11, such as Figure 2.11 As shown, a first electrode contact hole 13 and a second electrode contact hole 14 are formed by an etching process; wherein, the second electrode contact hole 14 is located above the mesa 5.2 and exposes the first metal reflective layer, and the first electrode contact hole 13 exposes the first contact metal 9.
[0101] S12, such as Figure 2.12 As shown, a first electrode 15 and a second electrode 16 are fabricated. The first electrode 15 is deposited in the first electrode contact hole 13 and extends to the surface of the insulating reflective layer 12. The second electrode 16 is deposited in the second electrode contact hole 14 and extends to the surface of the insulating reflective layer 12. The first electrode 15 and the second electrode 16 are disposed far apart.
[0102] Based on the above embodiments, in one embodiment of this application, step S06 further includes an alloying process, in which the first metal reflective layer and the transparent conductive layer 7 form an ohmic contact with the second type semiconductor layer 4 through an alloying process. Specifically, the alloying process includes, but is not limited to, rapid annealing in a nitrogen atmosphere using RTA, with an alloying temperature range of 400℃-600℃, including endpoint values.
[0103] As can be seen from the above technical solution, the micro light-emitting device and its fabrication method provided by the present invention, by stacking a first metal reflective layer on the surface of a transparent conductive layer 7 with an island-like structure, causes the light reflected downward by the first metal reflective layer to form a diffuse reflection effect at the island-like structure, thereby expanding the light emission angle; while the first metal reflective layer and the transparent conductive layer 7 form an ohmic contact with the second type semiconductor layer 4 through an alloying process, since the first metal reflective layer has conductive properties and its resistance value is lower than that of the transparent conductive layer 7, it is more conducive to the lateral conduction of current, thereby reducing the voltage and further improving the photoelectric conversion efficiency of the micro light-emitting device.
[0104] Secondly, by setting the first metal reflective layer to have at least one through hole 8.3, and the passivation layer 10 is embedded in the through hole 8.3, the normal light is reduced by opening the first metal reflective layer, while the normal light is absorbed by embedding the passivation layer 10 in the through hole 8.3 area, so as to further weaken the normal light.
[0105] The micro-light-emitting device further includes a second metal reflective layer 11 and an insulating reflective layer 12. The passivation layer 10 has a patterned structure 10.1, and the projection of the patterned structure 10.1 and the through-hole 8.3 onto the surface of the substrate 1 does not overlap. The second metal reflective layer 11 is disposed on the surface of the patterned structure 10.1, and the insulating reflective layer 12 covers the second metal reflective layer 11. Thus, the second metal reflective layer 11 and the patterned structure 10.1 of the passivation layer 10 form a patterned composite reflector to further enhance the diffuse reflection effect and improve the emission angle. Simultaneously, the insulating reflective layer 12 ensures sufficient light reflection, avoiding brightness loss.
[0106] The present invention also provides a method for preparing a micro-light-emitting device, which achieves the beneficial effects of the above-mentioned micro-light-emitting element while being simple and convenient to manufacture and easy to mass-produce.
[0107] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.
[0108] It should also be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes the aforementioned element.
[0109] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A micro light-emitting device, comprising a substrate and a plurality of LED array units disposed on the surface of the substrate and isolated from each other by trenches, characterized in that, The LED array unit includes: An epitaxial stack includes a first type semiconductor layer, an active region, and a second type semiconductor layer stacked sequentially along a first direction, wherein a local area of the epitaxial stack is etched to a portion of the first type semiconductor layer to form a groove and a mesa; the first direction is perpendicular to the substrate and extends from the substrate toward the epitaxial stack. A transparent conductive layer is disposed on the platform and has multiple island-shaped structures; A first metallic reflective layer is stacked on the side of the transparent conductive layer facing away from the platform. A passivation layer is formed on the side surface of the first metal reflective layer opposite to the transparent conductive layer, and has a first electrode contact hole and a second electrode contact hole; wherein the second electrode contact hole is located above the platform, and the first electrode contact hole exposes a portion of the surface of the groove. A first electrode is deposited in the first electrode contact hole and electrically connected to the first type of semiconductor layer; The second electrode is deposited in the second electrode contact hole and electrically connected to the second type of semiconductor layer, and the second electrode is disposed far away from the first electrode; The first metal reflective layer has at least one through-hole, and the passivation layer is embedded in the through-hole; the passivation layer has a patterned structure, and the patterned structure does not overlap with the projection of the through-hole onto the substrate surface.
2. The micro light-emitting device according to claim 1, characterized in that, The first metal reflective layer and the transparent conductive layer form an ohmic contact with the second type semiconductor layer through an alloying process.
3. The micro light-emitting device according to claim 1, characterized in that, It also includes a second metal reflective layer and an insulating reflective layer; wherein the second metal reflective layer is disposed on the surface of the patterned structure, and the insulating reflective layer covers the second metal reflective layer.
4. The micro light-emitting device according to claim 3, characterized in that, The insulating reflective layer covers the sidewalls of the epitaxial stack.
5. The micro light-emitting device according to claim 4, characterized in that, The insulating reflective layer includes a DBR reflector.
6. The micro light-emitting device according to claim 1, characterized in that, The passivation layer has a tapered or bowl-shaped patterned structure.
7. The micro light-emitting device according to claim 1, characterized in that, The passivation layer includes SiO2, SiC, AlN, SiONx, and SiN. x One or more of them.
8. The micro light-emitting device according to claim 1, characterized in that, The passivation layer is stacked on the substrate in such a way that it is held against the sidewalls of the trench.
9. The micro light-emitting device according to claim 1, characterized in that, The transparent conductive layer has multiple nano-island structures.
10. A method for fabricating a micro light-emitting device, characterized in that, The preparation method includes the following steps: S01, Provide a substrate; S02. Growing an epitaxial stack, wherein the epitaxial stack comprises a first type semiconductor layer, an active layer, and a second type semiconductor layer sequentially stacked on the surface of the substrate; S03. By etching the epitaxial stack, a portion of the first type semiconductor layer is exposed, thereby forming a plurality of grooves and mesa, wherein the grooves and mesa are disposed opposite to each other; S04. By deeply etching the epitaxial stack to expose the substrate surface, a plurality of epitaxial stacks are formed by spacing them between each other through trenches; S05. A transparent conductive layer is deposited on the mesa of each epitaxial stack arranged at intervals, wherein the transparent conductive layer includes a transparent conductive layer having a plurality of island-like structures. S06. A first metal reflective layer is formed on the surface of the transparent conductive layer, and the first metal reflective layer has at least one through hole; The first metal reflective layer includes a metal reflector and a metal blocking layer stacked sequentially. S07. Fabricate a first contact metal, which is formed on the bottom surface of the groove; S08. A passivation layer is formed on the surface of the first metal reflective layer by embedding the via. The passivation layer has a patterned structure, and the patterned structure does not overlap with the projection of the via on the substrate surface. S09. A second metal reflective layer is formed on the patterned surface of the passivation layer; S10. Fabricate an insulating reflective layer, wherein the insulating reflective layer covers the second metal reflective layer; S11. A first electrode contact hole and a second electrode contact hole are formed by etching process; wherein, the second electrode contact hole is located above the mesa and exposes the first metal reflective layer, and the first electrode contact hole exposes the first contact metal; S12. Fabricate a first electrode and a second electrode, wherein the first electrode is deposited in the first electrode contact hole and extends to the surface of the insulating reflective layer, and the second electrode is deposited in the second electrode contact hole and extends to the surface of the insulating reflective layer, and the first electrode and the second electrode are disposed far apart.
11. The micro light-emitting device according to claim 1, characterized in that, Step S06 further includes an alloying process, in which the first metal reflective layer and the transparent conductive layer form an ohmic contact with the second type semiconductor layer through the alloying process.