Silicon-based display panel and display device

Abstract

The embodiment of the present invention discloses a silicon-based display panel and a display device, wherein the silicon-based display panel comprises at least one voltage regulating circuit; a first output end of the voltage regulating circuit is electrically connected to at least a voltage stabilizing control end of a driving module in each pixel circuit located in the same row, and a second output end of the voltage regulating circuit is electrically connected to at least a voltage stabilizing input end of the driving module in each pixel circuit located in the same row; the voltage regulating circuit is used to provide a voltage stabilizing control signal to the voltage stabilizing control end of the driving module in at least one row of pixel circuits, and to provide a voltage stabilizing input signal to the voltage stabilizing input end of the driving module in at least one row of pixel circuits; the driving module provides a current signal to the light-emitting module according to the voltage stabilizing control signal and the voltage stabilizing input signal, and can control the light-emitting module of each pixel circuit to stably emit light, thereby improving the light-emitting stability of the light-emitting module, and further improving the display uniformity of the silicon-based display panel, that is, improving the display quality of the silicon-based display panel.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a silicon-based display panel and a display device. Background Art

[0002] A silicon-based display is a display in which light-emitting elements are placed on a silicon chip. It has the advantages of self-luminescence, high resolution, and high integration, and is widely used in wearable display devices, such as augmented reality display devices or virtual reality display devices.

[0003] Since the light-emitting elements of silicon-based displays are usually current-driven elements, the pixel circuits of silicon-based displays usually include light-emitting elements and current drivers, so that the current driver can provide driving current to the light-emitting elements to control the luminance and chromaticity of the light-emitting elements. In order to control the current flowing through the light-emitting elements, the current driver and the light-emitting elements are usually connected in series between a positive power supply and a negative power supply. However, when the current received by the light-emitting element is low, the luminance of the light-emitting element is low, and a small fluctuation in the low current will have a greater impact on the displayed luminance and chromaticity of the light-emitting element. In the prior art, a fixed current is provided to the light-emitting element, and the luminance and chromaticity of the light-emitting element can be adjusted by pulse width modulation of the fixed current provided to the light-emitting element.

[0004] Therefore, how to make each pixel circuit have a stable and consistent current source is one of the main ways to improve the display uniformity of silicon-based displays. Summary of the invention

[0005] The present invention provides a silicon-based display panel and a display panel, which can provide a stable current source signal to each pixel circuit of the silicon-based display panel, so that the current source of the pixel circuit of the silicon-based display panel remains consistent, thereby improving the display uniformity of the silicon-based display panel.

[0006] In a first aspect, an embodiment of the present invention provides a silicon-based display panel, comprising: a plurality of pixel circuits arranged in an array; the pixel circuits at least include a driving module and a light-emitting module;

[0007] At least one voltage regulating circuit; a first output end of the voltage regulating circuit is electrically connected to at least a voltage stabilizing control end of a driving module in each of the pixel circuits located in the same row, and a second output end of the voltage regulating circuit is electrically connected to at least a voltage stabilizing input end of a driving module in each of the pixel circuits located in the same row;

[0008] The voltage regulating circuit is used to provide a voltage stabilization control signal to a voltage stabilization control terminal of a driving module in at least one row of the pixel circuits, and to provide a voltage stabilization input signal to a voltage stabilization input terminal of a driving module in at least one row of the pixel circuits;

[0009] The current output terminal of the driving module is coupled to the input terminal of the light-emitting module; the driving module is used to provide a current signal to the light-emitting module according to the voltage-stabilizing control signal and the voltage-stabilizing input signal.

[0010] In a second aspect, an embodiment of the present invention further provides a display device, comprising any silicon-based display panel described in the first aspect.

[0011] A silicon-based display panel and a display device provided by an embodiment of the present invention are provided with at least one voltage regulating circuit. The voltage regulating circuit can provide a voltage regulating control signal to a voltage regulating control end of a driving module in at least one row of pixel circuits, and provide a voltage regulating input signal to a voltage regulating input end of a driving module in at least one row of pixel circuits, so that the driving module provides a current signal to a light-emitting module according to the voltage regulating control signal and the voltage regulating input signal. In this way, a stable current source signal can be provided to each pixel circuit of the silicon-based display panel through the voltage regulating circuit, so that the current signal generated by the driving module of each pixel circuit in the silicon-based display panel remains consistent, and the voltage source received by different power signal lines due to the instability of the voltage source received by the power signal line can be prevented, resulting in a difference in the current signal generated by the driving module of each pixel circuit according to the voltage source received by it, causing the display inconsistency phenomenon to occur, thereby improving the light-emitting stability of the light-emitting module in the silicon-based display panel, and then improving the display uniformity of the silicon-based display panel, that is, improving the display quality of the silicon-based display panel.

[0012] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0014] Figure 1 A schematic diagram of the structure of a silicon-based display panel in the prior art;

[0015] Figure 2 is a schematic structural diagram of a silicon-based display panel provided by an embodiment of the present invention;

[0016] Figure 3 is a schematic diagram of a film layer structure of a silicon-based display panel provided by an embodiment of the present invention;

[0017] Figure 4 is a schematic structural diagram of another silicon-based display panel provided by an embodiment of the present invention;

[0018] Figure 5 is a structural schematic diagram of another silicon-based display panel provided by an embodiment of the present invention;

[0019] Figure 6 is a schematic structural diagram of a voltage regulation circuit provided by an embodiment of the present invention;

[0020] Figure 7 is a specific circuit structure diagram of a voltage regulation circuit provided by an embodiment of the present invention;

[0021] Figure 8 is a schematic structural diagram of another voltage regulation circuit provided by an embodiment of the present invention;

[0022] Fig. 9 is a specific circuit structure diagram of another voltage regulating circuit provided by an embodiment of the present invention;

[0023] Fig.10 is a schematic diagram of a specific structure of another silicon-based display panel provided by an embodiment of the present invention;

[0024] Fig.11 is a structural schematic diagram of a pixel circuit provided by an embodiment of the present invention;

[0025] Fig.12 is a structural schematic diagram of another pixel circuit provided by an embodiment of the present invention;

[0026] Fig.13 It is a structural schematic diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0027] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0028] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0029] Figure 1 FIG. 1 is a schematic diagram of the structure of a silicon-based display panel in the prior art. Figure 1 As shown, the silicon-based display panel 001 includes a plurality of pixel circuits 010 arranged in an array, and the pixel circuit 010 includes a driving module 011 and a light-emitting element 012. By providing a voltage source to the driving module 011, the driving module 011 can convert the voltage source into a current signal and provide it to the light-emitting element 012 to drive the light-emitting element 012 to emit light. The driving module 011 can receive the voltage source through a power signal line 020, and the pixel circuits 010 located in different columns receive the voltage source through different power signal lines 020.

[0030] However, since the voltage source received by each power signal line 020 is unstable, there are differences in the voltage sources received by different power signal lines 020, resulting in differences in the current signals generated by the driving modules 011 of each pixel circuit 010 according to the voltage sources received, that is, the current signals provided to the light-emitting elements 012 of each pixel circuit 010 are different, and the displayed luminous brightness of each light-emitting element 012 is different, thereby affecting the display uniformity of the silicon-based display panel.

[0031] In order to solve the above technical problems, an embodiment of the present invention provides a silicon-based display panel. By setting at least one voltage regulation circuit on the silicon-based display panel, the voltage regulation circuit provides a voltage regulation control signal to the voltage regulation control end of the driving module in at least one row of pixel circuits, and provides a voltage regulation input signal to the voltage regulation input end T1b of the driving module in at least one row of pixel circuits, so that each pixel circuit can receive a stable voltage regulation control signal and a voltage regulation input signal, so that when the driving module of each pixel circuit generates a current signal according to the received voltage regulation control signal and voltage regulation input signal, the light-emitting module of each pixel circuit can be controlled to emit light stably, thereby improving the light-emitting stability of the light-emitting module, and then improving the display uniformity of the silicon-based display panel, that is, improving the display quality of the silicon-based display panel.

[0032] The above is the core idea of ​​the present invention. The technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0033] Figure 2 is a schematic diagram of the structure of a silicon-based display panel provided by an embodiment of the present invention. Figure 2 As shown, the silicon-based display panel 100 includes a plurality of pixel circuits 10 arranged in an array, and the pixel circuit 10 includes at least a driving module 101 and a light-emitting module 102 . The silicon-based display panel 100 also includes at least one voltage regulating circuit 11, wherein a first output terminal 11a of the voltage regulating circuit 11 is electrically connected to at least a voltage regulating control terminal T1a of a driving module 101 in each pixel circuit 10 located in the same row, and a second output terminal 11b of the voltage regulating circuit 10 is electrically connected to at least a voltage regulating input terminal T1b of a driving module 101 in each pixel circuit 10 located in the same row. The voltage regulating circuit 11 is used to provide a voltage regulating control signal V1 to the voltage regulating control terminal T1a of the driving module 101 in at least one row of pixel circuits 10, and to provide a voltage regulating input signal V2 to the voltage regulating input terminal T1b of the driving module 101 in at least one row of pixel circuits 10; wherein a current output terminal of the driving module 101 is coupled to an input terminal of the light-emitting module 102, and the driving module 101 is used to provide a current signal to the light-emitting module 102 according to the voltage regulating control signal V1 and the voltage regulating input signal V2.

[0034] It can be understood that the driving module 101 can convert the voltage signal into a current signal; the light-emitting module 102 can include a current-driven light-emitting element, which can include but is not limited to an organic light-emitting diode (OLED), a micron light-emitting diode (Micro LED), or a sub-millimeter light-emitting diode (Mini LED). The voltage regulating circuit 11 is any circuit structure that can provide a stable voltage-stabilizing control signal V1 and a voltage-stabilizing input signal V2, and the embodiment of the present invention does not specifically limit this. Among them, the voltage-stabilizing control signal V1 and the voltage-stabilizing input signal V2 output by the voltage regulating circuit 11 have a certain difference, and the driving module 101 can generate a corresponding current signal according to the difference to drive the light-emitting module 102 to emit light; at this time, the voltage regulating circuit 11 electrically connected to the voltage-stabilizing control terminal T1a and the voltage-stabilizing input terminal T1b of the driving module 101 in the same pixel circuit 10 is the same voltage regulating circuit.

[0035] Specifically, the voltage regulating circuit 11 provides a voltage stabilization control signal V1 to the voltage stabilization control terminal T1a of the driving module 101 in the pixel circuit 10, and provides a voltage stabilization input signal V2 to the voltage stabilization input terminal T1b, so that there can be a stable difference between the voltage stabilization control signal V1 received by the driving module 101 and the voltage stabilization input signal V2. For example, the difference between the voltage stabilization control signal V1 received by the driving module 101 and the voltage stabilization input signal V2 is a fixed value, so that the current signal generated by the driving module 101 according to the voltage stabilization control signal V1 and the voltage stabilization input signal V2 has a stable current value. When the light-emitting module 102 is driven to emit light using the current signal, the light-emitting module 102 can emit light stably and accurately, thereby improving the display uniformity of the silicon-based display panel 100.

[0036] In this embodiment, a voltage regulating circuit is used to provide a voltage regulating control signal to a voltage regulating control terminal of a driving module in a pixel circuit, and a voltage regulating input signal is provided to a voltage regulating input terminal T1b of the driving module in the pixel circuit, so that the driving module provides a current signal to the light-emitting module according to the voltage regulating control signal and the voltage regulating input signal. In this way, a stable current source signal can be provided to each pixel circuit of the silicon-based display panel through the voltage regulating circuit, so that the current signal generated by the driving module of each pixel circuit in the silicon-based display panel remains consistent, and the voltage source received by different power signal lines due to the instability of the voltage source received by the power signal line can be prevented, resulting in differences in the current signals generated by the driving modules of each pixel circuit according to the voltage source received, causing the display inconsistency to occur, thereby improving the light-emitting stability of the light-emitting module in the silicon-based display panel, and further improving the display uniformity of the silicon-based display panel, that is, improving the display quality of the silicon-based display panel.

[0037] Based on the above embodiments, Figure 3 is a schematic diagram of a film structure of a silicon-based display panel provided by an embodiment of the present invention, combined with reference Figure 2 and Figure 3 The silicon-based display panel 200 also includes a plurality of first signal lines 12 and a plurality of second signal lines 13, each of the first signal lines 12 and each of the second signal lines 13 extends along a first direction X and is arranged along a second direction Y; the first direction X intersects with the second direction Y; the voltage regulation control terminal T1a of the driving module 101 in each pixel circuit 10 located in the same row is electrically connected to the first output terminal 11a of the same voltage regulation circuit 11 through the same first signal line 12; the voltage regulation input terminal T1b of the driving module 101 in each pixel circuit 10 located in the same row is electrically connected to the second output terminal 11b of the same voltage regulation circuit 11 through the same second signal line 13, wherein the first signal line 12 and the second signal line 13 are arranged in the same layer.

[0038] Specifically, the silicon-based display panel 100 may include a silicon-based substrate P1, on which a voltage regulating circuit 11 and a pixel circuit 10 are formed; a conductive layer P2 is also formed on the silicon-based substrate P1, and the conductive layer P2 may include a first signal line 12 and a second signal line 13. At this time, the voltage regulation control terminal T1a of the driving module 101 in the pixel circuit 10 located in the same row can be electrically connected to the first output terminal 11a of the same voltage regulation circuit 11 through the same first signal line 12, and the voltage regulation input terminal T1b of the driving module 101 in the pixel circuit 10 located in the same row can be electrically connected to the second output terminal 11b of the same voltage regulation circuit 11 through the same second signal line 12. At the same time, since the first signal line 12 and the second signal line 13 extend in the same direction, when the first signal line 12 and the second signal line 13 are arranged in the same film layer, the first signal line 12 and the second signal line 13 can be arranged in the second direction Y, so that the first signal line 12 and the second signal line 13 do not overlap each other, and the signals transmitted on the first signal line 12 and the second signal line 13 do not affect each other, and the film layer setting of the silicon-based display panel 100 can be simplified, which is conducive to the thinness of the silicon-based display panel 100. In addition, the first signal line 12 and the second signal line 13 can also have the same width and length, on the one hand, it can reduce the influence of the resistance voltage drop difference of the first signal line 12 and the second signal line 13 on the voltage regulation control signal V1 and the voltage regulation input signal V2, and on the other hand, during the manufacturing process, the first signal line 12 and the second signal line 13 can be manufactured and formed using the same mask in the same manufacturing process, and there is no need to manufacture masks for the first signal line 12 and the second signal line 13 respectively, which saves costs, reduces the number of processes, and improves production efficiency.

[0039] It should be noted that Figure 2 It is only exemplarily shown that each voltage regulating circuit 11 is electrically connected to a row of pixel circuits 10 , but in the embodiment of the present invention, each voltage regulating circuit 11 may be electrically connected to at least one row of pixel circuits 10 .

[0040] For example, Figure 4As shown, each voltage regulating circuit 11 can be electrically connected to two rows of pixel circuits 10, that is, the first output terminal 11a of the voltage regulating circuit 11 is electrically connected to the voltage stabilization control terminal T1a of each driving module 101 of the two rows of pixel circuits 10, and the second output terminal 11b of the voltage regulating circuit 11 is electrically connected to the voltage stabilization input terminal T1b of each driving module 101 of the two rows of pixel circuits 10. At this time, each voltage regulating circuit 11 provides a voltage stabilization control signal V1 and a voltage stabilization input signal V2 to the driving modules 101 in the corresponding two rows of pixel circuits 10, and then the driving module 101 provides a current signal to the light emitting module 102 according to the voltage stabilization control signal V1 and the voltage stabilization input signal V2, so that the number of voltage regulating circuits 11 can be half of the number of rows of pixel circuits 10. When the voltage regulating circuit is set in the non-display area of ​​the silicon-based display panel 100, it is beneficial to reduce the size occupied by the voltage regulating circuit in the non-display area of ​​the silicon-based display panel, thereby facilitating a narrow frame of the silicon-based display panel 100.

[0041] In another exemplary embodiment, Figure 5 As shown, only one voltage regulating circuit 11 may be provided in the silicon-based display panel, and the first output terminal 11a of the voltage regulating circuit 11 is electrically connected to the voltage regulating control terminal T1a of the driving module 101 of each pixel circuit 10, and the second output terminal 11b of the voltage regulating circuit 11 is electrically connected to the voltage regulating input terminal T1b of the driving module 101 of each pixel circuit 10. At this time, since only one voltage regulating circuit 11 is required to be provided in the silicon-based display panel 100, the size occupied by the voltage regulating circuit 11 in the silicon-based display panel 100 can be minimized.

[0042] The above Figure 2 , 4 5 are exemplary descriptions of the embodiments of the present invention. In the embodiments of the present invention, the number of voltage regulating circuits provided in the silicon-based display panel and the number of rows of pixel circuits electrically connected to each voltage regulating circuit are not specifically limited. For ease of description, the following takes the example of each potential regulating circuit being electrically connected to a row of pixel circuits as an example to exemplify the technical solution of the embodiments of the present invention.

[0043] Based on the above embodiments, continue to refer to Figure 2 The driving module 101 may include a driving transistor T1, a gate of the driving transistor T1 is a voltage stabilization control terminal T1a of the driving module 101, a first pole of the driving transistor T1 is a voltage stabilization input terminal T1b of the driving module 101, a second pole of the driving transistor T1 is a current output terminal of the driving module 101, and a difference between a voltage stabilization control signal V1 and a voltage stabilization input signal V2 is in the range of |V1-V2|>Vth; wherein Vth is a threshold voltage of the driving transistor T1.

[0044] Specifically, the driving transistor T1 can be a P-channel transistor or an N-channel transistor, and the embodiment of the present invention does not specifically limit this. The driving transistor T1 can generate a corresponding current signal according to the voltage difference between its gate and its first electrode; since the gate of the driving transistor T1 is the voltage stabilization control terminal T1a of the driving module 101, and the first electrode of the driving transistor T1 is the voltage stabilization input terminal T1b of the driving module 101, the gate of the driving transistor T1 can receive the voltage stabilization control signal V1, and the first electrode of the driving transistor T1 can receive the voltage stabilization input signal V2; at this time, when the driving transistor T1 is a P-channel transistor, the threshold voltage Vth of the driving transistor T1 is a negative value, so that the voltage difference V1-V2 between the gate of the driving transistor T1 and its first electrode is less than its threshold voltage Vth, that is, the voltage stabilization control terminal T1a is the voltage stabilization input terminal T1b of the driving module 101. When the difference between the voltage control signal V1 and the voltage stabilization input signal V2 is a negative value less than the threshold voltage Vth of the driving transistor T1, the driving transistor T1 is turned on, and the driving transistor T1 provides a current signal to the light-emitting module 102; and when the driving transistor T1 is an N-channel transistor, the threshold voltage Vth of the driving transistor T1 is a positive value, so that the voltage difference V1-V2 between the gate of the driving transistor T1 and the first electrode thereof is greater than its threshold voltage Vth, that is, when the difference between the voltage stabilization control signal V1 and the voltage stabilization input signal V2 is a positive value less than the threshold voltage Vth of the driving transistor T1, the driving transistor T1 is turned on, and the driving transistor T1 provides a current signal to the light-emitting module 102. In this way, no matter whether the driving transistor T1 is a P-channel transistor or an N-channel transistor, as long as the difference between the voltage regulation control signal V1 and the voltage regulation input signal V2 is in the range of |V1-V2|>Vth, the driving transistor T1 can be turned on, so that the driving transistor T1 provides a current signal to the light-emitting module 102 to drive the light-emitting element 102 to emit light.

[0045] In an alternative embodiment, Figure 6 is a structural diagram of a voltage regulation circuit provided by an embodiment of the present invention, such as Figure 6As shown, the voltage regulation circuit 11 may include an error amplification module 110, an output module 111, a bias module 112 and a voltage divider module 113. The error amplification module 110 is electrically connected to the reference power supply Vref, the voltage divider module 113 and the output module 111 respectively. The error amplification module 110 is used to provide an output control signal to the output module 111 according to a comparison result between a reference voltage of the reference power supply Vref and a voltage divider signal fed back by the voltage divider module 113; the output module 111 is also electrically connected to the power supply AVDD and the bias module 112 respectively, and the output module 111 and the bias module 112 are electrically connected. The output module 111 is electrically connected to the first node N1, and is used to control the potential of the first node N1 according to the output control signal and the power supply voltage of the power supply AVDD. The bias module 112 is also electrically connected to the second node N2 with the voltage divider module 113. The bias module 112 is used to control the potential difference between the first node N1 and the second node N2, and the voltage divider module 113 is used to feed back a voltage divider signal according to the potential of the second node N2; wherein, one of the first node N1 and the second node N2 is the first output terminal 11a of the voltage regulation circuit 11, and the other is the second output terminal 11b of the voltage regulation circuit 11.

[0046] Specifically, combined with reference Figure 2 and Figure 6The signal fed back by the voltage divider module 113 to the error amplification module 110 is used as the input signal of the error amplification module 110. After the input signal is compared with the reference voltage of the reference power supply Vref, a control signal can be provided to the output module 111 to control the potential of the first node N1; the bias module 112 can make the second node N2 have a corresponding potential difference with the first node N1 as needed, that is, after the potential of the first node N1 is determined, the potential of the second node N2 can be determined; the voltage divider module 113 can divide the potential of the second node N2 and feed back the divided signal to the error amplification module 110, so that when the voltage divided signal fed back by the voltage divider module 113 increases, it can be known that the potentials of the first node N1 and the second node N2 increase accordingly, and the reference power supply Vref When the difference between the reference voltage of the reference power supply Vref and the signal fed back by the voltage divider module 113 decreases, the error amplification module can adjust the control signal provided to the output module 111, so that the output module 111 adjusts the potential of the first node N1 according to the control signal to reduce the potentials of the first node N1 and the second node N2; and when the voltage signal fed back by the voltage divider module 113 decreases, it can be seen that the first node N1 and the second node N2 are relatively reduced, and the difference between the reference voltage of the reference power supply Vref and the signal fed back by the voltage divider module 113 increases. At this time, the error amplification module can adjust the control signal provided to the output module 111, so that the output module 111 adjusts the potential of the first node N1 according to the control signal to increase the potentials of the first node N1 and the second node N2. In this way, the potentials of the first node N1 and the second node N2 can be kept stable through closed-loop control. When the driving module 101 of the pixel circuit 10 includes a driving transistor T1, and the driving transistor T1 is a P-channel transistor, the first node N1 may be the second output terminal 11b of the voltage regulating circuit 11, and the second node N2 may be the first output terminal 11a of the voltage regulating circuit 11. At this time, the voltage stabilization control signal V1 outputted by the first output terminal 11a is smaller than the voltage stabilization input signal V2 outputted by the second output terminal 11b, so that the difference between the voltage stabilization control signal V1 and the voltage stabilization input signal V2 can be smaller than the threshold voltage V of the driving transistor T1. th; when the driving module 101 of the pixel circuit 10 includes a driving transistor T1, and the driving transistor T1 is an N-channel transistor, the first node N1 can be the first output terminal 11a of the voltage regulating circuit, and the second node N2 can be the second output terminal 11b of the voltage regulating circuit 11. At this time, the voltage regulation control signal V1 output by the first output terminal 11a is greater than the voltage regulation input signal V2 output by the second output terminal 11b, so that the difference between the voltage regulation control signal V1 and the voltage regulation input signal V2 can be greater than the threshold voltage Vth of the driving transistor T1.

[0047] Optional, Figure 7 is a specific circuit structure diagram of a voltage regulating circuit provided by an embodiment of the present invention, such as Figure 7As shown, the error amplification module 110 includes a first operational amplifier U1, the voltage divider module 113 includes a first resistor R2 and a second resistor R3, the bias module 112 includes a bias resistor R1, and the output module 111 includes an output transistor T2, a first electrode of the output transistor T2 is electrically connected to the power supply AVDD, a second electrode of the output transistor T2 is electrically connected to a first end of the bias resistor R1 at a first node N1, a second end of the bias resistor R1 is electrically connected to a first end of the first resistor R2 at a second node N2, a second end of the first resistor R2 is electrically connected to a first end of the second resistor R3 at a third node N3, a second end of the second resistor R3 is grounded, a non-inverting input terminal of the first operational amplifier U1 is electrically connected to a reference power supply Vref, an inverting input terminal of the first operational amplifier U1 is electrically connected to a third node N3, and an output terminal of the first operational amplifier U1 is electrically connected to a gate of the output transistor T2.

[0048] Among them, combined with reference Figure 6 and Figure 7 The first operational amplifier U1 may include a non-inverting input terminal, an inverting input terminal and an output terminal. The first operational amplifier U1 may also include a first power supply terminal and a second power supply terminal. At this time, the first power supply terminal of the first operational amplifier U1 may be electrically connected to the power supply AVDD to provide a positive voltage source for the first operational amplifier U1 through the power supply AVDD. The second power supply terminal of the first operational amplifier U1 is grounded, so that the first operational amplifier U1 can work normally under the joint action of the positive voltage source and the ground signal.

[0049] Specifically, taking the output transistor T2 as a P-channel transistor as an example, the control signal output by the output end of the first operational amplifier U1 can control the conduction degree of the output transistor T2 to control the voltage drop of the output transistor T2, that is, control the potential of the first node N1. The bias resistor R1 electrically connected between the first node N1 and the second node N2 can have a fixed resistance value, and the size of its resistance value can be designed as needed, so that the potential difference between the first node N1 and the second node N2 is a fixed value, so that the potential of the second node N2 will change with the change of the potential of the first node N1; the first resistor R2 electrically connected between the third node N3 and the second node N2 can also have a fixed resistance value, and the size of its resistance value can also be designed as needed, so that the potential difference between the third node N3 and the second node N2 is a fixed value, so that the potential of the third node N3 will change with the change of the potential of the second node N2, that is, the potential of the third node N3 will change with the change of the potential of the first node N1. Since the inverting input terminal of the first operational amplifier U1 is electrically connected to the third node N3, and the non-inverting input terminal of the first operational amplifier U1 is electrically connected to the reference power supply Vref, when the potential of the first node N1 is low, the potential of the third node N3 is also low, so that the difference between the non-inverting input terminal of the first operational amplifier U1 and its inverting input terminal is large. At this time, the first operational amplifier U1 outputs a relatively low-level control signal to the control terminal of the output transistor T2, so that the difference between the control signal received by the gate of the output transistor T2 and the power supply voltage of the power supply AVDD received by its first electrode is shifted to a negative direction away from 0V, thereby increasing the conduction degree of the output transistor T2, so that the output transistor T2 has a smaller voltage drop, so that the potential of the first node N1 increases accordingly, and the potentials of the second node N2 and the third node N3 that change with the change of the potential of the first node N1 also increase accordingly, and the voltage of the output transistor T2 is increased. At the same time, the potentials of the first node N1, the second node N2 and the third node N3 are increased; on the contrary, when the potential of the first node N1 is high, the potential of the third node N3 is also high, so that the difference between the non-inverting input terminal and the inverting input terminal of the first operational amplifier U1 is small. At this time, the first operational amplifier U1 outputs a high-level control signal to the control terminal of the output transistor T2, so that the difference between the control signal received by the gate of the output transistor T2 and the power supply voltage of the power supply AVDD received by its first electrode is close to 0V, and the conduction degree of the output transistor T2 is reduced, so that the output transistor T2 has a large voltage drop, so that the potential of the first node N1 is correspondingly reduced, and the potentials of the second node N2 and the third node N3 that change with the potential change of the first node N1 are also correspondingly reduced, thereby reducing the potentials of the first node N1, the second node N2 and the third node N3 at the same time.In this way, the first node N1, the second node N2 and the third node N3 can all have stable potentials, so that the voltage regulation control terminal T1a and the voltage regulation input terminal T1b of the driving module 101 of each pixel circuit 10 can respectively receive stable voltage regulation control signals and voltage regulation input signals.

[0050] It can be understood that, since one of the first node N1 and the second node N2 is the first output terminal 11a of the voltage regulating circuit 11, and the other is the second output terminal 11b of the voltage regulating circuit 11, in other words, the first node N1 and the second node N2 are electrically connected to the gate and the source of the driving transistor T1. Therefore, in order to ensure that the driving transistor T1 can be turned on, the resistance value of the bias resistor R1 of the bias module 112 should satisfy the requirement that the absolute value of the voltage difference between the gate and the source of the driving transistor T1 is greater than its threshold voltage.

[0051] Optional, Figure 8 is a schematic diagram of the structure of another voltage regulation circuit provided by an embodiment of the present invention, such as Figure 8 As shown, the voltage regulating circuit 11 includes a first voltage regulator 114, a second voltage regulator 115, and a bias module 112. The first voltage regulator 114 is electrically connected to the reference power supply Vref, the power supply AVDD and the bias module 112 respectively, and the first voltage regulator 114 and the bias module 112 are electrically connected to the first node N1. The first voltage regulator 114 is used to control the potential of the first node N1 according to the reference voltage of the reference power supply Vref and the power supply voltage of the power supply AVDD; the second voltage regulator 115 is electrically connected to the reference power supply Vref, the power supply AVDD and the bias module 112 respectively. AVDD is electrically connected to the bias module 112, and the second voltage regulator 115 is electrically connected to the bias module 112 at the second node N2; the second voltage regulator 115 is used to control the potential of the second node N2 according to the reference voltage of the reference power supply Vref and the power supply voltage of the power supply AVDD, and the bias module 112 is used to control the potential difference between the first node N1 and the second node N2, wherein one of the first node N1 and the second node N2 is the first output terminal 11a of the voltage regulation circuit 11, and the other is the second output terminal 11b of the voltage regulation circuit 11.

[0052] Specifically, the voltage regulator is a device that can output a stable voltage. When the voltage regulating circuit 11 includes a first voltage regulator 114 and a second voltage regulator 115, the stable voltage signal output by the first voltage regulator 114 can control the potential of the first node N1, so that the potential of the first node N1 remains stable; the stable voltage output by the second voltage regulator 115 can control the potential of the second node N2, so that the potential of the second node N2 remains stable. In this way, by setting the first voltage regulator 114 and the second voltage regulator 115, the potentials of the first node N1 and the second node N2 can be controlled respectively, so as to facilitate bidirectional regulation of the voltage stabilization control signal and the voltage stabilization input signal provided to the driving module in each pixel circuit, so as to meet the display requirements of the silicon-based display panel under different driving modes.

[0053] In an optional embodiment, continue to refer to Figure 8 The first voltage regulator 114 may include a first error amplification module 1141, a first output module 1142 and a first voltage divider module 1143; the first error amplification module 1141 is electrically connected to the reference power supply Vref, the first node N1 and the first output module 1142 respectively; the first error amplification module 1141 is used to provide a first output control signal to the first output module 1142 according to a comparison result between the potential of the first node N1 and the reference voltage of the reference power supply Vref; the first output module 1142 is also electrically connected to the power supply AVDD and the first voltage divider module 1143 respectively, and the first output module 1142 is electrically connected to the first node N1 through the first voltage divider module 1143; the first output module 1142 is used to control the potential of the first node N1 through the first voltage divider module 1143 according to the first output control signal and the power supply voltage of the power supply AVDD.

[0054] Specifically, the first voltage divider module 1143 can divide the voltage of the signal output by the first output module 1142. When the voltage divider capability of the first voltage divider module 1143 remains unchanged, the first node N1 will change with the change of the output signal of the first output module 1142. Since the input end of the first error amplification module 1141 is electrically connected to the reference power supply Vref and the first node N1 respectively, the first error amplification module 1141 can provide the first output module 1142 with a corresponding first control signal according to the difference between the reference voltage of the reference power supply Vref and the potential of the first node N1; thus, when the potential of the first node N1 is high, it can be known that the voltage of the signal output by the first output module 1142 is large, so that the difference between the reference voltage of the reference power supply Vref at the input end of the first error amplification module 1141 and the potential of the first node N1 is small. At this time, the first error amplification module 1141 can adjust the voltage provided to the first output module 1142. 42, so that the first output module 1142 adjusts the voltage of its output signal according to the first control signal to reduce the potential of the first node N1; and when the potential of the first node N1 is low, it can be known that the voltage of the signal output by the first output module 1142 is small, so that the difference between the reference voltage of the reference power supply Vref at the input end of the first error amplification module 1141 and the potential of the first node N1 is large. At this time, the first error amplification module 1141 can adjust the first control signal provided to the first output module 1142, so that the first output module 1142 adjusts the voltage of its output signal according to the first control signal to increase the potential of the first node N1. In this way, the potential of the first node N1 can be kept stable through closed-loop control.

[0055] Accordingly, continue to refer to Figure 8 The second voltage regulator 115 includes a second error amplification module 1151, a second output module 1152 and a second voltage divider module 1153. The second error amplification module 1151 is electrically connected to the reference power supply Vref, the second voltage divider module 1153 and the second output module 1152 respectively. The second error amplification module 1151 is used to provide a second output control signal to the second output module 1152 according to the comparison result between the voltage divider signal fed back by the second voltage divider module 1153 and the reference voltage of the reference power supply Vref. The second output module 1152 is also electrically connected to the power supply AVDD and the second voltage divider module 1153 respectively, and the second output module 1152 is electrically connected to the second node N2 through the second voltage divider module 1153; the second output module 1152 is used to control the potential of the second node N2 through the second voltage divider module 1153 according to the second output control signal and the power supply voltage of the power supply AVDD.

[0056] Specifically, the signal fed back by the second voltage divider module 1153 to the second error amplification module 1151 is used as its input signal. After comparing the input signal with the reference voltage of the reference power supply Vref, it can control the second control signal provided to the second output module 1152 to control the potential of the second node N2; the second voltage divider module 1153 can divide the signal output by the second output module 1152 as needed, so that the potential of the second node N2 and the signal fed back by the second voltage divider module 1153 to the second error amplification module 1151 change with the change of the signal output by the second output module 1152. In this way, when the voltage of the signal fed back by the second voltage divider module 1153 to the second error amplification module 1151 is relatively high, it can be known that the potential of the second node N2 and the voltage of the signal output by the second output module 1152 are relatively large, and the difference between the reference voltage of the reference power supply Vref and the signal fed back by the second voltage divider module 1153 is small. At this time, the second error amplification module 1151 can adjust the second control signal provided to the second output module 1152, so that the second output module 1152 adjusts the voltage of the signal it outputs according to the second control signal, and the potential of the second node N2 can be adjusted after the voltage is divided by the second voltage divider module 1153. When the voltage of the signal fed back by the second voltage divider module 1153 to the second error amplification module 1151 is low, it can be known that the potential of the second node N2 and the voltage of the signal output by the second output module 1152 are relatively small, and the difference between the reference voltage of the reference power supply Vref and the signal fed back by the second voltage divider module 1153 is large. At this time, the second error amplification module 1151 can adjust the second control signal provided to the second output module 1152, so that the second output module 1152 adjusts the voltage of the signal outputted by it according to the second control signal, and the potential of the second node N2 can be adjusted after voltage division by the second voltage divider module 1153. In this way, the potential of the second node N2 can be kept stable through closed-loop control.

[0057] Optional, Fig. 9 is a specific circuit structure diagram of another voltage regulating circuit provided by an embodiment of the present invention, combined with reference Figure 8 and Fig. 9 The first error amplification module 1141 includes a first error amplifier U2, the first output module 1142 includes a first output transistor T3, the first voltage divider module 1143 includes a first voltage divider resistor R4, the non-inverting input terminal of the first error amplifier U2 is electrically connected to the reference power supply vref, the reverse input terminal of the first error amplifier U2 is electrically connected to the first node N1, the output terminal of the first error amplifier U2 is electrically connected to the gate of the first output transistor T3, the first electrode of the first output transistor T3 is electrically connected to the power supply AVDD, and the second electrode of the first output transistor T3 is electrically connected to the first node N1 through the first voltage divider resistor R4.

[0058] Specifically, taking the first output transistor T3 as a P-channel transistor as an example, the first control signal outputted from the output end of the first error amplifier U2 can control the conduction degree of the first output transistor T3 to control the voltage drop of the first output transistor T3, that is, control the potential of the first node N1. Among them, when the potential of the first node N1 is low, the difference between the positive input terminal and the inverting input terminal of the first error amplifier U2 is large. At this time, the first error amplifier U2 outputs a low-level first control signal to the control terminal of the first output transistor T3, so that the difference between the control signal received by the gate of the first output transistor T3 and the power supply voltage of the power supply AVDD received by the first electrode thereof is shifted to the negative direction away from 0V, thereby increasing the conduction degree of the first output transistor T3, so that the first output transistor T3 has a smaller voltage drop, and the potential of the first node N1 is increased accordingly; on the contrary, when the potential of the first node N1 is high, the difference between the positive input terminal and the inverting input terminal of the first error amplifier U2 is small. At this time, the first error amplifier U2 outputs a high-level control signal to the control terminal of the first output transistor T3, so that the difference between the control signal received by the gate of the first output transistor T3 and the power supply voltage of the power supply AVDD received by the first electrode thereof is shifted close to 0V, thereby reducing the conduction degree of the first output transistor T3, so that the first output transistor T3 has a larger voltage drop, and the potential of the first node N1 is reduced accordingly.

[0059] Accordingly, continue to combine reference Figure 8 and Fig. 9 The second error amplification module 1151 includes a second error amplifier U3, the second output module 1152 includes a second output transistor T4, the second voltage dividing module 1153 includes a second voltage dividing resistor R5 and a third voltage dividing resistor R6, a first end of the second voltage dividing resistor R5 is electrically connected to the second node N2, a second end of the second voltage dividing resistor R5 and a first end of the third voltage dividing resistor R6 are electrically connected to a fourth node N4, a second end of the third voltage dividing resistor R6 is grounded, a non-inverting input end of the second error amplifier U3 is electrically connected to a reference power supply Vref, an inverting input end of the second error amplifier U3 is electrically connected to an output end of the third voltage dividing resistor R6, an output end of the second error amplifier U3 is electrically connected to a gate of the second output transistor T4, a first electrode of the second output transistor T4 is electrically connected to a power supply AVDD, and a second electrode of the second output transistor T4 is electrically connected to a fourth node N4.

[0060] Specifically, taking the second output transistor T4 as a P-channel transistor as an example, the second control signal outputted from the output terminal of the second error amplifier U3 can control the conduction degree of the second output transistor T4, so as to control the voltage drop of the second output transistor T4, that is, to control the potential of the second node N2. When the potential of the second node N2 is low, the voltage fed back by the second voltage divider module 1153 is small, and the difference between the positive input terminal and the negative input terminal of the second error amplifier U3 is large. At this time, the second control signal of a lower level outputted by the second error amplifier U2 to the control terminal of the second output transistor T4 causes the difference between the control signal received by the gate of the second output transistor T4 and the power supply voltage of the power supply AVDD received by its first electrode to shift to the negative direction away from 0V, thereby increasing the conduction degree of the second output transistor T4, so that the second output transistor T4 has a smaller voltage drop, and the second output transistor T4 can output a signal with a higher voltage, so that the potential of the second node N2 increases accordingly; On the contrary, when the potential of the second node N2 is higher, the voltage fed back by the second voltage divider module 1153 is larger, and the difference between the non-inverting input terminal of the second error amplifier U3 and its inverting input terminal is smaller. At this time, the second error amplifier U2 outputs a second control signal of a higher level to the control terminal of the second output transistor T4, so that the difference between the control signal received by the gate of the second output transistor T4 and the power supply voltage of the power supply AVDD received by its first electrode is shifted toward 0V, thereby reducing the conduction degree of the second output transistor T4, so that the second output transistor T4 has a larger voltage drop, and the second output transistor T4 can output a signal with a lower voltage, so that the potential of the second node N2 is correspondingly reduced.

[0061] It can be understood that, since the potential of the first node N1 is controlled by the first voltage stabilizer 114 and the bias module 112, and the potential of the second node N2 is controlled by the second voltage stabilizer 115 and the bias module 112, at this time, the output signals of the first voltage stabilizer 114 and the second voltage stabilizer 115 can be flexibly adjusted as needed to meet the display requirements under different driving modes; at the same time, due to the existence of the bias module 112, it can ensure that there is a certain potential difference between the first node N1 and the second node N2, so that when the driving module of each pixel circuit receives the voltage stabilization control signal and the voltage stabilization input signal, it can generate a corresponding current signal, thereby stably driving the light-emitting module to emit light. Among them, the bias module 112 includes but is not limited to the bias resistor R1.

[0062] Optional, Fig.10 Another specific structural diagram of a silicon-based display panel is provided for an embodiment of the present invention, such as Fig.10As shown, the silicon-based display panel 100 also includes a first buffer 16, electrically connected between the first output terminal 11a of the voltage regulating circuit 11 and the voltage stabilization control terminal T1a of each driving module 101; and / or, a second buffer 17, electrically connected between the second output terminal 11b of the voltage regulating circuit 11 and the voltage stabilization input terminal T1b of each driving module 101.

[0063] Specifically, by setting a first buffer 16 between the first output terminal 11a of the voltage regulating circuit 11 and the voltage regulating control terminal T1a of each driving module 101, the voltage regulating control signal V1 outputted from the first output terminal 11a of the voltage regulating circuit 11 is buffered by the first buffer 16 and provided to the voltage regulating control terminal T1a of each driving module 101, so that the voltage regulating control signal V1 received by the voltage regulating control terminal T1a of each driving module 101 can be kept consistent; by setting a second buffer 17 between the second output terminal 11b of the voltage regulating circuit 11 and the voltage regulating control terminal T1a of each driving module 101, the voltage regulating input signal V2 outputted from the second output terminal 11b of the voltage regulating circuit 11 is buffered by the first buffer 16 and provided to the voltage regulating control terminal T1a of each driving module 101, so that the voltage regulating control signal V1 received by the voltage regulating control terminal T1a of each driving module 101 can be kept consistent. The second buffer 17 provides the buffered voltage to the voltage stabilizing input terminal T1b of each driving module 101, so that the voltage stabilizing input signal V2 received by the voltage stabilizing input terminal T1b of each driving module 101 can remain consistent; in this way, when the voltage stabilizing control signal V1 received by the voltage stabilizing control terminal T1a of each driving module 101 remains consistent, and the voltage stabilizing input signal V2 received by the voltage stabilizing input terminal T1b of each driving module 101 remains consistent, the current signal provided by each driving module 101 can be kept consistent, so that the light-emitting module 102 of each pixel circuit 10 can be accurately and stably emitted, thereby improving the display uniformity of the silicon-based display panel 100, that is, improving the display quality of the silicon-based display panel 100.

[0064] It can be understood that the silicon-based display panel 100 includes both the first buffer 16 and the second buffer 17, or the silicon-based display panel 100 may only include the first buffer 16, or the silicon-based display panel 100 may only include the second buffer 17. Under the premise of being able to improve the display uniformity of the silicon-based display panel 100, the embodiment of the present invention does not make any specific limitation on this.

[0065] Optionally, the first buffer 16 includes a class AB amplifier, and / or the second buffer 17 includes a class AB amplifier.

[0066] The class AB amplifier is between the class A amplifier and the class B amplifier, and can overcome the crossover distortion of the class B amplifier. At the same time, it can solve the problem of low efficiency of the class A amplifier, and can have the advantages of both the class A amplifier and the class B amplifier. When the first buffer 16 includes a class AB amplifier, the first buffer 16 can have a higher working efficiency and a higher output accuracy; similarly, when the second buffer 17 includes a class AB amplifier, the second buffer 17 can have a higher working efficiency and a higher output accuracy; in this way, the efficiency and fidelity of the voltage stabilization control signal and the voltage stabilization input signal provided to each driving module 101 can be improved.

[0067] The above is merely an example of each pixel circuit of a silicon-based display panel including a driving module and a light-emitting module, to illustrate the technical solution of an embodiment of the present invention. In the embodiment of the present invention, each pixel circuit includes not only a driving module capable of generating a current signal and a light-emitting module capable of emitting light, but also other modules capable of controlling the light-emitting brightness of the light-emitting module, so that the silicon-based display panel can display colorful pictures.

[0068] Optional, Fig.11 is a schematic diagram of a pixel circuit provided by an embodiment of the present invention. Fig.11 As shown, the pixel circuit 10 also includes a data latch circuit 103 and a pulse width modulation circuit 104. The control end of the data latch circuit 103 receives a selection control signal SL, the input end of the data latch circuit 103 receives a data signal SD, the output end of the data latch circuit 103 is electrically connected to the control end of the pulse width modulation circuit 104, the data latch circuit 103 outputs a latch signal SC to the pulse width modulation circuit 104 according to the selection control signal SL and the data signal SD, the input end of the pulse width modulation circuit 104 is electrically connected to the current output end of the driving module 101, and the output end of the pulse width modulation circuit 104 is electrically connected to the light-emitting module 102; the pulse width modulation circuit 104 is used to control the time when the driving module 101 provides the current signal to the light-emitting module 102 according to the latch signal SC.

[0069] Specifically, the display luminous brightness of the light-emitting module 102 is related to the current signal generated by the driving module 101. At the same time, the brightness presented by the light-emitting module 102 is also related to the integral of the brightness over time. This makes it so that in a driving cycle, the longer the display luminous time of the light-emitting module 102 is, the higher the display luminous brightness of the light-emitting module 102 perceived by the human eye is. On the contrary, the shorter the display luminous time of the light-emitting module 102 is, the lower the display luminous brightness of the light-emitting module 102 perceived by the human eye is. When the voltage regulating circuit 11 provides the voltage regulating control signal V1 to the voltage regulating input terminal T1b of the driving module 101 and the voltage regulating input signal V2 to the voltage regulating control terminal T1a remain unchanged, the luminous duration of each light-emitting module 102 can be adjusted accordingly, so that the light-emitting modules 102 of different pixel circuits 10 have different display luminous brightness, thereby meeting the display requirements of the display panel. At this time, by setting the data latch circuit 103 and the pulse width modulation circuit 104 in the pixel circuit, the duration of the current signal provided by the driving module 101 to the light emitting module 102 can be controlled, thereby controlling the light emitting duration of the light emitting module 102.

[0070] In an exemplary embodiment, Fig.12As shown, the data latch circuit 103 may include a first transmission transistor M11, a second transmission transistor M12, a third transmission transistor M13, a fourth transmission transistor M14 and a pull-up transistor M10; the pulse width modulation circuit 104 may include a dimming transistor M20; at this time, the data signal SD may include a first bit signal BIT1, a second bit signal BIT2, a third bit signal BIT3 and a fourth bit signal BIT4, and the selection control signal SL may include a first selection signal EN1, a second selection signal EN2, a third selection signal EN3 and a fourth selection signal EN4; at this time, the first electrode of the pull-up transistor M10 is electrically connected to the positive power supply VDD, the gate of the pull-up transistor M10 is electrically connected to the second electrode thereof, and the second electrode of the pull-up transistor M10 is also electrically connected to the positive power supply VDD. The gate of the dimming transistor M20 is electrically connected; the gates of the first transmission transistor M11, the second transmission transistor M12, the third transmission transistor M13 and the fourth transmission transistor M14 respectively receive the first selection signal EN1, the second selection signal EN2, the third selection signal EN3 and the fourth selection signal EN4, the first electrodes of the first transmission transistor M11, the second transmission transistor M12, the third transmission transistor M13 and the fourth transmission transistor M14 respectively receive the first bit signal BIT1, the second bit signal BIT2, the third bit signal BIT3 and the fourth bit signal BIT4, and the first transmission transistor M11, the second transmission transistor M12, the third transmission transistor M13 and the fourth transmission transistor M14 are all electrically connected to the gate of the dimming transistor M20. Among them, the first transmission transistor M11, the second transmission transistor M12, the third transmission transistor M13 and the fourth transmission transistor M14 respectively adjust the pulse width of the latch signal SC provided to the gate of the dimming transistor M20 according to the first selection signal EN1, the second selection signal EN2, the third selection signal EN3 and the fourth selection signal EN4 through the first bit signal BIT1, the second bit signal BIT2, the third bit signal BIT3 and the fourth bit signal BIT4, thereby controlling the conduction time of the dimming transistor M20, and further controlling the light-emitting duration of the light-emitting module 102.

[0071] Based on the same inventive concept, an embodiment of the present invention further provides a display device, which includes a silicon-based display panel provided by any embodiment of the present invention. Therefore, the display device has the technical features of the silicon-based display panel provided by any embodiment of the present invention, and can achieve the beneficial effects of the silicon-based display panel provided by any embodiment of the present invention. The similarities can be referred to the above description of the silicon-based display panel of the embodiment of the present invention, and will not be repeated here.

[0072] For example, Fig.13 is a schematic diagram of the structure of a display device provided by an embodiment of the present invention, such as Fig.13As shown, the display device 200 can be applied to VR glasses, and the lenses of the VR glasses include the silicon-based display panel 100 in the above embodiment. In other embodiments, the display device can also be other micro display devices, which is not specifically limited in this embodiment.

[0073] It should be understood that the various forms of structures shown above can be used to reorder, add or delete structures. For example, the structures described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0074] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A silicon-based display panel, characterized in that: include: A plurality of pixel circuits arranged in an array; The pixel circuit at least includes a driving module and a light emitting module; at least one voltage regulating circuit; The first output end of the voltage regulating circuit is electrically connected to at least the voltage stabilizing control end of the driving module in each pixel circuit located in the same row, and the second output end of the voltage regulating circuit is electrically connected to at least the voltage stabilizing input end of the driving module in each pixel circuit located in the same row; The voltage regulating circuit is used to provide a voltage stabilization control signal to a voltage stabilization control terminal of a driving module in at least one row of the pixel circuits, and to provide a voltage stabilization input signal to a voltage stabilization input terminal of a driving module in at least one row of the pixel circuits; The current output terminal of the driving module is coupled to the input terminal of the light-emitting module; the driving module is used to provide a current signal to the light-emitting module according to the voltage-stabilizing control signal and the voltage-stabilizing input signal; The voltage regulating circuit includes a bias module, a first end of the bias module is provided with a first node, a second end of the bias module is provided with a second node, and the bias module is used to control the potential difference between the first node and the second node, wherein one of the first node and the second node is a first output end of the voltage regulating circuit, and the other is a second output end of the voltage regulating circuit.

2. The silicon-based display panel according to claim 1, characterized in that: The driving module includes a driving transistor; The gate of the driving transistor is the voltage stabilization control terminal of the driving module, the first pole of the driving transistor is the voltage stabilization input terminal of the driving module, and the second pole of the driving transistor is the current output terminal of the driving module; The difference between the voltage stabilization control signal V1 and the voltage stabilization input signal V2 is in the range of |V1-V2| > Vth; Wherein, Vth is the threshold voltage of the driving transistor.

3. The silicon-based display panel according to claim 1, characterized in that: The voltage regulation circuit also includes an error amplification module, an output module and a voltage division module; The error amplification module is electrically connected to the reference power supply, the voltage divider module and the output module respectively, and the error amplification module is used to provide an output control signal to the output module according to a comparison result between the reference voltage of the reference power supply and the voltage divider signal fed back by the voltage divider module; The output module is also electrically connected to the power supply and the bias module respectively, and the output module and the bias module are electrically connected at a first node; the output module is used to control the potential of the first node according to the output control signal and the power supply voltage of the power supply; The bias module is also electrically connected to the voltage divider module at a second node; The voltage division module is used to feed back a voltage division signal according to the potential of the second node.

4. The silicon-based display panel according to claim 3, characterized in that: The error amplification module includes a first operational amplifier, the voltage divider module includes a first resistor and a second resistor, the bias module includes a bias resistor, and the output module includes an output transistor; The first electrode of the output transistor is electrically connected to the power supply, the second electrode of the output transistor and the first end of the bias resistor are electrically connected to the first node; the second end of the bias resistor and the first end of the first resistor are electrically connected to the second node; the second end of the first resistor and the first end of the second resistor are electrically connected to a third node; the second end of the second resistor is grounded; A non-inverting input terminal of the first operational amplifier is electrically connected to a reference power supply, an inverting input terminal of the first operational amplifier is electrically connected to the third node, and an output terminal of the first operational amplifier is electrically connected to a gate of the output transistor.

5. The silicon-based display panel according to claim 1, characterized in that: The voltage regulating circuit also includes a first voltage stabilizer and a second voltage stabilizer; The first voltage regulator is electrically connected to a reference power supply, a power supply and the bias module respectively, and the first voltage regulator and the bias module are electrically connected to a first node; the first voltage regulator is used to control the potential of the first node according to a reference voltage of the reference power supply and a power supply voltage of the power supply; The second voltage regulator is electrically connected to the reference power supply, the power supply and the bias module respectively, and the second voltage regulator and the bias module are electrically connected to a second node; the second voltage regulator is used to control the potential of the second node according to the reference power supply of the reference power supply and the power supply voltage of the power supply.

6. The silicon-based display panel according to claim 5, characterized in that: The first voltage regulator includes a first error amplification module, a first output module and a first voltage dividing module; The first error amplification module is electrically connected to the reference power supply, the first node and the first output module respectively; The first error amplification module is used to provide a first output control signal to the first output module according to a comparison result between the potential of the first node and the reference voltage of the reference power supply; The first output module is also electrically connected to the power supply and the first voltage divider module respectively, and the first output module is electrically connected to the first node through the first voltage divider module; the first output module is used to control the potential of the first node through the first voltage divider module according to the first output control signal and the power supply voltage of the power supply.

7. The silicon-based display panel according to claim 6, characterized in that: The first error amplification module includes a first error amplifier, the first output module includes a first output transistor, and the first voltage dividing module includes a first voltage dividing resistor; A non-inverting input terminal of the first error amplifier is electrically connected to the reference power supply, an inverting input terminal of the first error amplifier is electrically connected to the first node, and an output terminal of the first error amplifier is electrically connected to the gate of the first output transistor; A first electrode of the first output transistor is electrically connected to the power supply, and a second electrode of the first output transistor is electrically connected to the first node through the first voltage-dividing resistor.

8. The silicon-based display panel according to claim 5, characterized in that: The second voltage stabilizer includes a second error amplification module, a second output module and a second voltage dividing module; The second error amplification module is electrically connected to the reference power supply, the second voltage divider module and the second output module respectively; the second error amplification module is used to provide a second output control signal to the second output module according to a comparison result between the voltage divider signal fed back by the second voltage divider module and the reference voltage of the reference power supply; The second output module is also electrically connected to the power supply and the second voltage divider module respectively, and the second output module is electrically connected to the second node through the second voltage divider module; the second output module is used to control the potential of the second node through the second voltage divider module according to the second output control signal and the power supply voltage of the power supply.

9. The silicon-based display panel according to claim 8, characterized in that: The second error amplification module includes a second error amplifier; the second output module includes a second output transistor; the second voltage dividing module includes a second voltage dividing resistor and a third voltage dividing resistor; The first end of the second voltage-dividing resistor is electrically connected to the second node, the second end of the second voltage-dividing resistor and the first end of the third voltage-dividing resistor are electrically connected to a fourth node, and the second end of the third voltage-dividing resistor is grounded; The non-inverting input terminal of the second error amplifier is electrically connected to the reference power supply, the inverting input terminal of the second error amplifier is electrically connected to the output terminal of the third voltage-dividing resistor, and the output terminal of the second error amplifier is electrically connected to the gate of the second output transistor; A first electrode of the second output transistor is electrically connected to the power supply, and a second electrode of the second output transistor is electrically connected to the fourth node.

10. The silicon-based display panel according to claim 1, characterized in that: Also includes: A first buffer, electrically connected between the first output terminal of the voltage regulating circuit and the voltage stabilizing control terminal of each of the driving modules; and / or, The second buffer is electrically connected between the second output terminal of the voltage regulating circuit and the voltage stabilizing input terminal of each of the driving modules.

11. The silicon-based display panel according to claim 10, characterized in that: The first buffer includes a class AB amplifier, and / or the second buffer includes a class AB amplifier.

12. The silicon-based display panel according to claim 1, characterized in that: Also includes: A plurality of first signal lines and a plurality of second signal lines; each of the first signal lines and each of the second signal lines extends along the first direction and is arranged along the second direction; The first direction intersects the second direction; The voltage stabilization control terminal of the driving module in each of the pixel circuits in the same row is electrically connected to the first output terminal of the same voltage regulating circuit through the same first signal line; The voltage stabilizing input terminal of the driving module in each of the pixel circuits in the same row is electrically connected to the second output terminal of the same voltage regulating circuit through the same second signal line; Wherein, the first signal line and the second signal line are arranged on the same layer.

13. The silicon-based display panel according to claim 1, characterized in that: The pixel circuit also includes a data latch circuit and a pulse width modulation circuit; The control end of the data latch circuit receives a strobe control signal, the input end of the data latch circuit receives a data signal, and the output end of the data latch circuit is electrically connected to the control end of the pulse width modulation circuit; the data latch circuit outputs a latch signal to the pulse width modulation circuit according to the strobe control signal and the data signal; The input end of the pulse width modulation circuit is electrically connected to the current output end of the driving module, and the output end of the pulse width modulation circuit is electrically connected to the light-emitting module; the pulse width modulation circuit is used to control the time when the driving module provides the current signal to the light-emitting module according to the latch signal.

14. A display device, characterized in that: include: The silicon-based display panel according to any one of claims 1 to 13.

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