Display panel and display device

Abstract

The present invention discloses a display panel and a display device. The display panel includes a first display area and a second display area, wherein the transmittance of the second display area is greater than the transmittance of the first display area; the display panel also includes a first sub-pixel, which is arranged in the first display area and electrically connected to the first pixel driving circuit; a second sub-pixel, which is arranged in the second display area and electrically connected to the second pixel driving circuit through an electrode line; the first pixel driving circuit and the second pixel driving circuit are arranged in the first display area; the electrode line includes a first line extending at least partially along the first direction and a second line extending at least partially along the second direction, wherein the second direction intersects the first direction; the second pixel driving circuit connected to the second line is located in a different row from the second pixel driving circuit connected to the first line. The technical solution provided by the embodiment of the present invention solves the problem of poor display effect of the display panel in the secondary screen area.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the development of display technology, people's requirements for it are also becoming increasingly higher. Full-screen displays are becoming a trend. Existing display panels require the installation of light-sensitive devices in the secondary screen area, which requires increased light transmittance. How to improve the secondary screen's light transmittance while also enhancing its display quality has become a pressing technical challenge in the industry. Summary of the Invention

[0003] The present invention provides a display panel and a display device to solve the problem of poor display effect in the secondary screen area of ​​the display panel.

[0004] According to one aspect of the present invention, there is provided a display panel comprising: a first display area and a second display area, wherein the light transmittance of the second display area is greater than the light transmittance of the first display area;

[0005] The display panel also includes:

[0006] A first sub-pixel, the first sub-pixel is arranged in the first display area and is electrically connected to the first pixel driving circuit;

[0007] a second sub-pixel, the second sub-pixel being arranged in the second display area and electrically connected to the second pixel driving circuit via an electrode wiring;

[0008] The first pixel driving circuit and the second pixel driving circuit are arranged in the first display area;

[0009] The electrode traces include a first trace extending at least partially along a first direction and a second trace extending at least partially along a second direction;

[0010] wherein the second direction intersects the first direction;

[0011] The second pixel driving circuit connected to the second wiring and the second pixel driving circuit connected to the first wiring are located in different rows.

[0012] Optionally, the electrode routing includes at least two routing layers.

[0013] Optionally, the second display area includes at least a first light-transmitting area and a second light-transmitting area, the first light-transmitting area and the second light-transmitting area are arranged in sequence along the first direction; the first light-transmitting area is located between the first display area and the second light-transmitting area;

[0014] The second sub-pixel located in the first light-transmitting area is electrically connected to the second pixel driving circuit via the first wiring;

[0015] The second sub-pixel located in the second light-transmitting area is electrically connected to the second pixel driving circuit via a second wiring;

[0016] Preferably, the electrode wiring includes a first wiring layer and a second wiring layer.

[0017] Optionally, the first light-transmitting area includes: a first sub-area and a second sub-area sequentially arranged along the first direction; the first sub-area is arranged between the first display area and the second sub-area;

[0018] A first routing line connected to a second sub-pixel located in the first sub-region is located in the first routing layer and / or the second routing layer;

[0019] The first wiring connected to the second sub-pixel located in the second sub-region is located in the second wiring layer.

[0020] Optionally, the second light-transmitting area includes a third sub-area and a fourth sub-area extending along the second direction, and the third sub-area is arranged between the fourth sub-area and the first display area;

[0021] The second routing line connected to the second sub-pixel located in the third sub-region is located in the first routing layer and the second routing layer; preferably, the orthographic projection of the second routing line located in the first routing layer and the second routing line located in the second routing layer on the first routing layer do not overlap;

[0022] The second routing line connected to the second sub-pixel located in the fourth sub-area is located in the first routing layer and the second routing layer; preferably, the second routing line located in the first routing layer located in the fourth sub-area and the first routing line connected to the second sub-pixel located in the second sub-area B intersect perpendicularly with the orthographic projection on the first routing layer.

[0023] Optionally, at least a portion of the second routing line located in the first routing layer passes through the second sub-region; wherein the second routing line is connected to the second sub-pixel located in the fourth sub-region.

[0024] Optionally, the second wiring connected to the second sub-pixel located in the fourth sub-region includes:

[0025] a first connecting line and a second connecting line;

[0026] The first connecting line extends from the fourth sub-area to the second sub-area along the first direction, and the second connecting line extends from the second sub-area to the first display area along the second direction;

[0027] Preferably, the first end of the first connecting line is connected to the second sub-pixel located in the fourth sub-region; the second end of the first connecting line is connected to the first end of the second connecting line; and the second end of the second connecting line is connected to the second pixel driving circuit.

[0028] Preferably, the second wiring connected to the second sub-pixel located in the fourth sub-region further includes:

[0029] The third connecting line extends along the first direction and is arranged between the second end of the second connecting line and the second pixel driving circuit.

[0030] Optionally, the display panel also includes:

[0031] Driver chip,

[0032] a plurality of first data signal lines, wherein the first data signal lines are connected between the driver chip and the first pixel driver circuit; and the first data signal lines bypass the second display area;

[0033] a plurality of second data signal lines, wherein the second data signal lines are connected between the driving chip and the second pixel driving circuit;

[0034] The first display area includes a first main display area, a second main display area and a third main display area;

[0035] Along the first direction, the first main display area is adjacent to the first light-transmitting area; the second main display area is arranged on a side of the first main display area away from the second display area; and the third main display area is arranged on an end of the display panel away from the driver chip;

[0036] At least a portion of the second data signal line extends through the second main display area to the third main display area and is connected to the second pixel driving circuit located in the third main display area.

[0037] Optionally, each second pixel driving circuit drives a single second sub-pixel;

[0038] The density of the sub-pixels in the first display area is the same as the density of the sub-pixels in the second display area.

[0039] In a second aspect, an embodiment of the present invention provides a display device, comprising: a display panel as set forth in any item of the first aspect.

[0040] The technical solution of the embodiment of the present invention is to provide an electrode routing including a first routing and a second routing, wherein at least a portion of the first routing extends along a first direction, wherein the first direction extends along the row direction of the first sub-pixel; and at least a portion of the second routing extends along a second direction, wherein the second direction intersects the first direction. This configuration allows for a larger number of second sub-pixels in the second display area, thereby expanding the wiring area of ​​the electrode routing, so that the number of second pixel driving circuits connected to the second sub-pixels in the second display area can be consistent with the number of second sub-pixels, thereby increasing the pixel density of the second display area and improving the display effect of the display panel. Furthermore, by arranging the second pixel driving circuit connected to the second routing and the second pixel driving circuit connected to the first routing in different rows, the electrode routing can be used to connect to the nearest second pixel driving circuit based on the position of the second sub-pixel, thereby shortening the length of the electrode routing, reducing the resistance of the electrode routing, and improving the uniformity of the signal transmitted on the electrode routing, thereby improving the display effect of the display panel.

[0041] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0043] Figure 1 is a structural schematic diagram of a display panel provided by an embodiment of the present invention;

[0044] Figure 2 is a schematic diagram of the distribution of sub-pixels of a display panel provided by an embodiment of the present invention;

[0045] Figure 3 This embodiment of the present invention provides a Figure 1 An enlarged schematic diagram of the D1 region of the middle display panel;

[0046] Figure 4 Another embodiment of the present invention provides Figure 1 An enlarged schematic diagram of the D1 region of the middle display panel;

[0047] Figure 5 Another embodiment of the present invention provides Figure 1 An enlarged schematic diagram of the D1 region of the middle display panel;

[0048] Figure 6 is a structural diagram of another display panel provided by an embodiment of the present invention;

[0049] Figure 7 is a structural diagram of another display panel provided by an embodiment of the present invention;

[0050] Figure 8 is a structural diagram of another display panel provided by an embodiment of the present invention;

[0051] Figure 9 It is a structural schematic diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0052] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0053] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0054] As mentioned in the background technology, the secondary screen area of ​​the existing display panel needs to be equipped with a light-sensitive device, so the transmittance of the secondary screen area needs to be improved. How to improve the transmittance of the secondary screen area while improving the display effect of the secondary screen area has become a technical problem that needs to be solved urgently in the industry. After long-term research, the inventor found that the reason for the poor display effect of the secondary screen area is that in order to improve the display effect of the secondary screen area and realize a full screen, the number of pixels in the secondary screen area is increased, and the number of pixel driving circuits in the secondary screen area is increasing. Since the length of the electrode traces in the secondary screen area is too long, the resistance of the electrode traces is large, which affects the uniformity of the signal transmitted on the electrode traces, and thus affects the display effect of the display panel.

[0055] Figure 1It is a structural schematic diagram of a display panel provided by an embodiment of the present invention. Figure 2 This is a schematic diagram of the distribution of sub-pixels of a display panel provided by an embodiment of the present invention. Figure 3 This embodiment of the present invention provides a Figure 1 An enlarged schematic diagram of the D1 region in the middle display panel. Figure 4 Another embodiment of the present invention provides Figure 1 The enlarged schematic diagram of the D1 region in the middle display panel. Figures 1 to 4 The display panel provided by the embodiment of the present invention includes a first display area 10 and a second display area 20, and the transmittance of the second display area 20 is greater than the transmittance of the first display area 10; the display panel also includes a first sub-pixel 1, which is arranged in the first display area 10 and electrically connected to the first pixel driving circuit 11; a second sub-pixel 2, which is arranged in the second display area 20 and electrically connected to the second pixel driving circuit 21 through an electrode trace 3; the first pixel driving circuit 11 and the second pixel driving circuit 21 are arranged in the first display area 10; the electrode trace 3 includes a first trace 31 extending at least partially along the first direction X and a second trace 32 extending at least partially along the second direction Y, wherein the second direction Y intersects with the first direction X; the second pixel driving circuit 21 connected to the second trace 32 and the second pixel driving circuit 21 connected to the first trace 31 are located in different rows.

[0056] Specifically, the first display area 10 can be a main screen area or a transition area, and the second display area 20 can be a transparent display area or a transition display area. The second sub-pixel 2 of the second display area 20 is electrically connected to the second pixel driving circuit 21 provided in the first display area 10 via the electrode trace 3. The first sub-pixel 1 of the first display area 10 is electrically connected to the first pixel driving circuit 11 provided in the first display area 10. The second sub-pixel 2 is driven by the second pixel driving circuit 21 located in the first display area 10, so that the second display area 20 does not have the second pixel driving circuit 21, so that the second display area 20 has a higher transmittance, which facilitates the installation of optical sensing devices such as optical sensors and camera devices that have higher transmittance requirements.

[0057] At least a portion of the first wiring 31 extends along the first direction X, so that the second sub-pixel 2 is connected to the second pixel driving circuit 21 located in the first direction X. At least a portion of the second wiring 32 extends along the second direction Y, so that the second sub-pixel 2 is connected to the second pixel driving circuit 21 located in the second direction Y. By arranging the second pixel driving circuit 21 connected to the second wiring 32 and the second pixel driving circuit 21 connected to the first wiring 31 to be located in different rows. This arrangement, on the one hand, allows the second sub-pixels 2 located in the second display area 20 to lead out as many electrode wirings 3 as possible, thereby improving the pixel density of the second display area 20; on the other hand, it allows the lengths of the first wiring 31 and the second wiring 32 to be as consistent as possible, thereby preventing the length of the second wiring 32 from being too long, thereby reducing the resistance on the second wiring 32, improving the uniformity of the signal transmitted on the second wiring 32, and thus improving the display effect of the display panel.

[0058] The technical solution provided in this embodiment comprises an electrode trace 3 comprising a first trace 31 and a second trace 32. At least a portion of the first trace 31 extends along a first direction X, wherein the first direction X extends along the row direction of the first sub-pixels 1; and at least a portion of the second trace 32 extends along a second direction Y, wherein the second direction Y intersects the first direction X. This allows for a greater number of second sub-pixels 2 in the second display area 20, thereby expanding the wiring area of ​​the electrode trace 3. This allows for the number of second pixel driver circuits 21 connected to the second sub-pixels 2 in the second display area 20 to be consistent with the number of second sub-pixels 2, thereby increasing the pixel density of the second display area 20 and improving the display quality of the display panel. Furthermore, by arranging the second pixel driver circuits 21 connected to the second trace 32 and the second pixel driver circuits 21 connected to the first trace 31 in different rows, the electrode trace 3 allows for connection to the nearest second pixel driver circuit 21 based on the position of the second sub-pixel 2. This shortens the length of the electrode trace 3, reduces the resistance of the electrode trace 3, and improves the uniformity of the signal transmitted on the electrode trace 3, thereby improving the display quality of the display panel.

[0059] It should be noted that this embodiment only exemplifies the arrangement of the first sub-pixel 1 and the second sub-pixel 2 and is not intended to limit the present invention. In other embodiments, the arrangement of the first sub-pixel 1 and the second sub-pixel 2 may be an RGB arrangement, an RGBG arrangement, a pentile arrangement (diamond arrangement), an RGBW arrangement, an RGB Delta arrangement, an RGB S-Strip arrangement, or other arrangements.

[0060] The second display area 20 may be in a square, circular, or track-shaped shape, which is not limited here. In an optional application scenario, the display panel may be a full screen, and at least a portion of the second display area 20 is surrounded by the first display area 10 .

[0061] Optional, Figure 5 Another embodiment of the present invention provides Figure 1 FIG. 1 is an enlarged schematic diagram of the D1 region of the display panel. Based on the above embodiment, see Figure 5 , the electrode wiring 3 includes at least two wiring layers.

[0062] Specifically, this arrangement further increases the number of electrode traces 3 that can be drawn out, further saving the space occupied by the electrode traces 3 connected to the second sub-pixel 2. Figure 4 The dotted lines exemplarily represent the first and second traces 31 and 32 located in the same trace layer, and the solid lines represent the first and second traces 31 and 32 located in another trace layer. The number of trace layers included in the electrode trace 3 can be set as needed and is not limited here.

[0063] Optionally, based on the above embodiment, continue to refer to Figure 5 The second display area 20 may include at least a first light-transmitting area 201 and a second light-transmitting area 202, and the first light-transmitting area 201 and the second light-transmitting area 202 are arranged in sequence along the first direction X; the first light-transmitting area 201 is located between the first display area 10 and the second light-transmitting area 202; the second sub-pixel 2 located in the first light-transmitting area 201 is electrically connected to the second pixel driving circuit 21 through the first wiring 31; the second sub-pixel 2 located in the second light-transmitting area 202 is electrically connected to the second pixel driving circuit 21 through the second wiring 32; preferably, the electrode wiring 3 includes a first wiring layer S1 and a second wiring layer S2.

[0064] Specifically, the second display area 20 includes at least one first light-transmitting area 201 and a second light-transmitting area 202. The first light-transmitting area 201 is disposed between the first display area 10 and the second light-transmitting area 202. When the second display area 20 includes two or more first light-transmitting areas 201, the two or more first light-transmitting areas 201 can be disposed on different sides of the second light-transmitting area 202. It is sufficient to ensure that the first light-transmitting area 201 is located between the first display area 10 and the second light-transmitting area 202. Figure 5 The case where the second display area 20 includes a first light-transmitting area 201 is exemplarily shown, and no limitation is given here.

[0065] Because the first light-transmitting area 201 is disposed between the first display area 10 and the second light-transmitting area 202, the second sub-pixel 2 located in the first light-transmitting area 201 is electrically connected to the corresponding second pixel driving circuit 21 located in the first display area 10 via the first routing line 31, and the first routing line 31 passes through the first light-transmitting area 201. This arrangement facilitates the electrical connection of the second sub-pixel 2 located in the first light-transmitting area 201 with the corresponding second pixel driving circuit 21 located in the first display area 10 via the first routing line 31, thereby shortening the routing of the first routing line 31 from the first light-transmitting area 201 to the first display area 10, thereby saving routing space on the display panel.

[0066] Because the first light-transmitting region 201 is disposed between the second light-transmitting region 202 and the first display region 10, the second sub-pixel 2 located in the second light-transmitting region 202 is electrically connected to the corresponding first pixel driving circuit 11 located in the first display region 10 via the second trace 32. This shortens the route from the second trace 32 to the first display region 10, further saving trace space on the display panel. This shortened length of the second trace 32 reduces the resistance of the second trace 32, improves the uniformity of the signal transmitted on the electrode trace 3, and further improves the display quality of the display panel.

[0067] Preferably, Figure 6 FIG is a structural diagram of another display panel provided by an embodiment of the present invention. Figure 6 The electrode traces 3 include a first trace layer S1 and a second trace layer S2. This arrangement can further expand the wiring area of ​​the electrode traces 3, so that the number of second pixel driving circuits 21 connected to the second sub-pixels 2 in the second display area 20 can be consistent with the number of second sub-pixels 2, further increasing the pixel density of the second display area 20 and improving the display effect of the display panel.

[0068] It should be noted that Figure 6 The dotted line represents the first wiring layer S1 and the solid line represents the second wiring layer S2. Optionally, the first wiring layer S1 and the second wiring layer S2 may be transparent conductive wiring, such as ITO (tin-doped indium oxide) wiring.

[0069] Optionally, based on the above embodiment, continue to refer to Figure 6 The first light-transmitting area 201 may include: a first sub-area A and a second sub-area B sequentially arranged along the first direction X; the first sub-area A is arranged between the first display area 10 and the second sub-area B; the first trace 31 connected to the second sub-pixel 2 located in the first sub-area A is located in the first trace layer S1 and / or the second trace layer S2; the first trace 31 connected to the second sub-pixel 2 located in the second sub-area B is located in the second trace layer S2. It should be noted that Figure 6The case where the first wiring 31 connected to the second sub-pixel 2 located in the first sub-region A is located in the first wiring layer S1 and the second wiring layer S2 is exemplarily shown, and no limitation is given here.

[0070] Specifically, this arrangement maximizes the number of first routing lines 31 passing through the first sub-region A and the number of first routing lines 31 connected to the second sub-pixels 2 located in the second sub-region B. This increases the number of first routing lines 31 connected to the second sub-pixels 2. Within the same wiring space, the second display area 20 can be provided with more second routing lines 32 connected to the first routing lines 31. This arrangement increases the sub-pixel density of the second sub-pixels 2 located in the second display area 20, significantly improving the display quality of the second display area 20 and, consequently, the display quality of the display panel.

[0071] By arranging the first routing line 31 connected to the second sub-pixel 2 in the second sub-region B in the second routing layer S2, space in the first routing layer S1 can be reserved for arranging the second routing line 32 connected to the second sub-pixel 2 in the second light-transmitting area 202.

[0072] Optionally, based on the above embodiment, continue to refer to Figure 6 The second light-transmitting area 202 may include a third sub-area C and a fourth sub-area D extending along the second direction Y. The third sub-area C is disposed between the fourth sub-area D and the first display area 10. The second routing line 32 connected to the second sub-pixel 2 located in the third sub-area C is located on the first routing layer S1 and the second routing layer S2. Preferably, the orthographic projections of the second routing line 32 located in the first routing layer S1 and the second routing line 32 located in the second routing layer S2 on the first routing layer S1 do not overlap. The second routing line 32 connected to the second sub-pixel 2 located in the fourth sub-area D is located on the first routing layer S1 and the second routing layer S2. Preferably, the orthographic projections of the second routing line 32 located in the first routing layer S1 and the first routing line 31 connected to the second sub-pixel 2 located in the second sub-area B on the first routing layer S1 intersect perpendicularly.

[0073] Specifically, setting the second routing line 32 connected to the second sub-pixel 2 located in the third sub-region C in the first routing layer S1 and the second routing layer S2 can better increase the number of second routing lines 32 connected to the second sub-pixel 2 located in the third sub-region C and lead out as many second routing lines 32 as possible.

[0074] The orthographic projections of the second routing line 32 located in the first routing layer S1 and the second routing line 32 located in the second routing layer S2 on the first routing layer S1 do not overlap, so as to better avoid signal interference between the second routing line 32 located in the first routing layer S1 and the second routing line 32 located in the second routing layer S2, thereby further improving the display effect of the second sub-pixel 2 located in the third sub-region C.

[0075] The second routing lines 32 connected to the second sub-pixels 2 located in the fourth sub-region D are located in the first routing layer S1 and the second routing layer S2, which can better increase the number of second routing lines 32 connected to the second sub-pixels 2 located in the fourth sub-region D and lead out as many second routing lines 32 as possible.

[0076] Preferably, the second routing line 32 of the first routing layer S1 located in the fourth sub-area D and the first routing line 31 connected to the second sub-pixel 2 located in the second sub-area B intersect vertically at the positive projection of the first routing layer S1. This arrangement reduces the signal interference between the second routing line 32 of the first routing layer S1 located in the fourth sub-area D and the first routing line 31 connected to the second sub-pixel 2 located in the second sub-area B, thereby further improving the display effect of the display panel.

[0077] Optionally, based on the above embodiment, continue to refer to Figure 6 At least a portion of the second routing line 32 located in the first routing layer S1 passes through the second sub-region B; wherein the second routing line 32 is connected to the second sub-pixel 2 located in the fourth sub-region D.

[0078] Specifically, the second routing line 32 of the first routing layer S1 located in the fourth sub-region D passes through the second sub-region B and is connected to the second pixel driving circuit 21 located in the first display area 10. This, on the one hand, facilitates the extraction of the second routing line 32 located in the fourth sub-region D, providing sufficient space for the second routing line 32 located in the fourth sub-region D. On the other hand, because the second routing line 32 connected to the second sub-pixel 2 located in the second sub-region B is located in the second routing layer S2, and the second routing line 32 located in the first routing layer S1 passes through the second sub-region B, wiring space is increased, signal interference between the second routing line 32 of the first routing layer S1 located in the fourth sub-region D and the first routing line 31 connected to the second sub-pixel 2 located in the second sub-region B is reduced, further improving the display effect of the display panel.

[0079] Optionally, based on the above embodiment, continue to refer to Figure 6The second wiring 32 connected to the second sub-pixel 2 located in the fourth sub-region D may include: a first connecting line 4 and a second connecting line 5; the first connecting line 4 extends from the fourth sub-region D to the second sub-region B along the first direction X, and the second connecting line 5 extends from the second sub-region B to the first display area 10 along the second direction Y; preferably, the first end of the first connecting line 4 is connected to the second sub-pixel 2 located in the fourth sub-region D; the second end of the first connecting line 4 is connected to the first end of the second connecting line 5; and the second end of the second connecting line 5 is connected to the second pixel driving circuit 21.

[0080] Specifically, by setting the first connecting line 4 to extend from the fourth sub-area D to the second sub-area B along the first direction X, and the second connecting line 5 to extend from the second sub-area B to the first display area 10 along the second direction Y, the second sub-pixel 2 located in the fourth sub-area D passes through the second sub-area B where a single-layer first routing line 31 is provided, which facilitates increasing the wiring space of the second routing line 32 connected to the second sub-pixel 2 in the fourth sub-area D, and can better increase the number of second routing lines 32 connected to the second sub-pixel 2 located in the fourth sub-area D, lead out as many second routing lines 32 as possible, further improve the sub-pixel density of the second display area 20, and improve the display effect of the display panel.

[0081] Optionally, based on the above embodiment, continue to refer to Figure 6 The second wiring 32 connected to the second sub-pixel 2 located in the fourth sub-region D may also include: a third connection line 6, the third connection line 6 extends along the first direction X, and the third connection line 6 is arranged between the second end of the second connection line 5 and the second pixel driving circuit 21.

[0082] Specifically, such a setting can better connect the second sub-pixel 2 located in the fourth sub-area D to the second pixel driving circuit 21 located in a different column from the column where the second connecting line 5 is located through the first connecting line 4, the second connecting line 5 and the third connecting line 6, further increasing the wiring space of the second routing line 32, and such a setting can make the lengths of multiple second routing lines 32 connected to the second sub-pixel 2 located in the fourth sub-area D as consistent as possible, further improving the display effect of the display panel.

[0083] Optional, Figure 7 This is a structural diagram of another display panel provided by an embodiment of the present invention. Figure 8 This is a structural diagram of another display panel provided by an embodiment of the present invention. Figure 7 and Figure 8The display panel may further include: a driving chip 71, a plurality of first data signal lines Data, the first data signal line Data is connected between the driving chip 71 and the first pixel driving circuit 11; the first data signal line Data bypasses the second display area 20; a plurality of second data signal lines Ddx, the second data signal line Ddx is connected between the driving chip 71 and the second pixel driving circuit 21; the first display area 10 includes a first main display area 101, a second main display area 102 and a third main display area 103; along the first direction X, the first main display area 101 is adjacent to the first light-transmitting area 201; the second main display area 102 is arranged on a side of the first main display area 101 away from the second display area 20; the third main display area 103 is arranged at an end of the display panel away from the driving chip 71; at least part of the second data signal line Ddx extends through the second main display area 102 to the third main display area 103, and is connected to the second pixel driving circuit 21 located in the third main display area 103.

[0084] Specifically, multiple first data signal lines Data are connected between the driver chip 71 and the first pixel driver circuit 11, such that the first data signal lines Data transmit the data signals output by the driver chip 71 to the first pixel driver circuit 11. The first data signal lines Data bypass the second display area 20. This arrangement ensures that each pixel driver circuit in the first display area 10 can connect to the first data signal lines Data to write data signals to the first pixel driver circuit in the first display area 10, thereby driving the first sub-pixels to emit light. Furthermore, this arrangement further improves the light transmittance of the second display area 20.

[0085] At least a portion of the second data signal line Ddx extends through the second main display area 102 to the third main display area 103 and is connected to the second pixel driving circuit 21 located in the third main display area 103. This arrangement enables the second pixel driving circuit 21 located in the third main display area 103 to transmit data signals via the second data signal line Ddx. This arrangement enables each second sub-pixel located in the second display area 20 to be driven by a separate second pixel driving circuit 21, achieving independent drive of the second sub-pixels 2 located in the second display area 20, and further improving the display quality of the image in the second display area 20.

[0086] In an optional embodiment, when the second display area 20 has N columns of second sub-pixels along the first direction X, the number of second data signal lines Ddx can be X, namely, second data signal lines Dd1 to Ddx. The same second data signal line Ddx is connected to the second pixel driving circuit 21 that drives the second sub-pixels 2 in the same column, that is, the second pixel driving circuit 21 that drives the second sub-pixels 2 in the same column is connected to the same second data signal line Ddx. Optionally, based on the above embodiment, continue to refer to Figure 6 , each second pixel driving circuit 21 drives a single second sub-pixel 2 ; the density of the sub-pixels in the first display area 10 is the same as the density of the sub-pixels in the second display area 20 .

[0087] Specifically, this arrangement ensures that the sub-pixel density of the first display area 10 and the second display area 20 is the same, resulting in the same display effect in the second display area 20 as in the first display area 10, further improving the display quality of the display panel. Furthermore, the pixel arrangement of the first display area 10 and the second display area 20 can be the same, so that the sub-pixels of the second display area 20 can be manufactured in the same process as the sub-pixels of the first display area 10, reducing process costs.

[0088] Optionally, Figure 9 FIG is a schematic diagram of a structure of a display device provided by an embodiment of the present invention. Figure 9 The display device 200 provided in an embodiment of the present invention includes the display panel 100 provided in any of the above embodiments, including the beneficial effects of the display panel provided in any of the above embodiments, which will not be repeated here. The display device 200 may include a terminal such as a mobile phone, a tablet computer, and a wearable device.

[0089] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved. This is not limited herein.

[0090] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A display panel, characterized in that: include: a first display area and a second display area, wherein the light transmittance of the second display area is greater than the light transmittance of the first display area; The display panel further includes: a first sub-pixel, the first sub-pixel being disposed in the first display area and electrically connected to a first pixel driving circuit; a second sub-pixel, the second sub-pixel being disposed in the second display area and electrically connected to a second pixel driving circuit via an electrode wiring; The first pixel driving circuit and the second pixel driving circuit are arranged in the first display area; The electrode traces include a first trace extending at least partially along a first direction and a second trace extending at least partially along a second direction; wherein the second direction intersects the first direction; The second pixel driving circuit connected to the second wiring and the second pixel driving circuit connected to the first wiring are located in different rows; The second display area includes at least a first light-transmitting area and a second light-transmitting area, the first light-transmitting area and the second light-transmitting area are arranged in sequence along the first direction; the first light-transmitting area is located between the first display area and the second light-transmitting area; The second sub-pixel located in the second light-transmitting area is electrically connected to the second pixel driving circuit through the second wiring; The electrode routing includes a first routing layer and a second routing layer; The second light-transmitting area includes a third sub-area and a fourth sub-area extending along the second direction, and the third sub-area is arranged between the fourth sub-area and the first display area; The second routing line connected to the second sub-pixel located in the third sub-area is located in the first routing layer and the second routing layer; the second routing line located in the first routing layer and the second routing line located in the second routing layer have no orthographic projections on the first routing layer that overlap.

2. The display panel according to claim 1, wherein: The second sub-pixel located in the first light-transmitting area is electrically connected to the second pixel driving circuit through the first wiring.

3. The display panel according to claim 2, wherein: The first light-transmitting area includes: a first sub-area and a second sub-area sequentially arranged along the first direction; the first sub-area is arranged between the first display area and the second sub-area; The first routing line connected to the second sub-pixel located in the first sub-region is located in the first routing layer and / or the second routing layer; The first routing line connected to the second sub-pixel located in the second sub-region is located in the second routing layer.

4. The display panel according to claim 3, wherein: The second routing line connected to the second sub-pixel located in the fourth sub-region is located in the first routing layer and the second routing layer.

5. The display panel according to claim 4, wherein: The second routing line of the first routing layer located in the fourth sub-region and the orthographic projection of the first routing line connected to the second sub-pixel located in the second sub-region on the first routing layer intersect perpendicularly.

6. The display panel according to claim 5, wherein: At least a portion of the second routing line located in the first routing layer passes through the second sub-region; wherein the second routing line is connected to the second sub-pixel located in the fourth sub-region.

7. The display panel according to claim 6, wherein: The second wiring connected to the second sub-pixel located in the fourth sub-region includes: a first connecting line and a second connecting line; The first connection line extends from the fourth sub-area to the second sub-area along the first direction, and the second connection line extends from the second sub-area to the first display area along the second direction.

8. The display panel according to claim 7, wherein: The first end of the first connection line is connected to the second sub-pixel located in the fourth sub-region; the second end of the first connection line is connected to the first end of the second connection line; and the second end of the second connection line is connected to the second pixel driving circuit.

9. The display panel according to claim 8, wherein: The second wiring connected to the second sub-pixel located in the fourth sub-region further includes: A third connecting line extends along the first direction and is disposed between the second end of the second connecting line and the second pixel driving circuit.

10. The display panel according to claim 3, wherein: The display panel further includes: Driver chip, a plurality of first data signal lines, wherein the first data signal lines are connected between the driving chip and the first pixel driving circuit; and the first data signal lines bypass the second display area; a plurality of second data signal lines, wherein the second data signal lines are connected between the driving chip and the second pixel driving circuit; The first display area includes a first main display area, a second main display area and a third main display area; Along the first direction, the first main display area is adjacent to the first light-transmitting area; the second main display area is located on a side of the first main display area away from the second display area; and the third main display area is located on an end of the display panel away from the driver chip. At least a portion of the second data signal line extends through the second main display area to the third main display area, and is connected to the second pixel driving circuit located in the third main display area.

11. The display panel according to claim 1, wherein Each of the second pixel driving circuits drives a single second sub-pixel; The density of sub-pixels in the first display area is the same as the density of sub-pixels in the second display area.

12. A display device, characterized in that: include: The display panel according to any one of claims 1 to 11.

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