A method for obtaining fault information of a fault integration module and a related device

Abstract

The application discloses a method for obtaining fault information of a fault integrated module and a related device thereof, and is applied to the hardware field. The method comprises the following steps: receiving a fault indication, wherein the fault indication is used to indicate that the fault integrated module has a fault; determining a target McBank, wherein the identifier of the fault integrated module is located in the target McBank; obtaining the identifiers of at least two integrated modules corresponding to the target McBank; obtaining the information of at least one fault state register according to the identifiers; determining that at least one integrated module is the fault integrated module according to the obtained information; and obtaining the fault information of the fault integrated module from the target McBank, wherein the fault information comprises at least one of a fault type, a fault time or fault content of the fault integrated module. Thus, the fault integrated module is positioned in-band, the fault source is positioned with high precision, the collection delay is reduced, the fault diagnosis system based on the in-band is adapted, and the fault diagnosis system based on the out-band is also adapted.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the field of hardware, and in particular, to a method for obtaining fault information of a fault integration module and a related device thereof. BACKGROUND

[0002] With the rapid development of the Internet industry, the integration modules of central processing units (CPUs) gradually increase, exceeding the maximum specification number of machine check banks (McBanks) or register slices that record fault information.

[0003] Therefore, the CPU adopts a class-merging method for each integration module, and records the fault information of multiple integration modules in one McBank. However, the fault information recorded based on the McBank can only determine that the integration module of this class recorded in the McBank has a fault, but cannot accurately locate the specific module of the fault, and the accuracy of locating the fault source is low. SUMMARY

[0004] The present application provides a method for obtaining fault information of a fault integration module and a related device thereof, which is applied to the field of hardware. The method for obtaining fault information of a fault integration module and the related device thereof can obtain information from within the band and accurately determine the fault integration module, and are suitable for fault diagnosis scenarios within and outside the band.

[0005] In a first aspect, a method for obtaining fault information of a fault integration module is provided, which is applied to a processor including a processing unit and at least one fault status register. The method includes:

[0006] The processing unit receives a fault indication, which is used to indicate that an integration module has a fault;

[0007] The processing unit determines a target machine check fault domain (McBank), wherein the identification of the integration module having a fault is located in the target McBank;

[0008] The processing unit obtains the identification of at least two integration modules corresponding to the target McBank;

[0009] The processing unit obtains information of the at least one fault status register according to the identification;

[0010] The processing unit determines at least one integration module as a fault integration module according to the information of the fault status register;

[0011] The processing unit obtains fault information of the fault integration module from the target McBank, and the fault information includes at least one of a fault type, a fault time, or fault content of the fault integration module.

[0012] In the embodiments of the present application, the processing unit can first acquire the fault information from the McBank recording the fault information, and then determine the fault integrated module corresponding to the fault information according to the information of the fault register, thereby realizing in-band positioning of the fault integrated module, reducing the acquisition delay, and being applicable to application scenarios with in-band fault diagnosis systems and out-of-band fault diagnosis systems.

[0013] In a possible implementation of the first aspect, the processing unit respectively acquires the information of different addresses of the corresponding fault state registers according to the identifiers of the at least two integrated modules.

[0014] In the embodiments of the present application, different integrated modules are respectively corresponding to different addresses of one fault state register, thereby realizing real-time monitoring of the fault states of multiple integrated modules associated with one McBank.

[0015] In a possible implementation of the first aspect, the processing unit respectively acquires the information of the at least two fault state registers according to the identifiers of the at least two integrated modules.

[0016] In the embodiments of the present application, different integrated modules associated with one McBank are respectively monitored in real time by multiple fault state registers, thereby increasing the application scenarios and flexibility of the scheme.

[0017] In a possible implementation of the first aspect, the information of the fault state register includes a fault code, and the acquisition of the fault information of the fault integrated module from the target McBank includes:

[0018] When the processing unit determines multiple fault integrated modules, the fault information corresponding to each fault integrated module is determined according to the fault code.

[0019] In a possible implementation of the first aspect, the processing unit iterates through each McBank, and determines the target McBank based on the value of the valid bit of each McBank.

[0020] In the embodiments of the present application, all McBanks are iterated through, and the target McBank is determined based on the value of the valid bit of each McBank, thereby accurately positioning the McBank recording the fault, and improving the reliability of the scheme.

[0021] In a possible implementation of the first aspect, the processing unit obtains fault information from the target McBank, the fault information including information such as a fault type, a fault time, and / or a fault content, and the processing unit further sends the fault information and an identifier of the fault integration module to a fault diagnosis system, which is configured to analyze and locate faults and / or repair faults based on the fault information and the identifier of the fault integration module.

[0022] In the embodiments of the present application, the fault information and the identifier of the fault integration module are sent to the fault diagnosis system, which can accurately locate the fault according to the fault information and the identifier of the fault integration module, and thus accurately diagnose the fault. In addition, based on the accurate location of the fault integration module, the fault integration module can be accurately isolated, thereby reducing product maintenance costs and reducing the probability of system downtime.

[0023] In a possible implementation of the first aspect, the fault diagnosis system at least includes an operating system (OS) and / or a basic management controller (BMC) system.

[0024] In the embodiments of the present application, the present scheme is applicable to a diagnosis system with an in-band OS, and is also applicable to a diagnosis system with an out-of-band BMC.

[0025] The second aspect relates to a processing device, which is applied to a processor including the processing device and at least one fault status register, and the processing device includes:

[0026] The receiving module is configured to receive a fault indication, the fault indication being used to indicate that the integration module has a fault.

[0027] The processing module is configured to determine a target McBank, wherein an identifier of the integration module having the fault is located in the target McBank.

[0028] The obtaining module is configured to obtain identifiers of at least two integration modules corresponding to the target McBank and information of at least one fault status register according to the identifiers.

[0029] The processing module is further configured to determine, according to the information, that at least one integration module is a fault integration module.

[0030] The obtaining module is further configured to obtain, from the target McBank, fault information of the fault integration module, the fault information including at least one of a fault type, a fault time, or a fault content of the fault integration module.

[0031] In the embodiments of the present application, after the receiving module receives the fault indication, the processing module can determine the target McBank, and the obtaining module can obtain the identifier of the integrated module corresponding to the target McBank, and obtain the information of at least one fault status register according to the standard, and the processing module can further determine the states of the at least two integrated modules according to the obtained information, and determine the fault integrated module according to the states, thereby realizing in-band positioning of the fault integrated module, reducing the acquisition delay, and being suitable for application scenarios with in-band fault diagnosis systems and out-of-band fault diagnosis systems.

[0032] In a possible implementation form of the second aspect, the obtaining module is specifically configured to obtain the information of different addresses of a corresponding fault status register according to the identifier of each of the at least two integrated modules.

[0033] In the embodiments of the present application, different integrated modules are corresponded to different addresses of one fault status register, thereby realizing real-time monitoring of the fault states of the multiple integrated modules associated with one McBank.

[0034] In a possible implementation form of the second aspect, the obtaining module is specifically configured to obtain the information of at least two fault status registers corresponding to the identifier of each of the at least two integrated modules.

[0035] In the embodiments of the present application, the fault states of different integrated modules associated with one McBank are respectively monitored in real time by multiple fault status registers, thereby increasing the application scenarios and flexibility of the scheme.

[0036] In a possible implementation form of the second aspect, the information of the fault status register includes a fault code, and the obtaining module is further configured to determine the fault information corresponding to each fault integrated module according to the fault code when the processing unit determines the multiple fault integrated modules.

[0037] In a possible implementation form of the second aspect, the processing module is specifically configured to traverse each McBank, and determine the target McBank based on the value of the valid bit of each McBank.

[0038] In the embodiments of the present application, all the McBanks are traversed, and the target McBank is determined based on the value of the valid bit of each McBank, thereby accurately positioning the McBank recording the fault and improving the reliability of the scheme.

[0039] In a possible implementation form of the second aspect, the obtaining module is further configured to obtain the fault information from the target McBank, wherein the fault information includes a fault type, a fault time and / or a fault content.

[0040] and the processing device further comprises a sending module configured to send the fault information and the identifier of the fault integration module to a fault diagnosis system, wherein the fault diagnosis system is configured to analyze and locate the fault and / or repair the fault based on the fault information and the identifier of the fault integration module.

[0041] In a possible implementation of the second aspect, the fault diagnosis system comprises at least an operating system (OS) and / or a baseboard management controller (BMC) system.

[0042] In a third aspect, an electronic device is provided, which has the function of implementing the method of the first aspect or any possible implementation of the first aspect. The function can be implemented by hardware, or by hardware executing corresponding software. The hardware or software comprises one or more modules corresponding to the above functions.

[0043] In the implementation of the present application, the electronic device of the third aspect executes the method described in the first aspect or any possible implementation of the first aspect of the present application.

[0044] In a fourth aspect, an electronic device is provided, which comprises one or more processing devices of the second aspect.

[0045] In a fifth aspect, another electronic device is provided, which can comprise a processor, a memory, and a BMC chip, the processor being coupled to the memory and the BMC chip, and the processor being configured to execute the method described in the first aspect or any possible implementation of the first aspect of the present application.

[0046] In a sixth aspect, another electronic device is provided, which can comprise a processor comprising at least one processing device and at least one fault status register, and the processor being coupled to a memory configured to store instructions, wherein the processing device is configured to execute the instructions in the memory to cause the electronic device to execute the method described in the first aspect or any possible implementation of the first aspect of the present application.

[0047] In a seventh aspect, another electronic device is provided, which comprises a processor configured to execute a computer program (or computer executable instructions) stored in a memory, when the computer program (or computer executable instructions) is executed, causing the execution of the method in the first aspect and each possible implementation of the first aspect.

[0048] In a possible implementation, the processor and the memory are integrated together.

[0049] In another possible implementation, the above-mentioned memory is located outside the electronic device.

[0050] The electronic device also includes a communication interface for the electronic device to communicate with other devices, such as transmitting or receiving data and / or signals. Exemplary, the communication interface can be a transceiver, circuit, bus, module, or other type of communication interface.

[0051] The eighth aspect provides a computer readable storage medium, including computer readable instructions, when the computer readable instructions are run on a computer, the method described in the first aspect of the application, any possible implementation manner of the first aspect is executed.

[0052] The ninth aspect provides a computer program product, including computer readable instructions, when the computer readable instructions are run on a computer, the method described in the first aspect of the application, any possible implementation manner of the first aspect is executed. BRIEF DESCRIPTION OF DRAWINGS

[0053] Figure 1 An example of the correspondence between McBank and integrated module is shown in the figure;

[0054] Figure 2 Another example of the correspondence between McBank and integrated module is shown in the figure;

[0055] Figure 3a An example of the architecture of the server system provided by the embodiment of the application is shown in the figure;

[0056] Figure 3b An example of the structure of the CPU provided by the embodiment of the application is shown in the figure;

[0057] Figure 4 An example of the flow of the method for obtaining the fault information of the fault integrated module provided by the embodiment of the application is shown in the figure;

[0058] Figure 5 An example of the flow of the method for obtaining the fault information of the fault integrated module provided by the embodiment of the application is shown in the figure;

[0059] Figure 6 An example of the UPI application scenario provided by the embodiment of the application is shown in the figure;

[0060] Figure 7 An example of the M2M application scenario provided by the embodiment of the application is shown in the figure;

[0061] Figure 8 An example of the structure of the processing device provided by the embodiment of the application is shown in the figure;

[0062] Figure 9 An example of the structure of the electronic device provided by the embodiment of the application is shown in the figure. DETAILED DESCRIPTION

[0063] The embodiment of the present application provides a method for obtaining fault information of a fault integration module and a related device thereof, and is applied to the field of hardware. The method for obtaining fault information of the fault integration module and the related device thereof can obtain information from in-band and accurately determine the fault integration module, and are suitable for in-band and out-of-band fault diagnosis scenarios.

[0064] The terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and do not necessarily have to be used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchanged under appropriate circumstances, and this is only a distinguishing way used in the description of the embodiments of the present application to describe the objects with the same properties. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, so that the processes, methods, systems, products or devices containing a series of units do not have to be limited to those units, but can include other units that are not clearly listed or inherent to these processes, methods, products or devices.

[0065] Before introducing the embodiments of the present application, the related content of the merged McBank scheme is briefly described, so as to facilitate the subsequent understanding of the embodiments of the present application.

[0066] For the convenience of understanding, the following example illustrates the specific implementation of merging the integration modules in the CPU by class and recording the fault information of multiple integration modules by one McBank.

[0067] First, please refer to Figure 1 , Figure 1 for an example of the correspondence between the McBank and the integration module. It Figure 1 represents the correspondence between the integration module of the CPU and the McBank, that is, each McBank corresponds to an integration module. Wherein MachineBank ID is the identity document (ID) of the McBank, used to distinguish different McBanks, processor module is the integration module of the CPU, and merged status represents the integration module recorded by the McBank. Specifically, Figure 1 The integration module corresponding to the McBank with ID 7 in the table is the node module connecting the memory control node 0 (M2M) to the network bus, that is, the memory controller, the integration module corresponding to the McBank with ID 8 is M2M1, the integration module corresponding to the McBank with ID 5 is ultra path interconnect (UPI) 0, the integration module corresponding to the McBank with ID 12 is UPI1, and the integration module corresponding to the McBank with ID 19 is UPI2.

[0068] Therefore, when the number of integrated modules in the CPU exceeds the number of McBanks, the integrated modules can be merged by category, and then a single McBank can be used to record fault information for multiple integrated modules. Please refer to [link / reference] for details. Figure 2 , Figure 2 This is another schematic diagram illustrating the correspondence between McBank and the integrated module. Figure 2 This indicates the correspondence between CPU integrated modules and McBanks, meaning one McBank corresponds to multiple integrated modules. Specifically, McBank with ID 5 corresponds to UPI0, UPI1, UPI2, and UPI3, all of which are merged into the UPI class. McBank5 is defined as a UPI Bank to record fault information for integrated modules of the UPI class. Similarly, McBank with ID 12 corresponds to M2M0, M2M1, M2M2, and M2M3, all of which are merged into the M2M class. McBank12 is defined as an M2M Bank to record fault information for integrated modules of the M2M class.

[0069] Then, the CPU confirms a fault in a certain type of integrated module based on the fault information recorded in McBank, and reports the fault information to the fault diagnosis system to facilitate fault diagnosis. Specifically, when the above... Figure 2 When a UPI1 fault occurs, the machine check architecture (MCA) in the CPU detects the fault. This MCA is used to detect and record fault information. Specifically, when a UPI1 fault occurs, the MCA detects a change in the voltage level of the connection to UPI1, thus confirming the fault. Optionally, the voltage level can change from high to low or from low to high; this can be determined based on specific requirements and is not limited here. The MCA then records the fault information in McBank5, also known as the UPI Bank. Based on the fault information in McBank5, the CPU determines that the UPI-type integrated module has failed and reports the fault information to the fault diagnosis system. This fault information indicates the fault in the UPI-type integrated module, and the fault diagnosis system performs fault diagnosis based on this information, such as fault sharing, location, and early warning. Optionally, the fault diagnosis system can be a baseboard management controller (BMC) system or an operating system (OS).

[0070] However, based on the fault information in the McBank5, it can only be confirmed that the UPI class integrated module is faulty, and it cannot be determined that one or several of UPI0, UPI1, UPI2 or UPI3 are faulty, so the faulty module cannot be accurately located.

[0071] To solve the above-mentioned problems, the embodiment of the application first provides a method for obtaining fault information of a faulty integrated module and related equipment thereof, which is applied to a processor including a processing unit and at least one fault status register. Wherein, the processing unit receives a fault indication, the fault indication is used to indicate that the faulty integrated module has a fault. Then the processing unit determines the target machine check fault domain McBank, and the identifier of the faulty integrated module is located in the McBank. And the identifier of at least two integrated modules corresponding to the target McBank is obtained, and then the processing unit obtains the information of at least one fault status register according to the identifier, and determines the state of at least two integrated modules according to the obtained information, the state includes that the integrated module is in a fault state or the integrated module is in a non-fault state, and then determines that at least one integrated module in the fault state is the faulty integrated module. Thus, the CPU in-band positioning of the faulty integrated module is realized, the acquisition delay is reduced, and the application scenario with in-band fault diagnosis system and out-of-band fault diagnosis system is suitable.

[0072] For example, in order to facilitate understanding of the embodiments of the application, the following will first take the hardware composition structure of the server as an example to perform corresponding operation when the hardware composition structure of the server is faulty. First, the server system is simply explained, please refer to Figure 3a , Figure 3a The server provided by the embodiment of the application provides one architecture schematic diagram. Wherein, the hardware of the server at least includes a processor, an interconnection cable and a memory, the processor and the memory are connected through the interconnection cable. And the basic input output system (basic input output system, BIOS) and the OS and / or the connected out-of-band BMC system can be run on the processor of the server, i.e. CPU. When the hardware composition structure of the server is faulty, the CPU collects fault information by running the BIOS, and reports to the OS and / or the out-of-band BMC system, and then the OS and / or the out-of-band BMC system diagnoses the fault according to the fault information, and then maintains the server fault.

[0073] Specifically, the CPU includes a plurality of integrated modules, when the integrated module is faulty, the BIOS will take corresponding measures to collect fault information and determine the faulty integrated module, and then report the port ID of the faulty integrated module and the fault information to the in-band OS or the out-of-band BMC for fault diagnosis.

[0074] For the subsequent understanding of the method for acquiring fault information of a fault integration module provided by the embodiments of the present application, first refer to Figure 3b The composition structure of a CPU is briefly described by taking an example, Figure 3b A structural schematic diagram of a CPU provided by the embodiments of the present application is shown. Specifically, the CPU 300 includes at least one processing unit 301, at least one MCA 302, a plurality of McBanks 303, a plurality of integration modules 304, and at least one fault status register. The processing unit 301 is connected to the MAC 302, the McBank 303, and the fault status register 305, the MCA 302 is connected to at least one McBank 303 and at least one integration module 304, and the fault status register 305 is connected to the corresponding integration module 304. Optionally, a plurality of integration modules 304 can be connected to one fault status register 305, or one integration module 304 can be connected to one fault status register. It can be understood that in actual situations, the specific requirements determine the specific situation, which is not limited here.

[0075] Based on the foregoing Figure 3b As an example, in order to better understand the embodiments of the present application, the method for acquiring fault information of a fault integration module provided by the embodiments of the present application is described in detail below in combination with the drawings. Those skilled in the art can know that with the development of technology and the appearance of new scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems. Please refer to Figure 4 , Figure 4 A flowchart of the method for acquiring fault information of a fault integration module provided by the embodiments of the present application is shown, which specifically includes:

[0076] 401, the MCA detects that a fault occurs.

[0077] When a fault occurs in a certain integration module of the CPU in the above example Figure 3b The MCA of the exemplary CPU determines that the integration module has a fault based on the level change of the integration module, records the fault information of the integration module into the corresponding McBank, and sends an interrupt to the processing unit. After receiving the interrupt, the processing unit determines that a fault has occurred in the integration module.

[0078] Specifically, the MCA can sample the fault in units of time, so more than one fault can be detected in each unit of sampling time.

[0079] 402, the MCA records the fault information in the McBank.

[0080] For example, as described above Figure 2As shown in the example, when UPI0 or M2M0 fails, the MCA records the failure information in the corresponding UPI bank or M2M bank, such as the type of failure, the time of failure, and the content of failure, and the like. It can be understood that other failure-related information can also be recorded, which is not limited here.

[0081] Specifically, since the number of integrated modules of the CPU exceeds the number of McBanks, the failure information of at least two integrated modules is recorded by using one McBank, and the at least two integrated modules corresponding to the McBank can be determined by the correspondence between the ID of the McBank and the identifier of the integrated module. For example, the identifier can be the port number of the integrated module, and the example can be as described above Figure 2 As shown in the example, McBank5, i.e., the UPI bank, combines UPI modules with port IDs of 0, 1, 2, and 3, i.e., UPI0, UPI1, UPI2, and UPI3 corresponding to the merged status, and McBank12, i.e., the M2M bank, combines M2M modules with port IDs of 0, 1, 2, and 3, i.e., M2M0, M2M1, M2M2, and M2M3. Specifically, the port IDs of the multiple integrated modules corresponding to the McBank can be specified in the register manual of the CPU. It can be understood that the example of the identifier being the port ID herein is only for understanding the embodiments of the application, and in the implementation, each integrated module can be named or represented in other ways, which is not limited here.

[0082] 403、The processing unit receives the failure indication.

[0083] The MCA detects the occurrence of failure and sends a failure indication to the processing unit, and the example of the interruption is used herein to illustrate the failure indication. Exemplarily, no matter how many McBanks have failure information within the unit sampling time of the MCA, only one interruption is triggered, so that the specific McBank having the failure information and the number of McBanks cannot be determined.

[0084] To facilitate understanding of the embodiments of the application, the application scenarios in which the UPI modules or M2M modules fail are described below. Exemplarily, when a certain UPI module fails and is detected by the MCA, and the integrated modules of the UPI type are all associated with the UPI bank, the MCA records the failure information of the UPI module in the UPI bank. Then the MCA sends a failure indication to the processing unit.

[0085] Exemplarily, when a certain M2M module fails and is detected by the MCA, and the integrated modules of the M2M type are all associated with the M2M bank, the MCA records the failure information of the M2M module in the M2M bank. Then the MCA sends a failure indication to the processing unit.

[0086] It should be noted that the interruption is taken as an example herein only for describing the embodiments of the present application, and does not have substantial limitation on the present application. It can be understood that in actual cases, the fault indication can also be implemented in other forms, and the specific forms are not limited herein.

[0087] After receiving the fault indication, the processing unit cannot determine the McBank with the fault information and the number of the McBank with the fault information, because the fault indication is only used to inform the processing unit that a fault occurs. Therefore, the processing unit needs to determine the target McBank with the fault information. That is, step 404 is performed.

[0088] 404. The processing unit reads the information of the McBank to determine the target McBank.

[0089] Specifically, after receiving the fault indication, the processing unit calls the BIOS to traverse each McBank to obtain the value of the valid bit of each McBank, and then determines whether the corresponding McBank has the fault information according to the value of the valid bit of each McBank. It can be understood that in actual cases, the value of the valid bit in the register address of the McBank can be defined as 0 to indicate that the McBank has no fault information, or 1 to indicate that the McBank has the fault information, or 1 to indicate that the McBank has no fault information, and 0 to indicate that the McBank has the fault information. The specific forms are not limited herein.

[0090] For example, the processing unit determines that the UPI bank has the fault information according to the value of the valid bit of the UPI bank, that is, the UPI integrated module has a fault. Or for example, the processing unit determines that the M2M bank has the fault information according to the value of the valid bit of the M2M bank, that is, the M2M integrated module has a fault.

[0091] After determining the target McBank, if the target McBank corresponds to only one integrated module, the integrated module is the fault integrated module. However, when the target McBank corresponds to at least two integrated modules, the processing unit obtains the identifiers of the at least two integrated modules corresponding to the target McBank, and the CPU obtains the information of at least one fault state register according to the identifiers of the at least two integrated modules corresponding to the target McBank, and determines the states of the at least two integrated modules (the states include that the integrated module is in the fault state or the integrated module is in the non-fault state) according to the obtained information, and determines that the integrated module in the fault state is the fault integrated module, that is, the fault integrated module is the integrated module with the fault. The processing unit performs steps 405 and 406.

[0092] 405. The processing unit obtains the state of the integrated module corresponding to the target McBank.

[0093] For example, the processing unit calls the BIOS to determine the integrated module corresponding to the target McBank based on the mapping relationship, and obtains the information of the fault status register corresponding to the integrated module, and determines the state of the corresponding integrated module according to the information, wherein the mapping relationship is the corresponding relationship between the target McBank and the identifier of the corresponding integrated module. For example, based on the foregoing Figure 2 According to the example, the identifier and the corresponding state of the integrated module corresponding to the target McBank can be determined based on the target McBank.

[0094] Specifically, the method comprises Figure 5 The following steps are shown:

[0095] Step 405a, the processing unit obtains the identifier of the first integrated module corresponding to the target McBank.

[0096] The processing unit can call the BIOS to obtain the identifier of the first integrated module corresponding to the target McBank, and the first integrated module can be one of all integrated modules corresponding to the target McBank. For example, at this time, the target McBank is UPIbank, and the identifiers of the integrated modules corresponding to the UPI bank are UPI modules with identifiers 0, 1, 2 and 3, respectively. The first integrated module can be the first integrated module, and its identifier is UPI0.

[0097] Step 405b, the processing unit calls the BIOS to obtain the corresponding state according to the identifier of the first integrated module.

[0098] The processing unit calls the BIOS to obtain the information of the fault status register corresponding to the integrated module according to the identifier of the integrated module, and determines the state of the corresponding integrated module according to the information. For example, the processing unit can obtain the information of the fault status register corresponding to the identifier according to the corresponding relationship between the identifier of the integrated module and the fault status register.

[0099] It should be noted that the CPU architecture supports the peripheral component interconnect (PCI) protocol, and before step 401, a configuration space register (PCI Configuration Space Registers, CSR) can be used as the fault status register, which belongs to an integrated module inside the CPU, is managed by the PCI protocol, is equivalent to a PCI device, and has a PCI configuration space, and thus can be used to identify the status of the integrated module. It can be understood that other registers inside the CPU can also be used as the fault status register, which is not limited here.

[0100] In the embodiments of the present application, the fault status register is a register provided inside the CPU, without the need to additionally increase a register to indicate the status of the integrated module corresponding to the target McBank, thereby saving costs.

[0101] Optionally, the number of fault status registers can be one or more, which increases the selectability of the scheme and is suitable for more application scenarios.

[0102] Specifically, different addresses in one fault status register can correspond to different integrated modules, and the values on the addresses can correspond to the status of the integrated modules. For example, the value of address 0x0 in one register can be 0 to indicate that the status of UPI0 is fault-free, the value of address 0x0 can be 1 to indicate that the status of UPI0 is faulty, the value of address 0x1 can be 0 to indicate that the status of UPI1 is fault-free, the value of address 0x1 can be 1 to indicate that the status of UPI1 is faulty, and other addresses can be used to indicate the status of UPI2 and UPI3. It can be understood that other numbers, characters or fields can also be used to indicate that the status of the integrated module is fault-free or faulty, which can be determined according to specific needs in actual situations, and is not limited here. Alternatively, different bit positions in one address can be used to indicate the fault status of each UPI module, for example, in [7:0], the value of 0 bit position can be 0 to indicate that the status of UPI0 is fault-free, the value of 0 bit position can be 1 to indicate that the status of UPI0 is faulty, the value of 1 bit position can be 0 to indicate that the status of UPI1 is fault-free, the value of 1 bit position can be 1 to indicate that the status of UPI1 is faulty, and other bit positions can be used to indicate the status of UPI2 and UPI3. It can be understood that two bit positions can also be used to indicate that the status of one integrated module is fault-free or faulty, or multiple bit positions can be understood. It can be understood that in actual situations, the specific needs can be determined, and are not limited here. That is, when a fault occurs, the fault status register can detect the status of the corresponding integrated module, for example, when the integrated module fails, the fault status register can change the value of the address corresponding to the integrated module.

[0103] Alternatively, a plurality of fault status registers can be used to identify the status of different integrated modules, for example, one fault status register is configured for each UPI module, and a certain bit or address in the fault status register is defined to identify the corresponding UPI module as fault-free or faulty. Specifically, the bit can be defined as a certain number, character or field to identify the UPI module as faulty, which is not limited here. That is, after a fault occurs, the fault status register can detect the status of the corresponding integrated module, and when the integrated module fails, the fault status register of the corresponding integrated module can change the value.

[0104] After the processing unit obtains the identifier of the first integrated module, the BIOS can be called to obtain the information of the fault status register corresponding to the identifier of the first integrated module according to the correspondence between the integrated module and the fault status register, and the information indicates the status of the first integrated module.

[0105] In a possible implementation, the information of at least one fault status register obtained by the processing unit based on the identifier of the integrated module further includes a fault code. When a plurality of integrated modules fail, the fault information stored in the McBank can include the fault information of the plurality of integrated modules, and the fault code can be used to match the fault information corresponding to each integrated module in the target McBank.

[0106] Steps S405a and S405b are repeatedly executed until a termination condition is met, where the termination condition can be that the processing unit calls the BIOS to traverse all integrated modules corresponding to the target McBank, and then the loop is terminated; or in step 505b, once the state identifier obtained by the processing unit calling the BIOS is a fault state, the loop is terminated.

[0107] Then step 406 is performed, which is specifically as follows:

[0108] Step 406: The processing unit determines the fault integrated module based on the obtained status of the integrated module.

[0109] Specifically, when the termination condition is that the processing unit calls the BIOS to traverse all integrated modules corresponding to the target McBank before stopping the loop, after the processing unit calls the BIOS to obtain the status of all integrated modules corresponding to the target McBank, the integrated module with the fault status is determined as the fault integrated module.

[0110] Alternatively, when the termination condition is that the loop is terminated once the state identifier obtained by the processing unit calling the BIOS is a fault state in step 505b, the processing unit calls the BIOS to determine the integrated module with the fault status obtained in the last loop as the fault integrated module.

[0111] In the embodiments of the present application, the state of the integrated module is acquired in-band to determine the specific faulty module, so that the fault source can be accurately located, and the in-band positioning accuracy is improved. The state of the integrated module is acquired from the register in-band, instead of being acquired from the platform environment control interface (PECI) out-of-band, so that more application scenarios can be applied, and the out-of-band management is reduced.

[0112] Optionally, after the faulty integrated module is determined, the processing unit further performs step 407, which is specifically as follows:

[0113] In step 407, the processing unit acquires the recorded fault information from the target McBank.

[0114] For example, the processing unit calls the BIOS to acquire the fault information of the faulty UPI0 recorded by the UPI bank, or the processing unit runs the BIOS to acquire the fault information of the faulty M2M0 recorded by the M2M bank.

[0115] In the embodiments of the present application, the fault information is acquired to facilitate analysis, positioning and repair of the fault based on the fault information.

[0116] In a possible implementation, when the number of the faulty integrated modules is at least two, the acquired fault information includes the fault information of the plurality of faulty integrated modules. Then, the processing unit can determine the fault information corresponding to each faulty integrated module based on the fault code in the information of the acquired at least one state register. Specifically, the fault information includes the fault information corresponding to different fault codes, the fault code is the fault code in the information of the acquired at least one state register, and the identifiers of different integrated modules are different from the information of the acquired at least one state register, that is, the fault codes are different. Therefore, the fault information corresponding to each faulty integrated module can be obtained by matching the fault code in the information of the acquired at least one state register with the fault code in the fault information.

[0117] It should be noted that in the embodiments of the present application, the execution order of step 407 and the aforementioned step 405 and step 406 is not limited.

[0118] After the processing unit acquires the fault information from the target McBank, the CPU can further perform step 408, which is specifically as follows:

[0119] In step 408, the processing unit sends the fault information and the identifier of the faulty integrated module.

[0120] Specifically, the processing unit calls the BIOS to send the fault information and the identifier of the fault integrated module to the operating system after obtaining the fault information or determining the fault integrated module. Then the operating system can accurately locate according to the fault information and the identifier of the fault integrated module, and then accurately diagnose the fault.

[0121] Optionally, the processing unit can also call the BIOS to send the fault information and the identifier of the fault integrated module to the BMC out of the band after obtaining the fault information or determining the fault integrated module. Then the BMC can accurately locate according to the fault information and the identifier of the fault integrated module, and then accurately diagnose the fault.

[0122] In a possible implementation, the processing unit sends the identifier of the fault integrated module and the fault information corresponding to the identifier. In this way, the accuracy of fault analysis can be improved to a greater extent, and then the fault can be accurately diagnosed.

[0123] In the embodiments of the present application, after receiving the fault indication, the processing unit determines the target McBank with fault information, and in-band acquires the identifier of the integrated module corresponding to the target McBank, and acquires the information of the corresponding fault status register according to the identifier of the integrated module, and determines the corresponding state according to the information, and determines that the integrated module with the fault state is the fault integrated module. In this way, the fault position is accurately located in the band, the in-band positioning accuracy is improved, the acquisition delay is reduced compared with the way of locating the fault integrated module out of the band, which is more suitable for the diagnosis system of the in-band OS, and at the same time is also suitable for the diagnosis system of the out-of-band BMC. Based on the accurate positioning of the fault integrated module, the fault integrated module can also be accurately isolated, thereby reducing the product maintenance cost and reducing the system downtime probability.

[0124] In order to more intuitively understand the embodiments of the present application, two specific application scenarios are taken as examples for a brief description. First, please refer to the example of Figure 6 Figure 6 ​An application scenario of the UPI provided by the embodiment of the present application is shown in the figure. Taking the failure of a UPI module of the CPU as an example, the CSR in the application scenario can be named as a BIOS_KTI_ST register. Specifically, when a certain UPI module fails and the failure is detected by the MCA, the MCA records the failure information in the UPI Bank associated with the UPI module, and after receiving the failure indication, the processing unit determines that the target McBank is the UPI bank. Then the processing unit calls the BIOS to traverse the BIOS_KTI_ERR_ST register corresponding to the identifier (i.e. port number) of each UPI module of the UPI bank, obtains the information corresponding to each UPI module respectively, and determines the UPI module with the failure state set as the failure integrated module according to the information. Optionally, the processing unit also reports the failure information and the identifier (i.e. port number) of the failure integrated module to the failure diagnosis system (i.e. operating system and / or BMC), so as to realize the in-band accurate positioning of the position of the UPI module with failure, improve the in-band positioning accuracy, and reduce the collection delay compared with the out-of-band positioning of the failure integrated module, which is more suitable for the diagnosis system of the in-band OS, and is also suitable for the diagnosis system of the out-of-band BMC.

[0125] Another application scenario is shown in Figure 7 , Figure 7 An application scenario of the M2M provided by the embodiment of the present application is shown in the figure. Taking the failure of a M2M module of the CPU as an example, the CSR in the application scenario can be named as a MCI_STATUS_SHADOW register. Specifically, when a certain M2M module fails and the failure is detected by the MCA, the MCA records the failure information in the M2M Bank associated with the M2M module, and after receiving the failure indication, the processing unit determines that the target McBank is the M2M bank. Then the processing unit calls the BIOS to traverse the MCI_STATUS_SHADOW register corresponding to the identifier (i.e. port number) of each M2M module of the M2M bank, obtains the state corresponding to each M2M module respectively, and determines the M2M module with the failure state set as the failure integrated module. Optionally, the processing unit also reports the failure information and the identifier (i.e. port number) of the failure integrated module to the failure diagnosis system (i.e. operating system and / or BMC), so as to realize the in-band accurate positioning of the position of the UPI module with failure, improve the in-band positioning accuracy, and reduce the collection delay compared with the out-of-band positioning of the failure integrated module, which is more suitable for the diagnosis system of the in-band OS, and is also suitable for the diagnosis system of the out-of-band BMC.

[0126] It should be noted that the foregoing Figure 3aThe application scenarios of the server system shown are merely examples for understanding the embodiments of this application. It is understood that this solution can also be used in storage systems and other network devices or systems that may require maintenance due to equipment failure, but no specific limitations are made here.

[0127] The method and related equipment for obtaining fault information of the fault integration module provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

[0128] To implement the functions of the methods provided in the embodiments of this application, the CPU may include hardware structures and / or software modules, and implement the above functions in the form of hardware structures, software modules, or a combination of hardware structures and software modules. Whether a particular function is executed in the form of hardware structures, software modules, or a combination of hardware structures and software modules depends on the specific application and design constraints of the technical solution.

[0129] This application also provides an electronic device applied in the hardware field. Specifically, the electronic device includes multiple processing devices capable of executing the above-described method embodiments. For details on the structure of this processing device, please refer to [link to specific examples]. Figure 8 , Figure 8 This is a schematic diagram of a processing apparatus provided in an embodiment of this application. In one possible implementation, the processing apparatus may include components that perform the methods described in the above embodiments. Figure 4 The method / operation / step / action corresponds to a module or unit, which can be a hardware circuit, software, or a combination of hardware circuit and software. In one possible implementation, the processing device may include: a receiving module 801, a processing module 802, and an acquisition module 803. The receiving module 801 can be used to perform the step of receiving a fault indication as described in the above method embodiment; the processing module 802 can be used to perform the steps of determining a target McBank, determining the status of at least two integrated modules corresponding to the target McBank, and determining the faulty integrated module as described in the above method embodiment; the acquisition module 803 can be used to perform the steps of acquiring the identifiers of at least two integrated modules corresponding to the target McBank, and acquiring information from at least one fault status register based on the identifiers as described in the above method embodiment; the acquisition module 803 can also be used to acquire fault information of the faulty integrated module from the target McBank.

[0130] In a possible design, the processing apparatus further includes a sending module 804, and the obtaining module 803 is further configured to perform the step of obtaining the fault information from the target McBank in the method embodiments, and the sending module 804 is configured to perform the steps of sending the fault information and the identifier of the fault integration module to the fault diagnosis system in the method embodiments.

[0131] In other possible designs, the receiving module 801, the processing module 802, the obtaining module 803, and the sending module 804 can perform the methods / operations / steps / actions in the various possible implementation manners of the energy storage device in the method embodiments one by one.

[0132] In a possible design, the obtaining module 803 is specifically configured to obtain the information of different addresses of a corresponding fault status register according to the identifiers of the at least two integration modules respectively.

[0133] In a possible design, the obtaining module 803 is specifically configured to obtain the information of the at least two fault status registers according to the identifiers of the at least two integration modules respectively.

[0134] In a possible design, the information of the fault status register includes a fault code, and the obtaining module 803 is further configured to determine the fault information corresponding to each fault integration module according to the fault code when the processing unit determines the plurality of fault integration modules.

[0135] In a possible design, the processing module 802 is specifically configured to traverse each McBank, and determine the target McBank based on the value of the valid bit of each McBank.

[0136] In a possible design, the fault diagnosis system is an operating system (OS) and / or a basic management controller (BMC) system.

[0137] The advantages of the processing apparatuses of the various designs described in the present application are referable to the advantages of the various implementation manners of the processing units in the method embodiments described above. Figure 4 The advantages of the processing apparatuses of the various designs described in the present application are referable to the advantages of the various implementation manners of the processing units in the method embodiments described above.

[0138] It should be noted that, Figure 8 The information interaction and execution process between the modules / units in the processing apparatuses of the corresponding embodiments are based on the same concept as the method embodiments in the present application. Figure 4 The information interaction and execution process between the modules / units in the processing apparatuses of the corresponding embodiments are based on the same concept as the method embodiments in the present application.

[0139] In addition, the functional modules or units in the various embodiments of this application can be integrated into a processor, and the integrated modules or units can be implemented in hardware or software functional modules.

[0140] The following describes another electronic device provided in the embodiments of this application. Please refer to [link to relevant documentation]. Figure 9 , Figure 9 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Specifically, the electronic device 900 includes a CPU 901 and a memory 902, wherein the memory 902 can be temporary storage or persistent storage. The program stored in the memory 902 may include one or more modules (not shown in the figure), and each module may include a series of instruction operations on the electronic device 900. Furthermore, the CPU 901 may be configured to communicate with the memory 902 and execute a series of instruction operations in the memory 902 on the electronic device 900.

[0141] In this embodiment of the application, the CPU 901 further includes a processing unit 9011 and at least one fault status register 9012, wherein the processing unit 9011 is used to execute Figure 4 The method in the corresponding embodiment. For example, the processing unit 9011 can be used to: receive a fault indication indicating that a fault integration module has failed; then determine that the target machine checks the fault domain McBank, and that the identifier of the fault integration module is located in the McBank; obtain the identifiers of at least two integration modules corresponding to the target McBank; then obtain information from at least one fault status register based on the identifiers; and finally, based on the obtained information, identify at least one integration module as a fault integration module, thereby obtaining the fault information of the fault integration module from the target McBank. This achieves in-band location of the fault integration module, high-precision fault source location, and reduced acquisition latency, making it more suitable for in-band fault diagnosis systems and also applicable to out-of-band fault diagnosis systems.

[0142] It should be noted that the aforementioned CPU901 and the aforementioned Figure 3b The CPU300 is similar, and details will not be elaborated here.

[0143] It should be noted that the electronic device can be the server in the aforementioned example, or a cluster server, a personal terminal, industrial equipment, or other computer equipment; no specific limitation is made here.

[0144] This application also provides a computer-readable storage medium including computer-readable instructions that, when executed on a computer, cause the computer to perform any of the implementations shown in the foregoing method embodiments.

[0145] The embodiment of the present application further provides a computer program product, which comprises a computer program or instructions, and when the computer program or instructions are run on a computer, the computer is caused to execute any one of the implementation manners of the foregoing method embodiments.

[0146] The present application further provides a chip or a chip system, which can comprise a processor. The chip can further comprise a memory (or a storage module) and / or a transceiver (or a communication module), or the chip is coupled with the memory (or the storage module) and / or the transceiver (or the communication module), wherein the transceiver (or the communication module) can be used to support the chip to perform wired and / or wireless communication, and the memory (or the storage module) can be used to store a program or a set of instructions, and the processor calling the program or the set of instructions can be used to implement the operations performed by the terminal or the network device in the method embodiments, any one of the possible implementation manners of the method embodiments. The chip system can comprise the above chip, or can comprise the above chip and other separate devices, such as the memory (or the storage module) and / or the transceiver (or the communication module).

[0147] In addition, it should be noted that the apparatus embodiments described above are merely schematic, and the units described as separate components can or can not be physically separated, and the components shown as units can or can not be physical units, that is, they can be located in one place, or can be distributed on multiple network units. According to actual needs, part or all of the modules can be selected to achieve the purpose of the embodiment. In addition, in the apparatus embodiment provided by the present application, the connection relationship between the modules indicates that there is a communication connection between them, which can be implemented as one or more communication buses or signal lines.

[0148] Those skilled in the art can clearly understand the application by the description of the above embodiments, and the application can be realized by means of software and necessary universal hardware, of course, can also be realized by special hardware including special integrated circuit, special CPU, special memory, special component and the like. Generally, the functions completed by computer program can be easily realized by corresponding hardware, and the specific hardware structure for realizing the same function can be various, for example, analog circuit, digital circuit or special circuit and the like. However, for the application, the software program implementation is a better embodiment. Based on such understanding, the technical scheme of the application or the part of contribution to the prior art can be embodied in the form of software product, which is stored in a readable storage medium, such as a floppy disk, a U disk, a mobile hard disk, a read only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk and the like, and includes a plurality of instructions for enabling a computer device (which can be a personal computer, a training device or a network device and the like) to execute the method of each embodiment of the application.

Claims

1. A method of obtaining fault information of a fault integration module, characterized in that, The method is applied to a processor, the processor comprising a processing unit and at least one fault status register, and the method comprises: receiving a fault indication, the fault indication being used to indicate that a fault occurs in an integrated module; determining a target machine check fault domain (McBank), an identity of the integrated module in which the fault occurs being located in the target McBank; obtaining identities of at least two integrated modules corresponding to the target McBank; obtaining information of the at least one fault status register according to the identities; determining at least one of the integrated modules as a fault integrated module according to the information of the fault status register; the information of the fault status register comprising a fault code; when a plurality of the fault integrated modules are determined, determining the fault information corresponding to each of the fault integrated modules according to the fault code, the fault information comprising at least one of a fault type, a fault time, or a fault content of the fault integrated module; the obtaining of the information of the at least one fault status register according to the identities comprises: obtaining the information of different addresses of a corresponding one of the fault status registers according to the identities of the at least two integrated modules respectively; or obtaining the information of at least two of the fault status registers corresponding to the at least two integrated modules according to the identities of the at least two integrated modules respectively.

2. The method of claim 1, wherein, The determining of the target McBank comprises: traversing each of the McBanks and determining the target McBank based on a value of a valid bit of each of the McBanks.

3. The method of claim 1, wherein, The method further comprises: sending the fault information and the identity of the fault integrated module to a fault diagnosis system, the fault diagnosis system being used to analyze and locate a fault and / or repair the fault based on the fault information and the identity of the fault integrated module.

4. The method of claim 3, wherein, The fault diagnosis system at least comprises an operating system (OS) and / or a basic management controller (BMC) system.

5. An electronic device, comprising: comprises: a memory, a BMC chip, and a processor used to execute the method according to any one of claims 1-4.

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