A display panel and a display device

Abstract

The present invention discloses a display panel and a display device. The display panel includes a first display area and a second display area, wherein the light transmittance of the first display area is greater than that of the second display area. The display panel also includes a substrate and at least one light adjustment layer located on one side of the substrate. The light adjustment layer includes a first dimming layer and a second dimming layer. The first dimming layer is located on a side of the second dimming layer away from the substrate, and the refractive index of the first dimming layer is greater than that of the second dimming layer. The technical solutions of the embodiments of the present invention can improve display uniformity while maintaining optical performance.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] In order to balance optical functions and full-screen display, existing display devices usually have a display panel including a normal display area and a photosensitive area. By adjusting the sub-pixel density of the photosensitive area, the light transmittance of the photosensitive area is made greater than the light transmittance of other normal display areas, so as to realize optical functions such as fingerprint recognition function and front camera function. At the same time, since the photosensitive area also has a display function, full-screen display can be realized.

[0003] Subpixels consist of light-emitting elements and pixel driver circuits that drive them. These circuits typically include thin-film transistors (TFTs), which are sensitive to light and prone to threshold voltage drift and other defects when exposed to light. Research has found that the light intensity experienced by TFTs in the photosensitive area differs significantly from that in the normal display area, leading to varying degrees of characteristic drift in TFTs in different areas, affecting display uniformity. Summary of the Invention

[0004] The present invention provides a display panel and a display device to improve display uniformity while taking into account optical functions.

[0005] In one aspect, an embodiment of the present invention provides a display panel, comprising a first display area and a second display area, wherein the light transmittance of the first display area is greater than the light transmittance of the second display area;

[0006] The display panel also includes:

[0007] substrate,

[0008] At least one light adjustment layer is located on one side of the substrate. The light adjustment layer includes a first light adjustment layer and a second light adjustment layer. The first light adjustment layer is located on a side of the second light adjustment layer away from the substrate, and the refractive index of the first light adjustment layer is greater than that of the second light adjustment layer.

[0009] On the other hand, an embodiment of the present invention provides a display device, including a photosensitive element and a display panel according to any embodiment of the present invention;

[0010] The photosensitive element is arranged corresponding to the first display area.

[0011] The technical solution of the embodiment of the present invention is to set at least one light adjustment layer on one side of the substrate, and set the light adjustment layer to include a first dimming layer with a higher refractive index and a second dimming layer with a lower refractive index, so that the first dimming layer is located on the side of the second dimming layer away from the substrate, thereby appropriately increasing the reflectivity of light at the interface between the first dimming layer and the second dimming layer, reducing the intensity of light incident on one side of the substrate, and then reducing the intensity of light reflected to the thin-film transistor, reducing the degree of characteristic drift of the thin-film transistor, improving display uniformity, and at the same time ensuring that the light adjustment layer has a certain light transmittance to meet the light transmittance requirements of the first display area, thereby achieving a balance between optical function and display effect.

[0012] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0014] Figure 1 A schematic structural diagram of an existing display device;

[0015] Figure 2 A schematic diagram of a top view of a display panel provided by an embodiment of the present invention;

[0016] Figure 3 It is along Figure 2 A schematic cross-sectional structure diagram of a display panel taken along line AA';

[0017] Figure 4 It is along Figure 2 A schematic cross-sectional structure diagram of another display panel taken along line AA';

[0018] Figure 5 This is a schematic diagram of a circuit principle of a sub-pixel in a display panel provided by an embodiment of the present invention;

[0019] Figure 6 is with Figure 5 A schematic diagram of a partial cross-sectional structure of a corresponding display panel;

[0020] Figure 7 is with Figure 5 Corresponding driving timing diagram of pixel driving circuit

[0021] Figure 8 is with Figure 5 A schematic diagram of a partial cross-sectional structure of another corresponding display panel;

[0022] Figure 9 This is another schematic diagram of a circuit principle of a sub-pixel in a display panel provided by an embodiment of the present invention;

[0023] Figure 10 is with Figure 9 A schematic diagram of a partial cross-sectional structure of a corresponding display panel;

[0024] Figure 11 is with Figure 9 The corresponding driving timing diagram of the pixel driving circuit;

[0025] Figure 12 is with Figure 9 A schematic diagram of a partial cross-sectional structure of another corresponding display panel;

[0026] Figure 13 It is a structural schematic diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0027] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0028] Display devices typically experience light propagation, such as ambient light entering and its refraction and reflection within the display device, as well as light emitted by the light-emitting elements in sub-pixels. Research has found that thin-film transistors (TFTs) in the photosensitive area and those in the normal display area experience different light intensities, leading to varying degrees of characteristic drift in TFTs in different areas, thus affecting display uniformity.

[0029] For example, Figure 1 It is a structural diagram of an existing display device, such as Figure 1As shown, the display device includes a display panel 01 and a photosensitive element 02. The display panel 01 includes a photosensitive area Q1 and a normal display area Q2. The photosensitive element 02 is arranged corresponding to the photosensitive area Q1. From bottom to top, the display panel 01 includes a support layer 011, a pixel circuit layer where the thin film transistor 012 is located, a light-emitting unit layer where the light-emitting element 013 is located, and a touch layer where the touch electrode 014 is located. The support layer 011 is provided with a light hole 0110 corresponding to the photosensitive area Q1 to ensure that the photosensitive element 02 receives light. Figure 1 In the optical path shown, some of the light emitted by light-emitting element 013 is reflected by structures such as touch electrode 014 and propagates toward the support layer 011. In the photosensitive region Q1, due to the low refractive index of air, the refractive index difference between air and the film layer above the support layer 011 is significant. This causes most of the light to be reflected at the interface between the two and strike the thin-film transistor 012 in the photosensitive region Q1. A small portion of the light may also be reflected again after striking the photosensitive element 02, entering the interior of the display panel 01 and striking the thin-film transistor 012 in the photosensitive region Q1. Therefore, the thin-film transistor 012 in the photosensitive region Q1 is exposed to a higher intensity of light. In the normal display region Q2, due to the higher refractive index of the support layer 011 relative to air, the refractive index difference between the support layer 011 and the film layer above it is relatively small. Therefore, most of the light passes through the support layer 011 and exits the display panel, while only a small portion of the light is reflected and strikes the thin-film transistor 012 in the normal display region Q2. Therefore, the thin-film transistor 012 in the normal display region Q2 is exposed to a lower intensity of light. Since the light intensity received by the thin film transistors in the photosensitive area Q1 is greater than the light intensity received by the thin film transistors in the normal display area Q2, the characteristic drift of the thin film transistors in the photosensitive area Q1 is more serious, resulting in white spots, black spots and other phenomena in the photosensitive area Q1, affecting display uniformity.

[0030] Related technologies employ a light-shielding layer between the light-emitting element 013 and the support layer 011 to reduce the intensity of light reaching the support layer 011 and thereby reduce the intensity of light reflected onto the thin-film transistor 012. However, this solution requires at least one additional mask and one additional process step, which is time-consuming and costly. Furthermore, it can significantly reduce the light transmittance of the photosensitive area Q1, affecting optical functions such as fingerprint recognition and video recording.

[0031] To solve the above problems, an embodiment of the present invention provides a display panel, which includes a first display area and a second display area, and the light transmittance of the first display area is greater than the light transmittance of the second display area; the display panel also includes a substrate and at least one light adjustment layer located on one side of the substrate, the light adjustment layer includes a first dimming layer and a second dimming layer, the first dimming layer is located on the side of the second dimming layer away from the substrate, and the refractive index of the first dimming layer is greater than the refractive index of the second dimming layer.

[0032] By adopting the above scheme, since the first dimming layer is located on the side of the second dimming layer away from the substrate, and the refractive index of the first dimming layer is greater than the refractive index of the second dimming layer, the reflectivity of light at the interface between the first dimming layer and the second dimming layer can be appropriately increased, and the intensity of light incident on the substrate side can be reduced, thereby reducing the intensity of light reflected to the thin film transistor, reducing the degree of characteristic drift of the thin film transistor, and improving display uniformity. At the same time, it can also ensure that the light adjustment layer has a certain light transmittance, meet the light transmittance requirements of the first display area, and achieve a balance between optical function and display effect.

[0033] The above is the core concept of this application. Based on the embodiments of this application, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of this application. The following will clearly and completely describe the technical solutions in the embodiments of this application in conjunction with the accompanying drawings.

[0034] Figure 2 is a schematic diagram of a top view of a display panel provided by an embodiment of the present invention, Figure 3 It is along Figure 2 The cross-sectional structure diagram of the display panel taken at AA', combined with Figure 2 and Figure 3 As shown, the display panel 100 includes a first display area S1 and a second display area S2, the light transmittance of the first display area S1 is greater than the light transmittance of the second display area S2, the display panel 100 also includes a substrate 1 and at least one light adjustment layer 2 located on one side of the substrate 1, the light adjustment layer 2 includes a first dimming layer 21 and a second dimming layer 22, the first dimming layer 21 is located on the side of the second dimming layer 22 away from the substrate 1, and the refractive index of the first dimming layer 21 is greater than the refractive index of the second dimming layer 22.

[0035] In this embodiment, both the first display area S1 and the second display area S2 include sub-pixels, and the light transmittance of the first display area S1 is greater than that of the second display area S2. This allows the first display area S1 to be used for both display, achieving full-screen display, and optical functions, such as fingerprint recognition or front-facing camera functions. Accordingly, the first display area S1 can be selected as a camera area or a fingerprint recognition area.

[0036] Optionally, the light transmittance of the first display area S1 can be made greater than the light transmittance of the second display area S2 by reducing the density of the sub-pixels in the first display area S1. Specifically, the sub-pixel size of the first display area S1 can be set equal to the size of the corresponding sub-pixel in the second display area S2, and the light transmittance of the first display area S1 can be increased by reducing the number of sub-pixels per unit area. In other embodiments, the number of sub-pixels per unit area of the first display area S1 and the second display area S2 can be set equal, and the light transmittance of the first display area S1 can be increased by reducing the size of the sub-pixels. Of course, the above embodiments are only examples, and those skilled in the art can adopt any other known methods to achieve that the light transmittance of the first display area S1 is greater than the light transmittance of the second display area S2, and the embodiments of the present invention are not particularly limited to this.

[0037] It should be noted that Figure 2 The relative positional relationship between the first display area S1 and the second display area S2 is only illustrative and not limiting. Those skilled in the art can set the size and position of the first display area S1 according to the actual requirements of the optical function to be achieved by the first display area S1, and the embodiments of the present invention are not limited to this.

[0038] like Figure 3 As shown, in this embodiment, a light adjustment layer 2 is provided on one side of the substrate 1. The light adjustment layer 2 includes a first light adjustment layer 21 and a second light adjustment layer 22. The first light adjustment layer 21 is located on the side of the second light adjustment layer 22 away from the substrate 1, and the refractive index of the first light adjustment layer 21 is greater than the refractive index of the second light adjustment layer 22. Assuming that the refractive index of the first light adjustment layer 21 is n1 and the refractive index of the second light adjustment layer 22 is n2, according to the reflectivity formula, the reflectivity at the interface between the first light adjustment layer 21 and the second light adjustment layer 22 is R = [(n1-n2) / (n1+n2)] 2 According to this formula, by adjusting the refractive index difference between the first dimming layer 21 and the second dimming layer 22, the reflectivity of the light at the interface between the first dimming layer 21 and the second dimming layer 22 can be adjusted. In this way, the refractive index difference between the first dimming layer 21 and the second dimming layer 22 can be reasonably set according to the actual reflectivity and transmittance requirements, so as to increase the reflectivity of the light at the interface between the first dimming layer 21 and the second dimming layer 22 while ensuring that the light adjustment layer 2 has a certain light transmittance, thereby reducing the light intensity incident on the thin film transistor, reducing the degree of characteristic drift of the thin film transistor, improving display uniformity, and at the same time ensuring the light transmittance requirement of the first display area S1, taking into account both display effect and optical function.

[0039] Optionally, the light adjustment layer 2 is located on the first side of the thin-film transistor, away from the substrate 1. The first side of the thin-film transistor can be understood as the side of the thin-film transistor closest to the substrate 1. This arrangement prevents light from being reflected from the light adjustment layer 2 onto the thin-film transistor, further reducing the intensity of light incident on the thin-film transistor, lowering the degree of characteristic drift of the thin-film transistor, and improving display uniformity.

[0040] It should be noted that Figure 3 The display panel 100 includes only one light adjustment layer 2, which is not intended to be limiting. In other embodiments, the display panel 100 may optionally include multiple light adjustment layers 2. In this manner, the multiple light adjustment layers 2 can further increase the reflectivity of light incident on one side of the substrate 1, thereby further reducing the intensity of light incident on the substrate 1. This in turn reduces the intensity of light incident on the thin-film transistors, reduces the degree of characteristic drift of the thin-film transistors, and improves display uniformity.

[0041] It should be noted that the first dimming layer 21 and the second dimming layer 22 can be made of any material with a required refractive index difference known to those skilled in the art, and the embodiment of the present invention is not limited thereto.

[0042] In summary, the embodiments of the present invention provide at least one light adjustment layer on one side of the substrate, and provide the light adjustment layer to include a first dimming layer with a higher refractive index and a second dimming layer with a lower refractive index, so that the first dimming layer is located on the side of the second dimming layer away from the substrate, thereby appropriately increasing the reflectivity of light at the interface between the first dimming layer and the second dimming layer, reducing the intensity of light incident on one side of the substrate, and further reducing the intensity of light reflected to the thin film transistor, reducing the degree of characteristic drift of the thin film transistor, and improving display uniformity. At the same time, it can also ensure that the light adjustment layer has a certain light transmittance, meet the light transmittance requirements of the first display area, and achieve a balance between optical function and display effect.

[0043] Based on the above embodiments, Figure 4 It is along Figure 2 A schematic diagram of the cross-sectional structure of another display panel taken at section AA' is shown in FIG. Figure 4 As shown, optionally, the first dimming layer 21 includes a first dimming division 211 located in the first display area S1 and a third dimming division 213 located in the second display area S2, the second dimming layer 22 includes a second dimming division 222 located in the first display area S1 and a fourth dimming division 224 located in the second display area S2, and the refractive index difference between the first dimming division 211 and the second dimming division 222 is greater than the refractive index difference between the third dimming division 213 and the fourth dimming division 224.

[0044] In the above embodiment, by setting the refractive index of the first dimming layer 21 on the side away from the substrate 1 to be greater than the refractive index of the second dimming layer 22 on the side close to the substrate 1, the intensity of light reaching the side of the substrate 1 can be reduced, thereby reducing the intensity of light reaching the thin film transistor, reducing the degree of characteristic deviation of the thin film transistor, and improving the display uniformity to a certain extent (due to the small degree of characteristic deviation of the thin film transistor, the display difference between the first display area S1 and the second display area S2 is not easily recognized by the human eye). Furthermore, in this embodiment, the first dimming layer 21 is divided into a first dimming section 211 in the first display area S1 and a third dimming section 213 in the second display area S2, and the second dimming layer 22 is divided into a second dimming section 222 in the first display area S1 and a fourth dimming section 224 in the second display area S2. By setting the refractive index difference between the first dimming section 211 and the second dimming section 222 to be greater than the refractive index difference between the third dimming section 213 and the fourth dimming section 224, the reflectivity of light at the interface between the first dimming section 211 and the second dimming section 222 can be greater than the reflectivity of light at the interface between the third dimming section 213 and the fourth dimming section 224, thereby further reducing the light intensity irradiated to the thin film transistors in the first display area S1, further reducing the difference in the degree of characteristic offset between the thin film transistors in the first display area S1 and the thin film transistors in the second display area S2, and further improving display uniformity.

[0045] Of course, it should be noted that, under the premise that the light transmittance meets the requirements, the refractive index of the first dimming layer 21 in each area can be set to be equal, and the refractive index of the second refractive index layer in each area can be set to be equal. By appropriately increasing the refractive index difference between the first dimming layer 21 and the second dimming layer 22, the display uniformity can be improved. With such a setting, the process implementation difficulty is relatively lower.

[0046] like Figure 3 or Figure 4 As shown, optionally, the display panel 100 further includes a light-emitting unit layer (such as the film layer where the light-emitting element 3 is located) and a touch layer (such as the film layer where the touch electrode 101 is located) located on the side of the light adjustment layer 2 away from the substrate 1; the light-emitting unit layer includes a plurality of light-emitting elements 3, and the touch layer includes a plurality of touch electrodes 101, the orthographic projection of the touch electrode 101 on the substrate 1 does not overlap with the orthographic projection of the light-emitting element 3 on the substrate 1, and the touch electrode 101 is not light-transmitting.

[0047] By providing a touch layer in the display panel and cooperating with corresponding peripheral circuits, the display device can be provided with a touch function, thereby improving the intelligence of the display device. The touch electrode 101 in the touch layer can be designed according to a specific touch mode (such as self-capacitive touch and mutual-capacitive touch), which is not limited in the embodiment of the present invention. Since the touch electrode 101 is opaque and the touch layer is located on the side of the light-emitting unit layer away from the substrate 1, part of the light emitted by the light-emitting element 3 may be reflected by the touch electrode 101 and directed toward the side of the substrate 1. By providing the above-mentioned light adjustment layer 2, the present embodiment can reduce the intensity of light irradiated to one side of the substrate 1, thereby reducing the intensity of light reflected to the thin film transistor and improving display uniformity.

[0048] like Figure 3 As shown, optionally, the display panel 100 further includes a support layer 5 located on the side of the substrate 1 away from the light adjustment layer 2; the support layer 5 includes a light hole 501, and the orthographic projection of the light hole 501 on the substrate 1 overlaps with the orthographic projection of the first display area S1 on the substrate 1. The support layer 5 is located on the side of the substrate 1 away from the light adjustment layer 2, and mainly plays the role of heat dissipation and interference shielding. By providing the light hole 501 in the support layer 5 corresponding to the first display area S1, the light intensity loss of the first display area S1 can be reduced, ensuring the normal operation of the optical function. Exemplarily, the support layer 5 can be made of composite foam, which can be composed of materials such as copper foil, optical adhesive (OCA), graphite and foam.

[0049] Based on the above embodiment, the configuration of the light adjustment layer 2 is further explained below.

[0050] Optionally, the first dimming layer 21 and the second dimming layer 22 are inorganic insulating layers. The insulating layer includes an inorganic insulating layer and an organic insulating layer. In the preparation process of the display panel, most panel manufacturers need a special supplier to provide finished products for the organic insulating layer used in the preparation of the display panel. In this way, in order to adjust the refractive index of the organic insulating layer, it is necessary to provide the refractive index requirements to the supplier, and the supplier will design the corresponding organic insulating layer, which increases the design difficulty and increases the cost. In contrast, the inorganic insulating layer can be independently prepared by physical vapor deposition and other methods, and the refractive index of the inorganic insulating layer can be adjusted by adjusting the gas flux or the ratio of the gas during the preparation process. Therefore, the use of inorganic insulating layers to prepare the first dimming layer and the second dimming layer can make the process simpler and lower the cost.

[0051] Optionally, the material of the first dimming layer 21 is silicon nitride, and the material of the second dimming layer 22 is silicon oxide. The refractive index of silicon nitride is greater than that of silicon oxide. Therefore, using silicon nitride and silicon oxide as the materials for the first dimming layer 21 and the second dimming layer 22, respectively, can make it easier to control the refractive index of the first dimming layer 21 and the second dimming layer 22, further reducing the difficulty of the process. In addition, silicon nitride and silicon oxide are commonly used inorganic insulating layers in display panels. Therefore, using silicon nitride and silicon oxide as the materials for the first dimming layer 21 and the second dimming layer 22, respectively, can make the first dimming layer 21 and the second dimming layer 22 more compatible with the original internal structure of the display panel.

[0052] Reference Figure 3 As shown, the display panel 100 also includes a pixel circuit layer (such as the film layer where the pixel driving circuit 4 is located) and a light-emitting unit layer (such as the film layer where the light-emitting element 3 is located), and the pixel circuit layer is located between the substrate 1 and the light-emitting unit layer; the pixel circuit layer includes a pixel driving circuit 4, the light-emitting unit layer includes a light-emitting element 3, and the pixel driving circuit 4 is used to drive the light-emitting element 3 to emit light; the pixel circuit layer and the light-emitting unit layer each include at least one insulating layer, and optionally, along a direction perpendicular to the plane where the substrate 1 is located, two adjacent insulating layers are respectively multiplexed as a first dimming layer 21 and a second dimming layer 22.

[0053] By reusing two existing adjacent insulating layers as the first dimming layer 21 and the second dimming layer 22, respectively, the number of additional film layers in the display panel can be avoided, facilitating a thinner design for the display panel. Furthermore, by reusing the insulating layers as the first dimming layer 21 and the second dimming layer 22, the reflectivity of the light adjustment layer 2 to light incident on the substrate 1 can be adjusted by adjusting the refractive index of the insulating layers, thereby reducing the degree of characteristic deviation of the thin-film transistors and improving display uniformity. Compared to reusing the film layer containing the circuit elements in the display panel as the first dimming layer 21 or the second dimming layer 22, this approach does not require changing parameters such as the composition of the film layer containing the circuit elements, thereby avoiding affecting the characteristics of the circuit elements within the display panel.

[0054] It is understandable that different pixel driving circuits 4 correspond to different specific film structures of the display panel. The following is an exemplary description of the configuration of the light adjustment layer 2 in conjunction with a specific pixel driving circuit 4.

[0055] As a feasible implementation method, Figure 5 1 is a schematic diagram of a circuit principle of a sub-pixel in a display panel provided by an embodiment of the present invention. Figure 6 is with Figure 5 A schematic diagram of a partial cross-sectional structure of a corresponding display panel, such as Figure 5 and Figure 6As shown, optionally, the pixel driving circuit 4 includes at least two thin film transistors (such as T1 to T6), and each of the thin film transistors includes a polysilicon active layer (70).

[0056] Taking an organic light-emitting diode display panel as an example, the light-emitting element 3 is an organic light-emitting diode, and its pixel driving circuit is usually composed of several thin-film transistors (TFTs) and storage capacitors (Cst). Currently, the commonly used pixel driving circuits include 7T1C (i.e., 7 thin-film transistors and 1 storage capacitor) pixel driving circuits. Figure 5 That is, it shows a 7T1C pixel driving circuit and its electrical connection relationship with the light emitting element 3.

[0057] It is understandable that when the types of thin film transistors in the pixel driving circuit 4 are different, the film layer structure of the display panel will also be different. Figure 5 As shown, in this embodiment, the thin film transistors are of the same type and include a polysilicon active layer. In this case, the same structure of each thin film transistor is located on the same film layer. Figure 6 The cross-sectional structure of one thin film transistor T6 is used as an example for illustration. For example, each thin film transistor may be a low temperature polysilicon (LTPS) transistor, which has the advantages of high switching speed, high carrier mobility, and low power consumption, and is conducive to reducing the power consumption of the pixel driving circuit 4 and shortening the response time of the pixel driving circuit 4.

[0058] Figure 7 is with Figure 5 The corresponding pixel driving circuit driving timing diagram, the following is combined with Figure 5 and Figure 7 The driving process of the pixel driving circuit 4 is described. Figure 5 and Figure 7As shown, the driving process of the pixel driving circuit 4 includes an initialization phase t1, a data writing phase t2 and a light emitting phase t3. Specifically, in the initialization phase t1, the initialization transistor T2 is turned on under the control of the first scanning control signal sent by the first scanning control signal terminal Scan1, so that the initialization signal of the initialization signal terminal Vref is written into the gate of the driving transistor T1, and the gate of the driving crystal transistor is initialized. In the data writing phase t2, the data writing transistor T3 and the threshold compensation transistor T4 are turned on under the control of the second scanning control signal sent by the second scanning control signal terminal Scan2, and at the same time, the driving transistor T1 is turned on because the gate-source voltage meets the turn-on condition, so that the data writing transistor T3 writes the data signal of the data signal terminal into the gate of the driving transistor T1, and at the same time, the threshold compensation transistor T4 writes the threshold voltage compensation value of the driving transistor T1 into the gate of the driving transistor T1. In addition, in the data writing phase t2, the reset transistor T7 can be turned on under the control of the second scanning control signal sent by the second scanning control signal terminal Scan2, and the initialization signal of the initialization signal terminal Vref is written into the anode of the organic light emitting diode (3), and the anode voltage of the organic light emitting diode is reset. In the light-emitting stage t3, the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are turned on under the control of the light-emitting control signal of the light-emitting control signal terminal Emit. Since the storage capacitor Cst stores the gate potential of the driving transistor T1, the driving transistor T1 generates a driving current based on the gate potential and the potential of the first power signal terminal PVDD, thereby driving the organic light-emitting diode to emit light. Figure 5 PVEE is a second power signal terminal, and the potential of the second power signal terminal is lower than the potential of the first power signal terminal.

[0059] like Figure 6 As shown, when all thin film transistors include polysilicon active layers, along the direction from substrate 1 to light-emitting element 3, the display panel includes a gate insulating layer 61, a first interlayer insulating layer 62, a second interlayer insulating layer 63, a protective insulating layer 64, a first planarization layer 65, a second planarization layer 66, and a pixel defining layer 67, which are sequentially arranged on one side of substrate 1. Optionally, the first dimming layer 21 and the second dimming layer 22 reuse two adjacent ones of the gate insulating layer 61, the first interlayer insulating layer 62, the second interlayer insulating layer 63, the protective insulating layer 64, the first planarization layer 65, the second planarization layer 66, and the pixel defining layer 67. This configuration avoids adding additional film layers to the display panel, which is beneficial for the thinning design of the display panel.

[0060] Continue to see Figure 6The display panel further includes a first metal layer 71, a capacitor plate layer 72, a second metal layer 73, a third metal layer 74 and an anode metal layer 75 located on one side of the substrate 1; the specific positions of the above-mentioned insulating layers are as follows: the gate insulating layer 61 is located between the polysilicon active layer (70) and the first metal layer 71; the first interlayer insulating layer 62 is located between the first metal layer 71 and the capacitor plate layer 72; the second interlayer insulating layer 63 is located between the capacitor plate layer 72 and the second metal layer 73; the protective insulating layer 64 and the first planarizing layer 65 are both located between the second metal layer 73 and the third metal layer 74; the second planarizing layer 66 is located between the third metal layer 74 and the anode metal layer 75; and the pixel defining layer 67 is located on the side of the anode metal layer 75 away from the substrate 1. Specifically, as Figure 6 As shown, in this embodiment, the first metal layer 71 can form the gate of the thin film transistor (such as T6) and the lower plate of the storage capacitor Cst; the capacitor plate layer 72 can form the upper plate of the storage capacitor Cst; the second metal layer 73 can form the source and drain of the thin film transistor (such as T6), and the source and drain of the thin film transistor are in contact with the polysilicon active layer (70) through the via hole; the anode metal layer 75 can form the anode of the light emitting element 3; and the third metal layer 74 can form the connection structure between the anode and the thin film transistor.

[0061] Among the above-mentioned insulating layers, the gate insulating layer 61, the first interlayer insulating layer 62, the second interlayer insulating layer 63, and the protective insulating layer 64 are generally inorganic insulating layers, and the first planarizing layer 65, the second planarizing layer 66, and the pixel defining layer 67 are generally organic insulating layers. As can be seen from the above description, the inorganic insulating layers, i.e., the gate insulating layer 61, the first interlayer insulating layer 62, the second interlayer insulating layer 63, and the protective insulating layer 64, can be selected to be multiplexed as the first dimming layer 21 and the second dimming layer 22, thereby reducing costs and process difficulty. Of course, an organic insulating layer can also be selected to be multiplexed as the first dimming layer 21 or the second dimming layer 22, and this is not limited in the embodiment of the present invention.

[0062] In a specific embodiment, considering factors such as the bonding between film layers and the refractive index, the inorganic insulating layer can be prepared using a mixture of silicon oxide and silicon nitride. That is, the inorganic insulating layer includes both silicon oxide and silicon nitride. The presence of silicon oxide helps ensure the bonding between adjacent film layers, while the presence of silicon nitride helps adjust the refractive index of the film layer. Specifically, the refractive index of the film layer can be adjusted by adjusting the composition ratio of silicon oxide and silicon nitride in the film layer. The higher the proportion of silicon nitride in the film layer, the greater the refractive index of the film layer, and the greater the proportion of silicon oxide in the film layer, the lower the refractive index of the film layer.

[0063] Figure 8 is with Figure 5 A corresponding schematic diagram of a partial cross-sectional structure of another display panel is shown in FIG. Figure 8As shown, optionally, the second interlayer insulating layer 63 includes a first sub-interlayer insulating layer 631, and the first sub-interlayer insulating layer 631 is adjacent to the protective insulating layer 64; the protective insulating layer 64 is multiplexed as the first dimming layer 21, and the first sub-interlayer insulating layer 631 is multiplexed as the second dimming layer 22; and / or, the first interlayer insulating layer 62 is multiplexed as the first dimming layer 21, and the gate insulating layer 61 is multiplexed as the second dimming layer 22.

[0064] Specifically, considering the bonding properties between the film layers and the refractive index and other factors, it is possible to select the above-mentioned inorganic insulating layers to have a higher proportion of silicon oxide in the gate insulating layer 61, a higher proportion of silicon nitride in the first interlayer insulating layer 62, a higher proportion of silicon oxide in the first sub-interlayer insulating layer 631, and a higher proportion of silicon nitride in the protective insulating layer 64. In this way, in the adjacent insulating layers, the refractive index of the protective insulating layer 64 can be greater than the refractive index of the first sub-interlayer insulating layer 631, and the refractive index of the first interlayer insulating layer 62 can be greater than the refractive index of the gate insulating layer 61. Thus, the protective insulating layer 64 and the first sub-interlayer insulating layer 631 can be reused as the first dimming layer 21 and the second dimming layer 22, respectively, to form a light adjustment layer 2. Alternatively, the first interlayer insulating layer 62 and the gate insulating layer 61 can be reused as the first dimming layer 21 and the second dimming layer 22, respectively, to form a light adjustment layer 2, so that the display panel includes one or two light adjustment layers 2, such as Figure 8 The light adjustment layer 2-1 and the light adjustment layer 2-2 in the light adjustment layer 2 are shown in FIG. Those skilled in the art can select at least one of the light adjustment layers 2 as needed and reasonably set the refractive indexes of the first light adjustment layer 21 and the second light adjustment layer 22 in the light adjustment layer 2 to reduce the intensity of light incident on one side of the substrate 1, thereby reducing the intensity of light reflected to the thin film transistor and improving display uniformity.

[0065] For example, Table 1 shows the refractive index of inorganic insulating layers provided by embodiments of the present invention. As shown in Table 1, the second column of data shows the refractive index values of each insulating layer in a reference embodiment (hereinafter referred to as the reference refractive index values) and the corresponding reflectivity of this embodiment. In this case, the reflectivity of the light adjustment layer 2 is 38.61%. The third column of data shows one of the possible implementations of the present application. Compared to the reference refractive index values of each insulating layer, this implementation increases the refractive index of the protective insulating layer 64 and decreases the refractive index of the first interlayer insulating layer 631, resulting in an increase in the reflectivity of the light adjustment layer 2 to 44.10%. This can, to a certain extent, reduce the intensity of light incident on one side of the substrate 1, thereby reducing the intensity of light reflected onto the thin-film transistor, reducing the degree of characteristic deviation of the thin-film transistor, and improving display uniformity. The fourth column of data shows a second possible implementation of the present application. Compared to the reference refractive index values of each insulating layer, this implementation increases the refractive index of the first interlayer insulating layer 62 and decreases the refractive index of the gate insulating layer 61, resulting in an increase in the reflectivity of the light adjustment layer 2 to 46.00%. The fifth column of data illustrates a third possible implementation of this application. Compared to the reference refractive index values for each insulating layer, this implementation increases the refractive index of the protective insulating layer 64 and decreases the refractive index of the first interlayer insulating layer 631. Furthermore, the refractive index of the first interlayer insulating layer 62 is increased and the refractive index of the gate insulating layer 61 is decreased. This results in a light reflectivity increase of 48.9% for the light adjustment layer 2, further reducing the intensity of light incident on the substrate 1 and improving display uniformity. This demonstrates that increasing the refractive index difference between the first and second dimming layers increases the reflectivity of the light adjustment layer, and the greater the number of light adjustment layers, the greater the reflectivity, further reducing the intensity of light incident on the substrate.

[0066] Table 1 Examples of refractive index of inorganic insulating layers

[0067] Refractive index Reference Examples Implementation Method 1 Implementation Method 2 Implementation 3 Protective insulation layer 1.948 1.958 1.948 1.958 First inter-sublayer insulating layer 1.471 1.461 1.471 1.461 First interlayer insulating layer 1.948 1.948 1.958 1.958 Gate insulation layer 1.471 1.471 1.461 1.461 Reflectivity 38.61％ 44.10％ 46.00％ 48.90％

[0068] Continue to see Figure 8 Optionally, the second interlayer insulating layer 63 further includes a second sub-interlayer insulating layer 632. The second sub-interlayer insulating layer 632 is located on a side of the first sub-interlayer insulating layer 631 closer to the substrate 1. The refractive index of the second sub-interlayer insulating layer 632 is greater than the refractive index of the first sub-interlayer insulating layer 631. Taking into account factors such as the bonding between the film layers and the refractive index, the proportion of silicon nitride in the second sub-interlayer insulating layer 632 may be higher.

[0069] As another possible implementation, Figure 9 is another schematic diagram of a circuit principle of a sub-pixel in a display panel provided by an embodiment of the present invention. Figure 10 is with Figure 9A schematic diagram of a partial cross-sectional structure of a corresponding display panel, such as Figure 9 and Figure 10 As shown, optionally, the pixel driving circuit 4 includes a first type of thin film transistor (such as T6) and a second type of thin film transistor (such as T2), the first type of thin film transistor includes a polysilicon active layer 901, and the second type of thin film transistor includes an oxide semiconductor active layer 902.

[0070] Figure 9 The pixel driving circuit 4 shown is still a 7T1C pixel driving circuit. Figure 9 and Figure 5 The difference is that Figure 9 The pixel driving circuit 4 shown includes two different types of thin film transistors, wherein the driving transistor T1, the data writing transistor T3, the first light emission control transistor T5, the second light emission control transistor T6 and the reset transistor T7 are first-type thin film transistors, which include a polysilicon active layer 901, and the initialization transistor T2 and the threshold compensation transistor T4 are second-type thin film transistors, which include an oxide semiconductor active layer 902. Figure 10 The cross-sectional structures of the two types of thin film transistors are illustrated by taking the second light emitting control transistor T6 and the initialization transistor T2 as examples. In this embodiment, by configuring the pixel driving circuit 4 to include two types of thin film transistors, the different advantages of the two thin film transistors can be fully utilized to ensure the excellent performance of the pixel driving circuit 4.

[0071] For example, Figure 10 As shown, the first type of thin film transistor (such as T6) includes a polysilicon active layer 901. For example, the first type of thin film transistor can be a low temperature polysilicon (LTPS) transistor. This type of transistor has the advantages of high switching speed, high carrier mobility and low power consumption. The second type of thin film transistor (such as T2) includes an oxide semiconductor active layer 902. For example, the second type of thin film transistor can be an indium gallium zinc oxide (IGZO) transistor. This type of transistor has the advantages of simple preparation process and low leakage. In the embodiment of the present invention, by setting the pixel driving circuit 4 to include both the first type of thin film transistor and the second type of thin film transistor, a low temperature polycrystalline oxide (LTPO) circuit can be formed, which gives full play to the advantages of different transistors and ensures that the pixel driving circuit has excellent performance and high driving efficiency.

[0072] Specifically, by setting the driving transistor T1, the data writing transistor T3, the first light-emitting control transistor T5, the second light-emitting control transistor T6 and the reset transistor T7 as first-type thin-film transistors, such as LTPS transistors, the power consumption of the pixel driving circuit 4 can be reduced and the response time of the pixel driving circuit 4 can be shortened; by setting the initialization transistor T2 and the threshold compensation transistor T4 as second-type thin-film transistors, such as IGZO transistors, the leakage current of the initialization transistor T2 and the threshold compensation transistor T4 can be reduced, thereby reducing the influence of the leakage current of the initialization transistor T2 and the threshold compensation transistor T4 on the gate potential of the driving transistor T1, and further optimizing the performance of the pixel driving circuit 4.

[0073] Figure 11 is with Figure 9 The corresponding pixel driving circuit driving timing diagram, combined with Figure 9 and Figure 11 As shown, Figure 9 The driving process of the pixel driving circuit shown is similar to Figure 5 The difference between the driving process of the pixel driving circuit shown in FIG2 is that the enable levels of the initialization transistor T2 and the threshold compensation transistor T4 are changed to a high level. Since the data writing transistor T3 and the threshold compensation transistor T4 are of different types, the threshold compensation transistor T4 needs to be turned on under the control of the third scanning control signal sent by the third scanning control signal terminal Scan3 during the data writing phase t2. The rest of the similarities can be referred to FIG2. Figure 5 and Figure 6 The relevant content is understood and will not be elaborated here.

[0074] like Figure 10 As shown, when the pixel driving circuit 4 includes two types of thin film transistors, along the direction from the substrate 1 to the light-emitting element 3, the display panel includes a first gate insulating layer 81, a first interlayer insulating layer 82, a second gate insulating layer 83, a third gate insulating layer 84, a second interlayer insulating layer 85, a protective insulating layer 86, a first planarization layer 87, a second planarization layer 88, and a pixel defining layer 89, which are sequentially arranged on one side of the substrate 1. Optionally, the first dimming layer 21 and the second dimming layer 22 respectively reuse two adjacent ones of the first gate insulating layer 81, the first interlayer insulating layer 82, the second gate insulating layer 83, the third gate insulating layer 84, the second interlayer insulating layer 85, the protective insulating layer 86, the first planarization layer 87, the second planarization layer 88, and the pixel defining layer 89. This configuration can avoid adding additional film layers to the display panel, which is conducive to the thin design of the display panel.

[0075] Continue to see Figure 10The display panel also includes a first metal layer 91, a capacitor plate layer 92, a top gate metal layer 93, a second metal layer 94, a third metal layer 95 and an anode metal layer 96; a first gate insulating layer 81 is located between the polysilicon active layer 901 and the first metal layer 91; a first interlayer insulating layer 82 is located between the first metal layer 91 and the capacitor plate layer 92; a second gate insulating layer 83 is located between the capacitor plate layer 92 and the oxide semiconductor active layer 902; a third gate insulating layer 84 is located between the oxide semiconductor active layer 902 and the top gate metal layer 93; a second interlayer insulating layer 85 is located between the top gate metal layer 93 and the second metal layer 94; a protective insulating layer 86 and a first planarizing layer 87 are both located between the second metal layer 94 and the third metal layer 95; a second planarizing layer 88 is located between the third metal layer 95 and the anode metal layer 96; and a pixel defining layer 89 is located on the side of the anode metal layer 96 away from the substrate 1.

[0076] Specifically, such as Figure 10 As shown, the first metal layer 91 can form the gate of the first type of thin film transistor (such as T6). Figure 10 In the figure, the gate of the first type of thin film transistor can be reused as the lower plate of the storage capacitor Cst; the capacitor plate layer 92 can form the upper plate of the storage capacitor Cst and the bottom gate of the second type of thin film transistor (such as T2); the top gate metal layer 93 can form the top gate of the second type of thin film transistor, forming a dual-gate thin film transistor; the anode metal layer 96 can form the anode of the light-emitting element 3; the third metal layer 95 can form a connection structure between the anode and the thin film transistor.

[0077] It should be noted that, for the sake of distinction, Figure 10 ( Figure 12 )and Figure 6 ( Figure 8 ) Different figure marks are used to identify the insulating layer and metal layer in the corresponding embodiments.

[0078] Among the above-mentioned insulating layers, the first gate insulating layer 81, the first interlayer insulating layer 82, the second gate insulating layer 83, the third gate insulating layer 84, the second interlayer insulating layer 85, and the protective insulating layer 86 are inorganic insulating layers, and the first planarization layer 87, the second planarization layer 88, and the pixel defining layer 89 are organic insulating layers. Alternatively, two adjacent inorganic insulating layers among the first gate insulating layer 81, the first interlayer insulating layer 82, the second gate insulating layer 83, the third gate insulating layer 84, the second interlayer insulating layer 85, and the protective insulating layer 86 can be reused as the first dimming layer 21 and the second dimming layer 22, thereby reducing costs and process difficulty.

[0079] Taking into account factors such as the bonding between film layers and the refractive index, the inorganic insulating layer can be prepared using a mixture of silicon oxide and silicon nitride, that is, the inorganic insulating layer includes both silicon oxide and silicon nitride. Figure 12 is with Figure 9 A corresponding schematic diagram of a partial cross-sectional structure of another display panel is shown in FIG. Figure 9 As shown, the proportion of silicon oxide in the optional first gate insulating layer 81 is higher; the proportion of silicon nitride in the first interlayer insulating layer 82 is higher; the proportion of silicon oxide in the second gate insulating layer 83 is higher; the proportion of silicon oxide in the third gate insulating layer 84 is higher; the second interlayer insulating layer 85 includes a first sub-interlayer insulating layer 851 and a second sub-interlayer insulating layer 852 arranged in a stacked manner, the first sub-interlayer insulating layer 851 is adjacent to the protective insulating layer 86, and the second sub-interlayer insulating layer 852 is adjacent to the third gate insulating layer 84, the refractive index of the first sub-interlayer insulating layer 851 is smaller than the refractive index of the second sub-interlayer insulating layer 852, for example, the proportion of silicon nitride in the second sub-interlayer insulating layer 852 is higher, the proportion of silicon oxide in the first sub-interlayer insulating layer 851 is higher; the proportion of silicon nitride in the protective insulating layer 86 is higher.

[0080] Accordingly, see Figure 12 Optionally, the protective insulating layer 86 is multiplexed into the first dimming layer 21, and the first interlayer insulating layer 851 is multiplexed into the second dimming layer 22; and / or, the second interlayer insulating layer 852 is multiplexed into the first dimming layer 21, and the third gate insulating layer 84 is multiplexed into the second dimming layer 22; and / or, the first interlayer insulating layer 82 is multiplexed into the first dimming layer 21, and the first gate insulating layer 81 is multiplexed into the second dimming layer 22. In this way, the display panel may include one to three light adjustment layers 2, such as Figure 12 The light adjustment layers 2-1, 2-2, and 2-3 in the display can be selected by those skilled in the art according to their needs. By reasonably setting the refractive index of the first dimming layer 21 and the second dimming layer 22 in the light adjustment layer 2, the intensity of light incident on one side of the substrate 1 can be reduced, thereby reducing the intensity of light reflected to the thin film transistor and improving display uniformity.

[0081] Based on the same inventive concept, an embodiment of the present invention further provides a display device. Figure 13 is a structural diagram of a display device provided by an embodiment of the present invention, such as Figure 13As shown, the display device 200 includes a photosensitive element 210 and a display panel 100 provided by any of the above embodiments; the photosensitive element 210 is arranged corresponding to the first display area S1. Since the display device 200 includes the display panel 100 provided by any of the above embodiments, it has the same beneficial effects as the above display panel. The similarities can be referred to the description of the above display panel embodiments, which will not be repeated here. The display device 200 provided in the embodiment of the present invention can be any electronic product with display function and optical function (such as camera and fingerprint recognition), including but not limited to the following categories: mobile phones, televisions, laptops, desktop displays, tablet computers, digital cameras, smart bracelets, smart glasses, car displays, medical equipment, industrial control equipment, touch interactive terminals, etc., and the embodiment of the present invention does not specifically limit this.

[0082] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A display panel, characterized in that: The display panel includes a first display area and a second display area, wherein the light transmittance of the first display area is greater than the light transmittance of the second display area; The display panel further includes: substrate, at least one light-adjusting layer located on one side of the substrate, the light-adjusting layer comprising a first light-adjusting layer and a second light-adjusting layer, the first light-adjusting layer being located on a side of the second light-adjusting layer away from the substrate, and having a refractive index greater than that of the second light-adjusting layer; The first dimming layer includes a first dimming division located in the first display area and a third dimming division located in the second display area. The second dimming layer includes a second dimming division located in the first display area and a fourth dimming division located in the second display area. The refractive index difference between the first dimming division and the second dimming division is greater than the refractive index difference between the third dimming division and the fourth dimming division.

2. The display panel according to claim 1, wherein: The first dimming layer and the second dimming layer are inorganic insulating layers.

3. The display panel according to claim 2, wherein: The material of the first dimming layer is silicon nitride, and the material of the second dimming layer is silicon oxide.

4. The display panel according to claim 1, wherein: The display panel further includes a pixel circuit layer and a light-emitting unit layer, wherein the pixel circuit layer is located between the substrate and the light-emitting unit layer; the pixel circuit layer includes a pixel driving circuit, and the light-emitting unit layer includes a light-emitting element, and the pixel driving circuit is used to drive the light-emitting element to emit light; The pixel circuit layer and the light emitting unit layer each include at least one insulating layer. Along a direction perpendicular to the plane where the substrate is located, two adjacent insulating layers are multiplexed as the first dimming layer and the second dimming layer respectively.

5. The display panel according to claim 4, wherein: The pixel driving circuit includes at least two thin film transistors, and each of the thin film transistors includes a polysilicon active layer.

6. The display panel according to claim 5, wherein: Along the direction from the substrate to the light-emitting element, the display panel includes a gate insulating layer, a first interlayer insulating layer, a second interlayer insulating layer, a protective insulating layer, a first planarizing layer, a second planarizing layer and a pixel defining layer, which are sequentially arranged on one side of the substrate; The first dimming layer and the second dimming layer respectively reuse two adjacent ones of the gate insulating layer, the first interlayer insulating layer, the second interlayer insulating layer, the protective insulating layer, the first planarizing layer, the second planarizing layer and the pixel defining layer.

7. The display panel according to claim 6, wherein: The second interlayer insulating layer includes a first sub-interlayer insulating layer, and the first sub-interlayer insulating layer is adjacent to the protective insulating layer; The protective insulating layer is multiplexed as the first dimming layer, and the first inter-sublayer insulating layer is multiplexed as the second dimming layer; and / or, The first interlayer insulating layer is multiplexed into the first dimming layer, and the gate insulating layer is multiplexed into the second dimming layer.

8. The display panel according to claim 7, wherein: The second interlayer insulating layer further includes a second sub-interlayer insulating layer, which is located on a side of the first interlayer insulating layer close to the substrate. The refractive index of the second sub-interlayer insulating layer is greater than that of the first interlayer insulating layer.

9. The display panel according to claim 6, wherein: The display panel further includes a first metal layer, a capacitor plate layer, a second metal layer, a third metal layer and an anode metal layer located on one side of the substrate; The gate insulating layer is located between the polysilicon active layer and the first metal layer; the first interlayer insulating layer is located between the first metal layer and the capacitor plate layer; the second interlayer insulating layer is located between the capacitor plate layer and the second metal layer; the protective insulating layer and the first planarizing layer are both located between the second metal layer and the third metal layer; the second planarizing layer is located between the third metal layer and the anode metal layer; the pixel defining layer is located on the side of the anode metal layer away from the substrate.

10. The display panel according to claim 4, wherein: The pixel driving circuit includes a first type of thin film transistor and a second type of thin film transistor. The first type of thin film transistor includes a polysilicon active layer, and the second type of thin film transistor includes an oxide semiconductor active layer.

11. The display panel according to claim 10, wherein: Along the direction from the substrate to the light-emitting element, the display panel includes a first gate insulating layer, a first interlayer insulating layer, a second gate insulating layer, a third gate insulating layer, a second interlayer insulating layer, a protective insulating layer, a first planarization layer, a second planarization layer, and a pixel defining layer, which are sequentially arranged on one side of the substrate; The first dimming layer and the second dimming layer respectively reuse two adjacent ones of the first gate insulating layer, the first interlayer insulating layer, the second gate insulating layer, the third gate insulating layer, the second interlayer insulating layer, the protective insulating layer, the first planarization layer, the second planarization layer and the pixel defining layer.

12. The display panel according to claim 11, wherein: The second interlayer insulating layer includes a first sub-interlayer insulating layer and a second sub-interlayer insulating layer stacked together, the first sub-interlayer insulating layer is adjacent to the protective insulating layer, the second sub-interlayer insulating layer is adjacent to the third gate insulating layer, and the refractive index of the first sub-interlayer insulating layer is smaller than the refractive index of the second sub-interlayer insulating layer; The protective insulating layer is multiplexed as the first dimming layer, and the first inter-sublayer insulating layer is multiplexed as the second dimming layer; and / or, The second inter-sub-layer insulating layer is multiplexed as the first dimming layer, and the third gate insulating layer is multiplexed as the second dimming layer; and / or, The first interlayer insulating layer is multiplexed into the first dimming layer, and the first gate insulating layer is multiplexed into the second dimming layer.

13. The display panel according to claim 11, wherein: The display panel further includes a first metal layer, a capacitor plate layer, a top gate metal layer, a second metal layer, a third metal layer and an anode metal layer; The first gate insulating layer is located between the polysilicon active layer and the first metal layer; the first interlayer insulating layer is located between the first metal layer and the capacitor plate layer; the second gate insulating layer is located between the capacitor plate layer and the oxide semiconductor active layer; the third gate insulating layer is located between the oxide semiconductor active layer and the top gate metal layer; the second interlayer insulating layer is located between the top gate metal layer and the second metal layer; the protective insulating layer and the first planarization layer are both located between the second metal layer and the third metal layer; the second planarization layer is located between the third metal layer and the anode metal layer; and the pixel defining layer is located on the side of the anode metal layer away from the substrate.

14. The display panel according to claim 1, wherein The display panel further includes a light emitting unit layer and a touch layer located on a side of the light adjustment layer away from the substrate; The light-emitting unit layer includes a plurality of light-emitting elements, the touch layer includes a plurality of touch electrodes, the orthographic projections of the touch electrodes on the substrate do not overlap with the orthographic projections of the light-emitting elements on the substrate, and the touch electrodes are opaque.

15. The display panel according to claim 1, wherein The display panel further includes a supporting layer located on a side of the substrate away from the light adjustment layer; the supporting layer includes a light through hole, and an orthographic projection of the light through hole on the substrate overlaps with an orthographic projection of the first display area on the substrate.

16. The display panel according to claim 1, wherein The first display area is a camera area or a fingerprint recognition area.

17. A display device, characterized in that: comprising a photosensitive element and the display panel according to any one of claims 1 to 16; The photosensitive element is arranged corresponding to the first display area.

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