Method of forming a capacitor

Abstract

The present disclosure provides a method of forming a capacitor, including forming a stack on a substrate, the stack including a support layer, a first material layer on the support layer, and a second material layer over the first material layer, wherein at least the first material layer includes an ashable material. The method further includes patterning the stack to form a first opening in the stack, forming a first electrode including a second opening in the first opening, removing the second material layer to expose an upper portion of an outer lateral surface of the first electrode, ashing the first material layer to expose a lower portion of the outer lateral surface of the first electrode, and forming a dielectric layer and a second electrode in the second opening of the first electrode and on the outer lateral surface of the first electrode. Since the method of forming a capacitor of the present disclosure uses an ashing process to remove the material layers of the lower portion of the stack, the electrodes in the stack can avoid rocking in the support layer, thereby increasing the reliability of the capacitor.

Description

Technical Field

[0001] This disclosure relates to a method of forming a capacitor, and more particularly to a method of forming a capacitor including a support frame. Background Technology

[0002] Dynamic Random Access Memory (DRAM) comprises multiple memory cells, each including transistors that control switching and capacitors that act as storage. The transistors and capacitors are coupled to each other to enable information access. When the capacitors of a memory cell have a high height, there is a larger overlap between the capacitor electrodes, allowing the capacitor to provide a larger voltage signal. To maintain the structural stability of the high capacitors, a support frame is formed within the capacitor to fix the position of the electrodes and prevent the electrodes of multiple capacitors from wobbling and contacting each other. Summary of the Invention

[0003] According to one embodiment of this disclosure, a method for forming a capacitor is provided, comprising forming a stack on a substrate, including a first support layer, a first material layer on the first support layer, and a second material layer above the first material layer, wherein at least the first material layer includes an ashingable material. The method further includes patterning the stack to form a first opening in the stack, forming a first electrode including a second opening in the first opening, removing the second material layer to expose an upper portion of an outer surface of the first electrode, ashing the first material layer to expose a lower portion of the outer surface of the first electrode, and forming a dielectric layer and a second electrode in the second opening of the first electrode and on the outer surface of the first electrode.

[0004] In one embodiment of this disclosure, forming a stack on a substrate includes forming a first material layer having a first thickness, the first thickness being between 50% and 60% of the thickness of the stack.

[0005] In one embodiment of this disclosure, forming a stack on a substrate includes forming a first material layer and a second material layer having an ashing material, and removing the second material layer includes ashing the second material layer.

[0006] In one embodiment of this disclosure, forming a first electrode in a first opening includes forming a first electrode having an aspect ratio between 35:1 and 45:1.

[0007] In one embodiment of this disclosure, forming a stack on a substrate further includes forming a second support layer between a first material layer and a second material layer, and forming a third support layer on the second material layer.

[0008] In one embodiment of this disclosure, removing the second material layer includes selectively etching the second material layer using a wet etching process to retain the first electrode and the second support layer.

[0009] In one embodiment of this disclosure, removing the second material layer further includes forming a third opening in the third support layer adjacent to the first electrode to expose the second material layer, and removing the second material layer through the third opening.

[0010] In one embodiment of this disclosure, ashing the first material layer further includes forming a fourth opening in the second support layer adjacent to the first electrode to expose the first material layer, and ashing the first material layer through the fourth opening.

[0011] In one embodiment of this disclosure, ashing the first material layer further includes removing the first material layer using an ashing process, cleaning the stack using a wet chemical cleaning process, and treating the first electrode with ammonia gas.

[0012] In one embodiment of this disclosure, patterning the stack to form the first opening further includes forming the opening in the second material layer, forming a padding layer on the sidewall of the opening, and etching through the bottom of the padding layer and the first material layer to form the first opening. Attached Figure Description

[0013] The various aspects of this disclosure can be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, in accordance with standard industrial methods, the various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion.

[0014] Figure 1 A flowchart illustrating a method for forming a capacitor is shown based on some embodiments of this disclosure.

[0015] Figures 2A to 2D and Figures 2G to 2J A cross-sectional view of an apparatus for forming a capacitor at various intermediate stages is shown according to an embodiment of the present disclosure.

[0016] Figure 2E and Figure 2F A top view of an apparatus for forming an intermediate stage of a capacitor is shown according to some embodiments of this disclosure.

[0017] Figures 3A to 3H A cross-sectional view of an apparatus for forming various intermediate stages of a capacitor is shown according to another embodiment of the present disclosure. Detailed Implementation

[0018] To achieve the different features of the mentioned subject matter, the following disclosure provides many different embodiments or examples. Specific examples of components, configurations, etc., are described below to simplify this disclosure. Of course, these are merely examples and not limiting. For example, in the following description, forming a first feature on or over a second feature may include embodiments where the first and second features are formed in direct contact, and may also include embodiments where an additional feature is formed between the first and second features such that the first and second features do not need to be in direct contact. Additionally, reference numerals and / or letters may be repeated in various examples. This repetition is for simplicity and clarity and does not in itself represent a relationship between the various embodiments and / or configurations discussed.

[0019] Furthermore, this document may use spatial relative terms such as “below,” “under,” “lower,” “above,” “upper,” etc., to facilitate the description of the relationship between one element or feature and another element or feature as shown in the figure. In addition to the orientations shown in the figure, spatial relative terms are intended to include different orientations of the device in use or operation. The device may be oriented in other ways (rotated 90 degrees or in other directions), and the spatial relative descriptive symbols used herein may be interpreted accordingly.

[0020] This disclosure provides a method for forming a capacitor, including forming a stack with at least a lower material layer of ashable material, and removing the ashable material layer by an ashing process after forming electrodes in the stack. Because the ashing process reduces damage to the stack structure, the electrodes in the stack can be neatly aligned and form a highly reliable capacitor.

[0021] Figure 1 A flowchart illustrating a method 1000 for forming a capacitor is shown according to some embodiments of the present disclosure. Figures 2A to 2D and Figures 2G to 2J Cross-sectional views of the apparatus 20 at various intermediate stages of method 1000 are illustrated according to an embodiment of this disclosure. (See reference 1) Figure 1 , Figures 2A to 2D and Figures 2G to 2J The method 1000 for forming apparatus 20 provided in this disclosure can be well described at that time. It should be understood that additional steps may be included before, during or after the steps of method 1000, and implementations of these variations are also within the scope of this disclosure.

[0022] Please refer to Figure 1 and Figure 2A . Figure 2A Drawn in Figure 1 A cross-sectional view of device 20 in step 1002. (See diagram below.) Figure 2AAs shown, a stack 205 with alternating support layers and material layers is formed on a substrate 200, and at least the lower material layer includes an ashedable material. Specifically, a first support layer 210 is formed on the substrate 200, and a first material layer 220, a second support layer 212, a second material layer 230, and a third support layer 214 are sequentially formed on the first support layer 210, wherein the first material layer 220 includes an ashedable material. The first material layer 220 is the material layer closest to the substrate 200 in the stack 205, and therefore can also be referred to as the lower material layer. Conversely, the second material layer 230 is located above the first material layer 220, and can also be referred to as the upper material layer. Although Figure 2A Only a stack 205 consisting of three support layers and two material layers is shown. The device 20 may include other stacks 205 consisting of an alternating arrangement of support layers and material layers, such as four support layers and three material layers.

[0023] In some embodiments, the ashingable material included in the first material layer 220, such as carbon-based compounds, resins, polymers, other suitable ashingable materials, or combinations thereof, can be patterned or removed during the plasma ashing process. In some embodiments, the second material layer 230 may include a dielectric material removable in a wet etching process, such as silicon oxide, silicate glass, doped borosilicate glass, other oxide dielectric materials, or combinations thereof. In some embodiments, the thickness of the first material layer 220 may be between 50% and 60% of the thickness of the stack 205, while the thickness of the second material layer 230 may be between 40% and 50% of the thickness of the stack 205. For example, the first material layer 220 may be a resin with a thickness between 500 nm and 600 nm, while the second material layer 230 may be silicon oxide with a thickness between 400 nm and 500 nm.

[0024] In some embodiments, the materials forming the first support layer 210, the second support layer 212, and the third support layer 214 may include dielectric materials having etch selectivity in a wet etching process compared to the second material layer 230. For example, the second material layer 230 may be silicon oxide, while the first support layer 210, the second support layer 212, or the third support layer 214 may be silicon nitride. In some embodiments, the materials forming the first support layer 210, the second support layer 212, and the third support layer 214 may be the same material, for example, all three may be silicon nitride.

[0025] Please refer to Figure 1 and Figure 2B . Figure 2B Drawn in Figure 1 A cross-sectional view of device 20 in step 1004. (See diagram below.) Figure 2BAs shown, a stack 205 formed by a patterned support layer and a material layer creates a first opening 245 within the stack 205. Specifically, a patterned mask 240 with multiple holes aligned with the first opening 245 is formed on the stack 205. An anisotropic etching process (e.g., dry etching) is performed on the stack 205 using the mask 240, with the etching process stopping at the upper surface of the substrate 200, thereby forming the first opening 245 within the stack 205. After the first opening 245 is formed, the mask 240 can be removed from the stack 205.

[0026] In some embodiments, forming the first opening 245 may include a multi-step etching process. For example, in an etching process using a mask 240, after forming an opening that passes through the third support layer 214 and extends into the second material layer 230, the etching process may be paused to form a conformal pad layer (not shown) within the opening extending into the second material layer 230. The etching process then continues such that the etchant penetrates the bottom of the pad layer and etches onto the upper surface of the substrate 200 to form the first support layer 210 and the second support layer 212. By using a multi-step etching process, a first opening 245 with flat sidewalls can be formed in the stack 205, thereby ensuring the reliability of components subsequently formed in the first opening 245.

[0027] Please refer to Figure 1 and Figure 2C . Figure 2C Drawn in Figure 1 A cross-sectional view of device 20 in step 1006. (See diagram below.) Figure 2C As shown, a first electrode 250, including a second opening 255, is formed in the first opening 245. Specifically, on the stack 205 and the first opening 245 (as shown in the figure), a first electrode 250 is formed in the first opening 245. Figure 2B A blanket electrode layer is formed in the stack 205, and a portion of the blanket electrode layer on the stack 205 is removed using a process such as chemical mechanical polishing (CMP), so that the first electrode 250 is conformally formed in the first opening 245. Because the first electrode 250 conforms to the first opening 245, the first electrode 250 includes a second opening 255, thereby increasing the exposed surface area of ​​the first electrode 250. Therefore, the first electrode 250 has a relatively large surface area that can contact other elements subsequently formed therein.

[0028] In some embodiments, the material forming the first electrode 250 may include metals, metal compounds, alloy compounds, other conductive materials, or combinations thereof, such as titanium nitride or silicon-doped titanium nitride. For example, the conductive material may be deposited using processes such as chemical vapor deposition (CVD) or atomic layer deposition (ALD) to form the first electrode 250. In some embodiments, the first electrode 250 has a high aspect ratio, such that the capacitor including the first electrode 250 can provide a large voltage signal; for example, the aspect ratio of the first electrode 250 may be between 35:1 and 45:1.

[0029] Please refer to Figure 1 and Figure 2D . Figure 2D Drawn in Figure 1 A cross-sectional view of device 20 in step 1008. (See diagram below.) Figure 2D As shown, a third opening 262 is formed in the top support layer of the stack 205. Specifically, a patterned mask 260 is formed on the stack 205, the mask 260 having holes between adjacent first electrodes 250 below it. An anisotropic etching process (e.g., dry etching process) is performed on the exposed third support layer 214 using the mask 260, thereby forming the third opening 262 in the third support layer 214. Since the third support layer 214 is the uppermost layer in the stack 205, the third support layer 214 can also be referred to as the top support layer. In contrast, the first support layer 210 on the substrate 200 can be referred to as the bottom support layer, and the second support layer 212 located between the first support layer 210 and the third support layer 214 can be referred to as the middle support layer. After the third opening 262 is formed, the mask 260 can be removed from the stack 205.

[0030] In some embodiments, the etching process that forms the third opening 262 stops on the upper surface of the second material layer 230 to form Figure 2D The third opening 262 of the second material layer 230 is exposed. In some other embodiments, the third opening 262 may extend into the second material layer 230 such that the bottom of the third opening 262 is lower than the upper surface of the second material layer 230.

[0031] Depending on the material of the second material layer 230 or the parameters of subsequent etching processes, different numbers and positions of the third openings 262 can be designed. In some embodiments, the third openings 262 may be disposed between adjacent first electrodes 250, thereby exposing the second material layer 230 between adjacent first electrodes 250. In some embodiments, the third openings 262 may be spaced apart between adjacent first electrodes 250, such as... Figure 2D As shown. Figure 2E and Figure 2FIllustrations based on some embodiments of this disclosure Figure 1 A top view of device 20 in step 1008. (See attached image.) Figure 2E As shown, the third opening 262 can be located in the middle of three adjacent first electrodes 250. Or as... Figure 2F As shown, the third opening 262 may be located in the middle of the four adjacent first electrodes 250, but this disclosure is not limited to such embodiments.

[0032] Please refer to Figure 1 and Figure 2G . Figure 2G Drawn in Figure 1 A cross-sectional view of device 20 in step 1010. (See diagram below.) Figure 2G As shown, the second material layer 230 of stack 205 is removed. Specifically, a selective etching process (e.g., wet etching) is performed on the second material layer 230 between the second support layer 212 and the third support layer 214 through the third opening 262. Because the etching process is selective, the second material layer 230 can be removed while the second support layer 212, the third support layer 214, and the first electrode 250 remain. For example, hydrofluoric acid can be used as the etchant to remove the second material layer 230, which includes silicon oxide. In some embodiments, the etchant used to etch the second material layer 230 may include a surfactant to increase the etchant's contact capability with the second material layer 230. After removing the second material layer 230, the upper outer surface of the first electrode 250 is exposed. More specifically, the outer surface of the first electrode 250 between the second support layer 212 and the third support layer 214 is exposed to increase the surface area for contact between the first electrode 250 and other subsequently formed components.

[0033] Please refer to Figure 1 And Figure 2H. Figure 2H is drawn in Figure 1 A cross-sectional view of apparatus 20 in step 1012. As shown in Figure 2H, a fourth opening 264 is formed in the middle support layer of stack 205. Specifically, the fourth opening 264 is formed in the second support layer 212 by punching a tool or die. In some embodiments, the punching process stops on the upper surface of the first material layer 220 to form the fourth opening 264 located below the third opening 262 in Figure 2H. In some other embodiments, the fourth opening 264 may extend into the first material layer 220.

[0034] Please refer to Figure 1 and Figure 2I . Figure 2I Drawn in Figure 1 A cross-sectional view of device 20 in step 1014. (See diagram below.) Figure 2IAs shown, the lower material layer including ashingable material in stack 205 is removed. Specifically, the first material layer 220 between the first support layer 210 and the second support layer 212 is ashing-processed through the third opening 262 and the fourth opening 264 to remove the first material layer 220 and retain the first support layer 210, the second support layer 212, and the first electrode 250. Removing the first material layer 220 exposes the lower outer surface of the first electrode 250, that is, the outer surface of the first electrode 250 between the first support layer 210 and the second support layer 212 is exposed, increasing the surface area of ​​the first electrode 250 in contact with other subsequently formed components.

[0035] In some embodiments, the ashing process includes removing the first material layer 220 using plasma, such as oxygen-based plasma, synthesis gas-based plasma (a mixture of nitrogen and hydrogen), or plasma with other suitable gases. After the ashing process, a wet chemical cleaning process can be used to remove residues from the ashing process in the stack 205 and to prevent ions generated during the ashing process from corroding the first electrode 250. For example, an acid cleaning apparatus 20 with oxidizing and dehydrating properties can be used to remove carbonaceous residues from the first material layer 220. In embodiments using oxygen-based plasma ashing processes, the process may further include NH3 treatment of the stack 205 to mitigate defects that may have arisen during the ashing process on the first electrode 250.

[0036] After removing the first material layer 220 and the second material layer 230, the first support layer 210, the second support layer 212, and the third support layer 214 serve as a support frame to support the multiple first electrodes 250, ensuring that the first electrodes 250 do not contact each other. Because the first material layer 220 between the first support layer 210 and the second support layer 212 is removed using an ashing process, the lower part of the stack 205 can be prevented from being damaged by chemical turbulence / fluctuation from etching processes (e.g., wet etching). Therefore, the first electrodes 250 in the stack 205 can be less prone to wobbling and arranged neatly, increasing the reliability of the device 20.

[0037] Please refer to Figure 1 and Figure 2J . Figure 2J Drawn in Figure 1 A cross-sectional view of device 20 in step 1016. (See diagram below.) Figure 2J As shown, a dielectric layer 270 and a second electrode 275 are formed in the stack 205 to form a capacitor 280. Specifically, a second opening 255 (as shown) is formed between the first support layer 210 and the third support layer 214, above the third support layer 214, and at the first electrode 250. Figure 2I A blanket-covered dielectric layer and a blanket-covered electrode layer are formed in the first support layer 210 and the third support layer 214, and a portion of the blanket-covered dielectric layer and the blanket-covered electrode layer on the third support layer 214 are removed using, for example, a chemical mechanical polishing process, so that the dielectric layer 270 and the second electrode 275 are formed between the first support layer 210 and the third support layer 214 and in the second opening 255.

[0038] The first electrode 250, dielectric layer 270, and second electrode 275 together form a capacitor 280, serving as another component in the storage connection device 20. The contact portion between the first electrode 250 and the dielectric layer 270 includes the inner and outer surfaces of the first electrode 250, increasing the current flow area between the first electrode 250 and the second electrode 275; therefore, the capacitor 280 is also called a double-sided capacitor. Because the first electrode 250 is neatly arranged between the first support layer 210 and the third support layer 214, the dielectric layer 270 and the second electrode 275 can be formed flatly within the second opening 255, thus forming a highly reliable capacitor 280.

[0039] Figures 3A to 3H Cross-sectional views of the apparatus 30 at various intermediate stages of method 1000 are illustrated according to another embodiment of this disclosure. (See reference 1) Figure 1 and Figures 3A to 3H The method 1000 for forming apparatus 30 provided in this disclosure can be well described. The steps for forming apparatus 30 include similar operational steps to those for forming apparatus 20, and therefore the forming of apparatus 30 can be achieved using the details of method 1000 described above and the description below.

[0040] Please refer to Figure 1 and Figure 3A . Figure 3A Drawn in Figure 1 A cross-sectional view of device 30 in step 1002. (See diagram below.) Figure 3A As shown, a stack 305 of alternating support layers and material layers is formed on a substrate 300. Specifically, a first support layer 310 is formed on the substrate 300, and a first material layer 320, a second support layer 312, a second material layer 330, and a third support layer 314 are sequentially formed on the first support layer 310, wherein the first material layer 320 and the second material layer 330 comprise an ashingable material. In some embodiments, the first material layer 320 and the second material layer 330 may comprise the same ashingable material. In some other embodiments, the first material layer 320 and the second material layer 330 may comprise different ashingable materials; for example, the first material layer 320 may be a carbon-based compound, while the second material layer 330 may be a resin.

[0041] Please refer to Figure 1 and Figures 3B to 3C . Figure 3B Drawn in Figure 1 A cross-sectional view of device 30 in step 1004, and... Figure 3C Drawn in Figure 1 A cross-sectional view of the device 30 in step 1006. The stack 305 formed by the support layer and material layer is patterned using a mask 340, causing a first opening 345 to be formed on the substrate 300. A first electrode 350 is formed in the first opening 345, and the first electrode 350 conforms to the first opening 345 to have a second opening 355. Therefore, the first electrode 350 has a relatively large surface area that can contact other elements subsequently formed therein.

[0042] Please refer to Figure 1 and Figure 3D . Figure 3D Drawn in Figure 1 A cross-sectional view of device 30 in step 1008. (See diagram below.) Figure 3D As shown, a third opening 362 is formed in the top support layer of the stack 305. Specifically, a patterned mask 360 is formed on the stack 305 to expose the third support layer 314 between adjacent first electrodes 350 below it. An anisotropic etching process (e.g., dry etching process) is performed on the third support layer 314 and the second material layer 330 using the mask 360 to form the third opening 362 on the upper surface of the second support layer 312. After the third opening 362 is formed, the mask 360 can be removed from the stack 305.

[0043] Please refer to Figure 1 and Figure 3E . Figure 3E Drawn in Figure 1 A cross-sectional view of device 30 in step 1010. (See diagram below.) Figure 3E As shown, the second material layer 330 of stack 305 is removed. Specifically, the second material layer 330 between the second support layer 312 and the third support layer 314 is ashed through the third opening 362 to remove the second material layer 330 while retaining the second support layer 312, the third support layer 314, and the first electrode 350. Since the second material layer 330 comprises an ashedable material, it can be removed using plasma based on oxygen or syngas.

[0044] Please refer to Figure 1 and Figures 3F to 3H . Figure 3F Drawn in Figure 1 A cross-sectional view of device 30 in step 1012. Figure 3G Drawn in Figure 1 A cross-sectional view of device 30 in step 1014, and... Figure 3H Drawn in Figure 1A cross-sectional view of apparatus 30 in step 1016. A fourth opening 364 is formed in the second support layer 312 of the stack 305 by a punching process, and the first material layer 320 of the stack 305 is removed by an ashing process through the third opening 362 and the fourth opening 364. After the ashing process, wet chemical cleaning and ammonia treatment may be further included to remove residues from the ashing process and reduce defects in the first electrode 350. Using an ashing process to remove the first material layer 320 and the second material layer 330 can prevent the stack 305 from being damaged by chemical disturbances from etching processes (e.g., wet etching), thus reducing the wobbling of the first electrode 350 in the stack 305 and preventing the first electrodes 350 from contacting each other. Since the first electrodes 350 are neatly arranged between the first support layer 310 and the third support layer 314, the dielectric layer 370 and the second electrode 375 can be formed flatly in the second opening 355 to form a highly reliable capacitor 380.

[0045] According to the above embodiments, this disclosure provides a method for forming a capacitor including forming a stack of a support layer and a material layer, and electrodes in the stack, wherein at least the lower material layer includes an ashing-compatible material, so that the lower material layer of the stack can be removed using an ashing process to expose the lower outer surface of the electrodes. Because the lower material layer is removed using an ashing process, damage to the stacked structure is reduced, and the exposed electrodes can avoid wobbling within the support layer. Therefore, the method provided by this disclosure can form neatly arranged electrodes, thereby forming a highly reliable capacitor.

[0046] The foregoing outlines features of some embodiments to enable those skilled in the art to better understand the ideas presented in this disclosure. Those skilled in the art should understand that they can readily use this disclosure as a basis for designing or modifying other processes and structures to achieve the same purpose and / or the same advantages as the embodiments described herein. Those skilled in the art should also understand that such equivalent constructions do not depart from the spirit and scope of this disclosure, and that various changes, substitutions, and modifications can be made without departing from the spirit and scope of this disclosure.

[0047] [Symbol Explanation]

[0048] 20, 30: Apparatus

[0049] 200:Substrate

[0050] 205: Stacking

[0051] 210: First Support Layer

[0052] 212: Second support layer

[0053] 214: Third Support Layer

[0054] 220: First material layer

[0055] 230: Second material layer

[0056] 240: Mask

[0057] 245: First Opening

[0058] 250: First electrode

[0059] 255: Second opening

[0060] 260: Mask

[0061] 262: Third opening

[0062] 264: Fourth opening

[0063] 270: Dielectric layer

[0064] 275: Second electrode

[0065] 280: Capacitor

[0066] 300:Substrate

[0067] 305: Stacking

[0068] 310: First Support Layer

[0069] 312: Second support layer

[0070] 314: Third Support Layer

[0071] 320: First material layer

[0072] 330: Second material layer

[0073] 340: Mask

[0074] 345: First Opening

[0075] 350: First electrode

[0076] 355: Second opening

[0077] 360: Mask

[0078] 362: Third opening

[0079] 364: The Fourth Opening

[0080] 370: Dielectric layer

[0081] 375: Second electrode

[0082] 380: Capacitor

[0083] 1000: Method

[0084] 1002, 1004, 1006, 1008, 1010, 1012, 1014, 1016: Steps.

Claims

1. A method for forming a capacitor, characterized in that, include: A stack is formed on a substrate, the stack including a first support layer, a first material layer on the first support layer and a second material layer above the first material layer, wherein at least the first material layer includes an ashedable material; Pattern the stack to form the first opening in the stack; A first electrode is formed in the first opening, the first electrode including a second opening; Remove the second material layer to expose the upper part of the outer surface of the first electrode; The first material layer is removed using a plasma ashing process to expose the lower part of the outer surface of the first electrode; A wet chemical cleaning process is used to remove the residue from the ashing process. as well as A dielectric layer and a second electrode are formed in the second opening of the first electrode and on the outer surface of the first electrode.

2. The method according to claim 1, characterized in that, The formation of the stack on the substrate includes forming a first material layer having a first thickness, the first thickness being between 50% and 60% of the thickness of the stack.

3. The method according to claim 1, characterized in that, The formation of the stack on the substrate includes forming a first material layer and a second material layer having the ashing material, and the removal of the second material layer includes ashing the second material layer.

4. The method according to claim 1, characterized in that, The formation of the first electrode in the first opening includes forming the first electrode having an aspect ratio between 35:1 and 45:

1.

5. The method according to claim 1, characterized in that, Forming the stack on the substrate further includes: A second support layer is formed between the first material layer and the second material layer; and A third support layer is formed on the second material layer.

6. The method according to claim 5, characterized in that, Removing the second material layer involves selectively etching the second material layer using a wet etching process to preserve the first electrode and the second support layer.

7. The method according to claim 5, characterized in that, Removing the second material layer further includes: A third opening is formed in the third support layer to expose the second material layer, the third opening being adjacent to the first electrode; and The second material layer is removed through the third opening.

8. The method according to claim 5, characterized in that, The ashing process using this plasma to remove the first material layer further includes: A fourth opening is formed in the second support layer to expose the first material layer, the fourth opening being adjacent to the first electrode; and The first material layer is ashed through the fourth opening.

9. The method according to claim 1, characterized in that, Further includes: After using this wet chemical cleaning process, the first electrode is treated with ammonia gas.

10. The method according to claim 1, characterized in that, Patterning the stack to form the first opening further includes: An opening is formed in the second material layer; A liner layer is formed on the sidewall of the opening; and The etching passes through the bottom of the liner layer and the first material layer to form the first opening.

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