Semiconductor structure and method of forming the same

Abstract

A semiconductor structure and a method for forming the same. The method includes providing a substrate having a plurality of first fins separated from each other on the substrate, the first fins having a material containing germanium; forming an isolation dielectric layer on the substrate, the isolation dielectric layer also on a portion of sidewalls of the first fins; after forming the isolation dielectric layer, forming a silicon film having a first thickness on exposed surfaces of the first fins; and oxidizing the silicon film using a first oxidation process having an oxidation rate lower than a predetermined oxidation rate to form a first oxide layer having a second thickness, the second thickness being less than or equal to the first thickness. The method can improve the performance of the semiconductor structure formed thereby.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a forming method thereof. BACKGROUND

[0002] With the rapid development of integrated circuit manufacturing technology, the size of semiconductor devices in integrated circuits is continuously reduced, so that the operating speed of the entire integrated circuit can be effectively improved.

[0003] Generally, in advanced process nodes, by using a material with a lattice constant greater than silicon as the material of the fin, a compressive stress is generated on the channel of the P-type transistor to increase the migration speed of electrons in the channel. Thus, the carrier mobility of the P-type transistor is improved, and the performance of the semiconductor structure is improved.

[0004] However, the performance of the semiconductor device formed by the prior art needs to be improved. SUMMARY

[0005] The technical problem solved by the present application is to provide a semiconductor structure and a forming method thereof to improve the performance of semiconductor devices.

[0006] To solve the above technical problem, the technical scheme of the present application provides a semiconductor structure, comprising: a substrate, the substrate has a plurality of mutually separated first fins thereon, the material of the first fin contains germanium element; an isolation medium layer located on the substrate, the isolation medium layer is also located on part of the side wall surface of the first fin; a first oxide layer located on the exposed surface of the first fin, the first oxide layer has a second thickness.

[0007] Optionally, the material of the first fin comprises silicon germanium.

[0008] Optionally, the second thickness is in the range of 5 angstroms to 10 angstroms.

[0009] Optionally, the substrate also has a plurality of mutually separated second fins thereon, the materials of the first fin and the second fin are different, the isolation medium layer is also located on part of the side wall surface of the second fin, and the first oxide layer is also located on the exposed surface of the second fin.

[0010] Optionally, the material of the second fin comprises silicon.

[0011] Optionally, the substrate comprises a first region and a second region, the first fin and the second fin are located on the first region, the second region also has a plurality of mutually separated third fins and a plurality of fourth fins thereon, the material of the third fin or the fourth fin contains germanium element, and the isolation medium layer is also located on part of the side wall surface of the third fin and the fourth fin; the semiconductor structure further comprises: a second oxide layer located on the exposed surface of the third fin and the fourth fin, the second oxide layer has a third thickness, and the third thickness is greater than the second thickness.

[0012] Optionally, the material of the third fin or the fourth fin comprises silicon germanium.

[0013] Accordingly, the technical scheme of the present application also provides a forming method of a semiconductor structure, comprising: providing a substrate, wherein the substrate has a plurality of mutually separated first fins, and the material of the first fins contains germanium element; forming an isolation medium layer on the substrate, wherein the isolation medium layer is also located on part of the sidewall surface of the first fins; after the isolation medium layer is formed, forming a silicon film with a first thickness on the exposed surface of the first fins; and using a first oxidation process with an oxidation rate lower than a preset oxidation rate to oxidize the silicon film, thereby forming a first oxidation layer with a second thickness, wherein the second thickness is less than or equal to the first thickness.

[0014] Optionally, the first oxidation process is a wet chemical oxidation process.

[0015] Optionally, the process parameters of the first oxidation process comprise: a temperature range of 450-800 degrees Celsius.

[0016] Optionally, the oxidizing liquid used in the first oxidation process comprises hydrogen peroxide or nitric acid.

[0017] Optionally, the concentration of the hydrogen peroxide ranges from 0.5% to 60%.

[0018] Optionally, the concentration of the nitric acid ranges from 1% to 30%.

[0019] Optionally, the first oxidation process is a dry oxidation process, and the oxidizing agent of the first oxidation process comprises nitrogen oxide gas.

[0020] Optionally, the temperature range of the first oxidation process is 450-800 degrees Celsius.

[0021] Optionally, the process of forming the silicon film with the first thickness on the surface of the first fin is a selective epitaxy process.

[0022] Optionally, the first thickness ranges from 13 angstroms to 18 angstroms, and the second thickness ranges from 5 angstroms to 10 angstroms.

[0023] Optionally, the method further comprises: after the silicon film with the first thickness is formed on the surface of the first fin, and before the silicon film is oxidized, removing the natural oxide on the surface of the silicon film.

[0024] Optionally, before the silicon film with the first thickness is formed on the exposed surface of the first fin, the method further comprises: performing a pretreatment cleaning step on the surface of the first fin to remove the natural oxide film on the surface of the first fin.

[0025] Optionally, after the first fin surface is pretreated and cleaned, the method further comprises: performing a surface treatment on the first fin on the same machine, wherein the surface treatment process comprises a heat treatment process, and the heat treatment process uses a gas comprising at least one of nitrogen, hydrogen, and an inert gas.

[0026] Optionally, the substrate further comprises a plurality of second fins that are separate from each other, the first fins and the second fins are made of different materials, the isolation medium layer is further located on part of the sidewall surface of the second fins, and the first oxide layer is further located on the exposed surface of the second fins.

[0027] Optionally, the substrate comprises a first region and a second region, the first fins and the second fins are located on the first region, the second region further comprises a plurality of third fins and a plurality of fourth fins that are separate from each other, the third fins or the fourth fins are made of a material containing germanium, and the isolation medium layer is further located on part of the sidewall surface of the third fins and the fourth fins; the method for forming the semiconductor structure further comprises: before forming the silicon film with the first thickness on the exposed surface of the first fins and the second fins, forming a second oxide layer with a third thickness on the exposed surface of the third fins and the fourth fins, wherein the third thickness is greater than the second thickness.

[0028] Optionally, the method for forming the second oxide layer with the third thickness on the surface of the third fins and the fourth fins comprises: after the isolation medium layer is formed, forming a low-temperature oxide on the surface of the first fins, the second fins, the third fins, and the fourth fins, the process for forming the low-temperature oxide comprises an atomic layer deposition process, and the temperature of the atomic layer deposition process is 50 degrees Celsius to 95 degrees Celsius; performing a heat treatment on the low-temperature oxide to form the second oxide layer with the third thickness on the surface of the first fins, the second fins, the third fins, and the fourth fins; and removing the second oxide layer on the surface of the first fins and the second fins.

[0029] Optionally, the method for forming the second oxide layer with the third thickness on the surface of the third fins and the fourth fins further comprises: after the isolation medium layer is formed and before the low-temperature oxide is formed, removing the native oxide on the surface of the third fins and the fourth fins.

[0030] Compared with the prior art, the technical scheme of the embodiment of the present application has the following beneficial effects:

[0031] The technical scheme of the present application provides a semiconductor structure forming method, wherein a silicon film with a first thickness is formed on the exposed first fin surface, and a first oxide layer with a second thickness is formed by oxidizing the silicon film using a first oxidation process with an oxidation rate lower than a preset oxidation rate, and the second thickness is less than or equal to the first thickness. Therefore, the first oxide layer with a small thickness and a low germanium oxide content is formed, so that the working voltage of the device is low, and the interface trap density is low, thereby improving the performance of the semiconductor structure. Specifically, since the silicon film is oxidized using the first oxidation process with an oxidation rate lower than the preset oxidation rate, the characteristics of the first oxidation process with a low oxidation efficiency are utilized, so that the oxidation speed of the silicon film is slow, and the oxidation degree of the silicon film is controlled with high precision. Therefore, the thin silicon film can be accurately oxidized, and the first oxide layer with a small thickness (second thickness) is formed, so that the working voltage of the device is low. At the same time, the first fin containing germanium elements is not easily oxidized by the first oxidation process, so that germanium oxide is not easily formed during the oxidation of the silicon film, and the content of germanium oxide in the first oxide layer is low, so that the interface trap density of the device is low. In summary, the semiconductor structure forming method improves the performance of the semiconductor structure.

[0032] Further, since the second oxide layer with a thickness greater than the first oxide layer is formed on the surfaces of the third fin and the fourth fin before the silicon film is formed, the selection freedom of the forming process of the second oxide layer is high, and the forming process of the second oxide layer has little effect on the first oxide layer. Therefore, the oxide layers with different thicknesses and low germanium oxide contents can be formed in the first region and the second region respectively, so that the thickness requirements of the oxide layers on the fin surfaces in different regions are met while reducing the trap density of the device. BRIEF DESCRIPTION OF DRAWINGS

[0033] Figures 1-2 is a schematic diagram of the cross-sectional structure of each step in the forming process of a semiconductor structure.

[0034] Figures 3-15 is a schematic diagram of the structure of each step in the forming method of a semiconductor structure in an embodiment of the present application. DETAILED DESCRIPTION

[0035] As described in the background, the performance of the semiconductor device formed by the prior art still needs to be improved. The following detailed description is made in combination with the following drawings.

[0036] Figures 1-2 is a schematic diagram of the cross-sectional structure of each step in the forming process of a semiconductor structure.

[0037] Please refer to Figure 1 A substrate 100 is provided, and the substrate 100 has a plurality of mutually separated fin portions 101, and the material of the fin portions 101 is silicon germanium. An isolation medium layer 110 is formed on the surface of the substrate 100.

[0038] Referring to Figure 2 , a high-temperature atomic layer deposition process reaching a preset temperature is adopted to form an oxide layer 120 on the surface of the fin 101.

[0039] In the above method, in order to reduce the content of germanium oxide in the oxide layer 120 and achieve the reduction of interface trap density, a high-temperature atomic layer deposition process reaching a preset temperature is adopted, so that the germanium oxide in the natural oxide layer on the surface of the fin 101 volatilizes at the preset temperature, and the content of germanium oxide in the formed oxide layer 120 is small.

[0040] However, since ozone is used as an oxidizing agent in the high-temperature atomic layer deposition process, the ozone will erode (oxidize) the surface of the oxide fin 101, so that the oxide layer 120 contains not only the material deposited by the high-temperature atomic layer deposition process, but also the material formed by the oxidation of the fin 101, thereby not only reducing the effect of reducing the content of germanium oxide in the oxide layer 120, but also forming a relatively thick oxide layer 120, which is difficult to meet the required oxide layer thickness of a device with low operating voltage. In summary, the performance of the semiconductor device formed by the method for forming a semiconductor structure still needs to be improved.

[0041] To solve the technical problem, an embodiment of the present application provides a semiconductor structure and a method for forming the same. Since a first thickness of silicon film is formed on the exposed first fin surface, and a first oxidation process with an oxidation rate lower than a preset oxidation rate is used to oxidize the silicon film, a first oxide layer with small thickness and low germanium oxide content is formed, thereby improving the performance of the formed semiconductor structure.

[0042] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0043] Figures 3-15 is a structural schematic diagram of each step of the method for forming a semiconductor structure in an embodiment of the present application.

[0044] Referring to Figures 3-5 , Figure 3 is Figure 4 and Figure 5 is a schematic diagram of the stereoscopic structure of Figure 4 is Figure 3 is a schematic diagram of the cross-sectional structure along the X1-X2 direction in Figure 5 is Figure 3 is a schematic diagram of the cross-sectional structure along the X3-X4 direction in A substrate 200 is provided, and the substrate 200 has a plurality of first fins 201 which are mutually separated and which contain germanium elements.

[0045] In the present embodiment, the material of the substrate 200 includes silicon.

[0046] In other embodiments, the material of the substrate includes silicon carbide, silicon germanium, a multi-element semiconductor material composed of group III-V elements, silicon-on-insulator (SOI), germanium-on-insulator (GOI), etc. The multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, InGaAsP, etc.

[0047] In the embodiment, the material of the first fin 201 includes silicon germanium.

[0048] In the embodiment, the substrate 200 further has a plurality of second fins 202 which are separate from each other, and the materials of the first fins 201 and the second fins 202 are different.

[0049] In the embodiment, the material of the second fin 202 includes silicon.

[0050] The materials of the first fin 201 and the second fin 202 are different, and thus semiconductor devices of different conductive types can be formed by the first fin 201 and the second fin 202. Specifically, the first fin 201 is used to form a PMOS device, and the second fin 202 is used to form an NMOS device.

[0051] In the embodiment, the substrate 200 includes a first region A and a second region B. The first fin 201 and the second fin 202 are located on the first region A.

[0052] In the embodiment, the second region B further has a plurality of third fins 203 and a plurality of fourth fins 204 which are separate from each other, and the materials of the third fins 203 and the fourth fins 204 are different.

[0053] The materials of the third fin 203 and the fourth fin 204 are different, and thus semiconductor devices of different conductive types can be formed by the third fin 203 and the fourth fin 204. In the embodiment, the third fin 203 is used to form a PMOS device, and the fourth fin 204 is used to form an NMOS device.

[0054] In the embodiment, the material of the third fin 203 contains germanium element. Specifically, the material of the third fin 203 includes silicon germanium, and the material of the fourth fin 204 includes silicon.

[0055] In other embodiments, the material of the fourth fin can also contain germanium element, for example, the material of the fourth fin includes silicon germanium, and the material of the third fin includes silicon.

[0056] In the present embodiment, the first region A and the second region B are used to form semiconductor devices with different functions. Thus, the working voltage requirements for the semiconductor devices on the first region A are different from the working voltage requirements for the semiconductor devices on the second region B, so that different thicknesses of the oxide layers are needed to be formed on the surfaces of the first fin 201 and the second fin 202, and on the surfaces of the third fin 203 and the fourth fin 204, to meet the different working voltage requirements of the semiconductor devices on the first region A and the second region B.

[0057] Specifically, in the present embodiment, the first region A is used to form a core device, and the second region B is used to form an input / output device. On this basis, in order to save power consumption and reduce heat generation, the semiconductor devices on the first region A need to use a lower working voltage compared to the semiconductor devices on the second region B. In order to be compatible with the working voltage of the external structure, the semiconductor devices on the second region B need to use a higher working voltage compared to the semiconductor devices on the first region A. Thus, compared to the oxide layer formed on the surfaces of the third fin 203 and the fourth fin 204, a thinner oxide layer needs to be formed on the surfaces of the first fin 201 and the second fin 202 on the first region A.

[0058] Please continue to refer to Figures 3-5 The isolation medium layer 210 is formed on the substrate 200, and the isolation medium layer 210 is also located on part of the side wall surface of the first fin 201.

[0059] In the present embodiment, the isolation medium layer 210 is also located on part of the side wall surface of the second fin 202, the third fin 203, and the fourth fin 204.

[0060] In the present embodiment, the material of the isolation medium layer 210 includes silicon oxide.

[0061] Next, a second oxide layer with a third thickness is formed on the exposed surfaces of the third fin 203 and the fourth fin 204. The specific process of forming the second oxide layer is described with reference to Figures 6-13 .

[0062] Please refer to Figure 6 and Figure 7 , Figure 6 and Figure 4 are consistent with the view direction of Figure 7 and Figure 5 , after the formation of the isolation medium layer and before the subsequent formation of the low-temperature oxide, the native oxide on the surfaces of the third fin 203 and the fourth fin 204 is removed.

[0063] The process of removing the native oxide on the surfaces of the third fin 203 and the fourth fin 204 includes at least one of a dry etching process and a wet etching process.

[0064] By removing the native oxide on the surface of the third fin 203 and the fourth fin 204, the thickness and material properties of the oxide layer formed on the surface of the third fin 203 and the fourth fin 204 can be better controlled. Thus, the performance and reliability of the semiconductor structure are improved.

[0065] It should be understood that in the present embodiment, the native oxide on the surface of the exposed first fin 201 and the second fin 202 is also removed at the same time as the native oxide on the surface of the third fin 203 and the fourth fin 204 is removed.

[0066] Please refer to Figure 8 and Figure 9 , Figure 8 with Figure 6 the viewing direction of the same, Figure 9 with Figure 7 the viewing direction of the same, after removing the native oxide on the surface of the third fin 203 and the fourth fin 204, a low-temperature oxide 220 is formed on the surface of the first fin 201, the second fin 202, the third fin 203 and the fourth fin 204.

[0067] Specifically, the process of forming the low-temperature oxide 220 includes an atomic layer deposition process (ALD), and the temperature of the atomic layer deposition process is 50 degrees Celsius to 95 degrees Celsius.

[0068] Since the low-temperature oxide 220 is formed by a lower process temperature (50 degrees Celsius to 95 degrees Celsius), the risk of the material of the third fin 203 being oxidized by high temperature is avoided, so that it is not easy to form germanium oxide in the process of forming the low-temperature oxide 220, and thus the material of the low-temperature oxide 220 can not contain germanium oxide or contain very little germanium oxide.

[0069] In the present embodiment, after removing the native oxide on the surface of the third fin 203 and the fourth fin 204, the atomic layer deposition process is continued in the same machine without breaking the vacuum to form the low-temperature oxide 220. Thus, it is avoided that the native oxide is formed again on the surface of the third fin 203 and the fourth fin 204 after the native oxide is removed and before the low-temperature oxide 220 is formed.

[0070] The precursors used in the atomic layer deposition process include dichlorosilane, water and pyridine.

[0071] Specifically, within the temperature range of 50 degrees Celsius to 95 degrees Celsius, the dichlorosilane and water react under the catalysis of pyridine to form a monatomic layer of the low-temperature oxide 220 on the surface of the first fin 201, the second fin 202, the third fin 203 and the fourth fin 204.

[0072] In the embodiment, the material of the low-temperature oxide 220 is silicon oxide.

[0073] Please refer to Figure 10 and Figure 11 , Figure 10 with Figure 8 the viewing direction of the third fin 203 consistent, Figure 11 with Figure 9 the viewing direction of the fourth fin 204 consistent, the low-temperature oxide 220 is heat treated to form a second oxide layer 221 with a third thickness M3 on the surface of the first fin 201, the second fin 202, the third fin 203 and the fourth fin 204.

[0074] By heat treating the low-temperature oxide 220, the low-temperature oxide 220 can be densified, so that a second oxide layer 221 with dense material is formed to improve the performance and reliability of the semiconductor structure.

[0075] At the same time, on the one hand, the material of the low-temperature oxide 220 can not contain germanium oxide or contain very little germanium oxide, on the other hand, during the heat treatment process, the first fin 201, the second fin 202, the third fin 203 and the fourth fin 204 are protected by the low-temperature oxide 220, avoiding the risk of high-temperature oxidation of the material of the third fin 203, so that it is not easy to form germanium oxide during the formation of the second oxide layer 221. Therefore, the material of the second oxide layer 221 on the surface of the third fin 203 and the fourth fin 204 can not contain germanium oxide or contain very little germanium oxide, and the interface trap density of the device in the second region B is low, thereby improving the performance of the semiconductor structure.

[0076] In the embodiment, the parameters of the process of heat treating the low-temperature oxide 220 include: the temperature range is 400-900 degrees.

[0077] Please refer to Figure 12 and Figure 13 , Figure 12 with Figure 10 the viewing direction of the third fin 203 consistent, Figure 13 with Figure 11 the viewing direction of the fourth fin 204 consistent, the second oxide layer 221 on the surface of the first fin 201 and the second fin 202 is removed to form a second oxide layer 221 with a third thickness M3 on the surface of the exposed third fin 203 and the fourth fin 204.

[0078] Preferably, the third thickness M3 is in the range of 30-60 angstroms.

[0079] In the embodiment, the method for removing the second oxide layer 221 on the surface of the first fin 201 and the second fin 202 includes: forming a mask layer 230 on the second region B, the mask layer 230 exposing the surface of the second oxide layer 221 on the first region A; after forming the mask layer 230, etching the exposed second oxide layer 221 until the surface of the first fin 201, the surface of the second fin 202 and the surface of the isolation medium layer 210 on the first region A are exposed.

[0080] In the embodiment, the process of etching the exposed second oxide layer 221 includes at least one of a dry etching process and a wet etching process.

[0081] In the embodiment, after removing the second oxide layer 221 on the surface of the first fin 201 and the second fin 202, the mask layer 230 is removed.

[0082] Next, please refer to Figure 14 , Figure 14 With the view direction of Figure 13 , a silicon film 240 with a first thickness M1 is formed on the exposed surface of the first fin 201.

[0083] The silicon film 240 provides material for the subsequent formation of the first oxide layer.

[0084] Since the second oxide layer 221 is formed on the surface of the third fin 203 and the fourth fin 204 before the silicon film 240 is formed, not only the selection degree of the formation process of the second oxide layer 221 is high, but also the formation process of the second oxide layer 221 has little effect on the first oxide layer. Thus, the oxide layer with different thicknesses and low germanium content can be formed on the first region A and the second region B respectively, so as to meet the thickness requirement of the oxide layer on the surface of the fin in different regions while reducing the trap density of the device.

[0085] In the embodiment, the silicon film 240 is also located on the exposed surface of the second fin 202.

[0086] In the embodiment, the process of forming the silicon film 240 on the surface of the first fin 201 and the second fin 202 is a selective epitaxy process.

[0087] By using the selective epitaxy process, the silicon film 240 can be formed only on the exposed surface of the first fin 201 and the second fin 202, avoiding the influence of the process of forming the silicon film 240 on other semiconductor structures.

[0088] In the embodiment, the parameters of the selective epitaxy process include: the precursor includes disilane; the temperature range is 220-350 degrees Celsius.

[0089] Preferably, the first thickness M1 ranges from 13 angstroms to 18 angstroms.

[0090] The first thickness M1 is too small, and in the process of removing the natural oxide on the surface of the silicon film 240, the silicon film 240 is easily consumed to expose the surfaces of the first fin 201 and the second fin 202, which leads to the failure of forming a continuous first oxide layer on the exposed surfaces of the first fin 201 and the second fin 202, and causes the reliability of the semiconductor device to be poor. The first thickness M1 is too large, which leads to the first oxide layer formed later to be too thick, and is not conducive to reducing the working voltage of the semiconductor device. Therefore, by making the first thickness M1 in a suitable range, i.e., making the first thickness M1 in the range of 13 angstroms to 18 angstroms, the reliability of the semiconductor device can be improved, and the working voltage of the semiconductor device can be better reduced.

[0091] In the embodiment, after the mask layer 230 is removed, and before the silicon film 240 is formed, a pretreatment cleaning step is performed on the surfaces of the first fin 201 and the second fin 202 to remove the natural oxide film on the surfaces of the first fin 201 and the second fin 202.

[0092] In the embodiment, the pretreatment cleaning step causes the second oxide layer 221 on the second region B to be consumed, and the thickness of the second oxide layer 221 on the second region B is thinned. Specifically, after the pretreatment cleaning step, the thickness of the second oxide layer 221 on the second region B is thinned by less than 10 angstroms, and therefore, the performance of the device with a thicker second oxide layer 221 is less affected.

[0093] In other embodiments, the mask layer 230 can also be removed after the pretreatment cleaning step, or after the silicon film 240 is formed, to protect the second oxide layer 221 on the second region B by the mask layer 230, so as to further improve the performance of the semiconductor structure.

[0094] In the embodiment, the process of the pretreatment cleaning step includes a dry cleaning process.

[0095] In the embodiment, after the pretreatment cleaning step is performed on the surfaces of the first fin 201 and the second fin 202, a surface treatment is performed on the surfaces of the first fin 201 and the second fin 202, the process of the surface treatment includes a heat treatment process, and the gas used in the heat treatment process includes at least one of nitrogen, hydrogen, and an inert gas.

[0096] By the heat treatment process, on one hand, the stress in the semiconductor structure can be released, on the other hand, before the formation of the silicon film 240, the damage to the surface of the first fin 201 and the second fin 202 caused by the process such as etching, pretreatment cleaning step and the like before the surface treatment can be reduced, the lattice defects on the surface of the first fin 201 and the second fin 202 can be repaired, and the surface roughness of the first fin 201 and the second fin 202 can be reduced, thereby further improving the performance of the semiconductor structure.

[0097] In the embodiment, the parameters of the heat treatment process further include: the temperature range is 500-700 degrees Celsius; the gas used includes at least one of a reducing protective gas such as hydrogen, nitrogen and the like and an inert protective gas; and the pressure range is 30-70 Torr.

[0098] In the embodiment, the pretreatment cleaning step, the surface treatment and the selective epitaxy process are completed in the same machine, so that the silicon film 240 can be formed without breaking the vacuum after the native oxide on the surface of the first fin 201 and the surface of the second fin 202 is removed, thereby avoiding the formation of the native oxide on the surface of the first fin 201 and the surface of the second fin 202 again before the formation of the silicon film 240 after the native oxide on the surface of the first fin 201 and the surface of the second fin 202 is removed.

[0099] Please refer to Figure 15 , Figure 15 With the view direction of Figure 14 , the silicon film 240 is oxidized by a first oxidation process with a lower preset oxidation rate to form a first oxide layer 241 with a second thickness M2, and the second thickness M2 is less than or equal to the first thickness M2.

[0100] By forming the silicon film 240 with the first thickness M1 on the exposed surface of the first fin 201, and oxidizing the silicon film 240 by the first oxidation process with a lower preset oxidation rate to form the first oxide layer 240 with the second thickness M2, the second thickness M2 is less than or equal to the first thickness M1, so that the first oxide layer 241 with small thickness and low germanium oxide content is formed, so that the working voltage of the device is low, the interface trap density is low, and the performance of the semiconductor structure is improved.

[0101] Specifically, since the silicon film 240 is oxidized by the first oxidation process with a lower oxidation rate than a preset oxidation rate, the characteristics of the first oxidation process with a lower oxidation efficiency are utilized to slow down the oxidation speed of the silicon film 240, thereby improving the accuracy of the oxidation degree control of the silicon film 240. Thus, the thin silicon film 240 can be precisely oxidized, and therefore, the first oxide layer 241 with a small thickness (second thickness M2) is formed, thereby lowering the working voltage of the device. Meanwhile, the first oxidation process is less likely to oxidize the first fin 201 containing germanium elements, and therefore, germanium oxide is less likely to be formed during the oxidation of the silicon film 240, so that the content of germanium oxide in the first oxide layer 241 is low, thereby lowering the interface trap density of the device. In summary, the method for forming the semiconductor structure improves the performance of the semiconductor structure.

[0102] It should be understood that the lower preset oxidation rate can refer to the oxidation rate of a certain oxidation process. For example, the lower preset oxidation rate can refer to the oxidation rate of an oxidation process using oxygen as an oxidizing agent.

[0103] In this embodiment, the first oxide layer 241 is located on the surface of the exposed first fin 201 and second fin 202.

[0104] In this embodiment, the third thickness M3 is greater than the second thickness M2, so that the devices on the first region A and the second region B can meet different working voltage requirements.

[0105] Preferably, the second thickness M2 ranges from 5 angstroms to 10 angstroms. By setting the second thickness M2 to range from 5 angstroms to 10 angstroms, the working voltage of the semiconductor device in the first region A can be within a suitable range to meet design requirements.

[0106] In this embodiment, the first oxidation process is a wet chemical oxidation process.

[0107] The oxidizing liquid used in the first oxidation process includes hydrogen peroxide or nitric acid.

[0108] By using hydrogen peroxide or nitric acid as the oxidizing liquid, the oxidation efficiency of the first oxidation process can be low, and therefore, the material of the first fin 201 is less likely to be oxidized, so that germanium oxide is less likely to be formed during the oxidation of the silicon film 240 to form the first oxide layer 241.

[0109] Preferably, the concentration of the hydrogen peroxide ranges from 0.5% to 60%.

[0110] Preferably, the concentration of the nitric acid ranges from 1% to 30%.

[0111] By using the hydrogen peroxide or nitric acid in the concentration range, the control ability of the oxidation efficiency of the silicon film 240 can be further improved to balance the efficiency of forming the first oxide layer 241 and the first oxide layer 241 with low germanium oxide content.

[0112] In the embodiment, the process parameters of the first oxidation process include that the temperature range is 450-800 degrees Celsius.

[0113] In the embodiment, since the oxidation efficiency of the first oxidation process is low and the control precision of the oxidation degree of the silicon film 240 is high, even if the first oxidation process is performed in the temperature range of 450-800 degrees Celsius, the first fin 201 is still not easy to be oxidized. At the same time, since the silicon film 240 can also protect the first fin 201 during the oxidation of the silicon film 240, the risk of oxidation of the first fin 201 is further reduced.

[0114] In another embodiment, the first oxidation process is a dry oxidation process, the oxidant of the first oxidation process includes nitric oxide gas, and the temperature range of the dry oxidation process is 450-800 degrees Celsius. By using nitric oxide gas as the oxidant, the oxidation efficiency of the first oxidation process is low and the control precision of the oxidation degree of the silicon film is high, so even if the first oxidation process is performed in the temperature range of 450-800 degrees Celsius, the first fin is still not easy to be oxidized, so that the germanium oxide is not easy to be formed during the oxidation of the silicon film. At the same time, since the silicon film can also protect the first fin during the oxidation of the silicon film by using the first oxidation process, the risk of oxidation of the first fin is further reduced.

[0115] In the embodiment, after the silicon film 240 with the first thickness M1 is formed on the surface of the first fin 201, and before the silicon film 240 is oxidized, the natural oxide on the surface of the silicon film 240 is removed.

[0116] During the removal of the natural oxide on the surface of the silicon film 240, the silicon film 240 is consumed and the thickness of the silicon film 240 is reduced. Therefore, the first oxide layer 241 with a thickness less than or equal to the first thickness M1 can be formed, that is, the first oxide layer 241 with the second thickness M2 is formed. Specifically, by consuming the silicon film 240 during the removal of the natural oxide on the surface of the silicon film 240, the first oxide layer 241 with a smaller thickness is formed to further reduce the working voltage of the semiconductor device on the first region A.

[0117] In the embodiment, the process of removing the natural oxide on the surface of the silicon film 240 includes at least one of a dry etching process and a wet etching process.

[0118] Correspondingly, an embodiment of the present application also provides a semiconductor structure formed by the above method, which comprises: Figure 15 a substrate 200, wherein the substrate 200 has a plurality of first fins 201 which are separated from each other, and the material of the first fins 201 contains germanium; an isolation medium layer 210 located on the substrate 200 and also located on part of the side wall surface of the first fins 201; and a first oxide layer 241 located on the surface of the exposed first fins 201, wherein the first oxide layer 241 has a second thickness M2.

[0119] In the embodiment, the material of the substrate 200 comprises silicon.

[0120] In other embodiments, the material of the substrate comprises silicon carbide, silicon germanium, multi-element semiconductor material composed of group III-V elements, silicon-on-insulator (SOI) or germanium-on-insulator (GOI), etc. The multi-element semiconductor material composed of group III-V elements comprises InP, GaAs, GaP, InAs, InSb, InGaAs or InGaAsP, etc.

[0121] In the embodiment, the material of the first fins 201 comprises silicon germanium.

[0122] In the embodiment, the material of the isolation medium layer 210 comprises silicon oxide.

[0123] Preferably, the second thickness M2 ranges from 5 angstroms to 10 angstroms.

[0124] In the embodiment, the substrate 200 also has a plurality of second fins 202 which are separated from each other, the materials of the first fins 201 and the second fins 202 are different, the isolation medium layer 210 is also located on part of the side wall surface of the second fins 202, and the first oxide layer 241 is also located on the surface of the exposed second fins 202.

[0125] In the embodiment, the material of the second fins 202 comprises silicon.

[0126] In the embodiment, the substrate 200 comprises a first area A and a second area B (as shown in Figure 12 ). The first fins 201 and the second fins 202 are located on the first area A.

[0127] In the embodiment, the second area B also has a plurality of third fins 203 (as shown in Figure 12 ) and a plurality of fourth fins 204 (as shown in Figure 12 ) which are separated from each other, and the materials of the third fins 203 and the fourth fins 204 are different.

[0128] In the embodiment, the material of the third fin 203 contains germanium element. Specifically, the material of the third fin 203 includes silicon germanium, and the material of the fourth fin 204 includes silicon.

[0129] In other embodiments, the material of the fourth fin can also contain germanium element, for example, the material of the fourth fin includes silicon germanium, and the material of the third fin includes silicon.

[0130] In the embodiment, the isolation medium layer 210 (shown in FIG. 12) is also located on part of the sidewall surface of the third fin 203 and the fourth fin 204.

[0131] In the embodiment, the semiconductor structure further includes a second oxide layer 221 (shown in FIG. 12) located on the exposed surface of the third fin 203 and the fourth fin 204, the second oxide layer 221 has a third thickness M3 (shown in FIG. 12), and the third thickness M3 is greater than the second thickness M2. Preferably, the third thickness M3 ranges from 30 angstroms to 60 angstroms.

[0132] Although the present application has been disclosed as above, the present application is not limited to the above. Any person skilled in the art can make various modifications and changes without departing from the spirit and scope of the present application, and the protection scope of the present application should be subject to the scope defined by the claims.

Claims

1. A semiconductor structure, characterized in that, include: A substrate having a plurality of mutually discrete first fins, wherein the material of the first fins contains germanium. An isolation dielectric layer is located on the substrate, and the isolation dielectric layer is also located on a portion of the sidewall surface of the first fin; A first oxide layer located on the exposed surface of the first fin, the first oxide layer having a second thickness; The first oxide layer is formed by first forming a silicon film of a first thickness on the surface of the first fin, and then oxidizing the silicon film using a first oxidation process with a preset oxidation rate, wherein the preset oxidation rate is lower than the oxidation rate of an oxidation process using oxygen as an oxidant; the second thickness is less than or equal to the first thickness.

2. The semiconductor structure as described in claim 1, characterized in that, The first fin is made of silicon and germanium.

3. The semiconductor structure as described in claim 1, characterized in that, The second thickness ranges from 5 angstroms to 10 angstroms.

4. The semiconductor structure as described in claim 1, characterized in that, The substrate also has several mutually independent second fins. The first fin and the second fin are made of different materials. An isolation dielectric layer is also located on part of the sidewall of the second fin, and a first oxide layer is also located on the exposed surface of the second fin.

5. The semiconductor structure as described in claim 4, characterized in that, The material of the second fin includes silicon.

6. The semiconductor structure as described in claim 5, characterized in that, The substrate includes a first region and a second region. The first fin and the second fin are located on the first region. The second region also has a plurality of third fins and a plurality of fourth fins that are mutually independent. The material of the third fins or the fourth fins contains germanium. The isolation dielectric layer is also located on part of the sidewall surface of the third fins and the fourth fins. The semiconductor structure further includes a second oxide layer located on the exposed surfaces of the third and fourth fins, the second oxide layer having a third thickness greater than the second thickness.

7. The semiconductor structure as described in claim 6, characterized in that, The materials for the third or fourth fin include silicon and germanium.

8. A method for forming a semiconductor structure, characterized in that, include: A substrate is provided having a plurality of mutually discrete first fins, the material of which contains germanium. An isolation dielectric layer is formed on the substrate, and the isolation dielectric layer is also located on a portion of the sidewall surface of the first fin; After the isolation dielectric layer is formed, a silicon film of a first thickness is formed on the exposed surface of the first fin; The silicon film is oxidized using a first oxidation process with a lower than preset oxidation rate to form a first oxide layer with a second thickness, the second thickness being less than or equal to the first thickness; the preset oxidation rate is lower than the oxidation rate of an oxidation process using oxygen as an oxidant.

9. The method for forming a semiconductor structure as described in claim 8, characterized in that, The first oxidation process is a wet chemical oxidation process.

10. The method for forming a semiconductor structure as described in claim 9, characterized in that, The process parameters for the first oxidation process include a temperature range of 450 degrees Celsius to 800 degrees Celsius.

11. The method for forming a semiconductor structure as described in claim 9, characterized in that, The oxidizing liquid used in the first oxidation process includes hydrogen peroxide or nitric acid.

12. The method for forming a semiconductor structure as described in claim 11, characterized in that, The concentration range of the hydrogen peroxide is 0.5% to 60%.

13. The method for forming a semiconductor structure as described in claim 11, characterized in that, The concentration range of the nitric acid is 1% to 30%.

14. The method for forming a semiconductor structure as described in claim 8, characterized in that, The first oxidation process is a dry oxidation process, and the oxidant in the first oxidation process includes nitrogen oxide gas.

15. The method for forming a semiconductor structure as described in claim 14, characterized in that, The temperature range of the first oxidation process is 450 degrees Celsius to 800 degrees Celsius.

16. The method for forming a semiconductor structure as described in claim 8, characterized in that, The process of forming a silicon film of a first thickness on the surface of the first fin is a selective epitaxial process.

17. The method for forming a semiconductor structure as described in claim 8, characterized in that, The first thickness ranges from 13 angstroms to 18 angstroms, and the second thickness ranges from 5 angstroms to 10 angstroms.

18. The method for forming a semiconductor structure as described in claim 17, characterized in that, Also includes: After forming a silicon film of a first thickness on the surface of the first fin, and before oxidizing the silicon film, the natural oxides on the surface of the silicon film are removed.

19. The method for forming a semiconductor structure as described in claim 8, characterized in that, Before forming a silicon film of a first thickness on the exposed first fin surface, the method further includes a pretreatment cleaning step for the first fin surface to remove the native oxide film on the first fin surface.

20. The method for forming a semiconductor structure as described in claim 19, characterized in that, After the pretreatment and cleaning step of the first fin surface, the method further includes: performing surface treatment on the first fin on the same machine, wherein the surface treatment process includes a heat treatment process, and the gas used in the heat treatment process includes at least one of nitrogen, hydrogen and inert gas.

21. The method for forming a semiconductor structure as described in claim 8, characterized in that, The substrate also has several mutually independent second fins, the first fin and the second fin are made of different materials, an isolation medium layer is located on part of the sidewall of the second fin, and a first oxide layer is located on the exposed surface of the second fin.

22. The method for forming a semiconductor structure as described in claim 21, characterized in that, The substrate includes a first region and a second region. The first fin and the second fin are located on the first region. The second region also has a plurality of third fins and a plurality of fourth fins that are mutually independent. The material of the third fins or the fourth fins contains germanium. The isolation dielectric layer is also located on part of the sidewall surface of the third fins and the fourth fins. The method for forming the semiconductor structure further includes: before forming a silicon film of a first thickness on the exposed surfaces of the first and second fins, forming a second oxide layer of a third thickness on the exposed surfaces of the third and fourth fins, wherein the third thickness is greater than the second thickness.

23. The method for forming a semiconductor structure as described in claim 22, characterized in that, The method for forming a second oxide layer of a third thickness on the surfaces of the third and fourth fins includes: after forming an isolation medium layer, forming a low-temperature oxide on the surfaces of the first, second, third, and fourth fins, wherein the process for forming the low-temperature oxide includes an atomic layer deposition process, and the temperature of the atomic layer deposition process is 50 degrees Celsius to 95 degrees Celsius; heat-treating the low-temperature oxide to form a second oxide layer of a third thickness on the surfaces of the first, second, third, and fourth fins; and removing the second oxide layer from the surfaces of the first and second fins.

24. The method for forming a semiconductor structure as described in claim 23, characterized in that, The method for forming a second oxide layer of a third thickness on the surfaces of the third and fourth fins further includes removing the native oxides on the surfaces of the third and fourth fins after forming the isolation medium layer and before forming the low-temperature oxide.

Images