System-on-a-Chip and its Data Programming Method

Abstract

This invention provides a system-on-a-chip (SoC) and a method for burning data into it. The SoC includes an internal flash memory and a space allocation circuit. The space allocation circuit is coupled to the internal flash memory and an external flash memory. The space allocation circuit burns data into the internal flash memory and the external flash memory according to a first storage space in the internal flash memory, a second storage space in the external flash memory, and the size of the data to be burned. In the overall memory address space of the SoC, the access addresses corresponding to the internal flash memory and the external flash memory are continuous.

Description

Technical Field

[0001] The embodiments of the present invention are mainly related to a system-on-a-chip (SoC) technology, and more particularly to a SoC technology that enables the continuity of data stored in the internal flash memory and external flash memory of the SoC by configuring a space allocation circuit in the SoC. Background Technology

[0002] With the advancement of technology, System-on-a-Chip (SOC) chips are widely used in electronic system products. The SOC used in these products operates by accessing code stored in flash memory. However, the storage space of the flash memory within an SOC is limited. If a product project under development needs to add or expand its internal flash memory, it often requires developing a new SOC to modify the size of the flash memory, or abandoning the addition of new code. This leads to increased development costs, limited code writing space, and delays in project development. Summary of the Invention

[0003] In view of the problems in the background technology described above, embodiments of the present invention provide a system-on-a-chip and a data burning method.

[0004] According to an embodiment of the present invention, a system-on-a-chip (SoC) is provided. The SoC includes an internal flash memory and a space allocation circuit. The space allocation circuit is coupled to an internal flash memory and an external flash memory. The space allocation circuit, based on a first storage space in the internal flash memory, a second storage space in the external flash memory, and the size of the data to be burned, burns data into the internal flash memory and the external flash memory, wherein the access addresses corresponding to the internal flash memory and the external flash memory are continuous in the overall memory address space of the SoC.

[0005] In some embodiments, the data to be burned includes microcontroller firmware code and user code.

[0006] In some embodiments, the system-on-a-chip further includes a security circuit. The security circuit encrypts or decrypts encrypted data stored in the internal and external flash memories according to a security key.

[0007] In some embodiments, the system-on-a-chip further includes an identification code comparison circuit and an arbitration circuit. The identification code comparison circuit determines whether an identification code of the external flash memory is valid. The arbitration circuit is coupled to the identification code comparison circuit and the security circuit, and determines whether the security circuit needs to access data in the internal or external flash memory.

[0008] In some embodiments, the system chip further includes an authentication code comparison circuit. The authentication code comparison circuit determines whether an authentication code of the burned data is valid.

[0009] According to an embodiment of the present invention, a data burning method is provided. The data burning method is applicable to a system-on-a-chip (SoC). The SoC includes an internal flash memory and an external flash memory coupled to it. The steps of the data burning method include: using a space allocation circuit of the SoC to burn the data into the internal flash memory and the external flash memory according to a first storage space of the internal flash memory, a second storage space of the external flash memory, and the size of the data to be burned, wherein the access addresses corresponding to the internal flash memory and the external flash memory are continuous in a total memory address space of the SoC.

[0010] Regarding other additional features and advantages of the present invention, those skilled in the art can make some modifications and refinements based on the system single chip and data burning method disclosed in the embodiments of this invention without departing from the spirit and scope of the present invention.

[0011] According to the system-on-a-chip (SoC) and data programming method proposed in this invention, the storage space of flash memory can be increased without modifying the SoC hardware, thus eliminating the cost of developing a new SoC. Furthermore, according to the SoC and data programming method proposed in this invention, the SoC's flash memory comprises both internal and external flash memory. The external flash memory can be increased or decreased according to the space requirements of the development project, avoiding unnecessary waste, and the code stored in the external flash memory is also encrypted and protected. Attached Figure Description

[0012] Figure 1 This shows a block diagram of a system single-chip 100 according to an embodiment of the present invention.

[0013] Figures 2A-2B A flowchart illustrating the microcontroller executing data stored in internal and external flash memory according to an embodiment of the present invention.

[0014] Figure 3 A flowchart of a data burning method according to an embodiment of the present invention.

[0015] Attached icon number

[0016] 100: System-on-a-Chip

[0017] 110: Authentication Code Comparison Circuit

[0018] 120: Microcontroller

[0019] 121: Random Access Memory

[0020] 130: Safety Circuit

[0021] 140: Arbitrator

[0022] 150: Space Allocation Circuit

[0023] 160: Identification code comparison circuit

[0024] 170: Internal Flash Memory

[0025] 200: External Flash Memory

[0026] S210~S290: Steps Detailed Implementation

[0027] This section describes preferred embodiments of the invention and is intended to illustrate the spirit of the invention rather than to limit its scope of protection. The scope of protection of the invention shall be determined by the appended claims.

[0028] Figure 1 This shows a block diagram of a System on a Chip (SOC) 100 according to an embodiment of the present invention. Figure 1 As shown, the system-on-a-chip 100 may include an authentication code comparison circuit 110, a microcontroller (MCU) 120, a security circuit 130, an arbitrator 140, a space allocation circuit 150, an identification code comparison circuit 160, and an internal flash memory 170. Furthermore, as... Figure 1 As shown, the system-on-a-chip 100 is coupled to an external flash memory 200. Note that in... Figure 1 The block diagrams shown are merely for illustrating embodiments of the present invention, and the present invention is not intended to be construed as such. Figure 1 Limited to.

[0029] According to one embodiment of the present invention, when data is to be burned into the internal flash memory 170 and the external flash memory 200, the authentication code comparison circuit 110 can obtain the authentication code provided in the burned data from the microcontroller 120 and determine whether the burned data is valid. According to an embodiment of the present invention, the burned data may include microcontroller firmware (FW) code and user code (Customer Code), but the present invention is not limited thereto.

[0030] According to one embodiment of the present invention, the microcontroller 120 may have a random access memory (RAM) 121. The microcontroller 120 may transmit the authentication code provided in the burned data to the authentication code comparison circuit 110, and receive the comparison result generated by the authentication code comparison circuit 110 from the authentication code comparison circuit 110. The microcontroller 120 may access data encrypted and decrypted via the security circuit 130. Furthermore, the microcontroller 120 may obtain the comparison result generated by the identification code comparison circuit 160 from the identification code comparison circuit 160.

[0031] According to one embodiment of the present invention, the security circuit 130 may have a security key. The security key may be generated via a random number generator (not shown). Different system chips may have different security keys. The security key can only be accessed by the security circuit 130. That is, apart from the security circuit 130, other circuits and components of the system chip 100 cannot access the security key. The security circuit 130 may, based on the security key, encrypt the data to be burned into the internal flash memory 170 and the external flash memory 200, or decrypt the encrypted data stored in the internal flash memory 170 and the external flash memory 200, using an encryption algorithm (e.g., Advanced Encryption Standard (AES), Triple Data Encryption Algorithm (3DEA), Elliptic Curve Cryptography (ECC), RSA encryption algorithm, but the present invention is not limited thereto). According to one embodiment of the present invention, the arbitrator 140, space allocation circuit 150, identification code comparison circuit 160 and internal flash memory 170 of the system single chip 100 can only be accessed via the security circuit 130.

[0032] According to one embodiment of the present invention, the arbitrator 140 can be used to determine whether the security circuit 130 is currently accessing data in the internal flash memory 170 or data in the external flash memory 200. Furthermore, the arbitrator 140 can be used to instruct the identification code comparison circuit 160 to determine whether the identification code of the external flash memory 200 is valid.

[0033] According to one embodiment of the present invention, the space allocation circuit 150 can, according to the instructions of the arbitrator 140, burn data to the internal flash memory 170 and the external flash memory 200. The data to be burned into the internal flash memory 170 and the external flash memory 200 by the space allocation circuit 150 is first encrypted by the security circuit 130. When burning data, the space allocation circuit 150 can, according to a first storage space in the internal flash memory 170, a second storage space in the external flash memory 200, and the size of the data to be burned, burn the data into the internal flash memory 170 and the external flash memory 200.

[0034] According to one embodiment of the present invention, in the global address of the system single chip 100, the access addresses corresponding to the data burned into the internal flash memory 170 and the external flash memory 200 are continuous. Tables 1 to 4 will be used as examples below for illustration.

[0035]

[0036] Tables 1-4 illustrate examples of burning data into internal flash memory 170 and external flash memory 200 according to an embodiment of the present invention. In this embodiment, as shown in Tables 1 and 2, the data to be burned into internal flash memory 170 and external flash memory 200 is 3-byte microcontroller firmware code and 4-byte user code, but the present invention is not limited thereto. The microcontroller firmware code contains data D0 to D2. After being encrypted by security circuit 130, data D0 to D2 becomes encrypted data D0' to D2'. The user code contains data C0 to C3. After being encrypted by security circuit 130, data C0 to C3 becomes encrypted data C0' to C3'. In this embodiment, as shown in Table 3, both internal flash memory 170 and external flash memory 200 have 4-byte storage space, but the present invention is not limited thereto. When the space allocation circuit 150 needs to burn encrypted data D0'~D2' and encrypted data C0'~C3' into the internal flash memory 170 and the external flash memory 200, the space allocation circuit 150 will burn the encrypted data D0'~D2' and C0'~C3' sequentially into the internal flash memory 170 and the external flash memory 200 according to the storage space of the internal flash memory 170, the storage space of the external flash memory 200, and the size of the encrypted data D0'~D2' and C0'~C3'. First, the space allocation circuit 150 will burn the encrypted data D0'~D2' into the internal flash memory 170. Then, the space allocation circuit 150 will burn the encrypted data C0'~C3' into the internal flash memory 170 and the external flash memory 200. Since the internal flash memory 170 has one byte of storage space remaining, the space allocation circuit 150 will burn the encrypted data C0' into the internal flash memory 170, and then burn the encrypted data C1' to C3' into the external flash memory 200. As shown in Table 4, the addresses of the internal flash memory 170 and the external flash memory 200 can be mapped to flash memory access addresses 0 to 7 in the global address of the system chip 100. Flash memory access addresses 0 to 7 are consecutive access addresses. Therefore, when the microcontroller 120 needs to read the encrypted data C0' to C3', even though the encrypted data C0' and the encrypted data C1' to C3' are burned into the internal flash memory 170 and the external flash memory 200 respectively, the microcontroller 120 will still treat the encrypted data C0' to C3' as consecutive data.

[0037] According to one embodiment of the present invention, when new data needs to be burned into the internal flash memory 170 and the external flash memory 200 (i.e., updating the data stored in the internal flash memory 170 and the external flash memory 200), if the storage space of the internal flash memory 170 and the external flash memory 200 is insufficient to store all the new data, the internal flash memory 170 and the external flash memory 200 can be replaced with internal flash memory and external flash memory with larger storage space. According to another embodiment of the present invention, it is also possible to replace only the internal flash memory 170 with an internal flash memory with larger storage space, or replace the external flash memory 200 with an external flash memory with larger storage space. The following will use Tables 5 to 8 as examples for explanation.

[0038]

[0039] Table 5

[0040]

[0041] Table 6

[0042]

[0043] Tables 5-8 illustrate examples of burning data into a new internal flash memory 170' and a new external flash memory 200' according to another embodiment of the present invention. In this embodiment, as shown in Tables 5 and 6, the data to be burned into the internal flash memory 170 and the external flash memory 200 is 6 bytes of new microcontroller firmware code and 7 bytes of new user code, but the invention is not limited thereto. The new microcontroller firmware code contains data B0-B5. After being encrypted by the security circuit 130, data B0-B5 becomes encrypted data B0'-B5'. The new user code contains data E0-E6. After being encrypted by the security circuit 130, data E0-E6 becomes encrypted data E0'-E6'. However, as shown in Table 3, the storage space of the internal flash memory 170 and the external flash memory 200 is insufficient to store all the new encrypted data B0'-B5' and E0'-E6'. Therefore, in this embodiment, the internal flash memory 170 and the external flash memory 200 are replaced with a new internal flash memory 170' and a new external flash memory 200'.

[0044] In this embodiment, as shown in Table 5, both the new internal flash memory 170' and the new external flash memory 200' have 8-bit storage space, but the present invention is not limited thereto. When the space allocation circuit 150 needs to burn encrypted data B0'~B5' and encrypted data E0'~E6' into the new internal flash memory 170' and the new external flash memory 200', the space allocation circuit 150 will burn the encrypted data B0'~B5' and encrypted data E0'~E6' sequentially into the new internal flash memory 170' and the new external flash memory 200' according to the storage space of the new internal flash memory 170', the storage space of the new external flash memory 200', and the size of the encrypted data B0'~B5' and encrypted data E0'~E6'. First, the space allocation circuit 150 will burn the encrypted data B0'~B5' into the new internal flash memory 170'. Next, the space allocation circuit 150 sequentially burns the encrypted data E0' to E6' into the new internal flash memory 170' and the new external flash memory 200'. Since the new internal flash memory 170' has 2 bytes of storage space remaining, the space allocation circuit 150 burns the encrypted data E0' to E1' into the new internal flash memory 170', and then burns the encrypted data E2' to E6' into the new external flash memory 200'. As shown in Table 8, the addresses of the new internal flash memory 170' and the new external flash memory 200' correspond to flash memory access addresses 0 to 15 in the global address of the system chip 100. Flash memory access addresses 0 to 15 are consecutive access addresses. Therefore, when the microcontroller 120 needs to read encrypted data E0' to E6', even if the encrypted data E0' to E1' and the encrypted data E2' to E6' are burned into the new internal flash memory 170' and the new external flash memory 200' respectively, the microcontroller 120 will still regard the encrypted data E0' to E6' as continuous data.

[0045] According to one embodiment of the present invention, the identification code comparison circuit 160 can determine whether the identification code of the external flash memory 200 is valid according to the instruction of the arbitrator 140, and transmit the comparison result to the microcontroller 120.

[0046] According to one embodiment of the present invention, the access mode of the flash memory of the system single chip 100 can be applied to burst read operations.

[0047] Figures 2A-2B This is a flowchart illustrating the execution of data stored in internal and external flash memory by a microcontroller according to an embodiment of the present invention. References will follow. Figure 1The system single chip 100 will be used as an example. In step S210, when the system single chip 100 is started, the microcontroller 120 can notify the arbitrator 140 via the security circuit 130 to retrieve the encrypted data stored in the internal flash memory 170.

[0048] In step S220, the arbitrator 140 can load the encrypted data stored in the internal flash memory 170 into the security circuit 130 for decryption.

[0049] In step S230, after the security circuit 130 decrypts the encrypted data stored in the internal flash memory 170, it can write the decrypted data into the random access memory 121 of the microcontroller 120, and the microcontroller 120 can then execute the decrypted data.

[0050] In step S240, when the microcontroller 120 is processing the decrypted data, it can determine whether the encrypted data stored in the external flash memory 200 needs to be used. If the microcontroller 120 determines that the encrypted data stored in the external flash memory 200 does not need to be used, it means that the current operation only requires the use of the encrypted data stored in the internal flash memory 170. Therefore, the microcontroller 120 will not request the security circuit 130 to access the encrypted data in the external flash memory 200.

[0051] When the microcontroller 120 determines that it needs to use encrypted data stored in the external flash memory 200, it proceeds to step S250. In step S250, the microcontroller 120 may, via the security circuit 130, instruct the arbitrator 140 to instruct the identification code comparison circuit 160 to determine whether an identification code in the external flash memory 200 is valid, and the identification code comparison circuit 160 will transmit the comparison result to the microcontroller 120. When the microcontroller 120 determines from the comparison result that the identification code of the external flash memory 200 is invalid, it means that the identification code of the external flash memory 200 cannot be recognized. Therefore, the microcontroller 120 can only access data in the internal flash memory 170.

[0052] When the microcontroller 120 determines that the identification code of the external flash memory 200 is valid based on the comparison result, it proceeds to step S260. In step S260, the microcontroller 120 can calculate the access address corresponding to the external flash memory 200 in the global address of the system single chip 100 based on the information of the external flash memory 200 (e.g., the capacity of the external flash memory 200).

[0053] In step S270, based on the access address corresponding to the external flash memory 200, the microcontroller 120 can notify the arbitrator 140 via the security circuit 130 to retrieve the encrypted data stored in the external flash memory 200.

[0054] In step S280, the arbitrator 140 can load the encrypted data stored in the external flash memory 200 into the security circuit 130 for decryption.

[0055] In step S290, after the security circuit 130 decrypts the encrypted data stored in the external flash memory 200, the security circuit 130 can write the decrypted data into the random access memory 121 of the microcontroller 120, and the microcontroller 120 can then execute the decrypted data.

[0056] Figure 3 This is a flowchart of a data burning method according to an embodiment of the present invention. The debugging method is applicable to a system-on-a-chip 100. For example... Figure 3 As shown, in step S310, when data is to be burned into the internal flash memory 170 of the system single chip 100 and the external flash memory 200 coupled to the system single chip 100, a space allocation circuit 150 of the system single chip 100 burns the data into the internal flash memory 170 and the external flash memory 200 according to a first storage space of the internal flash memory 170, a second storage space of the external flash memory 200 and the size of the data to be burned, wherein the access addresses corresponding to the data burned into the internal flash memory 170 and the external flash memory 200 are continuous.

[0057] According to an embodiment of the present invention, in the data burning method, the data burned into the internal flash memory 170 and the external flash memory 200 may include microcontroller firmware code and user code.

[0058] According to one embodiment of the present invention, the data burning method further includes, after burning data into the internal flash memory 170 and the external flash memory 200, encrypting the data to be burned into the internal flash memory 170 and the external flash memory 200 by the security circuit 130 of the system chip 100 according to a security key. Furthermore, the security circuit 130 of the system chip 100 can also decrypt the encrypted data stored in the internal flash memory 170 and the external flash memory 200 according to the security key.

[0059] According to one embodiment of the present invention, the data burning method further includes determining whether the identification code of the external flash memory 200 is valid using an identification code comparison circuit 160 of the system single chip 100. Furthermore, according to another embodiment of the present invention, the data burning method further includes determining whether the security circuit 130 needs to access data in the internal flash memory 170 or the external flash memory 200 using an arbitrator 140 of the system single chip 100. After the security circuit 130 encrypts the burned data, the arbitrator 140 can transmit the encrypted burned data to the space allocation circuit 150.

[0060] According to one embodiment of the present invention, the data burning method further includes determining whether the authentication code of the data to be burned into the internal flash memory 170 and the external flash memory 200 is valid by means of an authentication code comparison circuit 110 of the system single chip 100, and transmitting the comparison result to the microcontroller 120 of the system single chip 100. If the authentication code of the data to be burned into the internal flash memory 170 and the external flash memory 200 is valid, the microcontroller 120 of the system single chip 100 will instruct to start the burning process. If the authentication code of the data to be burned into the internal flash memory 170 and the external flash memory 200 is invalid, the microcontroller 120 of the system single chip 100 will terminate the burning process.

[0061] According to the system-on-a-chip (SoC) and data programming method proposed in this invention, the storage space of flash memory can be increased without modifying the SoC hardware, thus eliminating the cost of developing a new SoC. Furthermore, according to the SoC and data programming method proposed in this invention, the SoC's flash memory comprises both internal and external flash memory. The external flash memory can be increased or decreased according to the space requirements of the development project, avoiding unnecessary waste, and the code stored in the external flash memory is also encrypted and protected. Moreover, according to the SoC and data programming method proposed in this invention, the internal and external flash memory have contiguous access addresses in the overall memory address space. Compared to a scattered and discontinuous access address approach, this reduces the hardware resources required and operational complexity of the entire SoC. Furthermore, contiguous access addresses also facilitate high-throughput access (e.g., burst access) to avoid latency during real-time computation.

[0062] The serial numbers in this specification and the claims, such as "first," "second," etc., are for convenience only and there is no sequential relationship between them.

[0063] The steps of the methods and algorithms disclosed in this specification can be directly applied to hardware and software modules or a combination of both by executing a processor. A software module (including execution instructions and related data) and other data can be stored in a data memory, such as random access memory (RAM), flash memory, read-only memory (ROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, portable hard disks, optical disc read-only memory (CD-ROM), DVDs, or any other computer-readable storage media format in the art. A storage media can be coupled to a machine device, for example, a computer / processor (referred to as processor in this specification for convenience), through which the processor can read information (such as code) and write information to the storage media. A storage media can integrate a processor. An application-specific integrated circuit (ASIC) includes the processor and the storage media. A user equipment includes an application-specific integrated circuit. In other words, the processor and storage media are included in the user equipment in a manner that is not directly connected to the user equipment. Furthermore, in some embodiments, any product suitable for computer programs includes a readable storage medium, wherein the readable storage medium includes code associated with one or more of the disclosed embodiments. In some embodiments, the product of the computer program may include packaging material.

[0064] The preceding paragraphs use multiple levels of description. Clearly, the teachings herein can be implemented in various ways, and any particular architecture or functionality disclosed in the examples is merely a representative case. Based on the teachings herein, any person skilled in the art should understand that the various levels disclosed herein can be implemented independently or that two or more levels can be implemented in combination.

[0065] Although this disclosure has been presented above with reference to embodiments, it is not intended to limit this disclosure. Any person skilled in the art may make some modifications and refinements without departing from the spirit and scope of this disclosure. Therefore, the scope of protection of the invention shall be determined by the scope of the appended claims.

Claims

1. A system-on-a-chip, characterized in that, include: An internal flash memory; as well as A space allocation circuit is coupled to the aforementioned internal flash memory and an external flash memory, wherein the aforementioned internal flash memory has a first storage space and the aforementioned external flash memory has a second storage space; The aforementioned space allocation circuit, based on the first storage space, the second storage space, and the size of the burned data, sequentially burns the data into the first storage space and the second storage space. In the overall memory address of the aforementioned system single chip, the access addresses corresponding to the aforementioned first storage space and the aforementioned second storage space are continuous.

2. The system-on-a-chip as described in claim 1, characterized in that, The data burned in includes microcontroller firmware code and user code.

3. The system-on-a-chip as described in claim 1, characterized in that, Including: A security circuit encrypts, or decrypts, encrypted data to be burned into the internal flash memory and the external flash memory, according to a security key.

4. The system-on-a-chip as described in claim 3, characterized in that, Including: An identification code comparison circuit determines whether the identification code of the aforementioned external flash memory is valid; and An arbitration circuit is coupled to the identification code comparison circuit and the security circuit, and determines whether the security circuit needs to access data in the internal flash memory or the external flash memory.

5. The system-on-a-chip as described in claim 4, characterized in that, Including: An authentication code comparison circuit is used to determine whether the authentication code of the data burned in is valid.

6. A data burning method, characterized in that, A system-on-a-chip (SoC) is applicable, wherein the SoC includes an internal flash memory and an external flash memory coupled to an external flash memory, wherein the internal flash memory has a first storage space and the external flash memory has a second storage space, and the data burning method includes: The space allocation circuit of the above-mentioned system single chip sequentially burns the data into the first storage space and the second storage space according to the first storage space, the second storage space and the size of the data to be burned; In the overall memory address of the aforementioned system single chip, the access addresses corresponding to the aforementioned first storage space and the aforementioned second storage space are continuous.

7. The data burning method as described in claim 6, characterized in that, The data burned in includes microcontroller firmware code and user code.

8. The data burning method as described in claim 6, characterized in that, Including: The system chip's security circuit encrypts the data to be burned into the internal flash memory and the external flash memory using a security key, or decrypts the encrypted data stored in the internal flash memory and the external flash memory.

9. The data burning method as described in claim 8, characterized in that, Including: The identification code comparison circuit of the aforementioned system single chip is used to determine whether the identification code of the aforementioned external flash memory is valid; and The arbitration circuit of the aforementioned system chip determines whether the security circuit needs to access data in the aforementioned internal flash memory or the aforementioned external flash memory.

10. The data burning method as described in claim 9, characterized in that, Including: The authentication code comparison circuit of the above-mentioned system single chip is used to determine whether the authentication code of the burned data is valid.

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