Packaging structure and manufacturing method thereof, circuit board and manufacturing method thereof

Abstract

The present application proposes a packaging structure, including at least one semiconductor, at least one connector and a packaging body, wherein the connector is arranged on the semiconductor, the connector is electrically connected to the semiconductor, the packaging body covers the semiconductor, and part of the connector is exposed from the packaging body. The packaging structure provided by the present application does not need to be provided with micro-vias, which is conducive to improving the reliability of the electrical connection of the semiconductor. In addition, the present application also provides a method for manufacturing a packaging structure, and in addition, the present application also provides a circuit board and a method for manufacturing the same.

Description

Technical Field

[0001] The present application relates to a packaging structure and a manufacturing method thereof, a circuit board and a manufacturing method thereof. Background Art

[0002] Metal-oxide semiconductor field effect transistor (MOSFET) is a common power semiconductor. It is widely used in circuit boards to achieve power conversion and circuit control because of its advantages such as small on-resistance, low loss, simple driving circuit, and good thermal resistance. In the prior art, after the power semiconductor is embedded in the circuit board, it is usually connected to the circuit layer in the circuit board through micro-vias. However, micro-vias are not only difficult to process, but also have poor reliability. Summary of the invention

[0003] In order to solve the problems involved in the prior art, the present application provides a packaging structure with a semiconductor.

[0004] In addition, it is also necessary to provide a manufacturing method having the above packaging structure.

[0005] In addition, it is also necessary to provide a circuit board having the above packaging structure.

[0006] In addition, it is also necessary to provide a method for manufacturing the above-mentioned circuit board.

[0007] A method for manufacturing a packaging structure comprises the following steps: providing a wafer, the wafer comprising a plurality of semiconductors; arranging a connection board on the wafer, the connection board comprising a plurality of connectors, each connector electrically connected to at least one of the semiconductors, to obtain a first intermediate; arranging a packaging body on the outside of the first intermediate, the packaging body covering the wafer and the connection board; removing a portion of the packaging body corresponding to the connector to obtain a second intermediate, and dividing the second intermediate to obtain a plurality of the packaging structures, wherein each of the packaging structures comprises at least one of the semiconductors and at least one connector electrically connected to the semiconductor.

[0008] A packaging structure includes at least one semiconductor, at least one connecting component and a packaging body, wherein the connecting component is arranged on the semiconductor and electrically connected to the semiconductor, the packaging body covers the semiconductor, and a part of the connecting component is exposed from the packaging body.

[0009] Furthermore, the semiconductor is a power semiconductor, and the connecting piece includes a lead frame, a metal clip or a metal sheet.

[0010] Furthermore, the semiconductor includes a semiconductor body, a source, a gate and a drain, the source and the gate are arranged on one side of the semiconductor body, the drain is arranged on the other side of the semiconductor body, the gate is insulated from the drain or the source, and a PN junction is arranged between the drain and the source.

[0011] Furthermore, the connector includes a connector body, an inner connection pad and an outer connection pad, the connector body is arranged between the inner connection pad and the outer connection pad, the inner connection pad is electrically connected to the source, the gate or the drain, and the outer connection pad is exposed from the package body.

[0012] Furthermore, the packaging structure further includes a conductor, and the conductor is arranged between the inner connection pad and the source, the gate or the drain.

[0013] A method for manufacturing a circuit board includes the following steps: providing a first circuit substrate, wherein the first circuit substrate includes a dielectric layer and a copper foil layer arranged on the dielectric layer, and the first circuit substrate is provided with openings.

[0014] The above-mentioned packaging structure is provided, and the packaging structure is arranged in the opening. The copper foil layer is electroplated to form an electroplating layer, the electroplating layer covers the connecting piece, and the electroplating layer and the copper foil layer are etched to form a circuit layer, and the circuit layer is electrically connected to the connecting piece. A second circuit substrate and an adhesive layer are provided, and the adhesive layer is arranged between the circuit layer and the second circuit substrate, and the circuit board, the second circuit substrate and the adhesive layer are pressed together to obtain the circuit board.

[0015] Furthermore, the method further includes the steps of: setting a through hole on the circuit board, the through hole passing through the first circuit substrate, the adhesive layer and the second circuit substrate, and setting a conductor in the through hole, the conductor electrically connecting the circuit layer and the second circuit substrate.

[0016] A circuit board comprises a first circuit substrate, a second circuit substrate, an adhesive layer and the packaging structure as described above, wherein the first circuit substrate comprises a dielectric layer and a circuit layer arranged on the dielectric layer, the first circuit substrate is provided with an opening, the packaging structure is arranged in the opening, the packaging structure is arranged in the opening, the connecting member is electrically connected to the circuit layer, and the adhesive layer is arranged between the second circuit substrate and the circuit layer.

[0017] Furthermore, the thickness of the first circuit substrate is the same as the thickness of the packaging structure.

[0018] The packaging structure provided in the present application connects the semiconductor and the connector together through a packaging body. The connector is electrically connected to the semiconductor, and the connector partially exposed from the packaging body can be used to connect the circuit layer in the circuit board, thereby eliminating the need to set up micro-conducting holes, which is beneficial to improving the reliability of the electrical connection between the semiconductor and the circuit layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic diagram of a semiconductor provided according to an embodiment of the present application.

[0020] Figure 2 for Figure 1 The semiconductor shown is a schematic diagram after the first connecting member and the second connecting member are provided.

[0021] Figure 3 A schematic diagram of a packaging structure used in an embodiment of the present application.

[0022] Figure 4 A schematic diagram of a first circuit substrate provided in accordance with an embodiment of the present application.

[0023] Figure 5 for Figure 4 A schematic diagram of the first circuit substrate after being provided with a packaging structure.

[0024] Figure 6 for Figure 5 The diagram shows a first circuit substrate after being electroplated to form a first electroplating layer and a second electroplating layer.

[0025] Figure 7 for Figure 6 The schematic diagram shown is a first circuit substrate, an adhesive layer, and a second circuit substrate before lamination.

[0026] Figure 8 for Figure 6 The schematic diagram shown is a first circuit substrate, an adhesive layer, and a second circuit substrate after being pressed together.

[0027] Fig. 9 A schematic diagram of a circuit board provided in accordance with an embodiment of the present application.

[0028] Main component symbols

[0029] Package structure 100

[0030] Semiconductor 10

[0031] Semiconductor body 11

[0032] Source 12

[0033] Gate 13

[0034] Drain 14

[0035] First connecting member 21

[0036] First connection body 211

[0037] First inner connection pad 212

[0038] First outer connection pad 213

[0039] The second connecting member 22

[0040] The second connection body 221

[0041] Second inner connection pad 222

[0042] Second outer connection pad 223

[0043] The first conductor 231

[0044] The second conductor 232

[0045] Package 30

[0046] The first copper foil layer 41

[0047] The second copper foil layer 42

[0048] The first dielectric layer 43

[0049] Opening 44

[0050] The first electroplating layer 51

[0051] The second electroplating layer 52

[0052] First circuit layer 61

[0053] Second circuit layer 62

[0054] Circuit board 200

[0055] Conductor 203

[0056] First circuit substrate 300

[0057] The third intermediate 301

[0058] Through hole 302

[0059] Second circuit substrate 400

[0060] The second dielectric layer 401

[0061] The third circuit layer 402

[0062] Thickness D1, D2

[0063] The following specific implementation methods will further illustrate the present application in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0064] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0065] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. When an element is considered to be "set on" another element, it may be directly set on the other element or there may be a central element at the same time.

[0066] See also Figures 1 to 9 , an embodiment of the present application provides a method for manufacturing a circuit board 200, comprising the steps of:

[0067] S1: See Figure 3 , a package structure 100 is provided, the package structure 100 includes at least one semiconductor 10, at least one first connector 21, at least one second connector 22 and a package body 30. The first connector 21 and the second connector 22 are disposed on opposite sides of the semiconductor 10. The first connector 21 and the second connector 22 are electrically connected to the semiconductor 10. The package body 30 covers the semiconductor 10, and parts of the first connector 21 and the second connector 22 are exposed in the package body 30.

[0068] In this embodiment, the first connector 21 includes a first connector body 211, a first inner connector pad 212 and a first outer connector pad 213, and the first inner connector pad 212 and the first outer connector pad 213 are respectively disposed on opposite sides of the first connector body 211. The second connector 22 includes a second connector body 221, a second inner connector pad 222 and a second outer connector pad 223, and the second inner connector pad 222 and the second outer connector pad 223 are respectively disposed on opposite sides of the second connector body 221. The semiconductor 10 includes a semiconductor body 11, a source 12, a gate 13 and a drain 14, the source 12 and the gate 13 are disposed on one side of the semiconductor body 11, and the drain 14 is disposed on the other side of the semiconductor body 11. The gate 13 is insulated from the drain 14 or the source 12, and there are two PN junctions between the drain 14 and the source 12. The first inner connection pad 212 is electrically connected to the source 12 and the gate 13 , and the second inner connection pad 222 is electrically connected to the drain 14 . The first outer connection pad 213 and the second outer connection pad 223 are exposed from the package body 30 .

[0069] In this example, see Figures 1 to 3 In step S1, the manufacturing method of the packaging structure 100 includes:

[0070] S10: Provide a wafer (not shown), the wafer comprising a plurality of semiconductors 10 arranged in a matrix (see Figure 1 ), the semiconductor 10 is a power semiconductor.

[0071] S11: A first connecting plate (not shown) is arranged on one side of the wafer and a second connecting plate (not shown) is arranged on the other side of the wafer, wherein the first connecting plate includes a plurality of the first connecting members 21, and the second connecting plate includes a plurality of the second connecting members 22, see Figure 2 Each semiconductor 10 corresponds to one first connector 21 and one second connector 22, and a first intermediate body (not shown) is obtained. The first inner connection pad 212 is electrically connected to the source 12 and the gate 13, and the second inner connection pad 222 is electrically connected to the drain 14. The first connector 21 or the second connector 22 includes a lead frame, a metal clip or a metal sheet.

[0072] In this example, see Figure 2Step S11 includes: disposing a first conductor 231 between the first inner connection pad 212 and the source 12 or the gate 13, and disposing a second conductor 232 between the second inner connection pad 222 and the drain 14, wherein the first conductor 231 is used to connect and electrically conduct the first inner connection pad 212 and the source 12 or the gate 13, and the second conductor 232 is used to connect and electrically conduct the second inner connection pad 222 and the drain 14. The materials of the first conductor 231 and the second conductor 232 include conductive glue, solder, etc.

[0073] S12: The packaging body 30 is arranged on the outer side of the first intermediate body, and the packaging body 30 covers the wafer and the connecting plate.

[0074] S13: See Figure 3 , remove the portion of the package body 30 corresponding to the first outer connection pad 213 and the second outer connection pad 223, so that the first outer connection pad 213 and the second outer connection pad 223 are exposed outside the package body 30, and obtain a second intermediate body (not shown).

[0075] S14: dividing the second intermediate to obtain a plurality of the packaging structures 100.

[0076] S2: See Figure 4 A first circuit substrate 300 is provided, wherein the first circuit substrate 300 includes a first copper foil layer 41, a second copper foil layer 42, and a first dielectric layer 43 disposed between the first copper foil layer 41 and the second copper foil layer 42. The first circuit substrate 300 has an opening 44, and the opening 44 sequentially penetrates the first copper foil layer 41, the first dielectric layer 43, and the second copper foil layer 42.

[0077] S3: See Figure 5 , the packaging structure 100 is disposed in the opening 44, and the thickness D1 of the first circuit substrate 300 is substantially the same as the thickness D2 of the packaging structure 100 (see Figure 3 ) are the same, so that the outer side surface of the first outer connection pad 213 is roughly flush with the outer side surface of the first copper foil layer 41, and the outer side surface of the second outer connection pad 223 is roughly flush with the outer side surface of the second copper foil layer 42.

[0078] S4: See Figure 6 , a first electroplating layer 51 is formed by electroplating on the first copper foil layer 41, and the first electroplating layer 51 covers the first outer connecting pad 213; and a second electroplating layer 52 is formed by electroplating on the second copper foil layer 42, and the second electroplating layer 52 covers the second outer connecting pad 223.

[0079] S5: See Figure 7 , etching the first copper foil layer 41 and the first electroplating layer 51 to form a first circuit layer 61, etching the second copper foil layer 42 and the second electroplating layer 52 to form a second circuit layer 62, and obtaining a third intermediate 301. The first circuit layer 61 is electrically connected to the first outer connection pad 213, and the second circuit layer 62 is electrically connected to the second outer connection pad 223.

[0080] S6: Provide a second circuit substrate 400 and an adhesive layer 70, set the adhesive layer 70 between the third intermediate body 301 and the second circuit substrate 400, and press the third intermediate body 301, the adhesive layer 70 and the second circuit substrate 400 to obtain the circuit board 200.

[0081] In this embodiment, the second circuit substrate 400 includes a plurality of second dielectric layers 401 and a plurality of third circuit layers 402, the third circuit layers 402 and the second dielectric layers 401 are alternately stacked, and the adhesive layer 70 is disposed between the outermost third circuit layer 402 and the first circuit layer 61. After step S6, the method further includes: providing a through hole 302 in the circuit board 200, the through hole 302 penetrating the second circuit substrate 400, the adhesive layer 70 and the third intermediate body 301, and providing a conductive body 203 in the through hole 302, the conductive body 203 electrically connecting the first circuit layer 61, the second circuit layer 62 and the plurality of third circuit layers 402.

[0082] Compared with the prior art, the manufacturing method of the circuit board 200 provided in the present application has the following advantages:

[0083] (i) A packaging structure 100 is first prepared, wherein the packaging structure 100 includes a semiconductor 10, a connector (a first connector 21, a second connector 22) and a packaging body 30 covering the semiconductor 10 and the connector, and then the packaging structure 100 is embedded in a circuit board 200. The packaging structure 100 is electrically connected to the circuit layer (the first circuit layer 61, the second circuit layer 62) through the first outer connection pad 213 or the second outer connection pad 223, thereby eliminating the need to set up micro-conducting holes, thereby improving the reliability of the semiconductor 10 connecting the circuit layer, and the method has simple steps.

[0084] (ii) The packaging structure 100 is electrically connected to the circuit layer through the first outer connection pad 213 or the second outer connection pad 223. The area of ​​the first outer connection pad 213 and the second outer connection pad 223 is significantly increased compared to the micro-conducting hole, thereby improving the efficiency of the semiconductor 10 in conducting heat to the circuit board and even the outside through the first outer connection pad 213 or the second outer connection pad 223.

[0085] (iii) By first preparing the packaging structure 100 and then testing the packaging structure 100 , the yield rate of the final circuit board 200 can be effectively improved.

[0086] (iv) By first preparing the packaging structure 100, then embedding the packaging structure 100 in the circuit board 200, and finally adding layers to the circuit board 200 by lamination, the risk of damage to the semiconductor 10 during the lamination process can be reduced.

[0087] See also Fig. 9 The present application also provides a circuit board 200, the circuit board 200 includes a first circuit substrate 300, a second circuit substrate 400, an adhesive layer 70 and the packaging structure 100, the first circuit substrate 300 includes a first dielectric layer 43 and a first circuit layer 61 arranged on the first dielectric layer 43, the first circuit substrate 300 is provided with an opening 44, the packaging structure 100 is arranged in the opening 44, the first connecting member 21 is electrically connected to the first circuit layer 61, and the adhesive layer 70 is arranged between the second circuit substrate 400 and the first circuit layer 60.

[0088] The above description is only an optimized specific implementation of the present application, but it cannot be limited to this implementation in the actual application process. For ordinary technicians in this field, other variations and changes made according to the technical concept of the present application should all fall within the protection scope of the present application.

Claims

1. A method for manufacturing a circuit board, characterized in that: Includes steps: Providing a first circuit substrate, the first circuit substrate comprising a dielectric layer and a copper foil layer disposed on the dielectric layer, the first circuit substrate being provided with an opening; A packaging structure is provided, and a manufacturing method of the packaging structure includes the following steps: providing a wafer, wherein the wafer includes a plurality of semiconductors; arranging a connection board on the wafer, wherein the connection board includes a plurality of connectors, wherein each connector is electrically connected to at least one of the semiconductors, to obtain a first intermediate; arranging a packaging body outside the first intermediate, wherein the packaging body covers the wafer and the connection board; Removing a portion of the package body corresponding to the connector to obtain a second intermediate body; and cutting the second intermediate body to obtain a plurality of the package structures, wherein each of the package structures comprises at least one semiconductor and at least one connecting member electrically connected to the semiconductor; Disposing the packaging structure in the opening; Electroplating on the copper foil layer to form an electroplating layer, wherein the electroplating layer covers the connecting piece; Etching the electroplating layer and the copper foil layer to form a circuit layer, wherein the circuit layer is electrically connected to the connecting member; A second circuit substrate and an adhesive layer are provided, the adhesive layer is disposed between the line layer and the second circuit substrate, and the circuit board, the second circuit substrate and the adhesive layer are pressed together to obtain the circuit board.

2. The manufacturing method according to claim 1, characterized in that Also includes the steps: A through hole is provided on the circuit board, wherein the through hole penetrates the first circuit substrate, the adhesive layer and the second circuit substrate; and A conductive body is disposed in the through hole, and the conductive body electrically connects the circuit layer and the second circuit substrate.

3. A circuit board, characterized in that: It includes a first circuit substrate, a second circuit substrate, an adhesive layer and a packaging structure, The packaging structure includes at least one semiconductor, at least one connecting member and a packaging body, wherein the connecting member is disposed on the semiconductor, the connecting member is electrically connected to the semiconductor, the packaging body covers the semiconductor, and a portion of the connecting member is exposed from the packaging body. The first circuit substrate includes a dielectric layer and a circuit layer arranged on the dielectric layer. The first circuit substrate is provided with an opening, the packaging structure is arranged in the opening, the connector is electrically connected to the circuit layer, and the adhesive layer is arranged between the second circuit substrate and the circuit layer.

4. The circuit board according to claim 3, characterized in that: The thickness of the first circuit substrate is the same as the thickness of the packaging structure.

5. The circuit board according to claim 3, characterized in that: The semiconductor is a power semiconductor, and the connecting piece includes a lead frame, a metal clip or a metal sheet.

6. The circuit board according to claim 3, characterized in that: The semiconductor includes a semiconductor body, a source, a gate and a drain. The source and the gate are arranged on one side of the semiconductor body, the drain is arranged on the other side of the semiconductor body, the gate is insulated from the drain or the source, and a PN junction is arranged between the drain and the source.

7. The circuit board according to claim 6, characterized in that: The connector includes a connector body, an inner connection pad and an outer connection pad, the connector body is disposed between the inner connection pad and the outer connection pad, the inner connection pad is electrically connected to the source, the gate or the drain, and the outer connection pad is exposed from the package body.

8. The circuit board according to claim 7, characterized in that: The packaging structure further includes a conductor, which is disposed between the inner connection pad and the source, the gate or the drain.

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