Method for manufacturing array substrate, array substrate and display panel

Abstract

Embodiments of the present invention disclose a method for manufacturing an array substrate, an array substrate, and a display panel. The method includes: forming a TFT transistor on a substrate, including a gate, a gate insulating layer, an active area, a source electrode, and a drain electrode; forming a first inorganic film layer to cover the display area; forming a first organic film area on the first inorganic film layer to expose the first inorganic film layer corresponding to the drain electrode; forming a second inorganic film layer to cover the first organic film area; forming a common electrode on the second inorganic film layer near the drain electrode; forming a third inorganic film layer to cover the display area; forming an opening to expose the drain electrode; and forming a pixel electrode on the third inorganic film layer near the drain electrode, the pixel electrode being electrically connected to the drain electrode. The present invention forms a high-density inorganic film layer as a protective layer on the organic film layer, so that when a stripping solution is used to strip the photoresist during the subsequent step of manufacturing the common electrode, the stripping solution cannot contact the organic film area, thereby preventing the organic film area from swelling.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and more particularly, to a method for manufacturing an array substrate, the array substrate, and a display panel. Background Art

[0002] With the continuous advancement of TFT-LCD display technology, users have higher and higher requirements for LCD panels. However, during use, it is found that some pixels cannot display normally, and in severe cases, no display at all. Summary of the Invention

[0003] In order to solve at least one of the above technical problems, the first aspect of the present invention provides a method for manufacturing an array substrate, comprising:

[0004] forming a TFT transistor on a substrate, comprising a gate electrode, a gate insulating layer, an active region, a source electrode, and a drain electrode;

[0005] forming a first inorganic film layer to cover the display area;

[0006] forming a first organic film region on the first inorganic film layer to expose the first inorganic film layer corresponding to the drain electrode;

[0007] forming a second inorganic film layer to cover the first organic film region;

[0008] forming a common electrode on the second inorganic film layer close to the drain electrode;

[0009] forming a third inorganic film layer to cover the display area;

[0010] forming an opening to expose the drain electrode;

[0011] A pixel electrode is formed on the third inorganic film layer close to the drain electrode, and the pixel electrode is electrically connected to the drain electrode.

[0012] The first aspect of the present invention forms a high-density inorganic film layer as a protective layer on the organic film layer, so that when a stripping liquid is used to strip the photoresist during the subsequent steps of making a common electrode, the stripping liquid cannot contact the organic film area, and the organic film area will not swell.

[0013] In a specific embodiment, forming a common electrode on the second inorganic film layer close to the drain electrode includes:

[0014] forming a first transparent metal layer on the second inorganic film layer;

[0015] forming a patterned first photoresist layer on the first transparent metal layer;

[0016] Using the patterned first photoresist layer as a mask, patterning the first transparent metal layer to obtain the common electrode;

[0017] The patterned first photoresist layer is stripped using a stripping solution.

[0018] In this solution, during the process of forming the common electrode, specifically, during the process of removing the photoresist by immersing in a stripping solution, the first organic film region cannot absorb the stripping solution due to the presence of the second inorganic film layer protecting the first organic film region, and thus will not cause swelling.

[0019] In a specific embodiment, after forming the first transparent metal layer on the second inorganic film layer, the method further includes:

[0020] forming an auxiliary electrode layer on the first transparent metal layer;

[0021] forming a patterned second photoresist layer on the auxiliary electrode layer;

[0022] Using the patterned second photoresist layer as a mask, patterning the auxiliary electrode layer, thereby obtaining an auxiliary electrode formed on the first transparent metal layer;

[0023] The patterned second photoresist layer is stripped using a stripping solution.

[0024] Auxiliary metal can be used to reduce the resistance of the common electrode. When the resistance is reduced, the charge is more easily released, improving the anti-static ability of the array substrate. In addition, due to the reduced contact resistance, the peripheral drive voltage is easier to apply, and the delay of the driver IC is reduced.

[0025] In addition, in the present solution, in the process of forming the auxiliary electrode, specifically in the process of removing the photoresist by immersing with a stripping liquid, although there is a first transparent metal layer (such as ITO) underneath, since the ITO itself is not dense and has gaps, the stripping liquid will penetrate downward from the gaps. However, in the solution of the present invention, since there is a second inorganic film layer protecting the first organic film area, the first organic film area cannot absorb the stripping liquid, and thus will not cause swelling.

[0026] A second aspect of the present invention provides a method for manufacturing an array substrate, wherein the array substrate includes a display area and a GOA area, and the method includes:

[0027] Forming the TFT transistors in the display area and the gate metal, active material area and source and drain material area in the GOA area on the substrate;

[0028] forming a first inorganic film layer to cover the display area and the GOA area;

[0029] forming a first organic film region of the display region and a first organic film region of the GOA region on the first inorganic film layer, exposing the first inorganic film layer corresponding to the drain electrode, the gate metal and the source / drain material regions;

[0030] forming a second inorganic film layer to cover the first organic film region of the display region and the first organic film region of the GOA region;

[0031] forming a first opening and a second opening in the GOA region to expose the gate metal and source / drain material regions, respectively;

[0032] forming a common electrode on the second inorganic film layer near the drain electrode in the display area and forming a connection metal electrically connecting the gate metal and the source and drain material area in the GOA area;

[0033] forming a third inorganic film layer to cover the display area and the GOA area;

[0034] forming a third opening in the display area, penetrating the first to third inorganic film layers to expose the drain electrode;

[0035] A pixel electrode is formed on the third inorganic film layer in the display area close to the drain electrode, and the pixel electrode is electrically connected to the drain electrode.

[0036] The second aspect of the present invention forms a high-density inorganic film layer as a protective layer on the organic film layer, so that when a stripping liquid is used to strip the photoresist during the subsequent steps of making the common electrode and the connecting metal, the stripping liquid cannot contact the first organic film area of ​​the display area and the first organic film area of ​​the GOA area, so that the organic film area will not swell.

[0037] In a specific embodiment, forming a common electrode on the second inorganic film layer near the drain electrode in the display area and forming a connecting metal electrically connecting the gate metal and the source and drain material area in the GOA area includes:

[0038] forming a second transparent metal layer on the second inorganic film layer;

[0039] forming a patterned third photoresist on the second transparent metal layer;

[0040] Using the patterned third photoresist as a mask, patterning the second transparent metal layer to obtain the common electrode and the connecting metal;

[0041] The patterned third photoresist layer is stripped using a stripping solution.

[0042] In this solution, in the process of forming the common electrode and the connecting metal, specifically in the process of using a stripping liquid to immerse and remove the photoresist, since there is a second inorganic film layer protecting the first organic film area of ​​the display area and the first organic film area of ​​the GOA area, the first organic film area of ​​the display area and the first organic film area of ​​the GOA area cannot absorb the stripping liquid, thereby not causing swelling.

[0043] In a specific embodiment, after forming the second transparent metal layer on the second inorganic film layer, the method further includes:

[0044] forming an auxiliary electrode layer on the second transparent metal layer;

[0045] forming a patterned fourth photoresist layer on the auxiliary electrode layer;

[0046] using the patterned fourth photoresist layer as a mask to pattern the auxiliary electrode layer, thereby obtaining an auxiliary electrode formed on the second transparent metal layer;

[0047] The patterned fourth photoresist layer is stripped using a stripping solution.

[0048] The auxiliary electrode can be used to reduce the resistance of the common electrode. When the resistance is reduced, the charge is more easily released, improving the anti-static ability of the array substrate. In addition, due to the reduced contact resistance, the peripheral drive voltage is easier to apply, and the delay of the driver IC is reduced.

[0049] In this solution, in the process of forming the auxiliary electrode, specifically in the process of using a stripping liquid to soak and remove the photoresist, although there is a first transparent metal layer (such as ITO) underneath, since the ITO itself is not dense and has gaps, the stripping liquid will penetrate downward from the gaps. However, in the solution of the present invention, since there is a second inorganic film layer protecting the first organic film area, the first organic film area cannot absorb the stripping liquid, and thus will not cause swelling.

[0050] In a specific embodiment, the auxiliary electrode layer is patterned using the patterned fourth photoresist layer as a mask to obtain an auxiliary electrode formed on the second transparent metal layer, further comprising:

[0051] The auxiliary electrode layer is patterned using the patterned fourth photoresist layer as a mask, thereby obtaining an auxiliary electrode formed on the second transparent metal layer and an auxiliary metal formed on the connecting metal.

[0052] Normally, the connecting metal is thin, which sometimes results in poor step coverage when filling the first opening and the second opening, and the circuit traces are easily broken. The presence of the auxiliary metal improves the step coverage and increases the reliability of the array substrate.

[0053] A third aspect of the present invention provides an array substrate, comprising:

[0054] substrate;

[0055] A TFT transistor formed on a substrate includes a gate, a gate insulating layer, an active region, a source electrode, and a drain electrode;

[0056] forming a first inorganic film layer on the TFT transistor;

[0057] forming a first organic film region on the first inorganic film layer;

[0058] a second inorganic film layer covering the first organic film region;

[0059] a common electrode formed on the second inorganic film layer near the drain electrode;

[0060] a third inorganic film layer, covering the display area;

[0061] An opening is formed, penetrating the first to third inorganic film layers to expose the drain electrode;

[0062] A pixel electrode is formed on the third inorganic film layer close to the drain electrode, and the pixel electrode is electrically connected to the drain electrode.

[0063] Such an array substrate structure effectively improves the display quality of the display panel because the organic film does not swell during the manufacturing process.

[0064] In a specific embodiment, the array substrate further includes:

[0065] An auxiliary electrode is formed on the common electrode.

[0066] The auxiliary electrode can be used to reduce the resistance of the common electrode. When the resistance is reduced, the charge is more easily released, improving the anti-static ability of the array substrate. In addition, due to the reduced contact resistance, the peripheral drive voltage is easier to apply, and the delay of the driver IC is reduced.

[0067] A fourth aspect of the present invention provides an array substrate, comprising a display area and a GOA area, and further comprising:

[0068] substrate;

[0069] The TFT transistors in the display area and the gate metal, active material area and source and drain material area in the GOA area are formed on the substrate;

[0070] a first inorganic film layer, covering the display area and the GOA area;

[0071] forming a first organic film region of the display region and a first organic film region of the GOA region on the first inorganic film layer, exposing the first inorganic film layer corresponding to the drain electrode, gate metal, and source / drain material regions;

[0072] a second inorganic film layer covering the first organic film region of the display region and the first organic film region of the GOA region;

[0073] A first opening and a second opening are formed in the GOA region to expose the gate metal and source / drain material regions, respectively;

[0074] A common electrode formed on the second inorganic film layer near the drain electrode in the display area, and a connection metal electrically connecting the gate metal and the source and drain material area in the GOA area;

[0075] a third inorganic film layer, covering the display area and the GOA area;

[0076] a third opening formed in the display area, penetrating the first to third inorganic film layers to expose the drain electrode;

[0077] A pixel electrode is formed on the third inorganic film layer in the display area and close to the drain electrode, and the pixel electrode is electrically connected to the drain electrode.

[0078] Such an array substrate structure effectively improves the display quality of the display panel because the organic film does not swell during the manufacturing process, and can also achieve a narrow frame effect.

[0079] In a specific embodiment, the display area further includes:

[0080] An auxiliary electrode is formed on the pixel electrode.

[0081] The auxiliary electrode can be used to reduce the resistance of the common electrode. When the resistance is reduced, the charge is more easily released, improving the anti-static ability of the array substrate. In addition, due to the reduced contact resistance, the peripheral drive voltage is easier to apply, and the delay of the driver IC is reduced.

[0082] In a specific embodiment, the GOA region includes:

[0083] An auxiliary metal is formed on the connection metal.

[0084] Normally, the connecting metal is thin, which sometimes results in poor step coverage when filling the first opening and the second opening, and the circuit traces are easily broken. The presence of the auxiliary metal improves the step coverage and increases the reliability of the array substrate.

[0085] A fifth aspect of the present invention provides a display panel, comprising the array substrate described in the third aspect or the array substrate described in the fourth aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0086] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0087] Figure 1 A schematic structural diagram of an array substrate according to an embodiment of the present invention is shown;

[0088] FIG. 2 shows a physical diagram of an array substrate according to an embodiment of the present invention ( Figure 2a ) and SEM cross-section ( Figure 2b );

[0089] Figure 3 A flow chart showing a method for manufacturing an array substrate according to an embodiment of the present invention is shown;

[0090] Figure 4-Figure 9 、 Figure 10a 、 Figure 10b 、 Figure 11-13 According to the present invention Figure 3 A cross-sectional view of the structure formed by the steps shown;

[0091] Figure 14 A flow chart showing a method for manufacturing an array substrate according to another embodiment of the present invention; and

[0092] Figures 15-20 、 Figure 21a 、 Figure 21b 、 Figure 22-Figure 24 According to the present invention Figure 14 Cross-sectional view of the structure formed by the steps shown. DETAILED DESCRIPTION

[0093] In order to more clearly illustrate the present invention, the present invention is further described below in conjunction with preferred embodiments and accompanying drawings. Similar components in the accompanying drawings are represented by the same reference numerals. It should be understood by those skilled in the art that the following detailed description is illustrative rather than restrictive and should not be used to limit the scope of protection of the present invention.

[0094] like Figure 1 The array substrate 1 shown includes a substrate 10 , a display area and a GOA (Gate On Array) area formed on the substrate 10 .

[0095] The display area includes: a TFT transistor 12 (shown in a dotted circle in the figure), including a gate 120 , a first gate insulating layer 122 , an active area 124 , a source 126 and a drain 128 .

[0096] The GOA region includes: a gate metal 121 disposed in the same layer as the gate 120; a second gate insulating layer 123 disposed in the same layer as the first gate insulating layer 122; an active material region 125 disposed in the same layer as the active region 124; and a source / drain material region 127 disposed in the same layer as the source 126 and the drain 128.

[0097] Those skilled in the art will appreciate that the same-layer configuration described in this application is formed simultaneously using the same process.

[0098] The array substrate further includes a first inorganic film layer 13 covering the exposed gate insulating layer 122 , the active region 124 , the source 126 , the drain 128 , the active material region 125 and the source / drain material region 127 .

[0099] An organic film layer 14 is formed on the first inorganic film layer 13 , exposing regions of the first inorganic film layer 13 corresponding to the drain electrode 128 , the gate metal 121 , and the active material region 125 .

[0100] In order to reduce the parasitic capacitance between the electrode and the S / D pole and reduce power consumption, an organic film layer (low dielectric constant, high thickness) 14 is used to replace the traditional inorganic film layer (high dielectric constant, low thickness) to make the protective layer.

[0101] In the GOA region, an opening 140 is formed in the first inorganic film layer 13, exposing the patterned active region material layer 125. In the GOA region, an opening 142 is further formed in the first inorganic film layer 13, and the gate metal 121 is exposed through the opening in the gate insulating layer.

[0102] A common electrode 15 is formed on the organic film layer 14 near the drain electrode in the display area; a connection metal 16 is formed in the GOA area. The two can be arranged in the same layer to electrically connect the exposed gate metal 121 and the active material area 125.

[0103] The array substrate further includes a second inorganic film layer 17 covering the display area and the GOA area, exposing the first inorganic film layer 13 corresponding to the drain electrode.

[0104] An opening 144 is formed in the first inorganic film layer in the display area, exposing the drain electrode 128 .

[0105] A pixel electrode 18 is formed on the second inorganic film layer 17 near the drain electrode and is electrically connected to the drain electrode 128 .

[0106] The inventors have tested a large number of the above structures and found that the display defect problem mentioned in the background art is likely to exist.

[0107] By analyzing the manufacturing process steps of a large number of array substrates and the scanning electron microscope results of the corresponding layer structures, the inventors found that the array substrates with poor display problems ( Figure 2a The picture shows a real object. The oval area in the picture contains the organic film layer area, and the three teeth above and below are Figure 1 The pixel electrodes shown in the SEM images are all present. Figure 2b ) The arrows in the figure point to the wrinkles formed at the boundary of the organic film layer.

[0108] Further analysis reveals that the wrinkles are caused by the use of an organic film layer 14 during the fabrication of the structure. During the common electrode formation process on the organic film layer 14, a layer of transparent ITO is first deposited. A photoresist is then used as a mask to form a patterned transparent ITO layer, i.e., the common electrode. The photoresist is then stripped using a stripping solution. The inventors discovered that during this process, the remaining organic film layer 14 absorbs the stripping solution, causing it to swell and, during the drying process, produce the wrinkles.

[0109] After discovering the causes of the problems mentioned in the background technology, the first aspect of the present invention provides a method for manufacturing an array substrate, such as Figure 3 As shown, including:

[0110] S100, forming a TFT transistor 22 (shown in a dotted circle) on a substrate 20, including a gate 220, a gate insulating layer 222, an active region 224, a source 226 and a drain 228, as shown in FIG. Figure 4 shown.

[0111] In a specific example, S100 includes:

[0112] S1000 , forming a gate 220 on the substrate 20 through a single patterning process.

[0113] In one example, a copper metal film is formed on a glass substrate using magnetron sputtering, and then patterned using a mask through exposure, development, etching, and stripping to form the gate 220 on the substrate in the display area.

[0114] S1001. Forming a gate insulating layer film, an active layer film (such as an amorphous silicon film and an n+ amorphous silicon film) and a molybdenum metal film in sequence on the substrate after completing step S1000, and forming a photoresist on the molybdenum metal film.

[0115] In one example, the material of the gate insulating layer thin film is generally silicon nitride, and silicon oxide and silicon oxynitride may also be used.

[0116] In one example, the amorphous silicon thin film and the n+ amorphous silicon thin film are deposited on the substrate by chemical vapor deposition.

[0117] S1002 , exposing and developing the substrate with the photoresist formed thereon using a mask to form a patterned photoresist.

[0118] S1003 , using the patterned photoresist as a mask, etching the molybdenum metal film by a wet etching process, and etching the n+ amorphous silicon film and the amorphous silicon film by a dry etching process.

[0119] S1004, remove the photoresist by stripping process, and obtain reference Figure 4 The structure shown in FIG. 1 is a structure in which the retained molybdenum metal film forms the source and drain, and the retained n+ amorphous silicon film and the amorphous silicon film stack constitute the ohmic contact region and the active region, respectively.

[0120] S101, forming a first inorganic film layer 23, covering the display area, such as Figure 5 shown.

[0121] In one example, the first inorganic film layer is formed using a coating process, and the material of the first inorganic film layer may be SixNy.

[0122] S102, forming a first organic film region 24 on the first inorganic film layer 23, exposing the first inorganic film layer 23 corresponding to the drain electrode, such as Figure 6 shown.

[0123] In a specific example, step S102 includes:

[0124] S1020 , forming a first organic film layer on the first inorganic film layer 23 .

[0125] In one example, the material of the first organic film layer is a PAC film.

[0126] S1021 , forming a photoresist on the first organic film layer.

[0127] S1022 , exposing and developing the substrate with the photoresist using a mask to form a patterned photoresist.

[0128] S1023 , using the patterned photoresist as a mask, patterning the first organic film layer to obtain a first organic film region, exposing the first inorganic film layer 23 above the drain electrode 228 .

[0129] S1024, remove the photoresist by stripping process, and obtain reference Figure 6 The structure shown.

[0130] S103, forming a second inorganic film layer 25, covering the first organic film region, such as Figure 7 shown.

[0131] In one example, the second inorganic film layer is formed using a coating process, and the material of the second inorganic film layer may be SixNy.

[0132] S104, forming a common electrode 27 on the second inorganic film layer 25 close to the drain electrode, as shown in FIG. Figure 10a shown.

[0133] In a specific example, step S104 includes:

[0134] S1040, forming a first transparent metal layer 26 on the second inorganic film layer 25, such as Figure 8 As shown;

[0135] The material of the first transparent metal layer 26 can be ITO or IZO (indium zinc oxide) material.

[0136] S1041. Form a photoresist on the first transparent metal layer.

[0137] S1042, using a mask to expose and develop the substrate with the photoresist formed thereon to form a patterned photoresist, such as Figure 9 shown.

[0138] In a specific example, the photoresist is a positive photoresist, and after exposure and development, the remaining photoresist exists on the first transparent metal layer close to the drain electrode.

[0139] S1043 , using the patterned photoresist as a mask to pattern the first transparent metal layer, thereby forming a common electrode.

[0140] S1044, remove the photoresist with a stripping solution to obtain a reference Figure 10a The structure shown.

[0141] During the process of forming the common electrode, specifically, removing the photoresist by immersing in a stripping solution, the first organic film region 24 is protected by the second inorganic film layer 25 , so the first organic film layer cannot absorb the stripping solution and thus does not swell.

[0142] S105, forming a third inorganic film layer 28, covering the display area, such as Figure 11 shown.

[0143] In one example, the third inorganic film layer is formed using a coating process and the material of the third inorganic film layer may be SixNy.

[0144] S106, forming an opening 29 to expose the drain electrode 228, as shown in FIG. Figure 12 shown.

[0145] In one example, a dry etching process is performed using a mask to penetrate the third to first inorganic film layers above the drain electrode, thereby exposing the drain electrode 228 thereunder.

[0146] S107, forming a pixel electrode 30 on the third inorganic film layer near the drain electrode 228, wherein the pixel electrode is electrically connected to the drain electrode. Figure 13 shown.

[0147] In one example, the pixel electrode is made of ITO. In another example, the pixel electrode is made of IZO.

[0148] In the first aspect of the present invention, the inventors discovered the cause of the problem through research, and then formed a high-density inorganic film layer as a protective layer on the organic film area, so that when a stripping liquid is used to strip the photoresist during the subsequent steps of making the common electrode, the stripping liquid cannot come into contact with the organic film area, and thus the organic film area will not have wrinkles as shown in Figure 2.

[0149] Further implementations have shown that the display panels manufactured using this process display well.

[0150] In another embodiment, step S104 includes: forming a common electrode 26 and an auxiliary electrode 31 on the common electrode on the second inorganic film layer 25 close to the drain electrode, as shown in FIG. Figure 10b shown.

[0151] In a specific example, step S104 includes:

[0152] S1040, forming a first transparent metal layer on the second inorganic film layer 25;

[0153] S1041, forming an auxiliary electrode layer on the first transparent metal layer;

[0154] S1042, applying a first photoresist.

[0155] S1043 , exposing and developing the first photoresist using a mask to form a patterned first photoresist.

[0156] In a specific example, the first photoresist is a positive photoresist, and after exposure and development, the remaining photoresist exists on the auxiliary electrode layer close to the drain electrode.

[0157] S1044 , using the patterned first photoresist as a mask to pattern the auxiliary electrode layer, thereby forming an auxiliary electrode.

[0158] S1045: Remove the first photoresist by using a stripping process.

[0159] In the process of forming the auxiliary electrode, specifically in the process of removing the first photoresist by immersing with a stripping liquid, although there is an ITO transparent conductive film underneath, since the ITO transparent conductive film itself is not dense and has gaps, the stripping liquid will penetrate downward from the gaps. However, in the solution of the present invention, since there is a second inorganic film layer protecting the first organic film layer, the first organic film layer cannot absorb the stripping liquid, and thus will not cause swelling.

[0160] S1046, applying a second photoresist.

[0161] S1047 , exposing and developing the second photoresist using a mask to form a patterned second photoresist.

[0162] In a specific example, the second photoresist is a positive photoresist. After exposure and development, the remaining second photoresist exists on the first transparent metal layer close to the drain electrode.

[0163] S1048 : Using the patterned second photoresist as a mask, pattern the first transparent metal layer to form a common electrode 27 .

[0164] S1049, remove the second photoresist by stripping process. Figure 10b The structure shown.

[0165] In a specific example, the auxiliary electrodes extend in the same direction as the gate lines, and are arranged corresponding to the gate lines or in alternate rows.

[0166] The auxiliary metal 31 can be used to reduce the resistance of the common electrode. When the resistance is reduced, the charge is more easily released, improving the anti-static ability of the array substrate. In addition, due to the reduced contact resistance, the peripheral drive voltage is easier to apply, and the delay of the driver IC is reduced.

[0167] Regarding TFT-LCD display technology, in order to further improve the display effect of display devices, more and more people are paying attention to the narrow frame design of display devices. One of the most important technologies is the array substrate row driving (Gate On Array, GOA) technology.

[0168] The concept of the present invention is also applicable to an array substrate structure having a GOA region.

[0169] Therefore, the second aspect of the present invention provides a method for manufacturing an array substrate, wherein the array substrate includes a display area and a GOA area. Figure 14 Shown, including:

[0170] S200, forming the TFT transistor 22 of the display area and the gate metal, active material area and source and drain material area of ​​the GOA area on the substrate 20, such as Figure 15 shown.

[0171] Specifically, step S200 includes:

[0172] S2000 , forming a gate 220 a of the TFT transistor in the display area and a gate metal 220 b in the GOA area on the substrate.

[0173] In a specific example, a copper metal film is formed on a glass substrate using magnetron sputtering. A patterning process such as exposure, development, etching, and stripping is then performed using a mask to form the gate 220a and gate metal 220b on the substrate in the display area.

[0174] S2001 , forming a gate insulating layer 222 to cover the display area and the GOA area.

[0175] In one example, the material of the gate insulating layer is typically silicon nitride, and silicon oxide, silicon oxynitride, and the like may also be used.

[0176] S2002 , forming an active region 224 a , a source electrode 226 a and a drain electrode 228 of the display region on the gate insulating layer, and forming an active material region 224 b and a source / drain material region 226 b of the GOA region.

[0177] This step is accomplished, for example, using a half-tone mask or a gray-tone mask.

[0178] S201, forming a first inorganic film layer 23, covering the display area and the GOA area, such as Figure 16 shown.

[0179] In one example, the first inorganic film layer is formed using a coating process, and the material of the first inorganic film layer may be SixNy.

[0180] S202 , forming a first organic film region 24 a of the display region and a first organic film region 24 b of the GOA region on the first inorganic film layer, exposing the first inorganic film layer corresponding to the drain, gate metal, and source / drain material regions.

[0181] Specifically, step S202 includes:

[0182] S2020 , forming a first organic film layer on the first inorganic film layer.

[0183] S2021. Form a photoresist on the first organic film layer.

[0184] S2022: Expose and develop the photoresist using a mask to form patterned photoresists 261a (display area) and 261b (GOA area).

[0185] S2023 , using the patterned photoresist as a mask to pattern the first organic film layer.

[0186] S2024, removing the photoresist by a stripping process, and obtaining a reference Figure 17 The structure shown in FIG. , wherein the first inorganic film layer above the drain electrode, gate metal and source / drain material region is exposed.

[0187] S203, forming a second inorganic film layer 25, covering the first organic film region of the display region and the first organic film region of the GOA region, such as Figure 18 shown.

[0188] S204, forming a first opening 32 and a second opening 33 in the GOA region to expose the gate metal and source / drain material regions, respectively. Figure 19 shown.

[0189] In one example, with the help of a mask, a dry etching process is used to penetrate the second inorganic film layer and the first inorganic film layer above the gate metal and source / drain material regions, respectively, thereby exposing the gate metal and source / drain material regions below.

[0190] S205 , forming a common electrode 27 a on the second inorganic film layer near the drain electrode in the display area and forming a connection metal 27 b electrically connecting the gate metal and the source and drain material area in the GOA area, as shown in FIG21 a .

[0191] Specifically, step S205 includes:

[0192] S2050, forming a second transparent metal layer 26 on the second inorganic film layer, covering the display area and the GOA area;

[0193] S2051. Form a photoresist on the second transparent metal layer.

[0194] S2052, using a mask to expose and develop the photoresist to form a patterned photoresist, such as Figure 18 shown.

[0195] S2053 , using the patterned photoresist as a mask, patterning the second transparent metal layer to form a common electrode 27 a and a connection metal 27 b .

[0196] S2054 , using a stripping solution to strip the patterned third photoresist layer to obtain the structure shown in reference FIG. 21 a .

[0197] In the process of forming the common electrode and the connecting metal, specifically in the process of removing the photoresist by immersion using a stripping solution, the first organic film layer cannot absorb the stripping solution due to the presence of the second inorganic film layer protecting the first organic film layer, and thus will not cause swelling.

[0198] S206, forming a third inorganic film layer 28, covering the display area and the GOA area, such as Figure 22 shown.

[0199] In one example, a coating process is used to form the third inorganic film layer as a passivation layer, and the material of the first inorganic film layer may be SixNy.

[0200] S207, forming a third opening 29 to expose the drain electrode 228, as shown in FIG. Figure 23 shown.

[0201] In one example, a dry etching process is performed using a mask to penetrate the third to first inorganic film layers above the drain electrode, thereby exposing the drain electrode 228 thereunder.

[0202] S208, forming a pixel electrode 30 on the third inorganic film layer near the drain electrode 228 in the display area, wherein the pixel electrode is electrically connected to the drain electrode. Figure 24 shown.

[0203] In one example, the pixel electrode is made of ITO. In another example, the pixel electrode is made of IZO.

[0204] In the second aspect of the present invention, the inventors discovered the cause of the problem through research, and then formed a high-density inorganic film layer as a protective layer on the organic film layer, so that when a stripping liquid is used to strip the photoresist during the subsequent steps of making the common electrode, the stripping liquid cannot come into contact with the organic film layer, and the organic film layer will not swell as shown in Figure 2.

[0205] Further implementations have shown that the probability of display defects in display panels manufactured using this process is greatly reduced.

[0206] In another embodiment, step S205 includes: forming a common electrode 27a and an auxiliary electrode 31a on the common electrode on the second inorganic film layer 25 near the drain electrode and forming a connection metal 27b electrically connecting the gate metal and the source and drain material area in the GOA area, such as Figure 21b shown.

[0207] Specifically, step S205 includes:

[0208] S2050 , forming a second transparent metal layer on the second inorganic film layer, covering the display area and the GOA area.

[0209] S2051. Form an auxiliary electrode layer on the second transparent metal layer.

[0210] S2052. Apply photoresist.

[0211] S2053, exposing and developing the photoresist using a mask to form a patterned photoresist.

[0212] In a specific example, the photoresist is a positive photoresist, and after exposure and development, the remaining photoresist exists on the auxiliary electrode layer close to the drain electrode.

[0213] S2054 , using the patterned photoresist as a mask, patterning the auxiliary electrode layer to form an auxiliary electrode 31 a .

[0214] S2055 , stripping the patterned photoresist layer using a stripping solution.

[0215] In the process of forming the auxiliary electrode, specifically in the process of removing the first photoresist by immersing with a stripping liquid, although there is an ITO transparent conductive film underneath, since the ITO transparent conductive film itself is not dense and has gaps, the stripping liquid will penetrate downward from the gaps. However, in the solution of the present invention, since there is a second inorganic film layer protecting the first organic film layer, the first organic film layer cannot absorb the stripping liquid, and thus will not cause swelling.

[0216] S2056. Apply photoresist.

[0217] S2057: Expose and develop the formed photoresist using a mask to form a patterned photoresist.

[0218] In a specific example, the photoresist is a positive photoresist. After exposure and development, the remaining photoresist exists on the ITO transparent conductive film close to the drain electrode.

[0219] S2058. Use the patterned photoresist as a mask to pattern the second transparent metal layer to form a common electrode.

[0220] S2059: Remove the second photoresist by using a stripping process.

[0221] In a specific example, the auxiliary electrodes extend in the same direction as the gate lines, and are arranged corresponding to the gate lines or in alternate rows.

[0222] The auxiliary metal 29 can be used to reduce the resistance of the common electrode. When the resistance is reduced, the charge is more easily released, improving the anti-static ability of the array substrate. In addition, due to the reduced contact resistance, the peripheral drive voltage is easier to apply, and the delay of the driver IC is reduced.

[0223] Preferably, step S2054 further comprises: using the patterned photoresist as a mask to pattern the auxiliary electrode layer, thereby forming an auxiliary metal 31b on the connecting metal, such as Figure 21b shown.

[0224] Normally, the connecting metal is thin, which sometimes results in poor step coverage when filling the first opening and the second opening, and the circuit traces are easily broken. The presence of the auxiliary metal improves the step coverage and increases the reliability of the array substrate.

[0225] A third aspect of the present invention provides an array substrate, such as Figure 13 Shown, including:

[0226] substrate 20;

[0227] A TFT transistor 22 formed on the substrate includes a gate 220, a gate insulating layer 222, an active region 224, a source 226, and a drain 228;

[0228] A first inorganic film layer 23 formed on the TFT transistor;

[0229] a first organic film region 24 formed on the first inorganic film layer;

[0230] A second inorganic film layer 25, covering the first organic film region;

[0231] a common electrode formed on the second inorganic film layer near the drain electrode;

[0232] a third inorganic film layer 27, covering the display area;

[0233] an opening 29 penetrating the first to third inorganic film layers to expose the drain electrode;

[0234] The pixel electrode 30 is formed on the third inorganic film layer close to the drain electrode, and the pixel electrode is electrically connected to the drain electrode.

[0235] Among them, the TFT can be a top-gate TFT or a bottom-gate TFT; the first to third inorganic film regions can be SixNy or silicon dioxide or silicon oxide; the first organic film layer can be a PAC film; the common electrode and the pixel electrode can both be transparent ITO or IZO.

[0236] Such an array substrate structure effectively improves the display quality of the display panel because the organic film does not swell during the manufacturing process.

[0237] In a preferred embodiment, the array substrate further includes: an auxiliary electrode 31 formed on the common electrode, such as Figure 10bThe auxiliary electrode can be made of metal such as copper.

[0238] The auxiliary electrode can be used to reduce the resistance of the common electrode. When the resistance is reduced, the charge is more easily released, improving the anti-static ability of the array substrate. In addition, due to the reduced contact resistance, the peripheral drive voltage is easier to apply, and the delay of the driver IC is reduced.

[0239] A fourth aspect of the present invention provides an array substrate, such as Figure 24 As shown, it includes the display area and the GOA area, and also includes:

[0240] substrate 20;

[0241] The TFT transistor 22 in the display area and the gate metal 220b, active material area 224b and source / drain material area 226b in the GOA area are formed on the substrate;

[0242] a first inorganic film layer, covering the display area and the GOA area;

[0243] A first organic film region 24a of the display region and a first organic film region 24b of the GOA region are formed on the first inorganic film layer 23, exposing the first inorganic film layer corresponding to the drain, gate metal and source / drain material regions;

[0244] The second inorganic film layer 25 covers the first organic film region of the display region and the first organic film region of the GOA region;

[0245] A first opening 32 and a second opening 33 are formed in the GOA region to expose the gate metal and source / drain material regions respectively;

[0246] A common electrode 27a formed on the second inorganic film layer near the drain electrode in the display area, and a connection metal 27b electrically connecting the gate metal and the source and drain material area in the GOA area;

[0247] A third inorganic film layer 28, covering the display area and the GOA area;

[0248] A third opening 29 is formed in the display area, penetrating the first to third inorganic film layers to expose the drain electrode;

[0249] The pixel electrode 30 is formed on the third inorganic film layer near the drain electrode in the display area, and the pixel electrode is electrically connected to the drain electrode.

[0250] Among them, the TFT can be a top-gate TFT or a bottom-gate TFT; the first to third inorganic film regions can be SixNy or silicon dioxide or silicon oxide; the first organic film layer can be a PAC film; the common electrode and the pixel electrode can both be transparent ITO or IZO.

[0251] Such an array substrate structure effectively improves the display quality of the display panel because the organic film does not swell during the manufacturing process, and can also achieve a narrow frame effect.

[0252] In a preferred embodiment, the display area further includes: an auxiliary electrode 31a formed on the common electrode, such as Figure 21b The auxiliary electrode can be made of metal such as copper.

[0253] The auxiliary electrode can be used to reduce the resistance of the common electrode. When the resistance is reduced, the charge is more easily released, improving the anti-static ability of the array substrate. In addition, due to the reduced contact resistance, the peripheral drive voltage is easier to apply, and the delay of the driver IC is reduced.

[0254] In a more preferred embodiment, the GOA region includes an auxiliary metal 31b formed on the connection metal, such as Figure 21b The auxiliary metal and the auxiliary electrode can be provided in the same layer.

[0255] Normally, the connecting metal is thin, which sometimes results in poor step coverage when filling the first opening and the second opening, and the circuit traces are easily broken. The presence of the auxiliary metal improves the step coverage and increases the reliability of the array substrate.

[0256] A fifth aspect of the present invention provides a display panel comprising the array substrate of the third or fourth aspect. The display panel can be applied to mobile phones, notebooks, navigation devices, etc., without limitation herein.

[0257] Although the above embodiments are described as an example in which the drain is connected to the pixel electrode, those skilled in the art should understand that due to the interchangeability of the source and drain of the transistor in structure and composition, the source may also be connected to the pixel electrode, which is an equivalent transformation of the above embodiments of the present invention.

[0258] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not limitations on the implementation methods of the present invention. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is impossible to list all the implementation methods here. All obvious changes or modifications derived from the technical solution of the present invention are still within the scope of protection of the present invention.

Claims

1. A method for manufacturing an array substrate, wherein the array substrate includes a display area, characterized in that: include: Forming a TFT transistor on a substrate, comprising a gate, a gate insulating layer, an active area, a source electrode, and a drain electrode sequentially formed behind the gate; forming a first inorganic film layer to cover the display area; forming a first organic film region on the first inorganic film layer to expose the first inorganic film layer corresponding to the drain electrode; forming a second inorganic film layer to cover the first organic film region, wherein the material of the first organic film region is PAC; forming a common electrode on the second inorganic film layer close to the drain electrode, and an auxiliary electrode on the common electrode; The method for preparing the auxiliary electrode includes: using a patterned first photoresist as a mask to pattern the auxiliary electrode layer to form the auxiliary electrode; specifically, removing the first photoresist by soaking in a stripping solution; forming a third inorganic film layer to cover the display area; forming an opening to expose the drain electrode; A pixel electrode is formed on the third inorganic film layer close to the drain electrode, and the pixel electrode is electrically connected to the drain electrode.

2. The method according to claim 1, characterized in that forming a common electrode on the second inorganic film layer close to the drain electrode, comprising: forming a first transparent metal layer on the second inorganic film layer; forming a patterned first photoresist layer on the first transparent metal layer; Using the patterned first photoresist layer as a mask, patterning the first transparent metal layer to obtain the common electrode; The patterned first photoresist layer is stripped using a stripping solution.

3. The method according to claim 2, characterized in that After forming the first transparent metal layer on the second inorganic film layer, the method further includes: forming an auxiliary electrode layer on the first transparent metal layer; forming a patterned second photoresist layer on the auxiliary electrode layer; Using the patterned second photoresist layer as a mask, patterning the auxiliary electrode layer, thereby obtaining an auxiliary electrode formed on the first transparent metal layer; The patterned second photoresist layer is stripped using a stripping solution.

4. A method for manufacturing an array substrate, wherein the array substrate comprises a display area and a GOA area, characterized in that: include: Forming the TFT transistors in the display area and the gate metal, active material area and source and drain material area in the GOA area on the substrate; A TFT transistor in a display area is formed on a substrate, comprising a gate electrode, a gate insulating layer, an active area, a source electrode, and a drain electrode formed in sequence behind the gate electrode; forming a first inorganic film layer to cover the display area and the GOA area; forming a first organic film region of the display region and a first organic film region of the GOA region on the first inorganic film layer, exposing the first inorganic film layer corresponding to the drain electrode, the gate metal and the source / drain material regions; forming a second inorganic film layer to cover the first organic film region of the display region and the first organic film region of the GOA region, wherein the material of the first organic film region is PAC; forming a first opening and a second opening in the GOA region to expose the gate metal and source / drain material regions, respectively; forming a common electrode and an auxiliary electrode on the common electrode on the second inorganic film layer near the drain electrode in the display area, and forming a connection metal electrically connecting the gate metal and the source and drain material area in the GOA area; The method for preparing the auxiliary electrode includes: using a patterned first photoresist as a mask to pattern the auxiliary electrode layer to form the auxiliary electrode; specifically, removing the first photoresist by soaking in a stripping solution; forming a third inorganic film layer to cover the display area and the GOA area; forming a third opening in the display area, penetrating the first to third inorganic film layers to expose the drain electrode; A pixel electrode is formed on the third inorganic film layer in the display area close to the drain electrode, and the pixel electrode is electrically connected to the drain electrode.

5. The method according to claim 4, characterized in that The step of forming a common electrode on the second inorganic film layer near the drain electrode in the display area and forming a connection metal electrically connecting the gate metal and the source and drain material area in the GOA area comprises: forming a second transparent metal layer on the second inorganic film layer; forming a patterned third photoresist on the second transparent metal layer; Using the patterned third photoresist as a mask, patterning the second transparent metal layer to obtain the common electrode and the connecting metal; The patterned third photoresist layer is stripped using a stripping solution.

6. The method according to claim 5, characterized in that After forming the second transparent metal layer on the second inorganic film layer, the method further includes: forming an auxiliary electrode layer on the second transparent metal layer; forming a patterned fourth photoresist layer on the auxiliary electrode layer; using the patterned fourth photoresist layer as a mask to pattern the auxiliary electrode layer, thereby obtaining an auxiliary electrode formed on the second transparent metal layer; The patterned fourth photoresist layer is stripped using a stripping solution.

7. The method according to claim 6, characterized in that The auxiliary electrode layer is patterned using the patterned fourth photoresist layer as a mask to obtain an auxiliary electrode formed on the second transparent metal layer, further comprising: The auxiliary electrode layer is patterned using the patterned fourth photoresist layer as a mask, thereby obtaining an auxiliary electrode formed on the second transparent metal layer and an auxiliary metal formed on the connecting metal.

8. An array substrate prepared by the method according to any one of claims 1 to 3, characterized in that: include: substrate; A TFT transistor formed on a substrate includes a gate, a gate insulating layer, an active region, a source electrode, and a drain electrode; forming a first inorganic film layer on the TFT transistor; forming a first organic film region on the first inorganic film layer; a second inorganic film layer covering the first organic film region; a common electrode formed on the second inorganic film layer near the drain electrode; a third inorganic film layer, covering the display area; An opening is formed, penetrating the first to third inorganic film layers to expose the drain electrode; A pixel electrode is formed on the third inorganic film layer close to the drain electrode, and the pixel electrode is electrically connected to the drain electrode.

9. The array substrate according to claim 8, wherein: Also includes An auxiliary electrode is formed on the common electrode.

10. An array substrate prepared by the method according to any one of claims 4 to 7, comprising a display area and a GOA area, characterized in that: Also includes: substrate; The TFT transistors in the display area and the gate metal, active material area and source and drain material area in the GOA area are formed on the substrate; a first inorganic film layer, covering the display area and the GOA area; forming a first organic film region of the display region and a first organic film region of the GOA region on the first inorganic film layer, exposing the first inorganic film layer corresponding to the drain electrode, gate metal, and source / drain material regions; a second inorganic film layer covering the first organic film region of the display region and the first organic film region of the GOA region; A first opening and a second opening are formed in the GOA region to expose the gate metal and source / drain material regions, respectively; A common electrode formed on the second inorganic film layer near the drain electrode in the display area, and a connection metal electrically connecting the gate metal and the source and drain material area in the GOA area; a third inorganic film layer, covering the display area and the GOA area; a third opening formed in the display area, penetrating the first to third inorganic film layers to expose the drain electrode; A pixel electrode is formed on the third inorganic film layer in the display area and close to the drain electrode, and the pixel electrode is electrically connected to the drain electrode.

11. The array substrate according to claim 10, wherein: The display area further includes: An auxiliary electrode is formed on the pixel electrode.

12. The array substrate according to claim 11, wherein: The GOA region includes: An auxiliary metal is formed on the connection metal.

13. A display panel comprising the array substrate according to claim 8 or 9 or the array substrate according to any one of claims 10 to 12.

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