Method for Determining Stored Energy of Storage Capacitor and Semiconductor Memory

Abstract

An embodiment of the present application provides a method for determining the stored energy of a storage capacitor and a semiconductor memory. The method includes: writing a first level signal to an array region of the memory through a power supply to determine the total energy consumption of the memory in a first operating state; the memory includes a storage capacitor in the array region, switching transistors in the array region and a peripheral region, and the total energy consumption of the memory in the first operating state includes the stored energy of the storage capacitor, the first heat dissipated by the storage capacitor, and the total energy consumption of the memory in a second operating state; writing the first level signal in reverse to the array region through the power supply to determine the total energy consumption of the memory in the second operating state; and determining the stored energy of the storage capacitor based on the total energy consumption of the memory in the first operating state and the total energy consumption of the memory in the second operating state.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more particularly to, but not limited to, a method for determining the stored energy of a storage capacitor and a semiconductor memory. Background Art

[0002] When designing a semiconductor memory, such as a Dynamic Random Access Memory (DRAM), low power consumption is usually pursued. The ways to achieve low power consumption include: 1. The proportion of the stored energy of the DRAM in the energy input by the power supply to the DRAM should be as high as possible; 2. On the premise of realizing the storage function, the stored energy of the DRAM should be as low as possible; 3. The retention time of the stored energy of the DRAM should be as long as possible. Among them, the stored energy of the storage capacitor is the stored energy of the DRAM. Therefore, a method is needed to determine the magnitude of the stored energy of the storage capacitor. Summary of the Invention

[0003] In view of this, embodiments of this application provide a method for determining the stored energy of a storage capacitor and a semiconductor memory.

[0004] In a first aspect, embodiments of this application provide a method for determining the stored energy of a storage capacitor. The method includes: writing a first-level signal to the array area of the memory through a power supply to determine the total power consumption of the memory in a first operating state; the memory includes a storage capacitor in the array area and switching transistors in the array area and the peripheral area, and the total power consumption of the memory in the first operating state includes the stored energy of the storage capacitor, the first heat dissipated by the storage capacitor, and the total power consumption of the memory in a second operating state; writing the first-level signal in reverse to the array area through the power supply to determine the total power consumption of the memory in the second operating state; determining the stored energy of the storage capacitor based on the total power consumption of the memory in the first operating state and the total power consumption of the memory in the second operating state.

[0005] In some embodiments, determining the stored energy of the storage capacitor based on the total power consumption of the memory in the first operating state and the total power consumption of the memory in the second operating state includes: taking the difference between the total power consumption of the memory in the first operating state and the total power consumption of the memory in the second operating state to obtain a first difference; dividing the first difference by 2 to obtain the stored energy of the storage capacitor.

[0006] In some embodiments, it further includes: when the power consumption of the power supply includes, in addition to the total power consumption of the memory in the first operating state, a second heat dissipated inside the power supply, determining that the first heat dissipated by the storage capacitor is equal to the stored energy of the storage capacitor.

[0007] In some embodiments, writing the first level signal in the reverse direction to the array region through the power supply to determine the total energy consumption of the memory in the second operating state includes: obtaining a relationship diagram of the current, voltage, and time of the memory; when writing the first level signal in the reverse direction to the array region through the power supply, determining a first time period of the memory in the second operating state; based on the first time period, determining a first current value and a first voltage value of the memory in the second operating state in the relationship diagram; and determining the total energy consumption of the memory in the second operating state based on the first time period, the first current value, and the first voltage value.

[0008] In some embodiments, writing the first level signal in the reverse direction to the array region through the power supply to determine the total energy consumption of the memory in the second operating state includes: when the second heat dissipated inside the power supply is less than a preset threshold, writing the first level signal in the reverse direction to the array region through the power supply to determine the energy consumption of the power supply of the memory in the second operating state; and determining the energy consumption of the power supply of the memory in the second operating state as the total energy consumption of the memory in the second operating state.

[0009] In some embodiments, when the second heat dissipated inside the power supply is less than a preset threshold, writing the first level signal in the reverse direction to the array region through the power supply to determine the energy consumption of the power supply of the memory in the second operating state includes: when the second heat dissipated inside the power supply is less than a preset threshold, writing the first level signal to the array region through the power supply, writing the first level signal in the reverse direction to the array region through the power supply, and determining a first energy consumption of the power supply; when the second heat dissipated inside the power supply is less than a preset threshold, writing the first level signal to the array region through the power supply, and determining a second energy consumption of the power supply; and determining the energy consumption of the power supply of the memory in the second operating state based on the first energy consumption and the second energy consumption of the power supply.

[0010] In some embodiments, when the second heat dissipated inside the power supply is less than a preset threshold, writing the first level signal to the array region through the power supply, writing the first level signal in reverse to the array region through the power supply, and determining the first energy consumption of the power supply includes: when the second heat dissipated inside the power supply is less than a preset threshold, determining the total energy consumption of performing N sets of first operations on the array region through the power supply, where the first operation set includes the following operations performed in sequence: writing the first level signal to the array region through the power supply, writing the first level signal in reverse to the array region through the power supply, and N is an integer greater than or equal to 1; based on the total energy consumption when performing N sets of first operations on the array region through the power supply, determining the first energy consumption of the power supply.

[0011] In some embodiments, when the second heat dissipated inside the power supply is less than a preset threshold, determining the total energy consumption of performing N sets of first operations on the array region through the power supply includes: when the second heat dissipated inside the power supply is less than a preset threshold, during the process of performing N sets of first operations on the array region through the power supply, obtaining the first percentage of the power consumption of the power supply; based on the obtained capacity of the power supply and the first percentage of the power consumption of the power supply, determining the total energy consumption of performing N sets of first operations on the array region through the power supply.

[0012] In some embodiments, when the second heat dissipated inside the power supply is less than a preset threshold, writing the first level signal to the array region through the power supply, and determining the second energy consumption of the power supply includes: when the second heat dissipated inside the power supply is less than a preset threshold, determining the total energy consumption of performing M sets of second operations on the array region through the power supply, where the second operation set includes the following operations performed in sequence: writing the first level signal to the array region through the power supply, discharging the stored energy of the storage capacitor and the stored energy of the equivalent capacitor of the switching transistor when writing the first level signal to the array region, and M is an integer greater than or equal to 1; based on the total energy consumption when performing M sets of second operations on the array region through the power supply, determining the second energy consumption of the power supply.

[0013] In some embodiments, when the second heat dissipated inside the power supply is less than a preset threshold, determining the total energy consumption of performing M sets of second operations on the array region through the power supply includes: when the second heat dissipated inside the power supply is less than a preset threshold, during the process of performing M sets of second operations on the array region through the power supply, obtaining the second percentage of the power consumption of the power supply; based on the obtained capacity of the power supply and the second percentage of the power consumption of the power supply, determining the total energy consumption of performing M sets of second operations on the array region through the power supply.

[0014] In some embodiments, writing a first level signal to the array region of the memory through a power supply to determine the total energy consumption of the memory in a first operating state includes: obtaining a relationship diagram between the current, voltage, and time of the memory; when writing the first level signal to the array region of the memory through the power supply, determining a second time period of the memory in the first operating state; based on the second time period, determining a second current value and a second voltage value of the memory in the first operating state in the relationship diagram; and determining the total energy consumption of the memory in the first operating state based on the second time period, the second current value, and the second voltage value.

[0015] In some embodiments, writing a first level signal to the array region of the memory through a power supply to determine the total energy consumption of the memory in a first operating state includes: when the second heat dissipated inside the power supply is less than a preset threshold, writing the first level signal to the array region of the memory through the power supply to determine the energy consumption of the power supply in the first operating state of the memory; and determining the energy consumption of the power supply in the first operating state as the total energy consumption of the memory in the first operating state.

[0016] In some embodiments, the array region includes: all array regions of the memory or sub-array regions of the memory.

[0017] In a second aspect, an embodiment of the present application provides a semiconductor memory for performing the method for determining the stored energy of the storage capacitor described above.

[0018] In some embodiments, the semiconductor memory is a dynamic random access memory (DRAM) chip.

[0019] In the embodiments of the present application, first, a first level signal is written to the array region of the memory through a power supply to determine the total energy consumption of the memory in a first operating state; then, the first level signal is written in reverse to the array region through the power supply to determine the total energy consumption of the memory in a second operating state; finally, since the total energy consumption of the memory in the first operating state includes the stored energy of the storage capacitor, the first heat dissipated by the storage capacitor, and the total energy consumption of the memory in the second operating state, therefore, when the stored energy of the storage capacitor is equal to the first heat dissipated by the storage capacitor, the stored energy of the storage capacitor can be obtained by subtracting the total energy consumption of the memory in the second operating state from the total energy consumption of the memory in the first operating state and dividing the obtained difference by 2. It can be seen that the embodiments of the present application realize the determination of the stored energy of the storage capacitor by setting two operating states and respectively obtaining the total energy consumption of the memory in the two operating states, which not only makes the operation and implementation more convenient, but also does not change the original structure of the memory. Description of the Drawings

[0020] Figure 1A It is a schematic flowchart of a method for determining the stored energy of a storage capacitor provided by an embodiment of the present application;

[0021] Figure 1B It is a schematic circuit diagram of a storage unit in an array region provided by an embodiment of the present application;

[0022] Figure 1C It is a schematic diagram of the composition of the total energy consumption of a memory in a first operating state provided by an embodiment of the present application;

[0023] Figure 2A It is a schematic flowchart of a method for determining the total energy consumption of a memory in a second operating state provided by an embodiment of the present application;

[0024] Figure 2B It is a schematic flowchart of another method for determining the total energy consumption of a memory in a second operating state provided by an embodiment of the present application;

[0025] Figure 2C It is a schematic flowchart of a method for determining the energy consumption of a power supply of a memory in a second operating state provided by an embodiment of the present application;

[0026] Figure 3 It is a schematic flowchart of a method for determining the total energy consumption of a memory in a first operating state provided by an embodiment of the present application;

[0027] Figure 4 It is a schematic flowchart of another method for determining the stored energy of a storage capacitor provided by an embodiment of the present application. Detailed implementation manners

[0028] Hereinafter, the exemplary embodiments disclosed in the present application will be described in more detail with reference to the accompanying drawings. Although the exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application can be implemented in various forms and should not be limited by the specific embodiments set forth herein. On the contrary, these embodiments are provided so that the present application can be more thoroughly understood and the scope of the present application disclosed can be fully conveyed to those skilled in the art.

[0029] In the following description, a large number of specific details are given to provide a more thorough understanding of the present application. However, it is obvious to those skilled in the art that the present application can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present application, some technical features known to the art are not described; that is, not all features of the actual embodiments are described here, and the well-known functions and structures are not described in detail.

[0030] In the drawings, for clarity, the dimensions of layers, regions, elements and their relative dimensions may be exaggerated. Throughout the drawings, like reference numerals denote like elements.

[0031] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Thus, without departing from the teachings of the present application, the first element, component, region, layer or part discussed below may be denoted as the second element, component, region, layer or part. And when discussing the second element, component, region, layer or part, it does not indicate that there must be a first element, component, region, layer or part in the present application.

[0032] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present application. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, specify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.

[0033] An embodiment of the present application provides a method for determining the stored energy of a storage capacitor, as Figure 1A shown, the method includes the following steps S101 to step S103:

[0034] Step S101: Write a first level signal to the array region of the memory through a power supply to determine the total energy consumption of the memory in the first operating state; the memory includes a storage capacitor in the array region, switching transistors in the array region and the peripheral region, and the total energy consumption of the memory in the first operating state includes the stored energy of the storage capacitor, the first heat dissipated by the storage capacitor, and the total energy consumption of the memory in the second operating state;

[0035] Here, the memory can be a DRAM, a Static Random-Access Memory (SRAM), etc. Usually, the memory includes an array region and a peripheral region. The array region is the core area of the memory for storing data, and the peripheral region is the control area of the memory for controlling the writing and reading of data in the array region. The array region includes storage capacitors and switching transistors. Among them, the storage capacitors are used to store data, and the switching transistors in the array region are used to control the input and output of data in the storage capacitors. The peripheral region also includes switching transistors, which are used to form a control circuit to realize the control of writing and reading data in the array region. The switching transistors in the array region and the peripheral region can both be Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs). The equivalent capacitance of the switching transistor refers to the equivalent capacitance of the gate oxide capacitance, the space charge layer capacitance, and the depletion layer capacitance in the switching transistors in the array region and the peripheral region.

[0036] Taking DRAM as an example, the following describes the process of writing or reading data in the array region. Usually, the array region includes a number of memory cells, each memory cell is used to store one bit of data, and the data stored in all the memory cells in the array region is combined to obtain the storage information of the array region. The peripheral region is used to control the time and size of writing or reading data in the array region. Figure 1B The circuit schematic diagram of a memory cell in the array region is shown, as Figure 1B shown. The memory cell includes a storage capacitor C and a switching transistor T. The gate of the switching transistor T is connected to the Word Line (WL), the drain is connected to the Bit Line (BL), and the source is connected to the storage capacitor C. A memory cell represents logical 1 and 0 by the amount of charge stored in the storage capacitor C, or rather, the high and low voltage difference across the storage capacitor C, thereby realizing the storage of information. The on and off of the switching transistor T determine whether to allow or prohibit the reading and rewriting of the information stored in the storage capacitor C. Among them, BL is the only channel for the outside world to access the storage capacitor C. When the switching transistor T is turned on, the outside world can perform reading or writing operations on the storage capacitor C through BL. The peripheral region can control the on and off of the switching transistor T by controlling the magnitude of the WL voltage, and thus control the charge and discharge of the storage capacitor C to realize the writing or reading of the storage information.

[0037] In some embodiments, the voltage applied to one plate of the storage capacitor C is half of the power supply voltage Vcc, i.e., (1 / 2)Vcc. When writing data "1", a voltage Vcc is applied to BL. This voltage is conducted from the drain to the source through the conducting switch transistor T and finally applied to the other plate of the storage capacitor C. At this time, the voltage difference across the storage capacitor C is +(1 / 2)Vcc; when writing data "0", a voltage 0 is applied to BL, which causes the voltage on the other plate of the storage capacitor C to also be 0. At this time, the voltage difference across the storage capacitor C is -(1 / 2)Vcc. It can be seen that in the two states of writing data "1" and writing data "0", the magnitude of the voltage difference across the storage capacitor C is equal, but the directions are opposite. Therefore, the data stored can be determined as "0" or "1" by the direction of the voltage difference across the storage capacitor C.

[0038] The first operating state refers to the state in which the power supply writes a first level signal to the array area of the memory. The first level signal can be a high level signal. Then, the power supply writing a first level signal to the array area of the memory means that the power supply writes data "1" to the array area of the memory. Since the total energy consumption of the memory needs to be obtained when the power supply writes a first level signal to the array area of the memory in step S101, in order to ensure that the energy stored in the storage capacitor and the equivalent capacitance of the switch transistor does not affect the total energy consumption of the memory when writing a first level signal to the array area of the memory. In some embodiments, step S101 can be implemented by first writing data "0" to the array area of the memory as a base and then writing data "1" to the array area of the memory.

[0039] The second operating state refers to the state in which the power supply writes the first level signal in reverse to the array area of the memory. When the first level signal is a high level signal, the state in which the power supply writes the first level signal in reverse to the array area of the memory is the state in which the power supply writes a low level signal to the array area of the memory. That is to say, the second operating state refers to the state in which the power supply writes data "0" to the array area of the memory.

[0040] During the process of the power supply writing a first level signal to the array area of the memory, since the memory does not do external work, the energy written by the power supply to the memory is either stored by the memory or dissipated in the form of heat. And since the memory includes the storage capacitors in the array area and the switch transistors in the array area and the peripheral area, the energy stored by the memory refers to the energy stored in the storage capacitors and the equivalent capacitance of the switch transistors. Also, since heat dissipation occurs in the equivalent capacitance of the storage capacitor and the switch transistor during the process of the power supply writing a first level signal to the array area of the memory, and heat dissipation also occurs in the switch transistor due to leakage (since the leakage power consumption is completely used for heat dissipation, the heat dissipation due to leakage is equal to the leakage power consumption). Therefore, asFigure 1C As shown, in the first operating state, the total energy consumption 20 of the memory includes the stored energy 201 of the storage capacitor, the stored energy 202 of the equivalent capacitor, the leakage power consumption 203 of the switching transistor, the first heat dissipated by the storage capacitor 205, and the third heat dissipated by the equivalent capacitor 204. Among them, the leakage power consumption 203 of the switching transistor, the first heat dissipated by the storage capacitor 205, and the third heat dissipated by the equivalent capacitor 204 in the first operating state are released to the environment in the form of heat and are all useless energy consumptions. The stored energy 201 of the storage capacitor and the stored energy 202 of the equivalent capacitor are energy consumptions under data logic operations. The stored energy 201 of the storage capacitor and the stored energy 202 of the equivalent capacitor will discharge charges and generate heat in the power-off state.

[0041] Since in the state where the power supply writes the first-level signal in reverse to the array area of the memory (i.e., in the second operating state), compared with the state where the power supply writes the first-level signal to the array area of the memory, the power supply does not store energy in the storage capacitor, nor is there heat dissipation during the process of storing energy in the storage capacitor. Therefore, the total energy consumption of the memory in the second operating state includes the stored energy of the equivalent capacitor of the switching transistor, the third heat dissipated by the equivalent capacitor of the switching transistor, and the heat dissipated by the leakage of the switching transistor. Thus, it is obtained that the total energy consumption of the memory in the first operating state includes the stored energy of the storage capacitor, the first heat dissipated by the storage capacitor, and the total energy consumption of the memory in the second operating state.

[0042] In some embodiments, the total energy consumption of the memory in the first operating state can be calculated by Joule's law; alternatively, when the internal resistance of the power supply is small, the energy consumption of the power supply can be determined as the energy consumption of the memory, and by determining the energy consumption of the power supply, the total energy consumption of the memory in the first operating state can be obtained.

[0043] In some embodiments, the array area can be all the array areas of the memory or a sub-array area of the memory, that is, the array area here can be all of the array areas in the memory or a part of the array areas in the memory. In the case where it is necessary to determine the stored energy of the storage capacitor in the sub-array area, the implementation of step S101 can include: writing the first-level signal to the sub-array area of the memory through the power supply, that is, only writing the first-level signal to the sub-array area where the stored energy of the storage capacitor to be determined is located, so that the method provided by the embodiments of the present application can be applied to more scenarios without changing the original memory structure.

[0044] Step S102: Write the first-level signal in reverse to the array area through the power supply to determine the total energy consumption of the memory in the second operating state;

[0045] Here, the total energy consumption of the memory in the second operating state can also be calculated by Joule's law; or when the internal resistance of the power supply is small, the energy consumption of the power supply is determined as the energy consumption of the memory, and by determining the energy consumption of the power supply, the total energy consumption of the memory in the second operating state is obtained.

[0046] Step S103: Based on the total energy consumption of the memory in the first operating state and the total energy consumption of the memory in the second operating state, determine the stored energy of the storage capacitor.

[0047] In some embodiments, the method further includes: when the energy consumption of the power supply includes, in addition to the total energy consumption of the memory in the first operating state, a second amount of heat dissipated inside the power supply, determining that the first amount of heat dissipated by the storage capacitor is equal to the stored energy of the storage capacitor.

[0048] Here, the energy consumption of the power supply including, in addition to the total energy consumption of the memory in the first operating state, a second amount of heat dissipated inside the power supply means that: in the first operating state, the energy consumption of the power supply is only used to do work on the memory and generate heat inside itself.

[0049] When the energy consumption of the power supply includes, in addition to the total energy consumption of the memory in the first operating state, a second amount of heat dissipated inside the power supply, the proof process that the first amount of heat dissipated by the storage capacitor is equal to the stored energy of the storage capacitor is as follows:

[0050] When the power supply writes a high-level signal (i.e., the first-level signal) to the array region of the memory, if the current approaches 0, this process is reversible, and the power supply does the maximum non-volume work on the memory, obtaining the following expression:

[0051] ΔG = ΔH - TΔS = ZFE;

[0052] Where G is the Gibbs free energy. For an isothermal and isobaric equilibrium closed system, ΔG can measure the non-volume work output by the system. T is the temperature, S is the entropy, H is the enthalpy, Z is the amount of transferred electrons, E is the electromotive force, and F is the Faraday constant.

[0053] Also, for the power supply, Q = ZF, and for the memory (the energy of the power supply mainly acts on the capacitor in the memory), Q = C*U, where C is the capacitance and U is the voltage across the capacitor. Since the process of the power supply writing a high-level signal to the array region of the memory is a reversible process when the current approaches 0 and the power supply does the maximum non-volume work on the memory, Q = ZF = C*U, and thus ΔG = QE = C*U*E. Also, since U = E, so ΔG = C*U 2 .

[0054] If the current does not approach 0 (the actual operating condition of the memory), then ΔG < ZFE, that is, part of the energy consumed by the power supply will be dissipated in the form of irreversible heat. Since the current does not approach 0, the voltage stabilizing unit in the memory stabilizes the voltage across the capacitor written into the memory at a certain value, and the extra energy consumed is entirely used for heat generation inside the power supply. Therefore, for the memory, regardless of the current magnitude, the energy obtained from the power supply is the same, which is C*U 2 。

[0055] According to the energy storage formula of the capacitor: W = 1 / 2CU 2 , it can be known that the energy W stored in the capacitor is equal to half of the energy obtained from the power supply (C*U 2 ), that is, half of the energy obtained from the power supply is stored in the capacitor and the other half is dissipated. In other words, the energy W stored in the capacitor is equal to the heat dissipated by the capacitor. Since the capacitors in the memory include the storage capacitor and the equivalent capacitor of the switching transistor, therefore, regardless of whether it is the storage capacitor or the equivalent capacitor of the switching transistor in the memory, the stored energy is equal to the dissipated heat.

[0056] Also, since the condition for the above conclusion to hold is that the energy consumption of the power supply is only used for doing work on the memory and generating heat inside itself, therefore, in the case where the energy consumption of the power supply includes not only the total energy consumption of the memory in the first operating state but also the second heat dissipated inside the power supply, it is determined that the first heat dissipated by the storage capacitor is equal to the stored energy of the storage capacitor.

[0057] Since the total energy consumption of the memory in the first operating state includes the stored energy of the storage capacitor, the first heat dissipated by the storage capacitor, and the total energy consumption of the memory in the second operating state, and according to the above, the first heat dissipated by the storage capacitor is equal to the stored energy of the storage capacitor, therefore, in some embodiments, the implementation of step S103 "determine the stored energy of the storage capacitor based on the total energy consumption of the memory in the first operating state and the total energy consumption of the memory in the second operating state" may include the following steps S1031 and step S1032:

[0058] Step S1031: Subtract the total energy consumption of the memory in the second operating state from the total energy consumption of the memory in the first operating state to obtain a first difference;

[0059] Here, since the total energy consumption of the memory in the first operating state includes the stored energy of the storage capacitor, the first heat dissipated by the storage capacitor, and the total energy consumption of the memory in the second operating state, therefore, subtracting the total energy consumption of the memory in the second operating state from the total energy consumption of the memory in the first operating state, the obtained first difference is equal to the sum of the stored energy of the storage capacitor and the first heat dissipated by the storage capacitor.

[0060] Step S1032: Divide the first difference by 2 to obtain the stored energy of the storage capacitor.

[0061] Here, as can be seen from the above, the stored energy of the storage capacitor is equal to the first heat dissipated by the storage capacitor, and the first difference is equal to the sum of the stored energy of the storage capacitor and the first heat dissipated by the storage capacitor. Therefore, dividing the first difference by 2 gives the stored energy of the storage capacitor.

[0062] In the embodiments of the present application, first, a first level signal is written into the array region of the memory through a power supply to determine the total energy consumption of the memory in the first operating state; then, the first level signal is rewritten in the array region through the power supply to determine the total energy consumption of the memory in the second operating state; finally, since the total energy consumption of the memory in the first operating state includes the stored energy of the storage capacitor, the first heat dissipated by the storage capacitor, and the total energy consumption of the memory in the second operating state, therefore, when the stored energy of the storage capacitor is equal to the first heat dissipated by the storage capacitor, the total energy consumption of the memory in the first operating state can be subtracted from the total energy consumption of the memory in the second operating state, and the stored energy of the storage capacitor can be obtained by dividing the obtained difference by 2. It can be seen that the embodiments of the present application realize the determination of the stored energy of the storage capacitor by setting two operating states and respectively obtaining the total energy consumption of the memory in the two operating states, which not only makes the operation and implementation more convenient, but also does not change the original structure of the memory.

[0063] In some embodiments, as Figure 2A shown, the implementation of step S102 "rewrite the first level signal in the array region through the power supply to determine the total energy consumption of the memory in the second operating state" may include the following steps S1021a to S1024a:

[0064] Step S1021a: Obtain the relationship diagram between the current, voltage and time of the memory.

[0065] Here, the implementation of step S1021a can collect the values of the memory current and voltage at a certain sampling interval, so as to obtain the relationship diagram between the current, voltage and time of the memory. Among them, the sampling interval can be determined according to the test accuracy. For example, if an accurate calculation of the energy consumption value is required, the sampling interval can be smaller; if a rough calculation of the energy consumption value is required, that is, the accuracy requirement is not high, the sampling interval can be larger. The embodiments of the present application do not limit the sampling interval.

[0066] Step S1022a: When rewriting the first level signal in the array region through the power supply, determine the first time period of the memory in the second operating state.

[0067] Here, the first time period includes a first start time and a first end time. Then, step S1022a is used to determine the first start time and the first end time when writing the first level signal in reverse to the array area through the power supply. In some embodiments, by subtracting the first start time in the first time period from the first end time in the first time period, the first duration for writing the first level signal in reverse to the array area through the power supply can also be determined.

[0068] Step S1023a: Based on the first time period, determine a first current value and a first voltage value of the memory in the second operating state in the relationship diagram;

[0069] Here, the implementation of step S1023a may include: determining the first start time and the first end time for writing the first level signal in reverse to the array area through the power supply by the first time period; then finding the positions of the first start time and the first end time in the relationship diagram. The current value and the voltage value corresponding to the curve between the first start time and the first end time in the relationship diagram are the first current value and the first voltage value of the memory in the second operating state.

[0070] Step S1024a: Based on the first time period, the first current value, and the first voltage value, determine the total energy consumption of the memory in the second operating state.

[0071] Here, the implementation of step S1024a can obtain the total energy consumption of the memory in the second operating state through Joule's law: Q = IUΔt, where I is the first current value, U is the first voltage value, Δt is the first duration, and Δt can be obtained from the first time period.

[0072] In the embodiments of the present application, first, a relationship diagram between the current, voltage, and time of the memory is obtained; then, the first time period of the memory in the second operating state is determined; then, the first current value and the first voltage value are found on the relationship diagram through the first time period; finally, based on the first time period, the first current value, and the first voltage value, the total energy consumption of the memory in the second operating state is determined through Joule's law.

[0073] In some embodiments, as Figure 2B shown, the implementation of step S102 "writing the first level signal in reverse to the array area through the power supply to determine the total energy consumption of the memory in the second operating state" may include the following steps S1021b to S1022b:

[0074] Step S1021b: When the second heat dissipated inside the power supply is less than a preset threshold, write the first level signal in reverse to the array area through the power supply to determine the energy consumption of the power supply of the memory in the second operating state;

[0075] Here, the preset threshold value may be determined according to the total energy consumption of the memory in the second operating state, and the setting standard may be: the preset threshold value is smaller than the total energy consumption of the memory in the second operating state, so that when the second heat dissipated inside the power supply is smaller than the preset threshold value, the second heat dissipated inside the power supply may be ignored. During implementation, if the total energy consumption of the memory in the second operating state is larger, the preset threshold value may also be larger; if the total energy consumption of the memory in the second operating state is smaller, the preset threshold value may also be smaller.

[0076] In some embodiments, the power supply may be a mobile power supply with a relatively small internal resistance, and the energy consumption of the power supply may be obtained by detecting the power supply value of the mobile power supply. The embodiment of the present application does not limit the method for determining the energy consumption of the power supply.

[0077] Step S1022b: Determine the energy consumption of the power supply in the second operating state as the total energy consumption of the memory in the second operating state.

[0078] Here, since the second heat dissipated inside the power supply is less than the preset threshold, the energy dissipated inside the power supply in the energy consumption of the power supply in the second operating state can be ignored. The energy consumption of the power supply in the second operating state can be used as the total energy consumption of the memory in the second operating state. Therefore, when the energy consumption of the power supply is easy to obtain, the method of obtaining the total energy consumption of the memory in the second operating state can be simplified, making the operation more convenient.

[0079] In some embodiments, Figure 2C As shown, the implementation of step S1021b "when the second heat dissipated inside the power supply is less than a preset threshold, rewriting the first level signal into the array area through the power supply to determine the energy consumption of the power supply of the memory in the second operating state" may include the following steps S12b1 to S12b3:

[0080] Step S12b1: when the second heat dissipated inside the power supply is less than a preset threshold, the first level signal is written into the array area by the power supply, and the first level signal is reversely written into the array area by the power supply to determine the first energy consumption of the power supply;

[0081] Here, in the case where the first level signal is a high level signal, the first level signal is reversely written into the array area through the power supply, that is, a low level signal is written into the array area through the power supply (that is, data "0" is written), then step S12b1 is implemented by first writing a high level signal into the array area through the power supply, and then writing a low level signal into the array area through the power supply, and the first energy consumption of the power supply includes two parts of energy consumption of writing a high level signal into the array area through the power supply and writing a low level signal into the array area through the power supply.

[0082] Step S12b2: When the second heat dissipated inside the power supply is less than a preset threshold, write the first level signal to the array area through the power supply, and determine the second power consumption of the power supply;

[0083] Here, the second power consumption of the power supply is the power consumption of the power supply when writing the first level signal (i.e., high level signal) to the array area through the power supply.

[0084] Step S12b3: Based on the first power consumption of the power supply and the second power consumption of the power supply, determine the power consumption of the power supply of the memory in the second operating state.

[0085] Here, since the first power consumption of the power supply includes the power consumption of writing the high level signal to the array area through the power supply and the power consumption of writing the low level signal to the array area through the power supply, and the second power consumption of the power supply is the power consumption of the power supply when writing the first level signal (i.e., high level signal) to the array area through the power supply, therefore, by subtracting the second power consumption of the power supply from the first power consumption of the power supply, the power consumption of the power supply when writing the low level signal to the array area through the power supply can be obtained, that is, the power consumption of the power supply of the memory in the second operating state.

[0086] In the embodiments of the present application, when the second heat dissipated inside the power supply is less than a preset threshold, first determine the first power consumption of the power supply when writing the first level signal to the array area and writing the first level signal in reverse to the array area through the power supply; then determine the second power consumption of the power supply when writing the first level signal to the array area through the power supply; finally, by subtracting the second power consumption of the power supply from the first power consumption of the power supply, the determination of the power consumption of the power supply of the memory in the second operating state is realized.

[0087] In some embodiments, the implementation of step S12b1 "When the second heat dissipated inside the power supply is less than a preset threshold, write the first level signal to the array area through the power supply, write the first level signal in reverse to the array area through the power supply, and determine the first power consumption of the power supply" may include the following steps S111 and S112:

[0088] Step S111: When the second heat dissipated inside the power supply is less than a preset threshold, determine the total power consumption of performing N sets of first operations on the array area through the power supply, where the first operation set includes the following operations performed in sequence: writing the first level signal to the array area through the power supply, writing the first level signal in reverse to the array area through the power supply, and N is an integer greater than or equal to 1;

[0089] Here, the implementation of step S111 is to perform N sets of first operations on the array area through the power supply. At this time, the total energy consumption of the power supply is N times the sum of the energy consumption of writing the first-level signal to the array area through the power supply and the energy consumption of reverse-writing the first-level signal to the array area in the power supply. The reason for such an operation is that by repeatedly performing the operations of writing the first-level signal to the array area through the power supply and reverse-writing the first-level signal to the array area in the power supply, the accuracy of the energy consumption of the power supply can be improved, and it is convenient to obtain the energy consumption of the power supply.

[0090] In the case where the power supply has a built-in power detection function, the implementation of step S111, "determine the total energy consumption of performing N sets of first operations on the array area through the power supply when the second heat dissipated inside the power supply is less than the preset threshold", includes the following steps S1111 and S1112:

[0091] Step S1111: When the second heat dissipated inside the power supply is less than the preset threshold, during the process of performing N sets of first operations on the array area through the power supply, obtain the first percentage of the power consumption of the power supply.

[0092] Here, the first percentage of the power consumption of the power supply is the ratio of the consumed power to the total power. The implementation of step S1111 may include: first obtain the percentage of the power of the power supply before performing N sets of first operations; then obtain the percentage of the power of the power supply after performing N sets of first operations; the difference between the two percentages is the first percentage of the power consumption of the power supply.

[0093] Step S1112: Based on the obtained capacity of the power supply and the first percentage of the power consumption of the power supply, determine the total energy consumption of performing N sets of first operations on the array area through the power supply.

[0094] Here, the capacity of the power supply refers to how much work the power supply can do in total, and the unit can be watt-hour (Wh). Usually, when the power supply leaves the factory, the capacity of the power supply will be marked on the product. The implementation of step S1112 can be to multiply the capacity of the power supply by the percentage of the power consumption of the power supply, and what is obtained is the total energy consumption of performing N sets of first operations on the array area through the power supply. In this way, the total energy consumption of performing N sets of first operations on the array area through the power supply can be obtained quickly and conveniently.

[0095] Step S112: Based on the total energy consumption when performing N sets of first operations on the array area through the power supply, determine the first energy consumption of the power supply.

[0096] Here, the implementation of step S112 may include: divide the total energy consumption when performing N sets of first operations on the array area through the power supply by N, and what is obtained is the first energy consumption of the power supply.

[0097] In the embodiments of the present application, the method of determining the first power consumption of the power supply when writing the first level signal to the array area through the power supply and reverse writing the first level signal to the array area through the power supply is transformed into: first determining the total power consumption of the power supply when performing the operation of writing the first level signal to the array area through the power supply and reverse writing the first level signal to the array area through the power supply N times, and then dividing the total power consumption of the power supply by N, so as to obtain the first power consumption of the power supply when performing the operation of writing the first level signal to the array area through the power supply and reverse writing the first level signal to the array area through the power supply once. In this way, the accuracy of the first power consumption of the power supply can be improved.

[0098] In some embodiments, the implementation of step S12b2, "when the second heat dissipated inside the power supply is less than a preset threshold, write the first level signal to the array area through the power supply and determine the second power consumption of the power supply", may include the following steps S121 and S122:

[0099] Step S121: When the second heat dissipated inside the power supply is less than a preset threshold, determine the total power consumption of the power supply when performing M times of the second operation set on the array area, where the second operation set includes the following operations performed in sequence: writing the first level signal to the array area through the power supply, discharging the stored energy of the storage capacitor and the equivalent capacitor of the switching transistor when writing the first level signal to the array area, and M is an integer greater than or equal to 1;

[0100] Here, discharging the stored energy of the storage capacitor and the equivalent capacitor of the switching transistor when writing the first level signal to the array area is to empty the charges in the storage capacitor and the equivalent capacitor of the switching transistor, so as to facilitate the power consumption when the power supply writes the first level signal to the array area for the next time to be equal to the power consumption when the power supply writes the first level signal to the array area for the first time.

[0101] The implementation of discharging the stored energy of the storage capacitor and the equivalent capacitor of the switching transistor when writing the first level signal to the array area may include: changing the state of the array area to a power-off state until the charges stored in the storage capacitor and the equivalent capacitor of the switching transistor are completely discharged, or;

[0102] Changing the state of the array area to a standby state and turning off the refresh function until the charges stored in the storage capacitor and the equivalent capacitor of the switching transistor are completely discharged.

[0103] The implementation of step S121 is to perform M times of the second operation set on the array area through the power supply. At this time, the total energy consumption of the power supply is M times the energy consumption of writing the first level signal to the array area through the power supply. The reason for such an operation is that by performing the operation of writing the first level signal to the array area through the power supply multiple times, the accuracy of the energy consumption of the power supply can be improved, and it is convenient to obtain the energy consumption of the power supply. Here, M can be different from N or the same as N, and the embodiments of the present application do not limit this.

[0104] When the power supply has a built-in power detection function, the implementation of step S121, "when the second heat dissipated inside the power supply is less than the preset threshold, determine the total energy consumption of performing M times of the second operation set on the array area through the power supply", may include the following steps S1211 and S1212:

[0105] Step S1211: When the second heat dissipated inside the power supply is less than the preset threshold, during the process of performing M times of the second operation set on the array area through the power supply, obtain the second percentage of the power consumption of the power supply.

[0106] Here, the implementation of step S1211 may include: first obtain the percentage of the power of the power supply before performing M times of the second operation set; then obtain the percentage of the power of the power supply after performing M times of the second operation set; the difference between the two percentages is the second percentage of the power consumption of the power supply.

[0107] Step S1212: Based on the obtained capacity of the power supply and the second percentage of the power consumption of the power supply, determine the total energy consumption when performing M times of the second operation set on the array area through the power supply.

[0108] Here, the implementation of step S1212 may be to multiply the capacity of the power supply by the second percentage of the power consumption of the power supply, and the result is the total energy consumption of performing M times of the second operation set on the array area by the power supply. In this way, the total energy consumption of performing M times of the second operation set on the array area by the power supply can be obtained quickly and conveniently.

[0109] Step S122: Based on the total energy consumption when performing M times of the second operation set on the array area through the power supply, determine the second energy consumption of the power supply.

[0110] Here, the implementation of step S122 may include: dividing the total energy consumption when performing M times of the second operation set on the array area through the power supply by M, and the result is the second energy consumption of the power supply.

[0111] In the embodiments of the present application, the method of determining the second energy consumption of the power supply when writing a first level signal to the array region through the power supply is transformed into: first determining the total energy consumption of the power supply when performing the operation of writing the first level signal to the array region through the power supply M times, and then dividing the total energy consumption of the power supply by M, so as to obtain the second energy consumption of the power supply when performing the operation of writing the first level signal to the array region once. In this way, the accuracy of the second energy consumption of the power supply can be improved, and it is convenient to obtain the second energy consumption of the power supply.

[0112] In some embodiments, such as Figure 3 shown, the implementation of step S101, "writing a first level signal to the array region of the memory through the power supply to determine the total energy consumption of the memory in the first operating state", may include the following steps S1011a to S1014a:

[0113] Step S1011a: Obtain the relationship diagram between the current, voltage and time of the memory;

[0114] Here, the implementation of step S1011a can refer to step S1021a.

[0115] Step S1012a: When writing a first level signal to the array region of the memory through the power supply, determine the second time period of the memory in the first operating state;

[0116] Here, step S1012a is used to determine the second start time and the second end time when writing a first level signal to the array region of the memory through the power supply. In some embodiments, by subtracting the second start time in the second time period from the second end time in the second time period, the second duration of writing a first level signal to the array region of the memory through the power supply can also be determined.

[0117] Step S1013a: Based on the second time period, determine the second current value and the second voltage value of the memory in the first operating state in the relationship diagram;

[0118] Here, the implementation of step S1013a may include: determining the second start time and the second end time of writing a first level signal to the array region of the memory through the second time period; then finding the positions of the second start time and the second end time in the relationship diagram, and the current value and voltage value corresponding to the curve between the second start time and the second end time in the relationship diagram are the second current value and the second voltage value of the memory in the second operating state.

[0119] Step S1014a: Based on the second time period, the second current value and the second voltage value, determine the total energy consumption of the memory in the first operating state.

[0120] Here, step S1014a can be implemented through Joule's law: Q=IUΔt to obtain the total energy consumption of the memory in the first operating state, where I is the second current value, U is the second voltage value, Δt is the second duration, and Δt can be obtained through the second time period.

[0121] In an embodiment of the present application, a relationship diagram between the current, voltage and time of the memory is first obtained; then a second time period of the memory in the first operating state is determined; then, the second current value and the second voltage value are found on the relationship diagram through the second time period; finally, based on the second time period, the second current value and the second voltage value, the total energy consumption of the memory in the first operating state is determined by Joule's law.

[0122] In some embodiments, the implementation of step S101 “writing a first level signal to an array area of ​​a memory through a power supply to determine a total energy consumption of the memory in a first operating state” may include the following steps S1011b and S1012b:

[0123] Step S1011b: when the second heat dissipated inside the power supply is less than a preset threshold, write a first level signal to the array area of ​​the memory through the power supply to determine the energy consumption of the power supply of the memory in the first operating state;

[0124] Here, the preset threshold value may be determined according to the total energy consumption of the memory in the first operating state, and the setting standard may be: the preset threshold value is smaller than the total energy consumption of the memory in the first operating state, so that when the second heat dissipated inside the power supply is smaller than the preset threshold value, the second heat dissipated inside the power supply may be ignored. During implementation, if the total energy consumption of the memory in the first operating state is larger, the preset threshold value may also be larger; if the total energy consumption of the memory in the first operating state is smaller, the preset threshold value may also be smaller.

[0125] In some embodiments, the power supply may be a mobile power supply with a relatively small internal resistance, and the energy consumption of the power supply may be obtained by detecting the power supply value of the mobile power supply. The embodiment of the present application does not limit the method for determining the energy consumption of the power supply.

[0126] In some embodiments, in order to improve the accuracy of the power consumption of the memory in the first operating state, the implementation of step S1011b can refer to step S12b2, that is, first determine the total energy consumption of executing M times of the second operation set to the array area through the power supply, and then divide the total energy consumption of the power supply when executing M times of the second operation set by M to obtain the energy consumption of the power supply in the first operating state.

[0127] Step S1012b: Determine the energy consumption of the power supply in the first operating state as the total energy consumption of the memory in the first operating state.

[0128] Here, since the second heat dissipated inside the power supply is less than the preset threshold, the energy dissipated inside the power supply in the energy consumption of the power supply in the first operating state can be ignored. Therefore, the energy consumption of the power supply in the first operating state can be used as the total energy consumption of the memory in the first operating state. Thus, when the energy consumption of the power supply is easily obtained, the method of obtaining the total energy consumption of the memory in the first operating state can be simplified, making the operation more convenient.

[0129] The embodiment of the present application also provides a method for determining the stored energy of a storage capacitor. The method is applied to a DRAM, as Figure 4 shown. The method includes the following steps S201 to S206:

[0130] Step S201: Write the data "0" to the array area of the DRAM through the power supply;

[0131] Here, writing the data "0" is used to clear the energy stored in the capacitor in the DRAM, facilitating subsequent acquisition of the energy consumption for writing the data "1" to the array area of the DRAM.

[0132] Step S202: Write the data "1" to the array area of the DRAM through the power supply;

[0133] That is, writing the first-level signal to the array area of the memory through the power supply in step S101.

[0134] Step S203: Obtain the energy consumption 1 for writing the data "1" to the array area of the DRAM through the power supply (i.e., the total energy consumption of the memory in the first operating state);

[0135] Step S204: Write the data "0" to the array area of the DRAM through the power supply;

[0136] Step S205: Obtain the energy consumption 2 for writing the data "0" to the array area of the DRAM through the power supply (i.e., the total energy consumption of the memory in the second operating state);

[0137] Step S206: Determine the stored energy of the storage capacitor, where the stored energy of the storage capacitor = (energy consumption 1 - energy consumption 2) / 2.

[0138] The embodiment of the present application provides a semiconductor memory for performing the above method for determining the stored energy of a storage capacitor. In some embodiments, the semiconductor memory is a DRAM chip.

[0139] The features disclosed in several method or structural embodiments provided by the present application can be arbitrarily combined without conflict to obtain new method embodiments or structural embodiments.

[0140] The description of the above semiconductor structure embodiments is similar to that of the above method embodiments and has similar beneficial effects to those of the method embodiments. For technical details not disclosed in the semiconductor structure embodiments of this application, please refer to the description of the method embodiments of this application for understanding.

[0141] As described above, the above are only exemplary embodiments of this application and are not intended to limit the protection scope of this application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of this application shall be included within the protection scope of this application.

Claims

1. A method for determining the stored energy of a storage capacitor, characterized in that, comprising: writing a first level signal to the array region of the memory through a power supply to determine the total energy consumption of the memory in a first operating state; the memory includes a storage capacitor in the array region and switching transistors in the array region and the peripheral region, and the total energy consumption of the memory in the first operating state includes the stored energy of the storage capacitor, the first heat dissipated by the storage capacitor, and the total energy consumption of the memory in a second operating state; rewriting the first level signal in the array region through the power supply to determine the total energy consumption of the memory in the second operating state; determining the stored energy of the storage capacitor based on the total energy consumption of the memory in the first operating state and the total energy consumption of the memory in the second operating state.

2. The determination method according to claim 1, characterized in that, determining the stored energy of the storage capacitor based on the total energy consumption of the memory in the first operating state and the total energy consumption of the memory in the second operating state includes: taking the difference between the total energy consumption of the memory in the first operating state and the total energy consumption of the memory in the second operating state to obtain a first difference; dividing the first difference by 2 to obtain the stored energy of the storage capacitor.

3. The determination method according to claim 1, characterized in that, further comprising: when the energy consumption of the power supply includes, in addition to the total energy consumption of the memory in the first operating state, a second heat dissipated inside the power supply, determining that the first heat dissipated by the storage capacitor is equal to the stored energy of the storage capacitor.

4. The determination method according to any one of claims 1 to 3, characterized in that, rewriting the first level signal in the array region through the power supply to determine the total energy consumption of the memory in the second operating state includes: acquiring a relationship diagram between the current, voltage and time of the memory; when rewriting the first level signal in the array region through the power supply, determining a first time period of the memory in the second operating state; based on the first time period, determining a first current value and a first voltage value of the memory in the second operating state in the relationship diagram; determining the total energy consumption of the memory in the second operating state based on the first time period, the first current value and the first voltage value.

5. The determination method according to claim 3, characterized in that, rewriting the first level signal in the array region through the power supply to determine the total energy consumption of the memory in the second operating state includes: when the second heat dissipated inside the power supply is less than a preset threshold, rewriting the first level signal in the array region through the power supply to determine the energy consumption of the power supply in the second operating state of the memory; determining the energy consumption of the power supply in the second operating state as the total energy consumption of the memory in the second operating state.

6. The determination method according to claim 5, characterized in that, When the second heat dissipated inside the power supply is less than a preset threshold, writing the first level signal in the reverse direction to the array area through the power supply to determine the power consumption of the power supply when the memory is in the second operating state includes: When the second heat dissipated inside the power supply is less than a preset threshold, writing the first level signal to the array area through the power supply, writing the first level signal in the reverse direction to the array area through the power supply, and determining the first power consumption of the power supply; When the second heat dissipated inside the power supply is less than a preset threshold, writing the first level signal to the array area through the power supply, and determining the second power consumption of the power supply; Based on the first power consumption and the second power consumption of the power supply, determine the power consumption of the power supply when the memory is in the second operating state.

7. The determination method according to claim 6, characterized in that when the second heat dissipated inside the power supply is less than a preset threshold, writing the first level signal to the array area through the power supply, writing the first level signal in the reverse direction to the array area through the power supply, and determining the first power consumption of the power supply includes: when the second heat dissipated inside the power supply is less than a preset threshold, determining the total power consumption of performing N sets of first operations on the array area through the power supply, where the first operation set includes the following operations performed in sequence: writing the first level signal to the array area through the power supply, writing the first level signal in the reverse direction to the array area through the power supply, and N is an integer greater than or equal to 1; Based on the total power consumption when performing N sets of first operations on the array area through the power supply, determine the first power consumption of the power supply.

8. The determination method according to claim 7, characterized in that when the second heat dissipated inside the power supply is less than a preset threshold, determining the total power consumption of performing N sets of first operations on the array area through the power supply includes: when the second heat dissipated inside the power supply is less than a preset threshold, during the process of performing N sets of first operations on the array area through the power supply, obtaining the first percentage of the power consumption of the power supply; Based on the obtained capacity of the power supply and the first percentage of the power consumption of the power supply, determine the total power consumption of performing N sets of first operations on the array area through the power supply.

9. The determination method according to claim 6, characterized in that when the second heat dissipated inside the power supply is less than a preset threshold, writing the first level signal to the array area through the power supply, and determining the second power consumption of the power supply includes: when the second heat dissipated inside the power supply is less than a preset threshold, determining the total power consumption of performing M sets of second operations on the array area through the power supply, where the second operation set includes the following operations performed in sequence: writing the first level signal to the array area through the power supply, discharging the stored energy of the storage capacitor and the stored energy of the equivalent capacitor of the switching transistor when writing the first level signal to the array area, and M is an integer greater than or equal to 1; Determine a second power consumption of the power supply based on a total power consumption when performing M sets of second operations on the array region through the power supply.

10. The determination method according to claim 9, wherein, when a second heat dissipated inside the power supply is less than a preset threshold, determining the total power consumption when performing M sets of second operations on the array region through the power supply includes: when the second heat dissipated inside the power supply is less than the preset threshold, during the process of performing M sets of second operations on the array region through the power supply, obtaining a second percentage of power consumption of the power supply; Based on the obtained capacity of the power supply and the second percentage of power consumption of the power supply, determine the total power consumption when performing M sets of second operations on the array region through the power supply.

11. The determination method according to any one of claims 1 to 3, 5 to 10, wherein, writing a first level signal to an array region of a memory through a power supply to determine a total power consumption of the memory in a first operating state includes: obtaining a relationship diagram among current, voltage and time of the memory; when writing a first level signal to an array region of a memory through a power supply, determining a second time period of the memory in the first operating state; Based on the second time period, determining a second current value and a second voltage value of the memory in the first operating state in the relationship diagram; Based on the second time period, the second current value and the second voltage value, determine the total power consumption of the memory in the first operating state.

12. The determination method according to any one of claims 3, 5 to 10, wherein, writing a first level signal to an array region of a memory through a power supply to determine a total power consumption of the memory in a first operating state includes: when the second heat dissipated inside the power supply is less than the preset threshold, writing a first level signal to an array region of a memory through the power supply to determine the power consumption of the power supply in the first operating state of the memory; Determine the power consumption of the power supply in the first operating state as the total power consumption of the memory in the first operating state.

13. The determination method according to any one of claims 1 to 3, 5 to 10, wherein, the array region includes: all array regions of the memory or sub-array regions of the memory.

14. A semiconductor memory, wherein, configured to execute the determination method according to any one of claims 1 to 13.

15. The semiconductor memory according to claim 14, wherein, the semiconductor memory is a dynamic random access memory DRAM chip.

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