Ultrasonic emission calibration method and device
Through the combination of the phase adjustment calibration module and the transmit signal detection module, the problem of synchronization between the multi-channel ultrasonic control signal and the clock is solved, and high-precision generation of ultrasonic images is achieved.
Patent Information
- Application Number
- CN202110698463.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-06-23
- Publication Date
- 2025-08-15
- Estimated Expiration
- 2041-06-23
AI Technical Summary
In the ultrasonic emission calibration device, when multiple channels transmit ultrasonic control signals, it is difficult to ensure that the ultrasonic control signals of each channel are synchronized with the corresponding clock, resulting in inconsistent timing and affecting the generation quality of ultrasonic images.
The phase adjustment calibration module and the transmit signal detection module are adopted to determine the desired phase of the ultrasonic control signal through frequency detection and phase adjustment, and phase adjustment is performed to ensure that the ultrasonic control signal of each channel is synchronized with the transmission clock.
The synchronization of multi-channel ultrasonic control signals and clocks is realized, which reduces the error introduced by the clock driving chip and the phase difference between channels, and improves the generation accuracy and consistency of ultrasonic images.
Smart Images
Figure CN115507940B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of ultrasonic control technology, and in particular to an ultrasonic emission calibration method and device. Background Art
[0002] Key modules in ultrasound transmitter calibration devices in related technologies include the transmit focusing module and the focus control module. Each module requires its own operating clock and frequency, and each module may not operate at the same frequency. Because different operating clocks have different loads, the corresponding operating clock circuits for different modules are also different. Therefore, a synchronization signal is required to synchronize the transmit focusing module and the focus control module to ensure consistent operating timing for each module, resulting in a satisfactory ultrasound image.
[0003] However, considering the transmission delay problem of the clock driver chip and the fact that the transmission clock window is generally only 5 to 10 ns, it is difficult to ensure that the ultrasonic control signal of each channel can be synchronized with the corresponding clock when multiple channels transmit ultrasonic control signals. Summary of the Invention
[0004] The embodiments of the present application provide an ultrasonic emission calibration method and apparatus, which can synchronize the ultrasonic control signal of each channel with the corresponding clock when multiple channels transmit ultrasonic control signals.
[0005] In a first aspect, an embodiment of the present application provides an ultrasonic emission calibration device, the device comprising: a phase adjustment calibration module and a transmission signal detection module, wherein:
[0006] The transmission signal detection module is used to perform frequency detection on the ultrasonic excitation signal output by the high-voltage metal oxide semiconductor (MOS) to obtain a frequency detection result;
[0007] The phase adjustment calibration module is used to determine the expected phase of the first ultrasonic control signal based on the transmission clock and the frequency detection result; and to adjust the phase of the first ultrasonic control signal based on the expected phase of the first ultrasonic control signal to obtain a second ultrasonic control signal, and output the second ultrasonic control signal to the transmission synchronization control module for synchronization control.
[0008] In an optional embodiment of the present application, the transmission signal detection module includes: a voltage drop protection unit, a counter unit and a comparator unit;
[0009] The voltage reduction protection unit is used to reduce the voltage of the ultrasonic excitation signal;
[0010] The counter unit is used to calculate the pulse width data of the ultrasonic excitation signal after the pressure is reduced; the pulse width data is used to represent the frequency of the ultrasonic excitation signal after the pressure is reduced;
[0011] The comparator unit is used to compare the pulse width data with preset pulse width data, and output the comparison result as the frequency detection result to the phase adjustment calibration module.
[0012] In an optional embodiment of the present application, the phase adjustment calibration module, when used to determine the expected phase of the first ultrasonic control signal based on the transmission clock and the frequency detection result, is specifically used to:
[0013] If the difference between the pulse width data of the first ultrasonic control signal and the preset pulse width data is less than a preset threshold, gradually adjusting the phase of the first ultrasonic control signal in a first direction until the frequency detection result of the transmission signal detection module indicates that the difference is greater than or equal to the preset threshold, and recording the phase of the first ultrasonic control signal as a first phase;
[0014] Starting from the first phase, gradually adjusting the phase of the first ultrasonic control signal in a second direction until the frequency detection result of the transmission signal detection module indicates that the difference is greater than or equal to the preset threshold, and recording the phase of the first ultrasonic control signal as the second phase;
[0015] Inputting the first phase and the second phase into an expected phase determination model to obtain the expected phase, wherein the expected phase determination model is established with the constraint of ensuring that a signal establishment time and / or a signal holding time of the first control signal is greater than a preset duration;
[0016] The first direction and the second direction are opposite directions.
[0017] In an optional embodiment of the present application, one of the first direction and the second direction is a direction of shortening the signal establishment time of the first ultrasonic control signal, and the other direction is a direction of shortening the signal holding time of the first ultrasonic control signal.
[0018] In an optional embodiment of the present application, the transmission signal detection module further includes: a plurality of switch units; each switch unit corresponds to one ultrasonic excitation signal;
[0019] When frequency detection is performed on any one ultrasonic excitation signal, the switch unit of the detected ultrasonic excitation signal is in the on state, and the other switch units are in the off state.
[0020] In an optional embodiment of the present application, the transmission clock used by the phase adjustment calibration module and the transmission clock used by the transmission synchronization control module are different transmission clocks fanned out from the same clock driver chip.
[0021] In a second aspect, an embodiment of the present application provides an ultrasonic emission calibration method, the method comprising:
[0022] Perform frequency detection on the ultrasonic excitation signal output by the high-voltage MOS to obtain a frequency detection result;
[0023] determining a desired phase of the first ultrasonic control signal based on the transmit clock and the frequency detection result;
[0024] The first ultrasonic control signal is phase-modulated based on the desired phase of the first ultrasonic control signal to obtain a second ultrasonic control signal, and the second ultrasonic control signal is output to a transmission synchronization control module for synchronization control.
[0025] In an optional embodiment of the present application, the frequency detection of the ultrasonic excitation signal output by the high-voltage MOS to obtain the frequency detection result includes:
[0026] The ultrasonic excitation signal is depressurized, and pulse width data of the depressurized ultrasonic excitation signal is calculated; the pulse width data is used to characterize the frequency of the depressurized ultrasonic excitation signal;
[0027] The pulse width data is compared with the preset pulse width data, and the comparison result is used as the frequency detection result.
[0028] In an optional embodiment of the present application, determining the expected phase of the first ultrasonic control signal based on the transmit clock and the frequency detection result includes:
[0029] If the difference between the pulse width data of the first ultrasonic control signal and the preset pulse width data is less than a preset threshold, gradually adjusting the phase of the first ultrasonic control signal in a first direction until the frequency detection result of the transmission signal detection module indicates that the difference is greater than or equal to the preset threshold, and recording the phase of the first ultrasonic control signal as a first phase;
[0030] Starting from the first phase, gradually adjusting the phase of the first ultrasonic control signal in a second direction until the frequency detection result of the transmission signal detection module indicates that the difference is greater than or equal to the preset threshold, and recording the phase of the first ultrasonic control signal as the second phase;
[0031] Inputting the first phase and the second phase into an expected phase determination model to obtain the expected phase, wherein the expected phase determination model is established with the constraint of ensuring that a signal establishment time and / or a signal holding time of the first control signal is greater than a preset duration;
[0032] The first direction and the second direction are opposite directions.
[0033] In an optional embodiment of the present application, the method further includes:
[0034] The expected phase is saved so that when detecting the first ultrasonic control signal, the expected phase is read to perform phase modulation on the first ultrasonic control signal.
[0035] In an optional embodiment of the present application, one of the first direction and the second direction is a direction of shortening the signal establishment time of the first ultrasonic control signal, and the other direction is a direction of shortening the signal holding time of the first ultrasonic control signal.
[0036] In a third aspect, an embodiment of the present application further provides an electronic device, including:
[0037] processor;
[0038] a memory for storing instructions executable by the processor;
[0039] The processor is configured to execute the instructions to implement any one of the methods provided in the second aspect of the present application.
[0040] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium, which, when the instructions in the computer-readable storage medium are executed by a processor of an electronic device, enables the electronic device to execute any of the methods provided in the second aspect of the present application.
[0041] In a fifth aspect, an embodiment of the present application provides a computer program product, comprising a computer program / instruction, which, when executed by a processor, implements any of the methods provided in the second aspect of the present application.
[0042] The technical solutions provided by the embodiments of this application bring at least the following beneficial effects:
[0043] This application proposes an ultrasonic transmission calibration device, which includes a phase adjustment calibration module and a transmission signal detection module. The transmission signal detection module performs frequency detection on the ultrasonic excitation signal output by the high-voltage MOS. The phase adjustment calibration module then determines the desired phase of a first ultrasonic control signal based on the transmission clock and the frequency detection result. The first ultrasonic control signal is phase-adjusted based on the desired phase of the first ultrasonic control signal to obtain a second ultrasonic control signal. The second ultrasonic control signal is then output to the transmission synchronization control module for synchronous control. This allows the ultrasonic control signal of each channel to be synchronized with the corresponding clock when transmitting ultrasonic control signals through multiple channels.
[0044] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS
[0045] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. Obviously, the drawings introduced below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0046] Figure 1 A partial structural diagram of an ultrasonic emission calibration device in the prior art provided in an embodiment of the present application;
[0047] Figure 2 A schematic diagram of a transmission clock signal and a transmission control signal in a transmission synchronization control module provided in an embodiment of the present application;
[0048] Figure 3 A partial structural diagram of an ultrasonic emission calibration device provided in one embodiment of the present application;
[0049] Figure 4 A schematic diagram of the structure of multiple transmission synchronization control modules provided in one embodiment of the present application;
[0050] Figure 5 A schematic diagram of n channels of first ultrasonic control signals and transmission clocks provided in one embodiment of the present application;
[0051] Figure 6 A schematic diagram of phase modulation between a first ultrasonic control signal and a transmission clock provided in an embodiment of the present application;
[0052] Figure 7 A schematic diagram of the structure of a D flip-flop provided in one embodiment of the present application;
[0053] Figure 8 A schematic diagram of the second ultrasonic control signal and the transmission clock of the nth channel provided in an embodiment of the present application;
[0054] Figure 9 A schematic diagram of the structure of a transmission signal detection module provided in one embodiment of the present application;
[0055] Figure 10 A schematic flow chart of an ultrasonic emission calibration method provided in one embodiment of the present application;
[0056] Figure 11 A schematic flow chart of an ultrasonic emission calibration method provided in one embodiment of the present application. DETAILED DESCRIPTION
[0057] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application.
[0058] refer to Figure 1 As shown, a clock block diagram in the related art is shown, in which a clock source 101 is used to generate the main clock of the ultrasonic transmission calibration device, and then the main clock is divided into a transmission clock, a reception clock and a control clock according to the frequency through a frequency divider or a phase-locked loop 102, and the transmission clock is used to control the transmission synchronization control module and the transmission focusing module 106, the control clock is used to control the focusing control module 105 and the transmission focusing module 106, and the reception focusing module 1014, and the reception clock is used to control the reception focusing module 1014 and the analog-to-digital conversion module 1013.
[0059] Before providing the divided clock to each module, since there are multi-channel ultrasonic control signals in modules such as the transmitting focusing module 106 and the receiving focusing module 1014, the transmitting clock needs to be input into the first clock driving chip 103, the control clock needs to be input into the second clock driving chip 104, and the receiving clock needs to be input into the third clock driving chip 1012, so as to use the first clock driving chip 103, the second clock driving chip 104, and the third clock driving chip 1012 to fan out the single-channel transmitting clock, the single-channel control clock, and the single-channel receiving clock into multiple clocks respectively.
[0060] Typically, the master clock frequency ranges from approximately 120 to 250 MHz, the transmit clock frequency ranges from approximately 100 to 200 MHz, and the control clock frequency is an integer fraction of the transmit clock frequency. To ensure the transmit frequency of the ultrasonic control signal and transmit focusing accuracy, the transmit clock frequency must be at least greater than 160 MHz. Since a clock cycle is approximately 6.67 ns, to ensure that the transmit focusing module 106 accurately controls the timing of the transmit synchronization control module 107 within the specified clock window, the transmit clock window is limited to a maximum of 6.67 ns.
[0061] like Figure 1As shown, after acquiring the focus line imaging parameters, the focus control module 105 outputs the focus line imaging parameters to the transmit focus module 106 and the receive focus module 1014. The focus control module 105 also generates a synchronization signal based on the control clock and outputs the synchronization signal to the transmit focus module 106 and the receive focus module 1014. In the transmit focus module 106, the focus line imaging parameters and the synchronization signal are used to calculate the delay parameters for transmit focusing. When the delay parameter time for transmit focusing of each channel arrives, the transmit control signal is output to the transmit synchronization control module 107. In the receive focus module 1014, the focus line imaging parameters and the synchronization signal are used to calculate the delay parameters for transmit focusing. Analog-to-digital conversion data can also be collected and summed using the delay parameters. The transmit synchronization control module 107 synchronizes the transmit control signal with the transmit clock to obtain a synchronized transmit control signal, i.e., a synchronized control signal, thereby reducing the jitter of the transmit control signal.
[0062] The transmission synchronization control module 107 outputs a synchronization control signal to the high-voltage MOS (metal oxide semiconductor) control module 109. In the high-voltage MOS control module 109, a MOS drive signal is output according to the signal timing, turning the high-voltage MOS on or off. When the high-voltage MOS is on, a high-voltage excitation pulse is output to the ultrasonic probe 1015. After completing the ultrasonic transmission, the ultrasonic probe 1015 generates an echo signal. To protect the receiving path in the receiving analog front-end module 1017 from damage by the echo signal, the echo signal is first input to the TR (Tracking Receiver) switch 1016. The TR switch 1016 then transmits the echo signal to the receiving analog front-end module 1017, where the echo signal is filtered and amplified before being input to the analog-to-digital conversion (ADC) module 1013 for analog-to-digital conversion. The converted data is input to the receiving focusing module 1014, and the generated ultrasound data is input to the focusing control module 105 for use in ultrasonic imaging.
[0063] In related technologies, when calculating the delay parameters of the transmit focusing in the transmit focusing module 106, the control clock is multiplied to the same frequency as the transmit clock. This ensures that the frequency of the delay parameter calculation is at the same level as the frequency of the synchronization signal, avoiding timing problems, and ensures that the minimum unit of the delay parameter can meet the transmit clock.
[0064] Depend on Figure 1It can be seen that due to the influence of parameter deviations of different batches of clock driving chips, the influence of clock driving chip skew or transmission delay, and the influence of the working environment temperature on the clock driving chip, errors occur in the first clock driving chip 103 and the second clock driving chip 104, which in turn affects the transmission clock and the control clock. Then the phases of each channel output by the transmission clock and the control clock are also different.
[0065] For example, Figure 1 As shown, the phase difference between each channel output by the frequency divider or phase-locked loop 102 is about 0.1ns.
[0066] Furthermore, due to the influence of the aforementioned clock driver chip, the phase difference between the outputs of each channel can reach approximately 1 to 2 ns. In the transmit synchronization control module 107, the signal setup time, signal hold time, rising edge time, and falling edge time of the transmit control signal generally require approximately 2 ns. Furthermore, for multi-channel transmit control signals, there can be inconsistencies between channels, resulting in approximately 1 to 4 ns. Therefore, the error caused by these uncertainties is approximately 7 ns. This makes it difficult to ensure synchronization between the transmit control signal and the transmit clock, given that the transmit clock frequency must be at least greater than 160 MHz and the transmit clock window is a maximum of 6.67 ns.
[0067] For example, Figure 2 As shown, TX_CLK is the transmit clock signal in the transmit synchronization control module 107, and TX_CTRL is the transmit control signal. TX_CLK is affected by the parameter error of the first clock driver chip 103 itself, and there is a clock error. TX_CTRL is affected by the difference in the synchronization signal obtained by the transmit focusing module 106 and the difference in the control clock in the focusing control module 105. The combined relative clock difference is assumed to be tl. Then, relative to TX_CTRL, the total clock has a difference of tl, and this difference may be around 2 to 4ns.
[0068] In addition, TX_CTRL requires signal setup time, signal hold time, rising edge time, and falling edge time. Figure 2 It can be seen that tr is the signal setup time, tb is the signal hold time, tf is the rising edge time, and th is the falling edge time, which are about 0.5ns each. In this way, TX_CTRL needs to have sufficient signal setup time and signal hold time after or before the jump and maintain the appropriate level to be detected and recognized by TX_CLK. Therefore, it should be ensured that the lost time is less than one cycle of TX_CLK.
[0069] For the transmission control signal of a single transmission channel, the lost time = tl + tr + tf + tb + th, while for the transmission control signal of multiple channels, in order to ensure that each channel can meet the above timing requirements, the output difference time of the transmission focusing module 106 also needs to be lost.
[0070] In view of this, the embodiment of the present application is similar to the related art in terms of the receiving focus module 1014, and specifically proposes an ultrasonic emission calibration device focusing on how to synchronize the focus control module 105, the transmitting focus module 106 and the transmitting synchronization control module 107. Figure 3 As shown, a phase adjustment and calibration module 108 is added between the transmit focusing module 106 and the transmit synchronization control module 107, and the clock corresponding to the phase adjustment and calibration module 108 is the transmit clock. This ensures that the clock corresponding to the phase-adjusted second ultrasonic control signal is the transmit clock and is identical to the clock of the transmit synchronization control module 107. This ensures a stable timing between the second ultrasonic control signal and the transmit clock in the transmit synchronization control module 107, reducing the 1-2 ns error generated by the clock driver chip and the 1-4 ns phase difference generated by multiple channels.
[0071] Furthermore, the transmission synchronization control module 107 outputs the synchronization control signal to the high-voltage MOS control module 109. In the high-voltage MOS control module 109, the MOS drive signal is output according to the signal timing to turn the high-voltage MOS on or off, and then when the high-voltage MOS is in the on state, the ultrasonic excitation signal is output to the transmission signal detection module 1011.
[0072] In the transmission signal detection module 1011, a calibration feedback signal is determined according to the jitter of the ultrasonic excitation signal, and the calibration feedback signal is output to the phase adjustment calibration module 108, so that the phase adjustment calibration module 108 adjusts the phase of the first ultrasonic control signal according to the feedback information until the ultrasonic control signal of each channel is synchronized with the corresponding clock.
[0073] Specifically, the transmission signal detection module 1011 is used to perform frequency detection on the ultrasonic excitation signal output by the high-voltage MOS to obtain a frequency detection result;
[0074] The phase adjustment calibration module 108 is used to determine the desired phase of the first ultrasonic control signal based on the transmission clock and frequency detection result; and adjust the phase of the first ultrasonic control signal based on the desired phase of the first ultrasonic control signal to obtain a second ultrasonic control signal, and output the second ultrasonic control signal to the transmission synchronization control module 107 for synchronization control. Figure 1 The same as in the previous section, no further details will be given here.
[0075] It should be noted that the transmit clock used by phase calibration module 108 and the transmit clock used by transmit synchronization control module 107 are different transmit clocks fanned out from the same clock driver chip (i.e., first clock driver chip 103). Phase calibration module 108 performs phase adjustment based on the transmit clock to ensure that the phase of the output synchronization control signal has a fixed timing relationship with the transmit clock.
[0076] For example, Figure 4 As shown, for a 128-channel ultrasonic transmission calibration device, if there are 16 channels in the transmission synchronization control module 107, the 128 channels are allocated to 8 transmission synchronization control modules 107 and one phase adjustment calibration module 108. In other words, the transmission clock needs to be fanned out to at least 9 channels using the first clock driver chip 103. Transmission synchronization control modules 1071, 1072, ..., and 1078 share one phase adjustment calibration module 108, one transmission focusing module 106, one transmission signal detection module 1011, and one focusing control module 105.
[0077] Furthermore, when the focus control module 105, the transmission focus module 106, and the phase adjustment calibration module 108 use different FPGA chips, due to the differences in the internal structure of the FPGA chips, the first ultrasonic control signal output by the transmission focus module 106 to each channel of the phase adjustment calibration module 108 may be different. Figure 5 As shown, CH1, CH2, ..., CHn are the first ultrasonic control signals of n channels, TX CLK is the transmit clock, and Figure 5 It can be seen that the maximum phase difference is td.
[0078] Taking CH1 and CH2 as an example, when the phase difference between CH1 and CH2 is td, the signal setup time ts of CH1 and / or the signal hold time th of CH2 cannot meet the signal setup time and / or signal hold time required by the transmission synchronization control module 107. Therefore, it is necessary to adjust the phase of the first ultrasonic control signal of each channel through the phase adjustment calibration module 108.
[0079] In the phase adjustment calibration module 108, since the IO DELAY function inside the FPGA chip can adjust the phase of the output signal by setting different phase values, the IO DELAY function is used to adjust the phase of CH1, CH2, ..., CHn respectively, so that the phase of the second ultrasonic control signal output by each channel after adjustment is consistent. Taking the adjustment of the CH1 and CH2 phases as an example, Figure 6 As shown, Figure 5 The transmit clock TX CLK in is divided into at least 360°, and the Figure 6TXD_CLK in , CH1_j is the first ultrasonic control signal after CH1 adjusts its phase, CH2_j is the first ultrasonic control signal after CH2 adjusts its phase, wherein CH1 is adjusted backward by t1 time, and CH2 is adjusted forward by t2 time.
[0080] Optionally, the phase calibration module 108, when used to determine the expected phase of the first ultrasonic control signal based on the transmission clock and the frequency detection result, is specifically configured to:
[0081] If the difference between the pulse width data of the first ultrasonic control signal and the preset pulse width data is less than a preset threshold, the phase of the first ultrasonic control signal is gradually adjusted in the first direction until the frequency detection result of the transmission signal detection module 1011 indicates that the difference is greater than or equal to the preset threshold, and the phase of the first ultrasonic control signal is recorded as the first phase;
[0082] Starting from the first phase, gradually adjusting the phase of the first ultrasonic control signal in the second direction until the frequency detection result of the transmission signal detection module 1011 indicates that the difference is greater than or equal to the preset threshold, and recording the phase of the first ultrasonic control signal as the second phase;
[0083] The first phase and the second phase are input into the expected phase determination model to obtain the expected phase. The expected phase determination model is established based on the constraint condition of ensuring that the signal establishment time and / or signal holding time of the first control signal is greater than the preset time length; wherein the first direction and the second direction are opposite directions.
[0084] Here, one of the first direction and the second direction is a direction of shortening the signal establishment time of the first ultrasonic control signal, and the other direction is a direction of shortening the signal holding time of the first ultrasonic control signal.
[0085] Taking the first ultrasonic control signal of the CH1 channel as an example, one situation is to first gradually adjust the first ultrasonic control signal of the CH1 channel in the direction of the signal establishment time until the frequency detection result of the transmitting signal detection module 1011 indicates that the difference is greater than or equal to the preset threshold, and then gradually adjust the first ultrasonic control signal of the CH1 channel in the direction of the signal holding time; another situation is to first gradually adjust the first ultrasonic control signal of the CH1 channel in the direction of the signal holding time until the frequency detection result of the transmitting signal detection module 1011 indicates that the difference is greater than or equal to the preset threshold, and then gradually adjust the first ultrasonic control signal of the CH1 channel in the direction of the signal establishment time.
[0086] After the signal phases of each channel are adjusted to be consistent, the phase difference problem between different channels caused by the internal structure of the FPGA chip in the transmission focusing module 106 is avoided. Furthermore, after the second ultrasonic control signal with adjusted phase is output to the transmission synchronization control module 107, the transmission synchronization control module 107 is composed of multiple D flip-flops, one for each channel, and the D flip-flops can output results based on the rising edge of the transmission clock and the high and low levels of the second ultrasonic control signal, such as Figure 7 As shown in FIG, the structure of the D flip-flop is shown, CLK is the transmitting clock, D is the second ultrasonic control signal, and Q is the output result.
[0087] As shown in Table 1, this is the truth table corresponding to the D flip-flop. When CLK is rising and D is high, Q is high; when CLK is rising and D is low, Q is low; when CLK is high or low, regardless of whether D is high or low, Q remains at the previous level.
[0088] Table 1
[0089] CLK D Q rising edge High level High level rising edge Low level Low level High level or low level Previous level status
[0090] Since the second ultrasonic control signal is the signal output by the FPGA chip, it has large jitter, generally on the order of 100ps, while the clock jitter is generally on the order of 100fs. Therefore, the jitter problem of the second ultrasonic control signal needs to be solved to meet the final ultrasonic imaging requirements.
[0091] For example, Figure 8 As shown in the figure, CHn is the second ultrasonic control signal of the nth channel. The pulse width of this signal is represented by Tpulser, and Clock is the transmitting clock. When incorrect latching occurs, there may be an uncertainty of one clock cycle at the leading and trailing edges of Tpulser, causing the pulse width of CHn output to jitter within the range of Tpulser±2*clk.
[0092] To solve the above-mentioned signal jitter problem, the calibration feedback signal is determined by the transmission signal detection module 1011 and then fed back to the phase adjustment calibration module 108 to further adjust the phase of the signal, thereby reducing the error caused by signal jitter.
[0093] In an optional embodiment, if Figure 9 As shown, the transmission signal detection module 1011 includes: a voltage reduction protection unit 10111, a counter unit 10112 and a comparator unit 10113; since the voltage of the ultrasonic excitation signal is generally higher than ±10V, the voltage reduction protection unit 10111 is required to reduce the voltage of the ultrasonic excitation signal to a voltage range allowed by the counter unit 10112, for example, to about 3.3V.
[0094] Counter unit 10112 calculates the pulse width of the reduced-voltage ultrasonic excitation signal; this pulse width represents the frequency of the reduced-voltage ultrasonic excitation signal. The operating clock period of counter unit 10112 is at least twice the transmit clock period, ensuring that the pulse width corresponding to the transmit clock can be detected.
[0095] In the comparator unit 10113 , the pulse width data is compared with the preset pulse width data, and the comparison result is output to the phase adjustment calibration module 108 as a frequency detection result.
[0096] Optionally, the transmission signal detection module 1011 further includes: a plurality of switch units; each switch unit corresponds to one ultrasonic excitation signal; Figure 9 As shown, each of the ultrasonic excitation signals corresponding to CH1, CH2, ..., CHn has a corresponding switch unit. For example, the ultrasonic excitation signal corresponding to CH1 corresponds to switch unit 10114, the ultrasonic excitation signal corresponding to CH2 corresponds to switch unit 10115, and the ultrasonic excitation signal corresponding to CHn corresponds to switch unit 10116. When frequency detection is performed on any ultrasonic excitation signal, the switch unit of the detected ultrasonic excitation signal is in the on state, and the other switch units are in the off state.
[0097] The voltage reduction protection unit 10111 , the counter unit 10112 and the comparator unit 10113 in the multiplexed transmission signal detection module 1011 of multiple ultrasonic excitation signals can reduce design complexity and the size of the device.
[0098] In summary, by performing separate signal calibration on each channel's first ultrasonic control signal, the resulting second ultrasonic control signal is synchronized with the transmit clock. This also reduces the 1-2 ns error introduced by the clock driver chip and the 1-4 ns phase difference across multiple channels, reducing the aforementioned 7 ns clock window to approximately 2 ns, within the acceptable time tolerance.
[0099] like Figure 10 As shown, based on the same inventive concept as the above-mentioned ultrasonic emission calibration device, the embodiment of the present application also provides an ultrasonic emission calibration method, including the following steps:
[0100] S1001, performing frequency detection on the ultrasonic excitation signal output by the high-voltage MOS to obtain a frequency detection result;
[0101] S1002, determining a desired phase of a first ultrasonic control signal based on a transmission clock and a frequency detection result;
[0102] S1003 , phase-modulate the first ultrasonic control signal based on the desired phase of the first ultrasonic control signal to obtain a second ultrasonic control signal, and output the second ultrasonic control signal to a transmission synchronization control module for synchronization control.
[0103] In an optional embodiment of the present application, frequency detection is performed on the ultrasonic excitation signal output by the high-voltage MOS to obtain a frequency detection result, including:
[0104] The ultrasonic excitation signal is depressurized and pulse width data of the depressurized ultrasonic excitation signal is calculated; the pulse width data is used to characterize the frequency of the depressurized ultrasonic excitation signal;
[0105] The pulse width data is compared with the preset pulse width data, and the comparison result is used as the frequency detection result.
[0106] In an optional embodiment of the present application, determining the expected phase of the first ultrasonic control signal based on the transmit clock and the frequency detection result includes:
[0107] If the difference between the pulse width data of the first ultrasonic control signal and the preset pulse width data is less than a preset threshold, gradually adjusting the phase of the first ultrasonic control signal in a first direction until the frequency detection result of the transmission signal detection module indicates that the difference is greater than or equal to the preset threshold, and recording the phase of the first ultrasonic control signal as the first phase;
[0108] Starting from the first phase, gradually adjusting the phase of the first ultrasonic control signal in a second direction until a frequency detection result of the transmission signal detection module indicates that the difference is greater than or equal to a preset threshold, and recording the phase of the first ultrasonic control signal as the second phase;
[0109] Inputting the first phase and the second phase into an expected phase determination model to obtain an expected phase, wherein the expected phase determination model is established with the constraint that a signal establishment time and / or a signal holding time of the first control signal can be ensured to be greater than a preset duration;
[0110] The first direction and the second direction are opposite directions.
[0111] In an optional embodiment of the present application, the method further includes:
[0112] The expected phase is saved so that when detecting the first ultrasonic control signal, the expected phase can be read to perform phase modulation on the first ultrasonic control signal.
[0113] Exemplarily, after adjusting the phase of the first ultrasonic control signal of each channel, the desired phase of each channel is stored in the phase adjustment calibration module.
[0114] In an optional embodiment of the present application, one of the first direction and the second direction is a direction of shortening the signal establishment time of the first ultrasonic control signal, and the other direction is a direction of shortening the signal holding time of the first ultrasonic control signal.
[0115] The ultrasonic emission calibration method proposed in the embodiment of the present application adopts the same inventive concept as the above-mentioned ultrasonic emission calibration device and can achieve the same beneficial effects, which will not be repeated here.
[0116] like Figure 11 FIG. 1 is a flow chart showing an ultrasonic emission calibration method, comprising the following steps:
[0117] S1101 , starting an ultrasonic emission calibration function, and generating a focus line imaging parameter with a fixed pulse width A according to an ultrasonic emission signal.
[0118] S1102, writing the focus line imaging parameters into the emission focusing module.
[0119] S1103, writing the fixed pulse width into the transmission signal detection module.
[0120] S1104: The transmitting focusing module sends a first ultrasonic control signal of the first channel based on the focal line imaging parameter.
[0121] S1105 , the transmission signal detection module turns on the corresponding switch unit.
[0122] S1106 , calculating the pulse width data B of the first ultrasonic control signal in a calculator unit in the transmission signal detection module.
[0123] S1107: Determine whether the difference between A and B is within a preset threshold. If so, execute step S1108; if not, execute step S1109.
[0124] S1108: gradually adjust the first ultrasonic control signal of the first channel toward the signal establishment time until the frequency detection result of the transmission signal detection module indicates that the difference is greater than or equal to a preset threshold, and record the phase at this time as the first phase x.
[0125] S1109, gradually adjusting the first ultrasonic control signal of the first channel in the direction of the signal holding time until the frequency detection result of the transmission signal detection module indicates that the difference is greater than or equal to the preset threshold, and recording the phase at this time as the second phase y.
[0126] S1110 , based on ensuring that the signal establishment time and / or signal holding time of the first control signal is greater than a preset duration, determine a desired phase, which is recorded as (y+x) / 2−x.
[0127] S1111 , disconnect the switch unit corresponding to the first channel, and ensure that the calibration of the ultrasonic emission is completed after traversing each channel.
[0128] An embodiment of the present application further provides a computer storage medium, wherein the computer storage medium stores computer program instructions. When the instructions are executed on a computer, the computer executes the steps of the above-mentioned device response method.
[0129] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.
[0130] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the present application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0131] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.
[0132] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.
[0133] Obviously, those skilled in the art may make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application is intended to include these modifications and variations.
Claims
1. An ultrasonic emission calibration device, characterized in that: The device includes: a phase adjustment calibration module and a transmission signal detection module, wherein: The transmission signal detection module is used to perform frequency detection on the ultrasonic excitation signal output by the high-voltage metal oxide semiconductor (MOS) to obtain a frequency detection result; The phase adjustment calibration module is configured to determine a desired phase of the first ultrasonic control signal based on the transmission clock and the frequency detection result; and to adjust the phase of the first ultrasonic control signal based on the desired phase of the first ultrasonic control signal to obtain a second ultrasonic control signal, and output the second ultrasonic control signal to the transmission synchronization control module for synchronization control; The phase adjustment calibration module, when used to determine the expected phase of the first ultrasonic control signal based on the transmission clock and the frequency detection result, is specifically used to: If the difference between the pulse width data of the first ultrasonic control signal and the preset pulse width data is less than a preset threshold, gradually adjusting the phase of the first ultrasonic control signal in a first direction until the frequency detection result of the transmission signal detection module indicates that the difference is greater than or equal to the preset threshold, and recording the phase of the first ultrasonic control signal as a first phase; Starting from the first phase, gradually adjusting the phase of the first ultrasonic control signal in a second direction until the frequency detection result of the transmission signal detection module indicates that the difference is greater than or equal to the preset threshold, and recording the phase of the first ultrasonic control signal as the second phase; Inputting the first phase and the second phase into an expected phase determination model to obtain the expected phase, wherein the expected phase determination model is established with the constraint of ensuring that a signal establishment time and / or a signal holding time of the first ultrasonic control signal is greater than a preset duration; The first direction and the second direction are opposite directions.
2. The device according to claim 1, characterized in that The transmission signal detection module includes: a voltage drop protection unit, a counter unit and a comparator unit; The voltage reduction protection unit is used to reduce the voltage of the ultrasonic excitation signal; The counter unit is used to calculate the pulse width data of the ultrasonic excitation signal after the pressure is reduced; the pulse width data is used to represent the frequency of the ultrasonic excitation signal after the pressure is reduced; The comparator unit is used to compare the pulse width data with preset pulse width data, and output the comparison result as the frequency detection result to the phase adjustment calibration module.
3. The device according to claim 1, characterized in that Of the first direction and the second direction, one direction is a direction of shortening a signal establishment time of the first ultrasonic control signal, and the other direction is a direction of shortening a signal holding time of the first ultrasonic control signal.
4. The device according to claim 2, characterized in that The transmission signal detection module further includes: a plurality of switch units; each switch unit corresponds to one ultrasonic excitation signal; When frequency detection is performed on any one ultrasonic excitation signal, the switch unit of the detected ultrasonic excitation signal is in the on state, and the other switch units are in the off state.
5. The device according to claim 1, characterized in that The transmission clock used by the phase adjustment calibration module and the transmission clock used by the transmission synchronization control module are different transmission clocks fanned out from the same clock driver chip.
6. An ultrasonic emission calibration method, characterized in that: The method comprises: Perform frequency detection on the ultrasonic excitation signal output by the high-voltage MOS to obtain a frequency detection result; determining a desired phase of the first ultrasonic control signal based on the transmit clock and the frequency detection result; and phase-modulating the first ultrasonic control signal based on the desired phase of the first ultrasonic control signal to obtain a second ultrasonic control signal, and outputting the second ultrasonic control signal to a transmission synchronization control module for synchronization control; The determining the expected phase of the first ultrasonic control signal based on the transmit clock and the frequency detection result includes: If the difference between the pulse width data of the first ultrasonic control signal and the preset pulse width data is less than a preset threshold, gradually adjusting the phase of the first ultrasonic control signal in a first direction until the frequency detection result indicates that the difference is greater than or equal to the preset threshold, and recording the phase of the first ultrasonic control signal as a first phase; Starting from the first phase, gradually adjusting the phase of the first ultrasonic control signal in a second direction until the frequency detection result indicates that the difference is greater than or equal to the preset threshold, and recording the phase of the first ultrasonic control signal as the second phase; Inputting the first phase and the second phase into an expected phase determination model to obtain the expected phase, wherein the expected phase determination model is established with the constraint of ensuring that a signal establishment time and / or a signal holding time of the first ultrasonic control signal is greater than a preset duration; The first direction and the second direction are opposite directions.
7. The method according to claim 6, characterized in that The performing frequency detection on the ultrasonic excitation signal output by the high-voltage MOS to obtain a frequency detection result includes: The ultrasonic excitation signal is depressurized, and pulse width data of the depressurized ultrasonic excitation signal is calculated; the pulse width data is used to characterize the frequency of the depressurized ultrasonic excitation signal; The pulse width data is compared with the preset pulse width data, and the comparison result is used as the frequency detection result.
8. The method according to claim 6, characterized in that The method further comprises: The expected phase is saved so that when detecting the first ultrasonic control signal, the expected phase is read to perform phase modulation on the first ultrasonic control signal.
Citation Information
Patent Citations
Intelligent battery managing method, upper computer and portable mobile device
CN104460923A
Automation of imaging and dynamic signal analyses
US20060017821A1