Alignment method, mask alignment mark combination and reticle

By selecting N sets of alignment marks on the wafer and placing trench patterns and patterned metal layer patterns in the X and Y directions respectively, a mask alignment mark combination is formed, which solves the alignment rejection problem caused by wafer warping, improves the alignment success rate and saves costs.

CN115509098BActive Publication Date: 2026-03-27HUA HONG SEMICON WUXI LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-10-28
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

Wafer warping causes displacement of alignment marks and morphological damage, leading to wafer alignment rejection, and existing technologies lack effective solutions.

Method used

N sets of alignment marks are selected, and different types of alignment marks are placed in the X and Y directions respectively to form a mask alignment mark combination, including groove patterns and patterned metal layer patterns. The final combination is determined by alignment evaluation, and the mask with the mask alignment mark combination is exposed.

Benefits of technology

It improves the success rate of alignment mark grabbing, improves the alignment success rate, solves the alignment problem caused by wafer warpage, saves costs, and does not require modification of machine hardware and software.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application provides an alignment method, a mask alignment mark combination and a mask, wherein the alignment method comprises the following steps: selecting at least three groups of alignment marks; selecting any two groups of alignment marks, and performing alignment evaluation in the mode of arranging one group of alignment marks along an X direction and arranging another group of alignment marks along a Y direction; determining a final mask alignment mark combination according to the result of the alignment evaluation; and exposing a wafer by using a mask plate formed with the mask alignment mark combination. The mask alignment mark combination comprises alignment marks along the X direction and alignment marks along the Y direction, the alignment marks along the X direction comprise groove patterns, and the alignment marks along the Y direction comprise patterned metal layer patterns. By selecting the mask alignment mark combination, the application can quickly solve the alignment problem caused by wafer warping, improve the success rate of alignment mark grabbing, improve the success rate of alignment, and does not need to involve the modification of machine software and hardware, thereby saving the cost.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of photolithography, in particular to an alignment method, a mask alignment mark combination and a mask. BACKGROUND

[0002] Huahong Semiconductor (Wuxi) Co., Ltd. is the first to use ASML XT400 operating Power products, ASML machine has no alignment auxiliary function, alignment failure wafer will be rejected, resulting in wafer reject. For the problem of wafer reject of ASML machine, there is no related experience of industry and equipment manufacturer ASML company to refer to solve.

[0003] With the increasing size of the wafer, warpage (warpage refers to the warpage of the wafer, and the warpage of the wafer is caused by the stress difference between the semiconductor film layers) is more and more obvious on the wafer, and the displacement of the alignment mark is also aggravated. After etching, deposition and other processes, the appearance of the alignment mark is more likely to be damaged, thereby causing wafer alignment rejection. Therefore, the influence of wafer warpage cannot be ignored, and therefore a method for improving the wafer alignment rejection problem caused by wafer warpage is urgently needed. SUMMARY

[0004] The present application provides an alignment method, a mask alignment mark combination and a mask, which can solve the problem of wafer alignment rejection caused by wafer warpage.

[0005] In a first aspect, the embodiments of the present application provide an alignment method, comprising:

[0006] Selecting N groups of alignment marks, wherein N is an integer greater than 2;

[0007] Selecting any two groups of alignment marks, and performing alignment evaluation in the manner of placing one group of alignment marks along the X direction and placing another group of alignment marks along the Y direction;

[0008] According to the result of the alignment evaluation, determining a final mask alignment mark combination, wherein the mask alignment mark combination comprises: alignment marks in the X direction and alignment marks in the Y direction, the alignment marks in the X direction comprise a groove pattern; and the alignment marks in the Y direction comprise a patterned metal layer pattern;

[0009] Exposing a wafer by using a mask including the mask alignment mark combination.

[0010] Optionally, in the alignment method, the alignment marks in the Y direction are patterned top metal layer patterns.

[0011] Optionally, in the alignment method, after exposing the wafer by using the mask plate formed with the mask alignment mark combination, the alignment method further comprises:

[0012] collecting data information of alignment rejection occurred in the track during on-line exposure of the wafer;

[0013] adjusting the layout of the mask alignment mark combination in the mask plate according to the data information;

[0014] exposing the wafer by using the mask plate formed with the adjusted mask alignment mark combination.

[0015] Optionally, in the alignment method, the step of selecting any two groups of the alignment marks and performing alignment evaluation in the manner of placing one group of alignment marks along the X direction and placing another group of alignment marks along the Y direction comprises:

[0016] selecting any two groups of the alignment marks, placing a first group of alignment marks along the X direction and a second group of alignment marks along the Y direction, and performing alignment evaluation once;

[0017] placing the second group of alignment marks along the X direction and the first group of alignment marks along the Y direction, and performing alignment evaluation again.

[0018] Optionally, in the alignment method, the N groups of the alignment marks with complete topography are selected from the plurality of groups of the alignment marks by using an optical microscope, wherein N is an integer greater than 2.

[0019] Optionally, in the alignment method, after exposing the wafer by using the mask plate formed with the mask alignment mark combination, the alignment marks along the X direction are located in a cutting path along the X direction at the periphery of an exposure area of the wafer, and the alignment marks along the Y direction are located in a cutting path along the Y direction of the exposure area of the wafer.

[0020] In a second aspect, the embodiments of the present application further provide a mask alignment mark combination used in an alignment method, the mask alignment mark combination is arranged on a mask plate for mask alignment, and the mask alignment mark combination comprises: alignment marks along an X direction and alignment marks along a Y direction; wherein the alignment marks along the X direction comprise a groove pattern, and the alignment marks along the Y direction comprise a patterned metal layer pattern.

[0021] Optionally, in the mask alignment mark combination, the alignment marks along the Y direction are a patterned top metal layer pattern.

[0022] In a third aspect, the embodiments of the present application further provide a mask used in the alignment method, comprising: a main pattern and a mask alignment mark combination located around the main pattern; wherein the mask alignment mark combination comprises: an alignment mark in an X direction and an alignment mark in a Y direction, the alignment mark in the X direction is located in a cutting path along the X direction at the periphery of the main pattern, and the alignment mark in the Y direction is located in a cutting path along the Y direction at the periphery of the main pattern; wherein the alignment mark in the X direction comprises a groove pattern, and the alignment mark in the Y direction comprises a patterned metal layer pattern.

[0023] Optionally, in the mask, the alignment mark in the Y direction is a patterned top metal layer pattern.

[0024] The technical scheme of the present application has at least the following advantages:

[0025] The present application selects any two groups of alignment marks from at least three groups of alignment marks, and performs alignment evaluation in the manner of placing one group of alignment marks along the X direction and placing another group of alignment marks along the Y direction; according to the result of the alignment evaluation, the final mask alignment mark combination is determined; and a wafer is exposed by using a mask having the mask alignment mark combination; wherein the mask alignment mark combination comprises: an alignment mark in an X direction and an alignment mark in a Y direction, the alignment mark in the X direction comprises a groove pattern; and the alignment mark in the Y direction comprises a patterned metal layer pattern. By selecting the mask alignment mark combination, the present application can quickly solve the alignment problem caused by wafer warping, improve the success rate of alignment mark grabbing, and improve the success rate of alignment. Furthermore, the alignment method provided by the present application is simple and does not need to involve modification of the hardware and software of the machine, which solves the wafer alignment rejection problem and saves costs. BRIEF DESCRIPTION OF DRAWINGS

[0026] In order to more clearly illustrate the technical scheme in the specific embodiments of the present application or the prior art, the drawings needed in the description of the specific embodiments or the prior art will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the present application, and those skilled in the art can also obtain other drawings according to these drawings without creative labor.

[0027] Figure 1 is a flowchart of the alignment method of the embodiments of the present application. DETAILED DESCRIPTION

[0028] With reference to the accompanying drawings, the technical solutions in the present application will be described clearly and completely. Obviously, the described embodiments are only some of the embodiments of the present application, but not all of them. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of the present application.

[0029] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicate the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present application. In addition, the terms "first", "second", "third" are only for the purpose of description, and cannot be understood as indicating or implying relative importance.

[0030] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connecting" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements, or it can be wireless connection, or it can be wired connection. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0031] In addition, the technical features involved in different embodiments of the present application described below can be combined with each other as long as there is no conflict.

[0032] The inventors found that the ASML standard alignment strategy is to uniformly and synchronously set the alignment marks in the X and Y directions on the wafer map. The displacement of the alignment marks caused by wafer warping will cause different degrees of wafer damage in different directions, and under conventional working conditions, it is easy to cause the failure of alignment marks in a single direction.

[0033] Based on the above problems, the present application provides an alignment method, which refers to Figure 1 , Figure 1 is a flowchart of the alignment method of the present application, which comprises:

[0034] Step S10: selecting N groups of alignment marks, wherein N is an integer greater than 2. Specifically, 4 or 6 groups of alignment marks with complete topography are selected from a plurality of groups of alignment marks by using an optical microscope.

[0035] Step S20: Selecting any two groups of the alignment marks, and performing alignment evaluation in the manner of placing one group of alignment marks along the X direction and placing another group of alignment marks along the Y direction. Specifically, in the present embodiment, the N groups of alignment marks selected in step S10 are combined in pairs in step S20, and a total of cases of alignment evaluation are performed.

[0036] In the present embodiment, the specific steps of selecting any two groups of the alignment marks and performing alignment evaluation in the manner of placing one group of alignment marks along the X direction and placing another group of alignment marks along the Y direction can include:

[0037] First step: Selecting two groups of the alignment marks from the at least three groups of the alignment marks, placing a first group of alignment marks along the X direction and a second group of alignment marks along the Y direction, and performing alignment evaluation once;

[0038] Second step: Placing the second group of alignment marks along the X direction and the first group of alignment marks along the Y direction, and performing alignment evaluation again.

[0039] In the present embodiment, the number of times of evaluation is times. The parameters of evaluation include, but are not limited to, whether wafer alignment rejection occurs, overlay accuracy measurement when wafer alignment rejection does not occur, and the like.

[0040] Step S30: According to the results of alignment evaluation, determining two groups of the alignment marks with the highest success rate of alignment mark grabbing, i.e., determining the final mask alignment mark combination, wherein the mask alignment mark combination includes alignment marks along the X direction and alignment marks along the Y direction, the alignment marks along the X direction include trench patterns, and the alignment marks along the Y direction include patterned metal layer patterns.

[0041] The inventors have found that the alignment signals of the alignment marks along the X direction and the alignment marks along the Y direction are greatly different due to the topography. If the alignment marks of the trench patterns are selected along the X direction and the alignment marks of the patterned metal layer patterns are selected along the Y direction, the alignment signals along the X direction and the Y direction are the best. The present application selects different alignment marks with good alignment signals along the X direction and the Y direction, i.e., selects the mask alignment mark combination along the X direction and the Y direction, which can improve the success rate of alignment. Compared with the method of selecting only one kind of alignment mark according to the reference alignment strategy, the mask alignment mark combination of the present application can avoid the alignment marks with poor alignment signals in a certain direction, and avoid the situation of alignment rejection of the machine.

[0042] Preferably, the alignment marks in the Y direction are patterned top metal layer patterns.

[0043] Step S40: exposing the wafer using the mask plate formed with the mask alignment mark combination.

[0044] In the present embodiment, after the wafer is exposed using the mask plate formed with the mask alignment mark combination, the alignment marks in the X direction are located (transferred to) in the cutting lanes along the X direction at the periphery of the exposure area of the wafer, and the alignment marks in the Y direction are located (transferred to) in the cutting lanes along the Y direction of the exposure area of the wafer.

[0045] Further, after the wafer is exposed using the mask plate formed with the mask alignment mark combination, the alignment method can further include:

[0046] Step S50: collecting data information of alignment rejection of the in-line exposure wafer stage;

[0047] Step S60: adjusting the layout of the mask alignment mark combination in the mask plate according to the data information;

[0048] Step S70: exposing the wafer using the mask plate formed with the adjusted mask alignment mark combination.

[0049] In the present application, any two groups of alignment marks are selected from at least three groups of alignment marks, and alignment evaluation is performed in the manner of placing one group of alignment marks along the X direction and placing another group of alignment marks along the Y direction; according to the result of the alignment evaluation, the final mask alignment mark combination is determined; the wafer is exposed using the mask plate formed with the mask alignment mark combination; wherein the mask alignment mark combination includes alignment marks in the X direction and alignment marks in the Y direction, the alignment marks in the X direction include groove patterns, and the alignment marks in the Y direction include patterned metal layer patterns. By selecting the mask alignment mark combination, the present application can quickly solve the alignment problem caused by wafer warping, improve the success rate of alignment mark grabbing, and improve the success rate of alignment. Further, the alignment strategy of the present application is consistent with the total number of alignment marks of the reference alignment strategy, so it has no effect on the wafer per hour (WPH). In addition, the alignment method provided by the present application is simple and does not need to involve the modification of the hardware and software of the machine, which not only solves the wafer alignment rejection problem caused by wafer warping, but also saves costs.

[0050] Based on the same inventive concept, the application further provides a mask alignment mark combination used in an alignment method, which is arranged on a mask plate for mask alignment, and comprises: alignment marks in an X direction and alignment marks in a Y direction; wherein the alignment marks in the X direction comprise a groove pattern, and the alignment marks in the Y direction comprise a patterned metal layer pattern.

[0051] Preferably, the alignment marks in the Y direction are patterned top metal layer patterns.

[0052] Based on the same inventive concept, the application further provides a mask plate used in an alignment method, which comprises: a main pattern and a mask alignment mark combination located around the main pattern; wherein the mask alignment mark combination comprises: alignment marks in an X direction and alignment marks in a Y direction, the alignment marks in the X direction are located in a cutting path along the X direction at the periphery of the main pattern, and the alignment marks in the Y direction are located in a cutting path along the Y direction at the periphery of the main pattern; wherein the alignment marks in the X direction comprise a groove pattern, and the alignment marks in the Y direction comprise a patterned metal layer pattern.

[0053] Preferably, the alignment marks in the Y direction are patterned top metal layer patterns.

[0054] Obviously, the above embodiments are only examples for clearly illustrating the application, and are not intended to limit the application. Based on the above description, other different forms of changes or modifications can be made by those skilled in the art. Here, all the embodiments are not required to be enumerated, and the changes or modifications derived therefrom are still within the protection scope of the application.

Claims

1. An alignment method, characterized by, The method comprises the following steps: selecting N groups of alignment marks, wherein N is an integer greater than 2; selecting any two groups of the alignment marks, placing the first group of alignment marks along the X direction and the second group of alignment marks along the Y direction, and performing a first alignment evaluation; placing the second group of alignment marks along the X direction and the first group of alignment marks along the Y direction, and performing a second alignment evaluation; determining a final mask alignment mark combination according to the results of the alignment evaluations, wherein the mask alignment mark combination comprises alignment marks along the X direction and alignment marks along the Y direction, the alignment marks along the X direction comprise trench patterns, and the alignment marks along the Y direction comprise patterned metal layer patterns; exposing a wafer using a mask plate formed with the mask alignment mark combination.

2. The method of claim 1, wherein The alignment marks along the Y direction are patterned top metal layer patterns.

3. The method of claim 1, wherein After exposing the wafer using the mask plate formed with the mask alignment mark combination, the alignment method further comprises the following steps: collecting data information of alignment rejection of an in-line exposure wafer track; adjusting the layout of the mask alignment mark combination on the mask plate according to the data information; exposing a wafer using a mask plate formed with the adjusted mask alignment mark combination.

4. The method of claim 1, wherein Selecting N groups of alignment marks with complete topography from a plurality of groups of alignment marks using an optical microscope, wherein N is an integer greater than 2.

5. The method of claim 1, wherein After exposing the wafer using the mask plate formed with the mask alignment mark combination, the alignment marks along the X direction are located in a cutting lane along the X direction at the periphery of the exposure area of the wafer, and the alignment marks along the Y direction are located in a cutting lane along the Y direction at the periphery of the exposure area of the wafer.

6. A mask alignment mark combination for use in an alignment method as claimed in any one of claims 1-5, characterized in that The mask alignment mark combination is arranged on a mask plate for mask alignment, and comprises alignment marks along the X direction and alignment marks along the Y direction, wherein the alignment marks along the X direction comprise trench patterns, and the alignment marks along the Y direction comprise patterned metal layer patterns.

7. The mask alignment mark combination of claim 6, wherein, The alignment marks along the Y direction are patterned top metal layer patterns.

8. A reticle for use in the alignment method of any one of claims 1-5, wherein, The method comprises the following steps: a main pattern and a mask alignment mark combination located around the main pattern, wherein the mask alignment mark combination comprises alignment marks along the X direction and alignment marks along the Y direction, the alignment marks along the X direction are located in a cutting lane along the X direction at the periphery of the main pattern, and the alignment marks along the Y direction are located in a cutting lane along the Y direction at the periphery of the main pattern, wherein the alignment marks along the X direction comprise trench patterns, and the alignment marks along the Y direction comprise patterned metal layer patterns.

9. The reticle of claim 8, wherein, The alignment marks along the Y direction are patterned top metal layer patterns.

Citation Information

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