An external device control interface module verification method and system

Abstract

The present invention belongs to the technical field of IC verification, and particularly relates to a verification method and system for an external device control interface module, including: accessing an external device through the external device control interface module according to each access address, and simultaneously accessing an external device reference model; the external device reference model is used to store the accessed access address and the corresponding access value; and collecting the write addresses of the external device accessed by the external device control interface module, denoted as historical write address data; if each write address in the historical write address data is in the external device reference model, and the read data read from the external device is consistent with the read data read from the corresponding address of the external device reference model, and the write data written to the external device is consistent with the write data written to the corresponding address of the external device reference model, then the verification of the external device control interface module passes; otherwise, the verification fails. Thus, the present invention solves the problems of long verification time and low verification sufficiency for the external device control interface module.

Description

Technical Field

[0001] The present invention belongs to the technical field of IC verification, and particularly relates to a verification method and system for an external device control interface module. Background Art

[0002] In IC verification, especially in soc chips, an SDRAM module is often externally attached for data storage. Therefore, the corresponding SDRAM control interface module needs to be verified. Since the correctness of the SDRAM control interface module needs to be verified, considering the storage characteristics of SDRAM, its read function can be proved by checking the correctness of the read-back data, and its write property needs to check whether the written data is written to the correct SDRAM location. Therefore, there are usually two verification methods.

[0003] The first one is the traversal comparison method, that is, creating an SDRAM storage reference model of the same size as the actual SDRAM in the verification platform. When reading and writing the actual SDRAM through the SDRAM control interface, the SDRAM storage reference model is also read and written. Finally, all the data stored at the addresses of the SDRAM reference model and the actual SDRAM are compared one by one. If there is any inconsistency, the SDRAM control interface needs to be checked and repaired. This method is sufficient for checking the write property of the SDRAM control interface module, but SDRAM is generally very large, and it takes a lot of time to traverse and compare the stored data at all addresses.

[0004] The second one is the indirect comparison method. First, write operations are performed on the addresses within a specified range of the SDRAM, and then read operations are performed using the addresses within this range to check whether the read-back data is equal to the written data. This method takes relatively much less simulation time, but the verification is not sufficient, and it cannot guarantee that the SDRAM control interface will not tamper with the storage part outside the specified address range, which has a certain risk.

[0005] The above two methods for checking the write property of the SDRAM control interface both have some disadvantages. The first one, traversing and comparing all addresses of the SDRAM, consumes a large amount of simulation time; the second one is not sufficient for verifying the write operation function and has a certain risk. Therefore, in view of this situation, a solution is needed that can not only improve the simulation speed of verifying the SDRAM control interface module, but also fully consider the situation of write exceptions and avoid corresponding risks. Summary of the Invention

[0006] The purpose of the present invention is to provide a verification method and system for an external device control interface module to solve the problems of long verification time and low verification sufficiency in the prior art for verifying the external device control interface module.

[0007] To solve the above technical problems, the technical solutions provided by the present invention and the corresponding beneficial effects of the technical solutions are as follows:

[0008] A method for verifying an external device control interface module of the present invention includes the following steps:

[0009] 1) Generate excitation access data, where the access data includes an access address and a corresponding access value; the access address includes a write address and a read address;

[0010] 2) Access the external device according to each access address through the external device control interface module, and at the same time access the external device reference model; the external device reference model is used to store the accessed access address and the corresponding access value; and collect the write addresses of the external device accessed by the external device control interface module, denoted as historical write address data;

[0011] 3) If the first condition, the second condition, and the third condition are all satisfied, the external device control interface module passes the verification; if any one of the first condition, the second condition, and the third condition is not satisfied, the external device control interface module fails the verification;

[0012] The first condition is that each write address in the historical write address data is in the external device reference model; the second condition is that the read data read from the external device read address is consistent with the read data read from the corresponding address of the external device reference model; the third condition is that the write data written to the external device is consistent with the write data written to the corresponding address of the external device reference model.

[0013] The beneficial effects of the above technical solutions are as follows: On the one hand, the present invention determines whether there is a problem with the read attribute of the external device control interface module by judging whether the data read from the external device is consistent with the corresponding access value. If the read data is consistent with the access value corresponding to the read address, it proves that the read data attribute of the external device control interface module is normal. On the other hand, by judging whether the write data written to the external device is consistent with the write data written to the corresponding address of the external device reference model, it is determined whether there is a problem with the write attribute of the external device control interface module, and by judging whether each write address in the historical write address data is in the external device reference model, it is determined whether there is an address other than the tampered access address. If there is a write operation to an address other than the access address, and only the write address is saved in the external device reference model, the tampered address will definitely not exist in the external device reference model, ensuring the sufficiency of the verification of the external device control interface module. If the written data of both is consistent, and the historical write address data is all in the external device reference model and there is no address outside the tampering range, it proves that the write attribute of the external device control interface module is normal.

[0014] In summary, the present invention compares read and write data based on the access address, and then compares the write address of the recorded external device, simply, sufficiently, and reliably verifying the read and write data attributes of the external device control interface module, and taking a short time. Thus, the present invention solves the problems of long time consumption and low verification sufficiency in verifying the external device control interface module in the prior art.

[0015] Further, the read data is the data written according to the write address and then read back, and the read address is the same as the write address.

[0016] Further, the read data is the data read according to the read address, and the read address is different from the write address.

[0017] Further, when the verification of the external device control interface module fails, the problem is located for the external device control interface module.

[0018] Further, the external device reference model is an associative array, the access address is stored in the key of the associative array, and the corresponding access value is stored in the value corresponding to the key.

[0019] The beneficial effects of the above technical solutions are as follows: The storage size of the external reference model existing in the form of an associative array in the present invention is not affected by the storage size of the external device, and the occupied storage space is small, so that it can quickly cope with the iteration of the external device control interface module and the reuse of different projects.

[0020] Further, in the first condition, the exits function is used to judge each write address in the historical write address data in the external device reference model.

[0021] Further, when the external device control interface module is an sdram control interface module, the external device reference model is an sdram external reference model.

[0022] Further, a monitor component is used to collect the write address of the external device accessed by the external device control interface module.

[0023] A verification system for an external device control interface module of the present invention, the system includes a processor, and the processor is used to execute program code to implement a verification method for an external device control interface module of the present invention.

[0024] On the one hand, in the present invention, by determining whether the data read from the external device is consistent with the corresponding access value, it is determined whether there is a problem with the read attribute of the external device control interface module. If the read data is consistent with the access value corresponding to the read address, it proves that the read data attribute of the external device control interface module is normal. On the other hand, by determining whether the write data written to the external device is consistent with the write data written to the corresponding address of the external device reference model, it is determined whether there is a problem with the write attribute of the external device control interface module, and by determining whether each write address in the historical write address data is in the external device reference model, it is determined whether there is an address other than the tampered access address. If there is a write operation to an address other than the access address, and only the write address is saved in the external device reference model, the tampered address will definitely not exist in the external device reference model either, ensuring the sufficiency of the verification of the external device control interface module. If the written data of both is consistent, and all the historical write address data is in the external device reference model and there is no address outside the tampered range, it proves that the write attribute of the external device control interface module is normal.

[0025] In summary, the present invention compares the read and write data based on the access address, and then compares the recorded write addresses of the external device, simply, sufficiently, and reliably verifying the read and write data attributes of the external device control interface module, and the time consumption is short. Thus, the present invention solves the problems of long time consumption and low verification sufficiency in the prior art for verifying the external device control interface module. Brief Description of the Drawings

[0026] Figure 1 is a flowchart of a method for verifying an external device control interface module of the present invention;

[0027] Figure 2 is a block diagram of the structure of a system for verifying an external device control interface module of the present invention. Detailed Embodiment

[0028] The present invention provides a method and system for verifying an external device control interface module. The main concept of the present invention includes: 1) setting an external device reference model for storing the accessed address and the corresponding access value; 2) accessing the external device through the external device control interface module using the access address, and at the same time accessing the external device reference model; 3) recording the write addresses accessed by the external device control interface module of the external device; 4) comparing whether the data read from the same address corresponding to the external device and the external device reference model is consistent, and determining whether the accessed write address exists in the external device reference model. If all of the above are yes, the verification of the external device control interface module is completed. Thus, the present invention solves the problems of long time consumption and low verification sufficiency in the prior art for verifying the external device control interface module.

[0029] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0030] Method Embodiment:

[0031] An embodiment of a method for verifying an external device control interface module of the present invention. In this embodiment, the present invention is applied to a verification platform to verify the external device control interface module through the verification platform. Among them, the external device control interface module is an SDRAM control interface module, the external device reference model is an SDRAM external reference model. Preferably, the SDRAM external reference model is an associative array, and the external device is an SDRAM. First, an associative array is created in the verification platform as an SDRAM storage reference model using the storage characteristics of the associative array. Then, during the working process, the read data is compared, and at the same time, the write addresses of the external SDRAM accessed by the SDRAM control interface are collected. Finally, the stored data at the corresponding addresses of the SDRAM is traversed and compared using the addresses existing in the associative array. Then, the systemverilog associative array exits function is used to uniformly judge the actually collected write addresses, so as to achieve the verification purpose.

[0032] A method for verifying an external device control interface module of the present invention specifically includes the following steps, as Figure 1 shown:

[0033] Step 1, the verification platform randomly generates read addresses and write addresses for accessing the SDRAM, collectively referred to as access addresses.

[0034] This step belongs to stimulus generation. Since the verification object is the SDRAM control interface module, it is necessary to randomly set the values, access types, and access orders of the access addresses to simulate the actions of accessing the SDRAM during the actual operation of the chip.

[0035] Step 2, create an associative array in the verification platform as an SDRAM reference model. Then, based on the access addresses generated in Step 1, each access address of the external SDRAM is accessed through the SDRAM control interface, and at the same time, the SDRAM reference model existing in the form of an associative array created by the verification platform is accessed. Specifically, the access process is as follows:

[0036] Through the SDRAM control interface, the same data is written at the same addresses in the external SDRAM and the SDRAM reference model according to each write address; through the SDRAM control interface, data is read at the same addresses in the external SDRAM and the SDRAM reference model according to each read address.

[0037] During the operation of the SDRAM control interface module, it is also necessary to collect the write addresses actually accessed by the actual SDRAM, and record the collected write addresses as historical write address data. The historical write address data is collected by monitoring the write address lines of the external SDRAM through the monitor component of the verification platform.

[0038] In this step, an SDRAM reference model is created in the form of an associative array. Since the storage size of the SDRAM reference model in the form of an associative array is not affected by the storage size of the external SDRAM, its size changes with actual access and does not need to declare the size. Therefore, the verification platform of the present invention can quickly handle the iteration of the SDRAM control interface module and the reuse of different projects.

[0039] Step 3, during the operation of the SDRAM control interface module, compare the data read back from the external SDRAM with the data read from the corresponding address in the SDRAM reference model. If there are inconsistent results, it is necessary to locate, check, and repair the SDRAM control interface module.

[0040] In this step, the addresses for reading data from the external SDRAM and the SDRAM reference model are the data in the read address. If the address for reading data is the read address, and if the read address is an address not accessed by the SDRAM control interface module, then the data read from the external SDRAM and the SDRAM reference model are both 0, and the data should be consistent, so as to be able to judge whether the read data attribute of the SDRAM control interface module is normal; if the read address is the data written to verify the read attribute of the SDRAM control interface module, and the same data is written in advance in the read address, then it is also possible to judge whether the read attribute of the SDRAM control interface module is normal by whether the two parts of the read-back data are consistent.

[0041] Step 4, in the final comparison stage of the verification process, use the write addresses existing in the associative array written in Step 2 to compare the stored data in the external SDRAM with the corresponding addresses in the associative array. If there are inconsistent results, it is necessary to locate, check, and repair the SDRAM control interface module; if the results are all consistent, it indicates that the write attribute of the SDRAM control interface module is normal, and continue to execute Step 5.

[0042] The present invention has less occupied space for read addresses and write addresses in Step 3 and Step 4, and less performance occupied by a small amount of data, with a fast comparison speed, quickly verifying the SDRAM control interface module, thereby improving the overall simulation speed. In this step, since the elements of the associative array are dynamically allocated, the final set of addresses existing in the associative array is equal to the set of write addresses generated in the verification platform.

[0043] Step 5: Compare the historical write address data in Step 2 with the write addresses in the associative array one by one to determine whether they exist in the address set of the above associative array. If not, the sdram control interface module needs to be located, checked, and repaired. If so, the verification passes. This step uses the exits function of the systemverilog associative array to determine whether a certain address exists in the key set.

[0044] The present invention simply monitors and collects the write address lines of the external sdram to obtain the historical write address data of the external sdram. By comparing the historical write address data with the write addresses in the associative array, it is possible to determine whether there is any tampering with addresses outside the write address range. While verifying the read and write attributes, it is also fully verified, reducing risks. Therefore, the present invention is simple and convenient, with a low complexity of the verification platform, and is fully verified, improving reliability.

[0045] In this embodiment, when judging the read data consistency, the read address and the write address are different addresses. When judging the read attribute, the read attribute of the sdram control interface module is judged by the data read from the read address. When judging the write attribute, first write data according to the write address, and then judge the consistency of the written data according to the read-back data. In other feasible embodiments, the read address and the write address are the same address. For the judgment of the read and write attributes, first write data, and then judge the consistency according to the read-back data. If the data is consistent, it indicates that both the write attribute and the read attribute are correct, and the read and write attributes of the sdram control interface module are verified at one time.

[0046] On the one hand, the present invention determines whether there is a problem with the read attribute of the external device control interface module by judging whether the data read from the external device is consistent with the corresponding access value. If the read data is consistent with the access value corresponding to the read address, it proves that the read data attribute of the external device control interface module is normal. On the other hand, by judging whether the write data written into the external device is consistent with the write data at the corresponding address of the external device reference model, it is determined whether there is a problem with the write attribute of the external device control interface module. And by judging whether each write address in the historical write address data is in the external device reference model, it is determined whether there is any address outside the tampered access address. If there is a write operation to an address outside the access address, and only the write address is saved in the external device reference model, the tampered address will definitely not exist in the external device reference model either, ensuring the sufficiency of the verification of the external device control interface module. If the written data of both is consistent, and the historical write address data is all in the external device reference model without addresses outside the tampering range, it proves that the write attribute of the external device control interface module is normal.

[0047] In summary, the present invention compares read and write data based on the access address, and then compares the write address of the recorded external device, simply, fully, and reliably verifying the read and write data attributes of the external device control interface module, and taking a short time. Thus, the present invention solves the problems of long time consumption and low verification sufficiency in verifying the external device control interface module in the prior art.

[0048] In this embodiment, the external device control interface module is an SDRAM control interface module, the external device reference model is an SDRAM external reference model, and the external device is an SDRAM. In other embodiments, the external device control interface module can also be other control interface modules. For example, the external device control interface module is an MCU control interface module, the external device reference model can also be an MCU external reference model, and the external device is a SoC chip.

[0049] System embodiment:

[0050] An embodiment of a verification system for an external device control interface module of the present invention is as Figure 2 shown, including a memory, a processor, and an internal bus. The processor and the memory complete mutual communication and data interaction through the internal bus. The memory includes at least one software function module stored in the memory. The processor executes various functional applications and data processing by running the software programs and modules stored in the memory, implementing a verification method for an external device control interface module introduced in the method embodiment of the present invention.

[0051] Among them, the processor can be a microprocessor MCU, a programmable logic device FPGA, or other processing devices.

[0052] The memory can be various memories that store information by using electrical energy, such as RAM, ROM, etc.; it can also be various memories that store information by using magnetic energy, such as hard disks, floppy disks, magnetic tapes, magnetic core memories, bubble memories, USB flash drives, etc.; it can also be various memories that store information by using optical methods, such as CDs, DVDs, etc.; of course, it can also be other types of memories, such as quantum memories, graphene memories, etc.

Claims

1. A method for verifying an external device control interface module, characterized in that: Including the following steps: 1) Generate access data for excitation, where the access data includes an access address and a corresponding access value; the access address includes a write address and a read address; 2) Control the external device through the external device control interface module to access the external device according to each access address, and at the same time access the external device reference model; the external device reference model is used to store the accessed access address and the corresponding access value; and collect the write addresses of the external device accessed by the external device control interface module, denoted as historical write address data; the external device control interface module is an SDRAM control interface module, and the external device reference model is an SDRAM external reference model; 3) If the first condition, the second condition, and the third condition are all satisfied, the external device control interface module passes the verification; if any one of the first condition, the second condition, and the third condition is not satisfied, the external device control interface module fails the verification; The first condition is that each write address in the historical write address data is in the external device reference model; The second condition is that the read data read from the external device read address is the same as the read data read from the corresponding address in the external device reference model; the third condition is that the write data written to the external device is the same as the write data written to the corresponding address in the external device reference model.

2. The verification method for the external device control interface module according to claim 1, characterized in that: The read data is the data read back after being written according to the write address, and the read address is the same as the write address.

3. The method for verifying an external device control interface module according to claim 1, wherein: The read data is the data read according to the read address, and the read address is different from the write address.

4. The method for verifying the external device control interface module according to claim 1, wherein: When the external device control interface module fails the verification, problem location is performed on the external device control interface module.

5. The method for verifying an external device control interface module according to claim 1, wherein: The external device reference model is an associative array, the access address is stored in the key of the associative array, and the corresponding access value is stored in the value corresponding to the key.

6. The method for verifying an external device control interface module according to claim 1, wherein: In the first condition, the exits function is used to determine whether each write address in the historical write address data is in the external device reference model.

7. The method for verifying an external device control interface module according to any one of claims 1 to 6, characterized in that: Use the monitor component to collect the write addresses of the external device accessed by the external device control interface module.

8. An external device control interface module verification system, characterized in that: The system includes a processor, and the processor is used to execute program code to implement the verification method of the external device control interface module according to any one of claims 1 to 7.

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