Display panel and display device

Abstract

The display panel and the display device belong to the technical field of display. The display panel (10) comprises a driving back plate (1), a pixel definition layer (2) arranged on one side of the driving back plate (1), and a plurality of light emitting devices separated by the pixel definition layer (2). The light emitting device comprises a first electrode (31), at least one first common layer (32) and at least one second common layer (34) arranged in a stacking manner away from the driving back plate (1). The first common layers (32) of the plurality of light emitting devices are integrated, and the second common layers (34) of the plurality of light emitting devices are integrated. The orthographic projection of the first common layer (32) on the driving back plate (1) is located in the orthographic projection of the second common layer (34) on the driving back plate (1). The display panel and the display device are helpful to improve the quality of the display panel.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and more particularly to a display panel and a display device. Background Technology

[0002] In the manufacturing process of OLED (Organic Light-Emitting Diode) display panels, the relevant film layers in OLED light-emitting devices are typically formed by vapor deposition using a metal mask. In existing technologies, the mask is prone to scraping against the already deposited film layers, causing the vapor-deposited material to detach.

[0003] The information disclosed in the background section is only for enhancing the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0004] The purpose of this disclosure is to provide a display panel and a display device that improve the quality of the display panel.

[0005] To achieve the above-mentioned objectives, the present disclosure adopts the following technical solution:

[0006] According to a first aspect of this disclosure, a display panel is provided, including a driving backplate, a pixel definition layer disposed on one side of the driving backplate, and a plurality of light-emitting devices separated by the pixel definition layer. The light-emitting devices include a first electrode, at least one first common layer, at least one second common layer, and a common electrode layer stacked along a direction away from the driving backplate. The first common layer of the plurality of light-emitting devices is integral, and the second common layer of the plurality of light-emitting devices is integral.

[0007] Wherein, the orthographic projection of the first common layer on the drive backplane is located within the orthographic projection of the second common layer on the drive backplane.

[0008] In some exemplary embodiments of this disclosure, the light-emitting device further includes:

[0009] A first light-emitting layer is disposed between the first common layer and the second common layer;

[0010] The first light-emitting layers of the plurality of light-emitting devices are combined to form a first light-emitting unit layer;

[0011] Wherein, the orthographic projection of the first common layer on the driving backplane is located within the orthographic projection of the first light-emitting unit layer on the driving backplane;

[0012] The orthographic projection of the first light-emitting unit layer on the driving backplane is located within the orthographic projection of the second common layer on the driving backplane.

[0013] In some exemplary embodiments of this disclosure, the number of the first common layers is N, and the first common layers are numbered sequentially as 1, 2, 3...i-1, i...N, 1≤i≤N along the direction away from the drive backplane;

[0014] Wherein, the orthographic projection of the first common layer numbered i-1 on the drive backplane is located within the orthographic projection of the first common layer numbered i on the drive backplane.

[0015] In some exemplary embodiments of this disclosure, the at least one first common layer includes:

[0016] A hole injection layer is disposed on the side of the first electrode away from the driving backplate, and the hole injection layer of the plurality of light-emitting devices is integrated;

[0017] A hole transport layer is disposed on the side of the hole injection layer away from the driving backplate, and the hole transport layer of the plurality of light-emitting devices is integrated.

[0018] The orthographic projection of the hole injection layer on the drive backplane is located within the orthographic projection of the hole transport layer on the drive backplane.

[0019] In some exemplary embodiments of this disclosure, the at least one first common layer further includes:

[0020] An electron blocking layer is disposed on the side of the hole transport layer away from the driving backplate, and the electron blocking layer of the plurality of light-emitting devices is integrated.

[0021] The hole transport layer is projected onto the drive backplane in a manner that is within the projection of the electron blocking layer onto the drive backplane.

[0022] In some exemplary embodiments of this disclosure, the number of the second common layers is X, and the numbering of each second common layer along the direction away from the drive backplane is 1, 2, 3...k-1, k...X, where 1≤k≤X;

[0023] Among them, the orthographic projection of the second common layer numbered k-1 on the drive backplane is located within the orthographic projection of the second common layer numbered k on the drive backplane.

[0024] In some exemplary embodiments of this disclosure, the at least one second common layer includes:

[0025] An electron transport layer is disposed on the side of the first common layer away from the driving backplate, and the electron transport layer of the plurality of light-emitting devices is integrated.

[0026] An electron injection layer is disposed on the side of the electron transport layer away from the driving backplate, and the electron injection layer of the plurality of light-emitting devices is integrated.

[0027] The orthographic projection of the electron transport layer on the drive backplane is located within the orthographic projection of the electron injection layer on the drive backplane.

[0028] In some exemplary embodiments of this disclosure, the at least one second common layer further includes:

[0029] A hole blocking layer is disposed between the first common layer and the electron transport layer, and the hole blocking layers of the plurality of light-emitting devices are integrated.

[0030] The hole blocking layer is projected onto the drive backplane, and its orthographic projection is located within the orthographic projection of the electron transport layer on the drive backplane.

[0031] In some exemplary embodiments of this disclosure, the light-emitting device further includes:

[0032] A light-emitting auxiliary layer is disposed between the first common layer and the first light-emitting layer;

[0033] The light-emitting auxiliary layers of the plurality of light-emitting devices are combined to form a light-emitting auxiliary unit layer;

[0034] Wherein, the orthographic projection of the first common layer on the driving backplane is located within the orthographic projection of the light-emitting auxiliary unit layer on the driving backplane;

[0035] The orthographic projection of the light-emitting auxiliary unit layer on the driving backplate is located within the orthographic projection of the first light-emitting unit layer on the driving backplate.

[0036] In some exemplary embodiments of this disclosure, the light-emitting device further includes:

[0037] The second light-emitting layer is disposed between the first light-emitting layer and the second common layer;

[0038] At least one third common layer is disposed between the first light-emitting layer and the second light-emitting layer, and the third common layer of the plurality of light-emitting devices is integral;

[0039] Wherein, the orthographic projection of the first common layer on the drive backplane is located within the orthographic projection of the third common layer on the drive backplane;

[0040] The orthographic projection of the third common layer on the drive backplane is located within the orthographic projection of the second common layer on the drive backplane.

[0041] In some exemplary embodiments of this disclosure, the number of the third common layers is L, and the third common layers are numbered sequentially as 1, 2, 3...l-1, l...L, 1≤l≤L along the direction away from the drive backplane;

[0042] Among them, the orthographic projection of the third common layer numbered l-1 on the drive backplane is located within the orthographic projection of the third common layer numbered l on the drive backplane.

[0043] In some exemplary embodiments of this disclosure, the at least one third common layer includes:

[0044] A first charge generation layer is disposed between the first light-emitting layer and the second light-emitting layer, wherein the first charge generation layer of the plurality of light-emitting devices is integrated.

[0045] The second charge generation layer is disposed between the first charge generation layer and the second light-emitting layer, and the second charge generation layer of the plurality of light-emitting devices is integrated.

[0046] Wherein, the orthographic projection of the first charge generation layer on the drive backplane is located within the orthographic projection of the second charge generation layer on the drive backplane.

[0047] In some exemplary embodiments of this disclosure, the common electrode layer of the plurality of light-emitting devices is integral;

[0048] In this configuration, the orthographic projection of each of the second common layers on the drive backplane is located within the orthographic projection of the common electrode layer on the drive backplane.

[0049] In some exemplary embodiments of this disclosure, the driving backplane includes a substrate, a driving circuit layer disposed on one side of the substrate, and a planarization layer disposed on the side of the driving circuit layer away from the substrate.

[0050] The common electrode layer has a central region and an edge region surrounding the central region of the common electrode layer, and at least a portion of the edge region of the common electrode layer is in contact with the driving circuit layer.

[0051] In some exemplary embodiments of this disclosure, the second common layer has a central region and an edge region surrounding the central region of the second common layer, at least a portion of the edge region of the second common layer being in contact with the planarization layer.

[0052] In some exemplary embodiments of this disclosure, the light-emitting device further includes:

[0053] A cover layer is disposed on the side of the common electrode layer away from the driving backplate, and the cover layers of the plurality of light-emitting devices are integral;

[0054] Wherein, the orthographic projection of the common electrode layer on the drive backplate is located within the orthographic projection of the cover layer on the drive backplate.

[0055] In some exemplary embodiments of this disclosure, the display panel further includes an encapsulation layer disposed on the side of the cover layer away from the driving backplate, the encapsulation layer comprising:

[0056] The first inorganic layer is disposed on the side of the cover layer away from the drive back plate;

[0057] An organic layer is disposed on the side of the first inorganic layer away from the drive back plate, and the orthographic projection of the organic layer on the drive back plate is located within the orthographic projection of the first inorganic layer on the drive back plate.

[0058] The second inorganic layer covers the organic layer and the first inorganic layer that is not covered by the organic layer;

[0059] The orthographic projection of the cover layer on the drive backplate is located within the orthographic projection of the first inorganic layer on the drive backplate.

[0060] In some exemplary embodiments of this disclosure, the display panel has a region to be vapor-deposited and a non-vapor-deposited region located around the region to be vapor-deposited, and both the first common layer and the second common layer are located in the region to be vapor-deposited;

[0061] The display panel further includes a plurality of first isolation pillars and a plurality of second isolation pillars disposed on the side of the pixel definition layer away from the driving backplate. The first isolation pillars are located in the area to be vaporized, and the second isolation pillars are located in the non-vaporized area. The height of the second isolation pillar is greater than the height of the first isolation pillar.

[0062] In some exemplary embodiments of this disclosure, the area to be vapor-deposited includes a display area and a non-display area located around the display area;

[0063] Of the plurality of first isolation pillars, some of the first isolation pillars are located in the display area, and some of the first isolation pillars are located in the non-display area.

[0064] In some exemplary embodiments of this disclosure, at least a portion of the first isolation pillars do not overlap with the orthographic projection of the first common layer on the drive backplane.

[0065] Of the plurality of first isolation pillars, at least a portion of the first isolation pillars do not overlap with the orthographic projection of the second common layer on the drive backplane.

[0066] In some exemplary embodiments of this disclosure, the height of the second isolation post is 0.1-5 μm higher than the height of the first isolation post.

[0067] In some exemplary embodiments of this disclosure, the display panel has a region to be vapor-deposited and a non-vapor-deposited region located around the region to be vapor-deposited;

[0068] The display panel includes:

[0069] Drive backplane;

[0070] A pixel definition layer is located on one side of the driving backplane;

[0071] Multiple first isolation pillars and multiple second isolation pillars are disposed on the side of the pixel definition layer away from the driving backplane. The first isolation pillars are located in the area to be vaporized, and the second isolation pillars are located in the non-vaporized area. The height of the second isolation pillar is greater than the height of the first isolation pillar.

[0072] In some exemplary embodiments of this disclosure, the area to be vapor-deposited includes a display area and a non-display area located around the display area;

[0073] Of the plurality of first isolation pillars, some of the first isolation pillars are located in the display area, and some of the first isolation pillars are located in the non-display area.

[0074] In some exemplary embodiments of this disclosure, the height of the second isolation post is 0.1-5 μm higher than the height of the first isolation post.

[0075] According to a second aspect of this disclosure, a display device is provided, including a display panel as described in the first aspect.

[0076] The display panel disclosed herein has a first common layer of multiple light-emitting devices integrated into one piece, a second common layer of multiple light-emitting devices integrated into one piece, and the orthographic projection of the first common layer on the driving back panel is located within the orthographic projection of the second common layer on the driving back panel. This helps to avoid damage to the edges of the first common layer during the vapor deposition process, thus affecting the quality of the display panel. Attached Figure Description

[0077] The above and other features and advantages of this disclosure will become more apparent from a detailed description of exemplary embodiments thereof with reference to the accompanying drawings.

[0078] Figure 1 This is a schematic diagram of the structure of a display panel vapor deposition assembly in the prior art;

[0079] Figure 2 yes Figure 1 Cross-sectional view along the A-A' direction and schematic diagram of the vapor deposition source assembly structure;

[0080] Figure 3 This is a design diagram of the opening of the mask for OLED light-emitting devices formed by vapor deposition in related technologies;

[0081] Figure 4 This is a schematic diagram of the planar structure of the display panel in an exemplary embodiment of this disclosure;

[0082] Figure 5 yes Figure 4 A schematic cross-sectional view of one embodiment along the B-B' direction;

[0083] Figure 6 This is a design diagram of the openings of each mask in the display panel vapor deposition assembly according to an exemplary embodiment of this disclosure;

[0084] Figure 7 This is a schematic diagram of the first mask structure in an exemplary embodiment of this disclosure;

[0085] Figure 8 This is a schematic diagram of the second mask structure in an exemplary embodiment of this disclosure;

[0086] Figure 9 This is a schematic diagram of the third mask structure in an exemplary embodiment of this disclosure;

[0087] Figure 10 This is a schematic diagram of the fourth mask structure in an exemplary embodiment of this disclosure;

[0088] Figure 11 This is a schematic diagram of the fifth mask structure in an exemplary embodiment of this disclosure;

[0089] Figure 12 This is a schematic diagram of the mask plate structure when the magnet plate and the pressing plate are lifted in an exemplary embodiment of this disclosure;

[0090] Figure 13 This is a schematic diagram of the mask plate structure during the downward pressing of the magnet plate and the pressing plate in an exemplary embodiment of this disclosure;

[0091] Figure 14 yes Figure 4 A cross-sectional schematic diagram in one embodiment along the C-C' direction;

[0092] Figure 15 yes Figure 4 A schematic diagram of a cross-section in another embodiment along the C-C' direction;

[0093] Figure 16 yes Figure 4 A schematic diagram of a cross-section in another embodiment along the B-B' direction;

[0094] Figure 17 yes Figure 4 A cross-sectional schematic diagram in another embodiment along the C-C' direction;

[0095] Figure 18 This is a design diagram of the openings of each mask plate in the display panel vapor deposition assembly in another exemplary embodiment of this disclosure.

[0096] The annotations for the main components in the diagram are explained below:

[0097] 100-Evaporation assembly system; 110-Magnet plate; 120-Lamination plate; 130-Mask assembly; 140-Base; 150-Evaporation source; 160-Panel to be vaporized; 161-Isolation pillar; 10-Display panel; 101-Display area; 102-Peripheral area; 11-Substrate; 12-Driving circuit layer; 13-Planarization layer; 2-Pixel definition layer; 31-First electrode; 32-First common layer; 33-First light-emitting layer; 39-Light-emitting auxiliary layer; 34-Second common layer; 35-Common electrode layer; 36-Cover layer; 37-Second light-emitting layer; 38-Third common layer; 41-First mask; 411-First opening; 42-Second mask; 421-Second opening; 43-Third mask; 431-Third opening; 4311-Divider; 4312-Sub-opening; 44-Fourth mask; 441-Fourth opening; 45-Fifth mask; 451-Fifth opening; 46-Sixth mask; 47-Seventh mask; 5-Isolation pillar; 51-First isolation pillar; 52-Second isolation pillar; 6-Encapsulation layer. Detailed Implementation

[0098] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that this disclosure will be more comprehensive and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are set forth to give a full understanding of embodiments of this disclosure.

[0099] For clarity, the thickness of regions and layers may be exaggerated in the figures. The same reference numerals in the figures denote the same or similar structures, and therefore their detailed descriptions will be omitted.

[0100] The described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a full understanding of embodiments of this disclosure. However, those skilled in the art will recognize that the technical solutions of this disclosure can be practiced without one or more of the specific details described, or other methods, components, materials, etc., can be employed. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring the main technical concept of this disclosure.

[0101] When a structure is "on" other structures, it may mean that the structure is integrally formed on other structures, or that the structure is "directly" set on other structures, or that the structure is "indirectly" set on other structures through another structure.

[0102] The terms “a,” “one,” and “the” are used to indicate the existence of one or more elements / components / etc.; the terms “including” and “having” are used to indicate an open-ended inclusion and that other elements / components / etc. may exist in addition to those listed. The terms “first” and “second” are used only as markers and are not a limitation on the number of objects.

[0103] In related technologies, the relevant film layers in OLED light-emitting devices are typically formed by vapor deposition using a metal mask. For example... Figure 1 and Figure 2 As shown, the vapor deposition system 100 mainly includes a base 140, a mask assembly 130, a pressing plate 120, and a magnet plate 110. The mask assembly 130 may include multiple masks. During vapor deposition, the panel to be deposited 160 enters the vapor deposition chamber and aligns with the mask to ensure the vapor deposition progress. After alignment, the pressing plate 120 and the magnet plate 110 descend, and the mask is lifted upwards under magnetic force, tightly adhering to the panel to be deposited 160. After vapor deposition, the panel to be deposited 160 leaves the mask. Typically, the panel to be deposited 160 includes a driving backplate, a pixel definition layer disposed on one side of the driving backplate, and isolation pillars 161 disposed on one side of the pixel definition layer. The isolation pillars 161 are used to support the mask during vapor deposition, preventing the mask from sticking to the panel to be deposited 160.

[0104] like Figure 3 As shown, during the vapor deposition of the relevant film layers in the OLED light-emitting device, the opening sizes of each mask are approximately the same. For example, the OLED light-emitting device requires vapor deposition of a first vapor deposition layer and a second vapor deposition layer. The mask for vapor deposition of the first vapor deposition layer is the first mask 131, and the mask for vapor deposition of the second vapor deposition layer is the second mask 132. The opening sizes of the first mask 131 and the second mask 132 are approximately equal. Thus, after the first vapor deposition layer is deposited, the substrate to be vapor-deposited enters the vapor deposition chamber and needs to be aligned with the second mask 132. During this process, the first vapor deposition layer on the isolation pillars in contact with the second mask 132 is easily scratched by the second mask 132, causing the vapor deposition material to fall off at that location. The fallen vapor deposition material will directly cause dark spots on the panel 160 to be vapor-deposited at that location, and will also affect the subsequent encapsulation effect, leading to poor reliability.

[0105] like Figure 4 , Figure 5 and Figure 14As shown, this disclosure provides a display panel 10, including a driving backplate 1, a pixel definition layer 2 disposed on one side of the driving backplate 1, and a plurality of light-emitting devices separated by the pixel definition layer 2. Each light-emitting device includes a first electrode 31, at least one first common layer 32, and at least one second common layer 34 stacked along a direction away from the driving backplate 1. The first common layer 32 of the plurality of light-emitting devices is integral, and the second common layer 34 of the plurality of light-emitting devices is integral. The orthographic projection of the first common layer 32 onto the driving backplate 1 lies within the orthographic projection of the second common layer 34 onto the driving backplate 1.

[0106] The display panel 10 provided in this disclosure has a first common layer 32 of multiple light-emitting devices integrated into one piece, and a second common layer 34 of multiple light-emitting devices integrated into one piece. The orthographic projection of the first common layer 32 on the driving backplate 1 is located within the orthographic projection of the second common layer 34 on the driving backplate 1. This helps to avoid damage to the edge of the first common layer 32 during the vapor deposition process, thus affecting the quality of the display panel 10.

[0107] The components of the display panel 10 provided in this embodiment will now be described in detail with reference to the accompanying drawings:

[0108] like Figure 5 As shown, this disclosure provides a display panel 10, including a driving backplate 1, a pixel definition layer 2 disposed on one side of the driving backplate 1, and a plurality of light-emitting devices separated by the pixel definition layer 2. Specifically, the pixel definition layer 2 may include a plurality of openings, each opening defining the area of ​​a light-emitting device.

[0109] The driving backplane 1 includes a substrate 11 and a driving circuit layer 12 disposed on one side of the substrate 11. The driving circuit layer 12 includes driving circuits for driving each light-emitting device to emit light. The driving circuits may include pixel circuits and peripheral circuits. The pixel circuits may be 7T1C, 7T2C, 6T1C, or 6T2C, etc., as long as they can drive the light-emitting devices to emit light. The number of pixel circuits is the same as the number of light-emitting devices, and they are connected to each light-emitting device in a one-to-one correspondence so as to control the light emission of each light-emitting device separately. Here, nTmC indicates that a pixel circuit includes n transistors (represented by the letter "T") and m capacitors (represented by the letter "C"). The peripheral circuits are connected to the pixel circuits and are used to input driving signals to the pixel circuits to control the light emission of the light-emitting devices. The peripheral circuits may include gate driving circuits and light emission control circuits. Of course, they may also include other circuits. The specific structure of the peripheral circuits is not specifically limited here. The driving backplane 1 also includes a planarization layer 13 disposed on the side of the driving circuit layer 12 away from the substrate 11.

[0110] like Figure 5 and Figure 14As shown, the light-emitting device includes a first electrode 31, at least one first common layer 32, and at least one second common layer 34 stacked along a direction away from the driving backplate 1. The first common layer 32 of multiple light-emitting devices is integral, and the second common layer 34 of multiple light-emitting devices is integral. That is, the first common layer 32 and the second common layer 34 are both continuous material layers. The orthographic projection of the first common layer 32 on the driving backplate 1 lies within the orthographic projection of the second common layer 34 on the driving backplate 1. In other words, the second common layer 34 can enclose the first common layer 32 within it.

[0111] The first electrode 31 can serve as the anode of each light-emitting device. The first electrode 31 is disposed between the driving backplate 1 and the pixel definition layer 2, and there are multiple first electrodes 31. Multiple openings on the pixel definition layer 2 expose each first electrode in a corresponding manner. The orthographic projection of the openings of the pixel definition layer 2 onto the driving backplate 1 lies within the orthographic projection of the first electrode onto the driving backplate 1.

[0112] The number of first common layers 32 can be one or more. In some embodiments of this disclosure, the number of first common layers 32 is N, and the first common layers 32 are numbered sequentially as 1, 2, 3...i-1, i...N, 1≤i≤N along the direction away from the drive backplane 1; wherein, the orthographic projection of the first common layer 32 numbered i-1 on the drive backplane 1 is located within the orthographic projection of the first common layer 32 numbered i on the drive backplane 1.

[0113] In some embodiments of this disclosure, at least one first common layer 32 includes a hole injection layer and a hole transport layer, and may further include an electron blocking layer. The hole injection layer is disposed on the side of the first electrode 31 away from the driving backplate 1, and the hole injection layers of multiple light-emitting devices are integrated. The hole transport layer is disposed on the side of the hole injection layer away from the driving backplate 1, and the hole transport layers of multiple light-emitting devices are integrated. The electron blocking layer is disposed on the side of the hole transport layer away from the driving backplate 1, and the electron blocking layers of multiple light-emitting devices are integrated. The orthographic projection of the hole injection layer on the driving backplate lies within the orthographic projection of the hole transport layer on the driving backplate 1. The orthographic projection of the hole transport layer on the driving backplate lies within the orthographic projection of the electron blocking layer on the driving backplate 1. Further, the thickness of the hole injection layer can be 5–30 nm; the thickness of the hole transport layer can be 100–2000 nm; and the thickness of the electron blocking layer is 5–100 nm. It should be noted that each of the first common layers 32 (hole injection layer, hole transport layer, electron blocking layer) has a central region and an edge region surrounding the central region, and the thickness of the edge region of each first common layer 32 gradually decreases in the direction away from its central region.

[0114] In this embodiment, there are three first common layers 32, numbered 1, 2, and 3 in the direction away from the drive backplane 1. Among them, the first common layer 32 numbered 1 can be a hole injection layer, the first common layer 32 numbered 2 can be a hole transport layer, and the first common layer 32 numbered 3 can be an electron blocking layer.

[0115] The number of second common layers 34 can be one or more. In some embodiments of this disclosure, the number of second common layers 34 is X, and the second common layers 34 are numbered sequentially as 1, 2, 3...k-1, k...X, 1≤k≤X; wherein, the orthographic projection of the second common layer 34 numbered k-1 on the drive backplate 1 is located within the orthographic projection of the second common layer 34 numbered k on the drive backplate 1.

[0116] In some embodiments of this disclosure, at least one second common layer 34 includes an electron transport layer and an electron injection layer, and may further include a hole blocking layer. The electron transport layer is disposed on the side of the first common layer away from the driving backplane 1, and the electron transport layer of the multiple light-emitting devices is integrated. The electron injection layer is disposed on the side of the electron transport layer away from the driving backplane 1, and the electron injection layer of the multiple light-emitting devices is integrated. The hole blocking layer is disposed between the first common layer and the electron transport layer, and the hole blocking layer of the multiple light-emitting devices is integrated. The orthographic projection of the hole blocking layer on the driving backplane 1 lies within the orthographic projection of the electron transport layer on the driving backplane 1, and the orthographic projection of the electron transport layer on the driving backplane 1 lies within the orthographic projection of the electron injection layer on the driving backplane 1. Further, the thickness of the hole blocking layer can be 5–100 nm; the thickness of the electron transport layer can be 20–100 nm; and the thickness of the electron injection layer is 1–10 nm. It should be noted that each of the second common layers 34 (hole blocking layer, electron transport layer, electron injection layer) has a central region and an edge region surrounding the central region, and the thickness of the edge region of each second common layer 34 gradually decreases in the direction away from its central region.

[0117] In this embodiment, there are three second common layers 34, numbered 1, 2, and 3 in the direction away from the drive backplate 1. The second common layer 34 numbered 1 can be a hole blocking layer, the second common layer 34 numbered 2 can be an electron transport layer, and the second common layer 34 numbered 3 can be an electron injection layer.

[0118] like Figure 5 and Figure 14As shown, the common electrode layer 35 of multiple light-emitting devices is integrated; the common electrode layer 35 can be the cathode layer of the light-emitting device. The orthographic projection of each second common layer 34 on the driving backplate 1 lies within the orthographic projection of the common electrode layer 35 on the driving backplate 1. For example, the orthographic projections of the hole blocking layer, electron transport layer, and electron injection layer on the driving backplate 1 all lie within the orthographic projection of the common electrode layer 35 on the driving backplate 1. The common electrode layer 35 also has a central region and an edge region away from the central region of the common electrode layer 35, and the thickness of the edge region of the common electrode layer 35 gradually decreases in the direction away from the central region. Furthermore, at least a portion of the edge region of the common electrode layer 35 is in contact with the driving circuit layer 12.

[0119] The edge regions of other films in the display panel 10 may also contact different films. For example, in some embodiments, at least one first common layer 32 includes a hole injection layer, a hole transport layer, and an electron blocking layer, wherein the hole injection layer, the hole transport layer, and the electron blocking layer also have a central region and an edge region surrounding the central region. The edge region of the hole injection layer is in contact with the pixel definition layer 2, and the edge region of the hole transport layer may be in contact with the pixel definition layer 2 or the planarization layer 13. Similarly, the edge region of the electron blocking layer may be in contact with the pixel definition layer 2 or the planarization layer 13.

[0120] Furthermore, the second common layer 34 has a central region and an edge region surrounding the central region of the second common layer 34, and at least a portion of the edge region of the second common layer 34 is in contact with the planarization layer 13.

[0121] The light-emitting device also includes a first light-emitting layer 33, disposed between the first common layer 32 and the second common layer 34. In the direction perpendicular to the driving backplate 1, the positions of the first light-emitting layer 33 correspond one-to-one with the openings of the pixel definition layer 2. Multiple first light-emitting layers 33 of the light-emitting devices are combined to form a first light-emitting unit layer; wherein, the orthographic projection of the first common layer 32 on the driving backplate 1 lies within the orthographic projection of the first light-emitting unit layer on the driving backplate 1; the orthographic projection of the first light-emitting unit layer on the driving backplate 1 lies within the orthographic projection of the second common layer 34 on the driving backplate 1. That is, the outer edge of the first common layer 32 lies within the outer edge of the first light-emitting unit layer formed by the combination of the first light-emitting layers 33 of the multiple light-emitting devices. The outer edge of the first light-emitting unit layer formed by the combination of the first light-emitting layers 33 of the multiple light-emitting devices lies within the outer edge of the second common layer 34. The thickness of the first light-emitting layer 33 can be 20–100 nm.

[0122] The light-emitting device also includes a cover layer 36 disposed on the side of the common electrode layer 35 away from the driving backplate 1, and the cover layer 36 of multiple light-emitting devices is integrated; wherein, the orthographic projection of the common electrode layer 35 on the driving backplate 1 lies within the orthographic projection of the cover layer 36 on the driving backplate 1. The cover layer 36 includes a first cover layer and a second cover layer along the direction away from the driving backplate 1, the refractive index of the first cover layer is greater than the refractive index of the second cover layer, and the thickness of the second cover layer is less than the thickness of the first cover layer. The material of the second cover layer can be an inorganic or organic material, and the refractive index can be 1.3-1.8@460nm.

[0123] In some embodiments of this disclosure, such as Figure 5 As shown, the distance between the outer edge of the first common layer 32 and the outer edge of the first light-emitting unit layer formed by the combination of the first light-emitting layers 33 of multiple light-emitting devices is d1; the distance between the outer edge of the first light-emitting unit layer and the outer edge of the second common layer 34 is d2; the distance between the outer edge of the second common layer 34 and the outer edge of the common electrode layer 35 is d3; and the distance between the outer edge of the common electrode layer 35 and the outer edge of the cover layer 36 is d4. Therefore, d1, d2, and d4 are all less than d3. This ensures the connection between the common electrode layer 35 and the driving circuit layer 12. In this disclosure, the outer edge refers to the outermost edge of each film layer away from the central region.

[0124] like Figure 15 As shown, in some embodiments of this disclosure, the light-emitting device further includes a light-emitting auxiliary layer 39, which is disposed between the first common layer 32 and the first light-emitting layer 33. In the direction perpendicular to the driving backplate 1, the light-emitting auxiliary layer 39 corresponds one-to-one with the opening positions of the pixel definition layer 2. Multiple light-emitting auxiliary layers 39 of the light-emitting devices are combined to form a light-emitting auxiliary unit layer. The orthographic projection of the first common layer 32 onto the driving backplate 1 lies within the orthographic projection of the light-emitting auxiliary unit layer onto the driving backplate 1. The orthographic projection of the light-emitting auxiliary unit layer onto the driving backplate 1 lies within the orthographic projection of the first light-emitting unit layer onto the driving backplate 1. That is, the outer edge of the light-emitting auxiliary unit layer lies within the outer edge of the first light-emitting unit layer.

[0125] like Figure 16 and Figure 17 As shown, in some embodiments of this disclosure, the light-emitting device further includes a second light-emitting layer 37 and at least one third common layer 38. The second light-emitting layer 37 is disposed between the first light-emitting layer 33 and the second common layer 34. In the direction perpendicular to the driving backplate 1, the second light-emitting layer 37 corresponds one-to-one with each opening position of the pixel definition layer 2. At least one third common layer 38 is disposed between the first light-emitting layer 33 and the second light-emitting layer 37, and the third common layer 38 of multiple light-emitting devices is integrated.

[0126] The orthographic projection of the first common layer 32 on the drive backplane is within the orthographic projection of the third common layer 38 on the drive backplane 1; the orthographic projection of the third common layer 38 on the drive backplane 1 is within the orthographic projection of the second common layer 34 on the drive backplane 1.

[0127] The number of third common layers 38 can be one or more. In some embodiments of this disclosure, the number of third common layers 38 is Y, and along the direction away from the drive backplane 1, the third common layers 38 are numbered sequentially as 1, 2, 3...l-1, l...L, 1≤l≤L; wherein, the orthographic projection of the third common layer 38 numbered l-1 on the drive backplane 1 is located within the orthographic projection of the third common layer 38 numbered l on the drive backplane 1.

[0128] In some embodiments of this disclosure, at least one third common layer 38 includes a first charge generation layer and a second charge generation layer, which can be used to generate electrons or holes, respectively. The first charge generation layer is disposed between the first light-emitting layer 33 and the second light-emitting layer 37, and the first charge generation layer of multiple light-emitting devices is integrated; the second charge generation layer is disposed between the first charge generation layer and the second light-emitting layer 37, and the second charge generation layer of multiple light-emitting devices is integrated; wherein, the orthographic projection of the first charge generation layer on the driving backplate 1 is located within the orthographic projection of the second charge generation layer on the driving backplate 1.

[0129] The display panel 10 also includes an encapsulation layer 6, which is disposed on the surface of the cover layer 36 away from the driving backplate 1. It can be used to protect each light-emitting device and prevent external water and oxygen from corroding the light-emitting device.

[0130] In some embodiments of this disclosure, thin-film encapsulation (TFE) can be used for encapsulation. Specifically, the encapsulation layer 6 may include a first inorganic layer, an organic layer, and a second inorganic layer. The first inorganic layer is disposed on the surface of the cover layer 36 away from the drive backplate 1. The organic layer may be disposed on the surface of the first inorganic layer away from the drive backplate 1, and the boundary of the organic layer is defined inside the boundary of the first inorganic layer; that is, the orthographic projection of the organic layer on the drive backplate 1 lies within the orthographic projection of the first inorganic layer on the drive backplate 1. The second inorganic layer covers the organic layer and the first inorganic layer not covered by the organic layer. The second inorganic layer can block water and oxygen intrusion, and the flexible organic layer achieves planarization. The orthographic projection of the cover layer 36 on the drive backplate 1 lies within the orthographic projection of the first inorganic layer on the drive backplate 1.

[0131] like Figure 12 and Figure 13As shown, in some embodiments of this disclosure, the display panel 10 has a region to be vapor-deposited 103 and a non-vapor-deposited region 104 located around the region to be vapor-deposited 103. The first common layer 32 and the second common layer 34 are both located in the region to be vapor-deposited 103. The display panel 10 also includes isolation pillars 5 disposed on the side of the pixel definition layer 2 away from the driving backplate 1, such as multiple first isolation pillars 51 and multiple second isolation pillars 52. The first isolation pillars 51 are located in the region to be vapor-deposited 103, and the second isolation pillars 52 are located in the non-vapor-deposited region 104. The height of the second isolation pillars 52 is greater than the height of the first isolation pillars 51. The heights of the first isolation pillars 51 and the second isolation pillars 52 can be set according to actual conditions. In one embodiment of this disclosure, the height of the first isolation pillar 51 is 1-3 μm, and the height of the second isolation pillar 52 can be 0.1-5 μm higher than the height of the first isolation pillar 51, but is not limited thereto.

[0132] The vapor deposition area 103 includes a display area 101 and a non-display area 102 located around the display area 101. Of the plurality of first isolation pillars 51, some are located in the display area 101, and some are located in the non-display area 102. The plurality of first isolation pillars 51 can be spaced apart on the side of the pixel definition layer 2 away from the driving backplate 1; the specific distribution and number are not limited. Of the plurality of first isolation pillars 51, the orthographic projection of some first isolation pillars 51 onto the driving backplate 1 overlaps with the orthographic projection of the first common layer 32 or the second common layer 34 onto the driving backplate 1, while the orthographic projection of some first isolation pillars 51 onto the driving backplate 1 does not overlap with the orthographic projection of the first common layer 32 or the second common layer 34 onto the driving backplate 1. Specifically, the orthographic projection of some first isolation pillars 51 onto the driving backplate 1 is located outside the orthographic projection of the first common layer 32 or the second common layer 34 onto the driving backplate 1. The orthographic projection of the second isolation pillar 52 on the drive backplate 1 does not overlap with the orthographic projections of the various vapor-deposited film layers formed in the vapor-deposited area 103, such as the first common layer 32, the second common layer 34, the first light-emitting layer 33, the third common layer 38, the common electrode layer 35, the cover layer 36, and the encapsulation layer 37, on the drive backplate 1.

[0133] The display panel 10 provided in this disclosure can be adopted as follows: Figures 4 to 6 The display panel vapor deposition assembly shown is now complete. The display panel vapor deposition assembly includes at least one first mask 41 and at least one second mask 42. The first mask 41 has a first opening 411 for forming a first common layer 32; the second mask 42 has a second opening 421 for forming a second common layer 34; wherein the opening size of the first opening 411 is smaller than the opening size of the second opening 421.

[0134] The display panel vapor deposition assembly includes at least one first mask 41 and at least one second mask 42. The first mask 41 has a first opening 411, the size of which is smaller than the size of the second opening 421. This helps to prevent the second mask 42 from scraping off the vapor-deposited first common layer 32, thereby improving the quality of the display panel 10.

[0135] The display panel evaporation assembly disclosed herein can be used to evaporate and form an OLED display panel 10. For example... Figure 12 As shown, the display panel 10 has a vapor deposition area 103 and a non-vapor deposition area 104 located around the vapor deposition area 103. The vapor deposition area 103 includes a display area 101 and a non-display area 102. Multiple light-emitting devices are located in the display area 101. Correspondingly, the first common layer 32 and the second common layer 34 are also located in the vapor deposition area 103.

[0136] like Figure 5 , Figure 6 , Figure 7 and Figure 8 As shown, the display panel vapor deposition assembly includes at least one first mask 41 and at least one second mask 42. The first mask 41 is used to vapor deposit a first common layer 32, and the second mask 42 is used to vapor deposit a second common layer 34. The number of first masks 41 is equal to the number of first common layers 32, and the number of second masks 42 is equal to the number of second common layers 34.

[0137] The first mask 41 has a first opening 411. The size of the first opening 411 can be designed according to the size of the corresponding first common layer 32 to be formed. The second mask 42 has a second opening 421, and the opening size of the first opening 411 is smaller than the opening size of the second opening 421. In this disclosure, the opening size of the first opening 411 of each first mask 41 is smaller than the opening size of the second opening 421 of any second mask 42. In this disclosure, the opening size of the first opening 411 being smaller than the opening size of the second opening 421 means that when the vapor deposition alignment is completed, the orthographic projection of the first opening 411 on the driving back plate 1 is located within the orthographic projection of the second opening 421 on the driving back plate 1.

[0138] Reference Figure 1 , Figure 5 and Figure 6The display panel evaporation assembly also includes a base 140, a pressing plate 120, and a magnet plate 110. During evaporation, the display panel 10 to be evaporated enters the evaporation chamber. At this time, the display panel 10 to be evaporated includes a driving backplate 1 and a pixel definition layer 2, but does not include the first common layer 32 and the second common layer 34. When it is necessary to evaporate to form the first common layer 32, the display panel 10 to be evaporated is placed in the evaporation chamber and aligned with the first mask plate 41. After alignment, the pressing plate 120 and the magnet plate 110 descend. Under the action of magnetic force, the first mask plate 41 is drawn upward and tightly adheres to the display panel 10. At this time, the evaporation source 150 begins to evaporate to form the first common layer 32, which is basically the same size and pattern as the first opening 411. After the first common layer 32 is deposited, the display panel 10 to be deposited enters the deposition chamber of the second common layer 34 and aligns with the second mask 42. After alignment, the deposition source 150 begins deposition to form the second common layer 34, which has the same size and pattern as the second opening 421. Since the opening size of the first opening 411 is smaller than the opening size of the second opening 421, the orthographic projection of the deposited first common layer 32 on the drive back plate 1 is within the orthographic projection of the second opening 421 of the second mask 42 on the drive back plate 1. At this time, the second mask 42 does not contact the deposited first common layer 32, so the first common layer 32 will not be scratched off.

[0139] In this disclosure, the number of first common layers 32 can be one or more, and correspondingly, the number of first mask plates 41 can also be one or more. When the number of first mask plates 41 is multiple, the opening size of the first opening 411 of each first mask plate 41 can be different. For example, in some embodiments, the number of first common layers 32 is N, and along the direction away from the driving backplate 1, the numbering of each first common layer 32 is 1, 2, 3...i-1, i...N, 1≤i≤N; the number of first mask plates 41 is M, and the numbering of each first mask plate 41 is 1, 2, 3...j-1, j...M, 1≤j≤M, M=N; wherein, the first mask plate 41 numbered j is applied to form the first common layer 32 numbered i, i=j; the opening size of the first opening 411 of the first mask plate 41 numbered j-1 is smaller than the opening size of the first opening 411 of the first mask plate 41 numbered j.

[0140] For example, there are three first common layers 32, numbered 1, 2, and 3 sequentially along the direction away from the driving backplane 1. The first common layer 32 numbered 1 can be a hole injection layer, the first common layer 32 numbered 2 can be a hole transport layer, and the first common layer 32 numbered 3 can be an electron blocking layer. Correspondingly, there are three first masks 41, numbered 1, 2, and 3 sequentially. The first mask 41 numbered 1 is used to form the hole injection layer, the first mask 41 numbered 2 is used to form the hole transport layer, and the first mask 41 numbered 3 is used to form the electron blocking layer. The opening size of the first opening 411 of the first mask 41 numbered 1 is smaller than the opening size of the first opening 411 of the first mask 41 numbered 2, and the opening size of the first opening 411 of the first mask 41 numbered 2 is smaller than the opening size of the first opening 411 of the first mask 41 numbered 3.

[0141] In this disclosure, the number of second common layers 34 can be one or more, and correspondingly, the number of second mask plates 42 can be one or more. When there are multiple second mask plates 42, the opening size of the second opening 421 of each second mask plate 42 can be different. For example, in some embodiments, the number of second common layers 34 is X, and along the direction away from the driving backplate 1, the numbering of each second common layer 34 is 1, 2, 3...k-1, k...X, 1≤k≤X; the number of second mask plates 42 is Y, and the numbering of each second mask plate 42 is 1, 2, 3...g-1, g...Y, 1≤g≤Y, Y=X; wherein, the second mask plate 42 numbered g is applied to form the second common layer 34 numbered k, g=k; the opening size of the second opening 421 of the second mask plate 42 numbered g-1 is smaller than the opening size of the second opening 421 of the second mask plate 42 numbered g.

[0142] For example, there are three second common layers 34, numbered 1, 2, and 3 sequentially along the direction away from the driving backplane 1. The second common layer 34 numbered 1 can be a hole blocking layer, the second common layer 34 numbered 2 can be an electron transport layer, and the second common layer 34 numbered 3 can be an electron injection layer. Correspondingly, there are three second masks 42, numbered 1, 2, and 3 sequentially. The second mask 42 numbered 1 is used to form the hole blocking layer, the second mask 42 numbered 2 is used to form the electron transport layer, and the second mask 42 numbered 3 is used to form the electron injection layer. The opening size of the second opening 421 of the second mask 42 numbered 1 is smaller than the opening size of the second opening 421 of the second mask 42 numbered 2, and the opening size of the second opening 421 of the second mask 42 numbered 2 is smaller than the opening size of the second opening 421 of the second mask 42 numbered 3.

[0143] like Figure 5 , Figure 6 and Figure 9 As shown, the display panel vapor deposition assembly also includes a third mask 43. The third mask 43 has a third opening 431, which includes a dividing portion 4311 and a plurality of sub-openings 4312 divided by the dividing portion 4311. The plurality of sub-openings 4312 are used to form the first light-emitting layer 33 of each light-emitting device. The opening size of the first opening 411 of each first mask 41 is smaller than the opening size of the third opening 431, and the opening size of the second opening 421 of each second mask 42 is larger than the opening size of the third opening 431. That is, after the vapor deposition alignment is completed, the orthographic projection of the first opening 411 of any first mask 41 on the driving back plate 1 is within the orthographic projection of the third opening 431 on the driving back plate 1, and the orthographic projection of the third opening 431 on the driving back plate 1 is located within the orthographic projection of the second opening 421 of any second mask 42 on the driving back plate 1.

[0144] like Figure 5 , Figure 6 and Figure 10 As shown, in some embodiments of this disclosure, the display panel vapor deposition assembly further includes a fourth mask 44, which has a fourth opening 441 for forming a common electrode layer 35. The opening size of the second opening 421 of each second mask 42 is smaller than the opening size of the fourth opening 441. That is, after vapor deposition alignment, the orthographic projection of the second opening 421 of any second mask 42 onto the driving backplate 1 is within the orthographic projection of the fourth opening 441 onto the driving backplate 1.

[0145] like Figure 5 , Figure 6 and Figure 11 As shown, in some embodiments of this disclosure, the display panel vapor deposition assembly further includes a fifth mask 45, which has a fifth opening 451 for forming a cover layer 36; wherein the opening size of the fourth opening 441 is smaller than the opening size of the fifth opening 451. That is, after the vapor deposition alignment is completed, the orthographic projection of the fourth opening 441 on the driving backplate 1 is located within the orthographic projection of the fifth opening 451 on the driving backplate 1.

[0146] Furthermore, the area difference between the first opening 411 and the third opening 431 is A1, the area difference between the third opening 431 and the second opening 421 is A2, the area difference between the second opening 421 and the fourth opening 441 is A3, and the area difference between the fourth opening 441 and the fifth opening 451 is A4; wherein A1, A2, and A4 are all less than A3. The area difference between each opening can be determined based on the distance between the outer edges of each vapor-deposited film layer of the display panel 10. When the opening difference between the second opening 421 and the fourth opening 441 is larger, it facilitates the connection between the common electrode layer 35 and the driving circuit.

[0147] like Figure 18 As shown, in some embodiments of this disclosure, the display panel vapor deposition assembly further includes a sixth mask 46 and at least one seventh mask 47. The structure of the sixth mask 46 can be referred to that of the third mask 43. The sixth mask 46 has a sixth opening 461, which includes a dividing portion and a divided portion that is further divided into multiple sub-openings. Each sub-opening is used to form the second light-emitting layer 37 of each light-emitting device. The opening size of the third opening 431 of the third mask 43 may be smaller than the opening size of the sixth opening 461.

[0148] The seventh mask 47 has a seventh opening 471, and the seventh mask 47 can be used to form the third common layer 38. There can be multiple seventh masks 47, specifically the same number as the number of third common layers 38. When there are multiple seventh masks 47, the opening size of the seventh opening 471 of each seventh mask 47 can be different. For example, in some embodiments, the number of third common layers 38 is L, and along the direction away from the driving backplate 1, the numbering of each third common layer 38 is 1, 2, 3...l-1, l...L, 1≤l≤L, and the numbering of each seventh mask 47 is 1, 2, 3...h-1, h...H, 1≤h≤H, H=L; wherein, the seventh mask 47 numbered h is applied to form the second common layer 38 numbered l, h=l; the opening size of the seventh opening 471 of the seventh mask 47 numbered h-1 is smaller than the opening size of the seventh opening 471 of the seventh mask 47 numbered h.

[0149] For example, there are two third common layers 38, numbered 1 and 2 respectively along the direction away from the driving backplane 1. The third common layer 38 numbered 1 can be the first charge generation layer, and the third common layer 38 numbered 2 can be the second charge transport layer. Correspondingly, there are two seventh masks 47, numbered 1 and 2 respectively. The seventh mask 47 numbered 1 is used to form the first charge generation layer, and the seventh mask 47 numbered 2 is used to form the second charge generation layer. The opening size of the seventh opening 471 of the seventh mask 47 numbered 1 is smaller than the opening size of the seventh opening 471 of the seventh mask 47 numbered 2.

[0150] Furthermore, the display panel evaporation assembly may also include a ninth mask for forming the light-emitting auxiliary layer 39. The structure of the ninth mask can be referenced from that of the third mask 43. The ninth mask has a ninth opening, which includes a dividing portion and a portion divided into multiple sub-openings. Each sub-opening is used to form the light-emitting auxiliary layer 39 of each light-emitting device. The size of the ninth opening of the ninth mask may be smaller than the size of the third opening 431. The size of the first opening 411 of the first mask 41 may be smaller than the size of the ninth opening of the ninth mask.

[0151] like Figure 12 and Figure 13 As shown, in the display panel provided in this disclosure, the height h2 of the second isolation column 52 is greater than the height h1 of the first isolation column 51. In practical applications, during the relative movement between the display panel 10 and the mask template, such as when the mask template is aligned with the display panel 10 to be vapor-deposited or when the display panel 10 to be vapor-deposited leaves the chamber, the magnet plate 110 and the pressing plate 120 will first lift up to cancel the magnetic force. Since the second isolation post 52 in this disclosure is higher than the first isolation post 51, after the magnetic force is canceled, the first isolation post 51 will detach from the mask template under the counter-support force of the second isolation post 52. On the one hand, this can better avoid the film sticking. On the other hand, during the movement of the display panel 10 to be vapor-deposited, only the second isolation post 52 may contact the mask template. The first isolation post 51 in other positions will not be able to contact the mask template due to the presence of the second isolation post 52. Therefore, it can improve the problem of the vapor-deposited material on the first isolation post 51 being scratched off due to the mutual movement between the display panel 10 and the mask template. Moreover, since the second isolation post 52 is located in the non-vapor-deposited area 104, the vapor-deposited material will not be scratched off in this area due to the presence of the second isolation post 52. Figure 12 The diagram only schematically shows the state of the second mask 42 under magnetic force elimination. Other masks can be referred to in the diagram, but will not be described in detail.

[0152] When alignment is complete and vapor deposition is performed, the magnet plate 110 and the pressing plate 120 descend under magnetic force, while the mask is lifted upwards and tightly adheres to the display panel 10. All isolation posts 5, including the first isolation post 51 and the second isolation post 52, still provide support for the mask. Specifically, as follows... Figure 13 The image shows the bonding diagram between the second mask 42 and the display panel 10 during vapor deposition. This prevents the vapor-deposited film layer in the vapor deposition area from rubbing against the mask, avoiding material detachment and ensuring the display quality and packaging quality of the display panel 10.

[0153] For example, the first mask 41 is used to vapor-deposit the first common layer 32, and the second mask 42 is used to vapor-deposit the second common layer 34. The first mask 41 has a first opening 411, and the second mask 42 has a second opening 421. During vapor deposition, the display panel 10 to be vapor-deposited enters the vapor deposition chamber. At this time, the display panel 10 to be vapor-deposited includes a driving backplate 1 and a pixel definition layer 2, but does not include the first common layer 32 and the second common layer 34. When it is necessary to vapor-deposit the first common layer 32, the display panel 10 to be vapor-deposited is placed in the vapor deposition chamber of the first common layer 32 and aligned with the first mask 41. After alignment, the pressing plate 120 and the magnet plate 110 descend. Under the action of magnetic force, the first mask 41 is drawn upward and tightly adheres to the display panel 10. At this time, the vapor deposition source 150 begins to vapor-deposit the first common layer 32, which is basically the same size and pattern as the first opening 411. After the first common layer 32 is deposited, the display panel 10 to be deposited enters the deposition chamber of the second common layer 34 and is aligned with the second mask 42 for deposition. After alignment, the deposition source 150 begins deposition to form the second common layer 34, which has the same size and pattern as the second opening 421. Since the height of the second isolation pillar 52 is greater than the height of the first isolation pillar 51, during alignment, the second isolation pillar 52 located in the non-deposition area 104 contacts the second mask 42, while the first isolation pillar 51 located in the deposition area does not contact the second mask 42. Thus, regardless of the size relationship between the first opening 411 and the second opening 421, the first common layer 32 deposited on the first isolation pillar 51 will not be scratched by the second mask 42. In addition, the higher second isolation pillar 52 helps to better prevent the display panel 10 from sticking to the mask.

[0154] like Figure 5 , Figure 12 and Figure 13As shown, this disclosure also provides a display panel 10 having a deposition area 103 and a non-deposition area 104 located around the deposition area 103; the display panel 10 includes a driving backplate 1, a pixel definition layer 2, a first isolation pillar 51, and a second isolation pillar 52. The pixel definition layer 2 is disposed on one side of the driving backplate 1; the first isolation pillar 51 and the second isolation pillar 52 are disposed on the side of the pixel definition layer 2 away from the driving backplate 1. The first isolation pillar 51 is located in the deposition area 103, and the second isolation pillar 52 is located in the non-deposition area 104. The height of the second isolation pillar 52 is greater than the height of the first isolation pillar 51. The heights of the first isolation pillar 51 and the second isolation pillar 52 can be set according to actual conditions. In one embodiment of this disclosure, the height of the first isolation pillar 51 is 1-3 μm, and the height of the second isolation pillar 52 can be 0.1-5 μm higher than the height of the first isolation pillar 51, but is not limited thereto.

[0155] The area to be vapor-deposited 103 includes a display area 101 and a non-display area 102 located around the display area 101; among the plurality of first isolation pillars 51, some of the first isolation pillars 51 are located in the display area 101, and some of the first isolation pillars 51 are located in the non-display area 102. The plurality of first isolation pillars 51 can be distributed at intervals on the side of the pixel definition layer 2 away from the driving backplate 1, and the specific distribution method and number are not limited.

[0156] The display panel 10 disclosed herein has a second isolation post 52 with a height h2 greater than the first isolation post 51 with a height h1. In practical applications, during the relative movement between the display panel 10 and the mask template, such as when the mask template is aligned with the display panel 10 to be vapor-deposited or when the display panel 10 to be vapor-deposited leaves the chamber, the magnet plate 110 and the pressing plate 120 will first lift up to cancel the magnetic force. Since the second isolation post 52 in this disclosure is higher than the first isolation post 51, after the magnetic force is canceled, the first isolation post 51 will detach from the mask template under the counter-support force of the second isolation post 52. On the one hand, this can better avoid the film sticking. On the other hand, during the movement of the display panel 10 to be vapor-deposited, only the second isolation post 52 may contact the mask template. The first isolation post 51 in other positions will not be able to contact the mask template due to the presence of the second isolation post 52. Therefore, it can improve the problem of the vapor-deposited material on the first isolation post 51 being scratched off due to the mutual movement between the display panel 10 and the mask template. Moreover, since the second isolation post 52 is located in the non-vapor-deposited area 104, the vapor-deposited material will not be scratched off in this area due to the presence of the second isolation post 52.

[0157] like Figure 4 , Figure 5 and Figure 14 As shown, this disclosure also provides a method for manufacturing a display panel, including the following steps:

[0158] Step S100: Provide the drive backplane 1;

[0159] Step S200: A plurality of first electrodes 31 are formed on one side of the drive backplate 1;

[0160] In step S300, a pixel definition layer 2 is formed on the side of the first electrode 31 away from the driving backplate 1. The pixel definition layer 2 has multiple openings, and each of the multiple openings exposes the first electrode 31 in a corresponding manner.

[0161] In step S400, at least one first common layer 32 is formed on the side of the first electrode 31 and the pixel definition layer 2 away from the driving backplate 1, and each first common layer 32 is a continuous film layer.

[0162] In step S500, at least one second common layer 34 is formed on the side of the first common layer 32 away from the drive backplate 1, and each second common layer 34 is a continuous film layer.

[0163] The orthographic projection of the first common layer 32 on the drive backplane 1 is located within the orthographic projection of the second common layer 34 on the drive backplane 1.

[0164] Each opening in the pixel definition layer 2 defines the area of ​​a light-emitting device. Each light-emitting device includes the first electrode 31, the first common layer 32, and the second common layer 34 described above. The first common layer 32 of multiple light-emitting devices is integrated, and the second common layer 34 of multiple light-emitting devices is integrated.

[0165] In step S400, at least one first common layer 32 is formed on the side of the first electrode 31 and pixel definition layer 2 away from the driving backplate 1. The first mask 41 in the above-mentioned display panel vapor deposition assembly can be used to form the first common layer 32. In step S500, at least one second common layer 34 is formed on the side of the first common layer 32 away from the driving backplate 1. Each second common layer 34 is a continuous film layer. The second mask 42 in the above-mentioned display panel vapor deposition assembly can be used to form the second common layer 34. The specific method can be referred to the above content and will not be described in detail here.

[0166] This disclosure also provides a display device, including a display panel 10. The display panel 10 can be any of the display panels 10 described in the above embodiments. Its specific structure and beneficial effects can be referred to the embodiments of the display panel 10 described above, and will not be repeated here. The display device of this disclosure can be an electronic device such as a mobile phone, tablet computer, or television, which will not be listed here.

[0167] It should be noted that although the steps of the method in this disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in that specific order, or that all the steps shown must be performed to achieve the desired result. Additional or alternative steps, such as omitting certain steps, combining multiple steps into one step, and / or breaking down one step into multiple steps, should all be considered part of this disclosure.

[0168] It should be understood that this disclosure is not limited to the detailed structure and arrangement of the components presented in this specification. This disclosure is capable of other embodiments and can be implemented and performed in various ways. The foregoing variations and modifications fall within the scope of this disclosure. It should be understood that this disclosure, as disclosed and defined in this specification, extends to all alternative combinations of two or more individual features mentioned or apparent in the text and / or drawings. All these different combinations constitute multiple alternative aspects of this disclosure. The embodiments described in this specification illustrate the best known mode for implementing this disclosure and will enable those skilled in the art to utilize this disclosure.

Claims

1. A display panel, characterized in that, The device includes a driving backplate, a pixel definition layer disposed on one side of the driving backplate, and a plurality of light-emitting devices separated by the pixel definition layer. Each light-emitting device includes a first electrode, at least one first common layer, at least one second common layer, and a common electrode layer stacked along a direction away from the driving backplate. The first common layer of the plurality of light-emitting devices is integral, and the second common layer of the plurality of light-emitting devices is integral. In the non-display area of ​​the display panel, the orthographic projection of the first common layer on the driving back panel is located within the orthographic projection of the second common layer on the driving back panel. The light-emitting device further includes: A first light-emitting layer is disposed between the first common layer and the second common layer; The first light-emitting layers of the plurality of light-emitting devices are combined to form a first light-emitting unit layer; In the non-display area of ​​the display panel, the orthographic projection of the first common layer on the driving backplate is located within the orthographic projection of the first light-emitting unit layer on the driving backplate, and the edge of the first common layer is located within the edge of the first light-emitting unit layer, in order to avoid scratching the first common layer during the fabrication of the first light-emitting unit layer; wherein, the edge of the first common layer refers to the edge of the overall coverage area of ​​the first common layer, and the first common layer only covers the area within the edge of the first common layer, and does not cover the area outside the edge of the first common layer; The orthographic projection of the first light-emitting unit layer on the driving backplane is located within the orthographic projection of the second common layer on the driving backplane, and the edge of the first light-emitting unit layer is located within the edge of the second common layer, in order to avoid scraping the first light-emitting unit layer when fabricating the second common layer; wherein, the edge of the first light-emitting unit layer refers to the edge of the overall coverage area of ​​the first light-emitting unit layer, and the first light-emitting unit layer only covers the area within the edge of the first light-emitting unit layer, and does not cover the area outside the edge of the first light-emitting unit layer.

2. The display panel according to claim 1, characterized in that, The number of the first common layers is N. Along the direction away from the drive backplane, the numbers of each first common layer are 1, 2, 3...i-1, i...N, where 1≤i≤N; Wherein, the orthographic projection of the first common layer numbered i-1 on the drive backplane is located within the orthographic projection of the first common layer numbered i on the drive backplane; the edge of the first common layer numbered i-1 is located within the edge of the first common layer numbered i.

3. The display panel according to claim 1, characterized in that, The at least one first common layer includes: A hole injection layer is disposed on the side of the first electrode away from the driving backplate, and the hole injection layer of the plurality of light-emitting devices is integrated; A hole transport layer is disposed on the side of the hole injection layer away from the driving backplate, and the hole transport layer of the plurality of light-emitting devices is integrated. Wherein, the orthographic projection of the hole injection layer on the drive backplane is located within the orthographic projection of the hole transport layer on the drive backplane, and the edge of the hole injection layer is located within the edge of the hole transport layer.

4. The display panel according to claim 3, characterized in that, The at least one first common layer further includes: An electron blocking layer is disposed on the side of the hole transport layer away from the driving backplate, and the electron blocking layer of the plurality of light-emitting devices is integrated. Wherein, the orthographic projection of the hole transport layer on the drive backplane is located within the orthographic projection of the electron blocking layer on the drive backplane; the edge of the hole transport layer is located within the edge of the electron blocking layer.

5. The display panel according to claim 1, characterized in that, The number of the second common layers is X. Along the direction away from the drive backplate, the numbers of each second common layer are 1, 2, 3...k-1, k...X, where 1≤k≤X; Wherein, the orthographic projection of the second common layer numbered k-1 on the drive backplane is located within the orthographic projection of the second common layer numbered k on the drive backplane, and the edge of the second common layer numbered k-1 is located within the edge of the second common layer numbered k.

6. The display panel according to claim 1, characterized in that, The at least one second common layer includes: An electron transport layer is disposed on the side of the first common layer away from the driving backplate, and the electron transport layers of the plurality of light-emitting devices are integrated. An electron injection layer is disposed on the side of the electron transport layer away from the driving backplate, and the electron injection layer of the plurality of light-emitting devices is integrated. Wherein, the orthographic projection of the electron transport layer on the drive backplane is located within the orthographic projection of the electron injection layer on the drive backplane, and the edge of the electron transport layer is located within the edge of the electron injection layer.

7. The display panel according to claim 6, characterized in that, The at least one second common layer further includes: A hole blocking layer is disposed between the first common layer and the electron transport layer, and the hole blocking layers of the plurality of light-emitting devices are integrated. Wherein, the orthographic projection of the hole blocking layer on the drive backplane is located within the orthographic projection of the electron transport layer on the drive backplane, and the edge of the hole blocking layer is located within the edge of the electron transport layer.

8. The display panel according to claim 1, characterized in that, The light-emitting device further includes: A light-emitting auxiliary layer is disposed between the first common layer and the first light-emitting layer; The light-emitting auxiliary layers of the plurality of light-emitting devices are combined to form a light-emitting auxiliary unit layer; Wherein, the orthographic projection of the first common layer on the driving backplane is located within the orthographic projection of the light-emitting auxiliary unit layer on the driving backplane, and the edge of the first common layer is located within the edge of the light-emitting auxiliary unit layer; The orthographic projection of the light-emitting auxiliary unit layer on the driving backplate is located within the orthographic projection of the first light-emitting unit layer on the driving backplate, and the edge of the light-emitting auxiliary unit layer is located within the edge of the first light-emitting unit layer.

9. The display panel according to claim 1, characterized in that, The light-emitting device further includes: The second light-emitting layer is disposed between the first light-emitting layer and the second common layer; At least one third common layer is disposed between the first light-emitting layer and the second light-emitting layer, and the third common layer of the plurality of light-emitting devices is integral; Wherein, the orthographic projection of the first common layer on the drive backplane is located within the orthographic projection of the third common layer on the drive backplane, and the edge of the first common layer is located within the edge of the third common layer; The orthographic projection of the third common layer on the drive backplane is located within the orthographic projection of the second common layer on the drive backplane, and the edge of the third common layer is located within the edge of the second common layer.

10. The display panel according to claim 9, characterized in that, The number of the third common layers is L. Along the direction away from the drive backplate, the numbering of each third common layer is 1, 2, 3...l-1, l...L, where 1≤l≤L; Wherein, the orthographic projection of the third common layer numbered l-1 on the drive backplane is located within the orthographic projection of the third common layer numbered l on the drive backplane, and the edge of the third common layer numbered l-1 is located within the edge of the third common layer numbered l.

11. The display panel according to claim 9, characterized in that, The at least one third common layer includes: A first charge generation layer is disposed between the first light-emitting layer and the second light-emitting layer, wherein the first charge generation layer of the plurality of light-emitting devices is integrated. The second charge generation layer is disposed between the first charge generation layer and the second light-emitting layer, and the second charge generation layer of the plurality of light-emitting devices is integrated. Wherein, the orthographic projection of the first charge generation layer on the drive backplane is located within the orthographic projection of the second charge generation layer on the drive backplane, and the edge of the first charge generation layer is located within the edge of the second charge generation layer.

12. The display panel according to claim 1, characterized in that, The common electrode layer of the plurality of light-emitting devices is integral; In this configuration, the orthographic projection of each of the second common layers onto the drive backplane is located within the orthographic projection of the common electrode layer onto the drive backplane, and the edge of each of the second common layers is located within the edge of the common electrode layer.

13. The display panel according to claim 12, characterized in that, The drive backplane includes a substrate, a drive circuit layer disposed on one side of the substrate, and a planarization layer disposed on the side of the drive circuit layer away from the substrate. The common electrode layer has a central region and an edge region surrounding the central region of the common electrode layer, and at least a portion of the edge region of the common electrode layer is in contact with the driving circuit layer.

14. The display panel according to claim 13, characterized in that, The second common layer has a central region and an edge region surrounding the central region of the second common layer, at least a portion of the edge region of the second common layer being in contact with the planarization layer.

15. The display panel according to claim 12, characterized in that, The light-emitting device further includes: A cover layer is disposed on the side of the common electrode layer away from the driving backplate, and the cover layers of the plurality of light-emitting devices are integral; Wherein, the orthographic projection of the common electrode layer on the drive backplate is located within the orthographic projection of the cover layer on the drive backplate, and the edge of the common electrode layer is located within the edge of the cover layer.

16. The display panel according to claim 15, characterized in that, The display panel further includes an encapsulation layer, which is disposed on the side of the cover layer away from the driving backplane, and the encapsulation layer includes: The first inorganic layer is disposed on the side of the cover layer away from the drive back plate; An organic layer is disposed on the side of the first inorganic layer away from the drive back plate. The orthographic projection of the organic layer on the drive back plate is located within the orthographic projection of the first inorganic layer on the drive back plate, and the edge of the organic layer is located within the edge of the first inorganic layer. The second inorganic layer covers the organic layer and the first inorganic layer that is not covered by the organic layer; Wherein, the orthographic projection of the cover layer on the drive back plate is located within the orthographic projection of the first inorganic layer on the drive back plate, and the edge of the cover layer is located within the edge of the first inorganic layer.

17. The display panel according to claim 1, characterized in that, The display panel has a region to be vapor-deposited and a non-vapor-deposited region located around the region to be vapor-deposited, and the first common layer and the second common layer are both located in the region to be vapor-deposited; The display panel further includes a plurality of first isolation pillars and a plurality of second isolation pillars disposed on the side of the pixel definition layer away from the driving backplate. The first isolation pillars are located in the area to be vaporized, and the second isolation pillars are located in the non-vaporized area. The height of the second isolation pillar is greater than the height of the first isolation pillar.

18. The display panel according to claim 17, characterized in that, The area to be vapor-deposited includes a display area and a non-display area located around the display area; Of the plurality of first isolation pillars, some of the first isolation pillars are located in the display area, and some of the first isolation pillars are located in the non-display area.

19. The display panel according to claim 17, characterized in that, Among the plurality of first isolation pillars, at least a portion of the first isolation pillars do not overlap with the orthographic projection of the first common layer on the drive backplane. Of the plurality of first isolation pillars, at least a portion of the first isolation pillars do not overlap with the orthographic projection of the second common layer on the drive backplane.

20. The display panel according to claim 17, characterized in that, The height of the second isolation column is 0.1-5 μm higher than the height of the first isolation column.

21. A display device, characterized in that, Includes the display panel as described in any one of claims 1-20.

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