Method, system and apparatus for suppressing controller area network bus ringing

Abstract

CAN bus driver slew rate control is used to suppress ringing using bus impedance matching, which is activated only during and shortly after the bus driver unit transitions from driving the bus "dominant" to "recessive." In one embodiment, the bus impedance matching unit is a differential input and differential output operational transconductance amplifier (OTA). This differential OTA sinks or sources ringing current based on the bus differential voltage. In another embodiment, the bus impedance matching unit is a back-to-back pair of RON adjustment transistors along with associated gate control circuitry. The total RON is equal to the CAN bus characteristic impedance.

Description

[0001] This application claims priority to commonly-owned U.S. Provisional Patent Application Serial No. 63 / 081,966, filed on September 23, 2020, entitled “Method, System and Apparatus for Suppressing Controller Area Network Bus Ringing,” and is hereby incorporated by reference herein for all purposes. Technical Field

[0002] The present disclosure relates to a controller area network (CAN) bus interface, and more particularly, to CAN bus ringing suppression with enhanced slew rate control through controlled bus impedance matching. Background Art

[0003] Ringing is a known phenomenon and occurs on the Controller Area Network (CAN) bus during communication, especially when the bus state changes from a "dominant" state to a "recessive" state. The CAN bus uses differential wired-AND signals. The two signals (CAN high (CANH) and CAN low (CANL)) are driven to a "dominant" state where CANH is greater than CANL, or are not driven and pulled by passive resistors to a "recessive" state where CANH is less than or equal to CANL. The CAN bus signal (bus differential voltage) is damaged during bus ringing, resulting in communication failures. As baud rates and network sizes increase, the ringing phenomenon becomes even more difficult to tolerate. In many cases, CAN bus ringing becomes a stumbling block when moving towards higher speed CAN bus communications (e.g., 5 megabits per second or even higher).

[0004] refer to Figure 11 , depicts a signal waveform showing ringing on the CAN bus. Figure 11 Figure 1 shows the CAN bus differential voltage (VCANH - VCANL) in the dominant state and after the bus transitions to the recessive state. The CAN bus signal (bus differential voltage) is corrupted during the bus ringing phase, leading to communication failures. As baud rates and network sizes increase, the ringing phenomenon becomes even more intolerable. When moving toward higher communication data rates (e.g., 5 Mbit / s or even higher), CAN bus ringing is a stumbling block. Summary of the Invention

[0005] Therefore, there is a need for a way to reduce the ringing of the CAN bus signal when transitioning from a "dominant" state to a "recessive" state.

[0006] According to an embodiment, a method for reducing ringing on a controller area network (CAN) bus may include the steps of: providing a CAN transceiver having a CAN bus driver coupled to the CAN bus; and matching the impedance of the CAN bus with an impedance matching unit. According to another embodiment of the method, the impedance matching unit may be connected to the CAN bus when the CAN bus driver is in a CAN bus dominant state, and may be disconnected when the CAN bus driver is in a CAN bus recessive state. According to another embodiment of the method, the impedance matching unit may be coupled to the CAN bus during and shortly after the CAN bus driver transitions from driving the CAN bus from the CAN bus dominant state to the CAN bus recessive state.

[0007] According to another embodiment of the method, the impedance matching unit may include an operational transconductance amplifier (OTA). According to another embodiment of the method, the OTA may include a differential input and a differential output coupled to the CAN bus. According to another embodiment of the method, the impedance matching unit may include back-to-back connections R ON Adjusting the transistor pair and the gate control circuit. According to another embodiment of the method, the step of controlling the slew rate of the CAN bus driver to reduce high frequency signals on the CAN bus may be included. According to another embodiment of the method, the step of controlling the slew rate of the CAN bus driver may include the step of sequentially disabling a plurality of current sources comprising the CAN bus driver.

[0008] According to another embodiment of the method, the step of sequentially disabling the plurality of current sources may include a plurality of delay lines coupled in series and coupled to corresponding current sources in the plurality of current sources, wherein the disable signal may be delayed through each of the plurality of delay lines and delayed to the corresponding current source in the plurality of current sources. According to another embodiment of the method, the step of controlling the slew rate of the CAN bus driver may include the step of sequentially opening a plurality of parallel-connected resistive switches comprising the CAN bus driver. According to another embodiment of the method, the step of sequentially opening the plurality of resistive switches includes a plurality of delay lines coupled in series and coupled to corresponding resistive switches in the plurality of resistive switches, wherein the disable signal may be delayed through each of the plurality of delay lines and delayed to the corresponding resistive switches in the plurality of resistive switches.

[0009] According to another embodiment, a system for reducing ringing on a controller area network (CAN) bus may include: a CAN SIC (Signal Improvement Capability) transceiver having a CAN bus driver coupled to the CAN bus; and an impedance matching unit selectively coupled to the CAN bus. According to another embodiment, the impedance matching unit may be selectively coupled to the CAN bus during and shortly after the CAN bus driver transitions from a dominant state to a recessive state.

[0010] According to another embodiment, the impedance matching unit may include an operational transconductance amplifier (OTA). According to another embodiment, the OTA may include a differential input and a differential output coupled to the CAN bus. According to another embodiment, the impedance matching unit may include a back-to-back connection R ON According to another embodiment, a slew rate circuit for controlling the slew rate of the CAN bus driver may be included, thereby reducing high frequency signals on the CAN bus.

[0011] According to another embodiment, the slew rate circuit may include: a plurality of current sources coupled in parallel; and a plurality of delay lines coupled in series and coupled to corresponding current sources among the plurality of current sources, wherein an enable signal may be delayed through each of the plurality of delay lines and delayed to a corresponding current source among the plurality of current sources.

[0012] According to another embodiment, the slew rate circuit may include: a plurality of resistive switches coupled in parallel; and a plurality of delay lines coupled in series and coupled to corresponding resistive switches among the plurality of resistive switches, wherein an enable signal may be delayed through each of the plurality of delay lines and delayed to a corresponding resistive switch among the plurality of resistive switches.

[0013] According to another embodiment, an apparatus for reducing ringing on a controller area network (CAN) bus may include: a CAN bus driver for driving the CAN bus; and an impedance matching unit for selectively coupling to the CAN bus. According to another embodiment, the impedance matching unit may include an operational transconductance amplifier (OTA). According to another embodiment, the impedance matching unit may include back-to-back connections R ON Regulating transistor pair and gate control circuit According to another embodiment, a slew rate circuit for controlling the slew rate of the CAN bus driver may be included.

[0014] According to another embodiment, the slew rate circuit may include: a plurality of current sources coupled in parallel; and a plurality of delay lines coupled in series and coupled to corresponding current sources among the plurality of current sources, wherein a disable signal may be delayed through each of the plurality of delay lines and delayed to a corresponding current source among the plurality of current sources.

[0015] According to another embodiment, the slew rate circuit may include: a plurality of resistive switches coupled in parallel; and a plurality of delay lines coupled in series and coupled to corresponding resistive switches among the plurality of resistive switches, wherein a disable signal may be delayed through each of the plurality of delay lines and delayed to a corresponding resistive switch among the plurality of resistive switches. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] A more complete understanding of the present disclosure may be obtained by referring to the following description taken in conjunction with the accompanying drawings, in which:

[0017] Figure 1 shows a schematic diagram of a CAN transceiver output stage (back-to-back transistor pair for bus impedance matching) according to certain exemplary embodiments of the present disclosure;

[0018] Figure 2 shows a schematic diagram of a CAN transceiver output stage implemented as an operational transconductance amplifier (OTA) according to certain exemplary embodiments of the present disclosure;

[0019] Figure 3A and Figure 3B shows a schematic diagram of a test circuit for verifying ringing suppression techniques according to the teachings of the present disclosure;

[0020] Figure 4 shows signal waveforms of CAN bus signals with and without slew rate control and bus impedance matching disabled according to the teachings of the present disclosure;

[0021] Figure 5 shows signal waveforms of CAN bus signals with and without slew rate control according to the teachings of the present disclosure;

[0022] Figure 6 shows signal waveforms of CAN bus signals with and without controlled bus impedance matching (back-to-back transistor pairs) according to the teachings of the present disclosure;

[0023] Figures 7 to 9 A schematic diagram showing a typical prior art transmission line termination;

[0024] Figure 10 shows a schematic simulation waveform of an ideal CAN bus signal;

[0025] Figure 11shows a signal waveform illustrating ringing on the CAN bus;

[0026] Figure 12 shows a schematic block diagram of a current-based bus driver and slew rate control according to certain exemplary embodiments of the present disclosure;

[0027] Figure 13 A schematic block diagram illustrating a voltage-based bus driver and slew rate control according to certain exemplary embodiments of the present disclosure;

[0028] Figure 14 shows a schematic diagram and gain characteristics of an OTA for CAN bus impedance matching according to a certain exemplary embodiment of the present disclosure;

[0029] Figure 15 A schematic block diagram of a circuit for gate-adjusting a back-to-back connected transistor pair for CAN bus impedance matching according to certain exemplary embodiments of the present disclosure is shown;

[0030] Figure 16 shows a schematic block diagram of an impedance matching window generation circuit according to certain exemplary embodiments of the present disclosure; and

[0031] Figure 17 shows a specific exemplary embodiment according to the present disclosure Figure 16 Schematic signal waveform timing diagram of the impedance matching window generation circuit shown in .

[0032] While the present disclosure is susceptible to various modifications and alternative forms, specific exemplary embodiments thereof have been shown in the drawings and described in detail herein. However, it should be understood that the description herein of specific exemplary embodiments is not intended to limit the disclosure to the form disclosed herein. DETAILED DESCRIPTION

[0033] High-frequency digital CAN bus signals and increased CAN bus network cable lengths are causing CAN bus cables (twisted pairs) to act more and more like transmission lines. Impedance mismatches in the CAN bus lead to wave reflections, which ultimately cause signal ringing. Therefore, reducing high-frequency signals and using bus impedance matching are two methods that can be used to help reduce signal wave reflections and, in turn, suppress ringing. According to the teachings of the present disclosure and the protection claimed herein, bus driver slew rate control is presented to effectively reduce high-frequency signals on the CAN bus. In addition, two types of bus impedance matching units are presented that can be used in integrated CAN bus transceivers to match the CAN bus transceiver output impedance to the CAN bus impedance. The bus impedance matching unit is only activated during and a short period after the CAN bus transceiver's driver transitions from driving the CAN bus from dominant mode to recessive mode. In this way, additional DC power loss on the CAN bus and the impact on the differential bus impedance are limited.

[0034] The first implementation of the bus impedance matching unit is a differential input and differential output operational transconductance amplifier (OTA). ON The regulating transistor pair, along with its gate control-related circuitry, represents the second type of impedance matching element disclosed herein. A differential OTA can sink or source ringing current based on the bus differential voltage, and preferably, the OTA's gain, gm, should be equal to 1 / (bus characteristic impedance). The regulating transistor pair, along with its gate control-related circuitry, should preferably provide a total R equal to the bus characteristic impedance when activated. Both bus-driven slew rate control and controlled bus impedance matching can be applied in combination or separately.

[0035] Referring now to the drawings, there are schematically shown details of exemplary embodiments. Like elements in the drawings will be represented by like numerals, and similar elements will be represented by like numerals with different lower case letter suffixes.

[0036] refer to Figure 1 , depicts a schematic diagram of a CAN SIC transceiver output stage (back-to-back transistor pair for bus impedance matching) according to a specific exemplary embodiment of the present disclosure. The output stage of a CAN SIC (Signal Improvement Capability) transceiver with the described technology for suppressing CAN bus ringing is applied. The output stage of the CAN SIC transceiver is also referred to as a "CAN bus driver" in this article. U1 and U2 represent two CAN bus drivers that support slew rate control. The gate control unit U3, MOSFET (e.g., insulated gate) Q1 and Q2 represent a controlled bus impedance matching circuit implemented as a back-to-back connected transistor pair Q1, Q2 and its gate control unit U3 responsible for controlling the gate voltage of Q1 and Q2. The current and voltage based bus drivers U1 and U2 are respectively Figure 12 and Figure 13 is more fully disclosed in and described below.

[0037] refer to Figure 2 , depicts a schematic diagram of a CAN SIC transceiver output stage according to a certain exemplary embodiment of the present disclosure, wherein OTA U4 is implemented to replace Figure 1 The CAN bus impedance matching can also be achieved by using the following methods: Figure 2 The controlled differential input / output OTA U4 shown in FIG. Figure 1 and Figure 2 The bus impedance matching enable / control signal ("SIG_EN") is shown to be generated by the bus driver unit U1 / U2, as the control signal can be derived from the driver control. Figure 16 and Figure 17 The operation of generating the SIG_EN signal is shown in FIG. “SIG_EN” is “V_WINDOW”.

[0038] refer to Figure 3A and Figure 3B , depicts a schematic diagram of a test circuit for verifying ringing suppression techniques according to the teachings of the present disclosure. The techniques disclosed herein have been verified within a simulation test bench as shown in FIG3 . The test network was configured according to the “CiA 601 Draft Standard Protocol Version 2.0.0 (September 6, 2019)” obtained from the CAN Automation Association (CAN in Automation eV) in Nuremberg, Germany.

[0039] refer to Figure 4 , depicts signal waveforms of CAN bus signals with and without slew rate control and bus impedance matching disabled according to the teachings of the present disclosure. Figure 4 The dashed signal waveforms 402 and 404 (CAN bus signals CANL and CANH, respectively) in the figure show the test signal waveforms when both slew rate control and bus impedance matching are disabled. The solid signal waveforms 402a and 404a in the first row represent the CAN bus signals CANL and CANH, respectively, when slew rate control is enabled. After transitioning from the dominant state to the recessive state, ringing appears on the CAN bus. The signal waveforms 406 and 406a on the second row represent the differential bus voltages without and with slew rate control, respectively. In the dominant state, the peak amplitude is approximately 2.5 volts in this simulation. In the recessive state, the differential voltage can swing from -18 volts to +18 volts. The signal waveform 408 in the third row represents the bus driver control voltage VGATE_CTRL of U1. The gate control voltage transition time can be approximately 30 nanoseconds (ns). Figure 4The effect of slew rate control on reducing ringing is shown in . The signal waveforms 406 and 406a in the second row show that the maximum swing of the differential CAN bus voltage has been reduced from + / - 18V to approximately + / - 12V.

[0040] refer to Figure 5 , depicts signal waveforms of CAN bus signals with and without slew rate control according to the teachings of the present disclosure. Figure 5 The CAN bus signal waveforms 502 and 504 shown on the first row represent the CANL and CANH signals respectively without slew rate control, and the signal waveforms 502a and 504a with slew rate control are shown. Figure 5 As shown, when slew rate control is activated, the transition from dominant to recessive state has been slowed down to about 50ns.

[0041] refer to Figure 6 , depicts signal waveforms of CAN bus signals with and without controlled bus impedance matching according to the teachings of the present disclosure. Figure 6 The test results are shown when both slew rate control and controlled bus impedance matching (back-to-back connected transistors) are activated. As shown by the signal waveform 610 on the first row, the controlled bus impedance matching is activated for approximately 360 ns, thereby initiating the transition from the dominant state to the recessive state. The differential bus voltage ringing (waveforms 602a and 604a) is almost completely suppressed by the first negative peak of less than negative one (-1) volt. The positive effect of CAN bus ringing suppression via slew rate control and controlled bus impedance matching using back-to-back connected transistor pairs or controlled differential input / output OTA circuit configurations has been verified via a simulation test bench and simulation results. The OTA circuit and transistor pair Q1, Q2 are "controlled" in that they are only enabled for a limited time window and are disabled otherwise.

[0042] refer to Figures 7 to 9 , depicts a typical prior art transmission line termination diagram. Transmission line termination is a common technique used to reduce reflections on transmission lines. High-speed CAN bus networks use twisted-pair cables. Therefore, in theory, common transmission line differential signal termination techniques can be applied to suppress ringing on the CAN bus. Figure 7 As shown in Figure 1, serial terminal is a common terminal configuration. The terminal resistor (Rs) is selected so that its value plus the output impedance of the driver equals the characteristic impedance of the cable (for example, 120 ohms in the case of CAN bus). However, Figure 7The serial terminal configuration shown in Figure 1 is not suitable for use with the CAN bus. In the dominant state, the CAN transceiver's output impedance plus Rs needs to be sufficiently lower than the 60-ohm bus differential resistance to produce the requested differential voltage on the CAN bus. On the other hand, the CAN transceiver's output impedance becomes very high (kilo-ohms) in the recessive state, dominating the transceiver's output impedance. Compared to the transceiver's output impedance in the recessive state, the termination resistor Rs becomes negligible and has no effect.

[0043] Figure 8 A second type of transmission line termination, known as a "parallel termination configuration," is shown. An appropriate parallel termination resistor, R T This can help to substantially eliminate reflections. However, the power dissipated by the driver also substantially increases with the parallel connected resistor R T This represents a major disadvantage of this termination configuration. The parallel termination resistors also affect the bus differential resistance (typically 60 ohms), which makes parallel termination unsuitable for CAN buses. Figure 9 The AC termination shown in is another type of transmission line termination that minimizes DC circulating current (driver power dissipation). At high frequencies, capacitor C T It acts as a short circuit and effectively connects only the terminating resistor to the bus. At low frequencies, the capacitor has a high impedance that prevents DC circulating current. The main disadvantage of this configuration is the size of the capacitor. It is not practical to integrate the capacitor into an integrated circuit. In addition, the capacitor C T The capacitance of the capacitor C has a negative impact on the network capacitance. T The value of depends on the network size (cable length), and it is difficult to fix the value of the integrated capacitor for all possible network sizes.

[0044] refer to Figure 10 , depicts a schematic simulation waveform of an ideal CAN bus signal. Ringing is a known phenomenon that occurs on the CAN bus during CAN communication, especially when the bus state changes from the "dominant" state to the "recessive" state. Figure 10 The ideal CAN bus signal is shown. In normal operation, the bus dominant state differential voltage should be between 0.9 volts and 5 volts. In the recessive state, the bus differential signal should be between -1 volt and 0.5 volts.

[0045] The high frequency of digital CAN bus signals, combined with the increasing length of cables used in CAN bus networks, has caused CAN bus cables (twisted pair in common mode) to function increasingly like transmission lines. Impedance mismatches in CAN bus connectors and long ferrules (unrestricted) lead to wave reflections, which ultimately cause signal ringing. Therefore, reducing high-frequency waveform components by controlling signal transition times and bus impedance matching to reduce high-frequency signals are two methods that can help reduce reflections and, in turn, suppress signal ringing.

[0046] refer to Figure 12 , depicts a schematic block diagram of a current-based bus driver and slew rate control according to certain exemplary embodiments of the present disclosure. Multiple series-connected delay lines 1220 can be used to sequentially enable multiple parallel-coupled current sources 1222, thereby ramping and driving current to the CAN bus in a controlled manner.

[0047] refer to Figure 13 , depicts a schematic block diagram of a voltage-based bus driver and slew rate control according to certain exemplary embodiments of the present disclosure. A plurality of series-connected delay lines 1320 may be used to sequentially enable a plurality of parallel-coupled transistor switches 1322 (1 to N) to ramp up and drive current to the CAN bus in a controlled manner by reducing the resistance between VBIAS and the CANH (and / or CANL) bus. Figure 13 A voltage-based bus driver is shown, constructed as a set of parallel-connected transistor switches 1 to N. Each switch 1 to N has a resistance R sw . Slew rate control can be achieved by sequentially turning on or off the transistor switches 1322 (1 to N), thereby varying the resistance R sw of the parallel-connected switches. The transistor switches 1 to N are each enabled when the corresponding control input is in a first state (shown as a high state) and are each disabled when the corresponding control input is in a second state (shown as a low state).

[0048] Return Reference Figure 1 , conceptually shows the output stage of a CAN SIC (Signal Improvement Capability) transceiver when the described technique for suppressing CAN bus ringing is applied. U1 and U2 represent two bus drivers supporting slew rate control. U3, Q1 and Q2 represent a circuit for controlled bus impedance matching implemented as a back-to-back connected transistor pair and its gate control unit U3. This bus impedance matching can also be achieved by Figure 2 This is achieved by the controlled OTA shown in the figure. Figure 1 and Figure 2As shown, the bus impedance matching enable / control signal ("SIG_EN") is generated by the bus driver units U1 / U2, as the bus impedance matching control signal to Q1 and Q2 is derived from the gate control unit U3.

[0049] The core concept of bus driver slew rate control is to control the speed of voltage change (dv / dt) on CANH and CANL during bus state transitions in a way that reduces high-frequency signals on the bus. The implementation of slew rate control depends on the type / topology of the bus driver. Figure 1 and Figure 2 U1 and U2 in the example may be current-based bus drivers constructed as follows: Figure 12 A set of parallel-connected current sources 1 to N is shown, each of which is enabled when the corresponding control input is in a first state (shown as a high state) and disabled when the corresponding control input is in a second state (shown as a low state). During the transition from driving the CAN bus dominant to driving the CAN bus recessive, the current sources are successively disabled, which slows down the change in the driver output impedance and reduces the dv / dt at the bus node. Minimum dv / dt at the bus node can preferably be configured in a manner that does not cause communication failures on all receiver sides.

[0050] refer to Figure 14 , depicts a schematic diagram and gain characteristics of an OTA for CAN bus impedance matching according to certain exemplary embodiments of the present disclosure. Two types of bus impedance matching units are described herein that can be used with an integrated CAN transceiver to match the transceiver output impedance to the bus impedance. One of the two types is a bus impedance matching unit that includes a differential input and differential output operational transconductance amplifier (OTA) 1420, whose gain is designed to be substantially equal to 1 / (bus characteristic impedance). Figure 14 The diagram on the left shows how to connect the OTA 1420 to CANH and CANL. POS_IN and NEG_IN are arranged to measure the differential voltage on the CAN bus. POS_OUT and NEG_OUT are arranged to sink or source current to the CAN bus when the OTA 1420 is activated.

[0051] OTA 1420 will only be active within a certain impedance matching window defined by the V_WINDOW signal ( Figure 14 The right half of ). A V_WINDOW signal can be generated, such as Figure 16When the OTA 1420 is deactivated, it should present a high impedance to the CAN bus at both the input and output. In addition, preferably, the OTA 1420 circuit is designed so that its gain decreases as its differential input voltage becomes larger.

[0052] The current injected into the CAN bus through the driver node is limited by the differential bus voltage and the differential bus resistance. When multiple nodes are impedance matched simultaneously, the total differential bus resistance decreases. The current injected into the bus then increases. The increased current from the driver node can cause problems such as overtemperature shutdown at the driver node. With OTA-based bus impedance matching, the OTA gain begins to decrease when the bus differential voltage increases, as shown in Figure 2. Figure 14 This is equivalent to an increase in the bus impedance matching resistor, and this increase prevents the total bus differential resistance from decreasing too much. Therefore, once the bus differential voltage reaches a certain level, the current injected by the driver node is limited, and overtemperature issues on the driver node can be avoided.

[0053] This feature can be used to passively protect the CAN bus driving node from overload when multiple nodes are performing bus impedance matching and one node attempts to drive the bus to a dominant state. However, in this case, the performance of the bus impedance matching unit will also be degraded because the bus impedance matching is inhibited when the input differential voltage becomes high. Therefore, the performance of the bus impedance matching is closely related to the level at which the gain of the OTA begins to decrease and how quickly the gain decreases (e.g., Figure 14 as shown) becomes a trade-off in the design.

[0054] refer to Figure 15 , depicts a circuit for gate regulating a back-to-back connected transistor pair for CAN bus impedance matching according to certain exemplary embodiments of the present disclosure. Figure 15 A gate-adjusted back-to-back connected transistor pair 1522, 1524 for bus impedance matching is shown. The back-to-back connected transistor pair 1522, 1524 will preferably have a total R when they are activated that is equal to the bus characteristic impedance. ON . The temperature sensor 1526 provides the temperature information of the transistor pair 1522, 1524 to the gate voltage control block 1528, where temperature compensation can be performed. The RON of the transistor pair 1522, 1524 has a defined temperature coefficient, which is known in the design. By controlling the gate voltage of the transistor pair 1522, 1524, the temperature coefficient can be compensated. For example, in order to compensate for the positive temperature coefficient of the transistor RON, the gate voltage needs to be increased accordingly with increasing temperature. The transistor pair 1522, 1524 is only activated in the impedance matching window, which is determined by Figure 14 The V_WINDOW signal definition is shown, and its generation is described further below.

[0055] refer to Figure 16 , depicts a schematic block diagram of an impedance matching window generation circuit according to a specific exemplary embodiment of the present disclosure. The impedance matching window can be defined based on a driver unit control signal (V_WINDOW signal). This driver unit control signal can be derived from, for example, but not limited to Figure 1 The VGATE_CTRL signal shown in .

[0056] The "bus_sr_ctrl_start" signal corresponds to the bus driver control input signal. Return to Reference Figure 12 or Figure 13 , which is for example the "VGATE_LOGIC" signal. VGATE_CTRL can be tied to bus_sr_ctrl_start. bus_sr_ctrl_end is Figure 11 and Figure 12 The output of the last delay stage in the bus. In the design, the VGATE_CTRL signal can also be replaced by any internal signal that indicates the start of the dominant to recessive transition. When this signal changes from high to low, the slew rate control will start. The "bus_sr_ctrl_end" signal is the latest slew rate control signal. Figure 12 and Figure 13 As shown, this is the control signal for the final current source or transistor switch. Figure 16 The delay element in the "bus_sr_ctrl_end" signal in CAN bus_sr_ctrl_end can be used to extend the bus impedance matching window relative to the slew rate control window.

[0057] refer to Figure 17 , depicting a specific exemplary embodiment according to the present disclosure Figure 16 The schematic signal waveform timing diagram of the impedance matching window generation circuit is shown. Figure 17 Shown in Figure 16 . The corresponding signal timing diagrams for the relevant signals generated in the impedance matching window generation circuit are shown in FIG. Both slew rate control and bus impedance matching can be applied in combination or separately. If bus impedance matching is effective for another time delay (tdel) after slew rate control is completed, an additional delay can be applied.

[0058] The solution implemented herein utilizes slew rate control to suppress ringing on the CAN bus, which is a completely different approach compared to prior art impedance matching based techniques. This method, system and apparatus does not change the bus differential impedance, which is what all known impedance matching based techniques do. This method, system and apparatus for substantially suppressing CAN bus ringing minimizes the impact on CAN bus communications and prevents overloading of driver nodes in the event of bus driving during ringing suppression. The bus drive slew rate control according to the teachings of the present disclosure preferably splits the original bus driver into N smaller drivers in parallel and controls the N smaller drivers sequentially during ringing suppression. No additional drivers or impedance matching components are required, which may result in a more cost-effective solution.

[0059] This article discloses a differential input and differential output OTA and a gate controlled back-to-back connected transistor pair for bus impedance matching. Figures 7 to 9 Compared to conventional CAN bus impedance matching (e.g., CAN bus impedance matching), the methods, systems, and apparatus of the present invention support more flexible control of CAN bus matching impedance while online. For example, it can be more stable and accurate across the entire temperature range because temperature compensation can be applied by taking temperature information into account. The matching impedance can also be shaped relative to the differential bus voltage, which can be used to passively prevent overload on the driver node or for other purposes. The CAN bus impedance matching methods, systems, and apparatus disclosed and claimed herein are preferably applied only within a limited time window during and after the bus state transitions from dominant to recessive, thereby avoiding continuous loading of the CAN bus.

[0060] The present disclosure has been described in terms of one or more embodiments, and it should be understood that many equivalents, alternatives, variations, and modifications, in addition to those explicitly stated, are possible and within the scope of the present disclosure. While the present disclosure is susceptible to various modifications and alternative forms, specific exemplary embodiments thereof have been shown in the drawings and described in detail herein. However, it should be understood that the description herein of specific exemplary embodiments is not intended to limit the present disclosure to the specific forms disclosed herein.

Claims

1. A method for reducing ringing on a controller area network (CAN) bus, the method comprising the steps of: providing a CAN transceiver having a CAN bus driver coupled to a CAN bus; matching an impedance of the CAN bus with an impedance matching unit, wherein the impedance matching unit comprises an operational transconductance amplifier (OTA), and wherein the OTA comprises a differential input coupled to the CAN bus and a differential output coupled to the CAN bus; as well as The impedance matching unit is coupled to the CAN bus during and a short period after the CAN bus driver drives the CAN bus to transition from a CAN bus dominant state to a CAN bus recessive state.

2. The method according to claim 1, comprising: When the CAN bus driver is in a CAN bus dominant state, the impedance matching unit is connected to the CAN bus, and When the CAN bus driver is in a CAN bus recessive state, the impedance matching unit is disconnected from the CAN bus.

3. A method for reducing ringing on a controller area network (CAN) bus, the method comprising the steps of: providing a CAN transceiver having a CAN bus driver coupled to a CAN bus; as well as The impedance of the CAN bus is matched with an impedance matching unit, wherein the impedance matching unit includes back-to-back connections R ON Regulating transistor pair and gate control circuitry.

4. The method according to claim 3, comprising: When the CAN bus driver is in a CAN bus dominant state, the impedance matching unit is connected to the CAN bus, and When the CAN bus driver is in a CAN bus recessive state, the impedance matching unit is disconnected from the CAN bus.

5. The method according to claim 3, comprising: The impedance matching unit is coupled to the CAN bus during and a short period after the CAN bus driver drives the CAN bus to transition from a CAN bus dominant state to a CAN bus recessive state.

6. A method for reducing ringing on a controller area network (CAN) bus, the method comprising the steps of: A CAN transceiver is provided, the CAN transceiver having a CAN bus driver coupled to a CAN bus, wherein the CAN bus driver includes slew rate control; and matching the impedance of the CAN bus with an impedance matching unit, and the method further includes the step of controlling the CAN bus driver slew rate within the CAN bus driver to reduce high frequency signals on the CAN bus.

7. The method of claim 6, wherein the step of controlling the slew rate of a CAN bus driver comprises the step of sequentially disabling a plurality of current sources comprising the CAN bus driver.

8. The method of claim 7 , wherein the step of sequentially disabling the plurality of current sources comprises providing a plurality of delay lines coupled in series and coupled to corresponding ones of the plurality of current sources, wherein a disable signal is delayed through each of the plurality of delay lines and to the corresponding one of the plurality of current sources.

9. The method of claim 6, wherein the step of controlling the slew rate of a CAN bus driver comprises the step of sequentially opening a plurality of parallel-connected resistive switches comprising the CAN bus driver.

10. The method of claim 9 , wherein the step of sequentially turning on the plurality of parallel-connected resistive switches comprises providing a plurality of delay lines coupled in series and coupled to corresponding ones of the plurality of parallel-connected resistive switches, wherein a disable signal is delayed through each of the plurality of delay lines and is delayed to the corresponding one of the plurality of parallel-connected resistive switches.

11. A system for reducing ringing on a controller area network (CAN) bus, the system comprising: a CAN SIC (Signal Improvement Capability) transceiver having a CAN bus driver coupled to a CAN bus; and an impedance matching unit selectively coupled to the CAN bus, wherein the impedance matching unit comprises an operational transconductance amplifier (OTA), the OTA comprising a differential input coupled to the CAN bus and a differential output coupled to the CAN bus, wherein the impedance matching unit is coupled to the CAN bus when the CAN bus driver drives the The CAN bus is selectively coupled to the CAN bus during and shortly after a transition from a dominant state to a recessive state.

12. A system for reducing ringing on a controller area network (CAN) bus, the system comprising: a CAN SIC (Signal Improvement Capability) transceiver having a CAN bus driver coupled to a CAN bus; an impedance matching unit, the impedance matching unit being selectively coupled to the CAN bus; as well as A slew rate circuit is used to control the slew rate of the CAN bus driver, thereby reducing high-frequency signals on the CAN bus.

13. The system of claim 12, wherein the slew rate circuit comprises: a plurality of current sources coupled in parallel; and a plurality of delay lines coupled in series and coupled to corresponding current sources among the plurality of parallel-coupled current sources, wherein an enable signal is delayed through each of the plurality of delay lines and to the corresponding current source among the plurality of parallel-coupled current sources.

14. The system of claim 12, wherein the slew rate circuit comprises: a plurality of resistance switches coupled in parallel; and a plurality of delay lines coupled in series and coupled to corresponding ones of the plurality of parallel-coupled resistive switches, wherein an enable signal is delayed through each of the plurality of delay lines and to the corresponding one of the plurality of parallel-coupled resistive switches.

15. A system for reducing ringing on a controller area network (CAN) bus, the system comprising: a CAN SIC (Signal Improvement Capability) transceiver having a CAN bus driver coupled to a CAN bus; as well as An impedance matching unit is selectively coupled to the CAN bus, wherein the impedance matching unit includes back-to-back connections R ON Regulating transistor pair and gate control circuitry. 16 . The system of claim 15 , wherein the impedance matching unit is selectively coupled to the CAN bus during and a short time after a CAN bus driver transitions from driving the CAN bus from a dominant state to a recessive state.

17. The system according to claim 15, wherein the back-to-back connection R ON The regulating transistor pair includes a first MOSFET having a source-drain path coupled in series with a drain-source path of a second MOSFET, wherein a gate of the first MOSFET is coupled to a gate of the second MOSFET.

18. An apparatus for reducing ringing on a controller area network (CAN) bus, the apparatus comprising: CAN bus driver for driving CAN bus, an impedance matching unit for selectively coupling to the CAN bus, wherein the impedance matching unit comprises an operational transconductance amplifier (OTA), and Slew rate circuit used to control the slew rate of the CAN bus driver.

19. The device according to claim 18, wherein the impedance matching unit comprises back-to-back connections R ON Regulating transistor pair and gate control circuitry.

20. The device according to claim 19, wherein the back-to-back connection R ON The regulating transistor pair includes a first MOSFET having a source-drain path coupled in series with a drain-source path of a second MOSFET, wherein a gate of the first MOSFET is coupled to a gate of the second MOSFET.

21. The apparatus of claim 20, wherein the slew rate circuit comprises: a plurality of current sources coupled in parallel; and a plurality of delay lines coupled in series and coupled to corresponding ones of the plurality of parallel-coupled current sources, wherein a disable signal is delayed through each of the plurality of delay lines and to the corresponding one of the plurality of parallel-coupled current sources.

22. The apparatus of claim 20, wherein the slew rate circuit comprises: a plurality of resistance switches coupled in parallel; and a plurality of delay lines coupled in series and coupled to corresponding ones of the plurality of parallel-coupled resistive switches, wherein a disable signal is delayed through each of the plurality of delay lines and to the corresponding one of the plurality of parallel-coupled resistive switches.

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