An MRAM read circuit and a preparation method thereof, and an electronic device

Abstract

The application discloses a MRAM reading circuit, comprising a MTJ unit, a comparison circuit and a reference circuit; the reference circuit and the MTJ unit are arranged on the same substrate silicon; the MTJ unit is electrically connected with the top metal layer through a top metal via and is electrically connected with the bottom metal layer through a bottom metal via; the reference circuit comprises a reference resistance and a reference metal via; the reference resistance and the top electrode or the bottom electrode of the MTJ unit are arranged on the same to-be-processed layer of the silicon substrate and are the same as the corresponding electrode material; the reference resistance is electrically connected with the top metal layer or the bottom metal layer through the reference metal via. The application greatly improves the controllability of the reference resistance and the setting precision of the reference resistance is higher. The application also provides an electronic device with the above beneficial effects and a preparation method of the MRAM reading circuit.

Description

Technical Field

[0001] This invention relates to the field of magnetic storage, and in particular to an MRAM read circuit and its fabrication method, as well as an electronic device. Background Technology

[0002] Magnetic random access memory (MRAM) is a promising new type of memory due to its advantages such as fast read / write speeds and low power consumption. The main structure of an MRAM memory chip is a magnetic tunnel junction (MTJ), which consists of a magnetically fixed layer, an insulating layer, and a magnetically free layer. The magnetically free layer can be flipped using a magnetic field or a spin-polarized current to achieve high and low resistance states of the MTJ, thereby recording and storing information as 1 or 0. In other words, to implement a magnetic random access memory, it is necessary to compare the MTJ structure with a reference resistor to determine the 0 or 1 state represented by the MTJ. Therefore, the setting of the reference resistor is particularly important during the manufacturing process of the magnetic random access memory.

[0003] In the prior art, the reference resistor is usually a poly resistor. Poly resistors are doped resistors, which have poorer controllability. The actual resistance value after printing has a large error compared with the designed resistance value. Therefore, how to improve the controllability of the resistance is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0004] The purpose of this invention is to provide an MRAM read circuit and its fabrication method, as well as an electronic device, to solve the problems of poor controllability and large error between the actual resistance value and the designed resistance value after printing in the prior art.

[0005] To solve the above-mentioned technical problems, the present invention provides an MRAM read circuit, including an MTJ unit, a comparator circuit, and a reference circuit;

[0006] The reference circuit and the MTJ unit are disposed on the same silicon substrate.

[0007] The substrate silicon includes a top metal layer and a bottom metal layer, and the MTJ unit and the reference circuit are disposed between the top metal layer and the bottom metal layer;

[0008] The MTJ unit is electrically connected to the top metal layer through a top metal via and to the bottom metal layer through a bottom metal via.

[0009] The reference circuit includes a reference resistor and a reference metal via.

[0010] The reference resistor and the top or bottom electrode of the MTJ unit are disposed in the same layer to be processed as the substrate silicon, and are made of the same material as the corresponding electrode.

[0011] The reference resistor is electrically connected to the top metal layer or the bottom metal layer through the reference metal via;

[0012] The comparison circuit is used to determine the operating state of the MTJ unit based on the relationship between the resistance of the MTJ unit and the resistance of the reference circuit.

[0013] Preferably, in the MRAM read circuit, the reference resistor is a metal resistor.

[0014] Preferably, in the MRAM read circuit, when the reference resistor and the top electrode of the MTJ cell are disposed on the same layer to be processed, the reference metal via and the top metal via are simultaneously disposed on the same layer to be processed of the substrate silicon.

[0015] The reference resistor is electrically connected to the top metal layer through the reference metal via.

[0016] Preferably, in the MRAM read circuit, when the reference resistor and the bottom electrode of the MTJ cell are disposed on the same processing layer, the reference metal via and the bottom metal via are simultaneously disposed on the same processing layer of the substrate silicon.

[0017] The reference resistor is electrically connected to the bottom metal layer through the reference metal via.

[0018] Preferably, in the MRAM read circuit, the reference resistor is a linear resistor extended according to a preset pattern.

[0019] Preferably, in the MRAM read circuit, the reference resistor includes multiple line segment resistors;

[0020] Adjacent line segments are electrically connected through the reference metal via and the metal layer corresponding to the reference metal via.

[0021] Preferably, in the MRAM read circuit, the reference resistor includes a plurality of access points arranged at preset intervals on the reference resistor; the comparison circuit includes a resistor selector;

[0022] The access point includes the reference metal through-hole and a contact point of the metal layer corresponding to the reference metal through-hole;

[0023] The resistor selector is used to determine the access point connected to the comparison circuit and change the resistance value of the reference resistor connected to the circuit.

[0024] Preferably, in the MRAM read circuit, the sheet resistance of the reference resistor ranges from 10Ω / Sq to 500Ω / Sq, including the endpoint values.

[0025] Preferably, in the MRAM read circuit, the absolute value of the temperature coefficient of the reference resistor does not exceed 1000 ppm / ℃.

[0026] Preferably, in the MRAM read circuit, the reference resistor is a nickel chromate alloy.

[0027] Preferably, in the MRAM read circuit, the resistance value of the reference resistor is the average value of the parallel state resistance and the antiparallel state resistance of the MTJ cell.

[0028] An electronic device comprising any of the MRAM read circuits described above.

[0029] A method for fabricating an MRAM read circuit, comprising:

[0030] A bottom metal layer is formed on the substrate silicon;

[0031] A bottom metal via, an MTJ cell, and a top metal via are sequentially disposed in the unprocessed layer of the memory cell region on the bottom metal layer. A reference resistor and a reference metal via are disposed in the unprocessed layer of the reference resistor region on the bottom metal layer to obtain the cover material. The reference resistor and the top or bottom electrode of the MTJ cell are disposed in the same unprocessed layer of the substrate silicon and are made of the same electrode material as the corresponding electrode.

[0032] A top metal layer is provided above the component to be covered, so that the MTJ unit is electrically connected to the top metal layer through the top metal via, and the reference resistor is electrically connected to the top metal layer or the bottom metal layer through the reference metal via.

[0033] Preferably, in the method for fabricating the MRAM read circuit, the reference resistor is simultaneously disposed on the same layer to be processed as the top or bottom electrode of the MTJ cell in the substrate silicon through a single patterning process.

[0034] The MRAM read circuit provided by this invention includes an MTJ cell, a comparator circuit, and a reference circuit. The reference circuit and the MTJ cell are disposed on the same substrate silicon. The substrate silicon includes a top metal layer and a bottom metal layer, and the MTJ cell and the reference circuit are disposed between the top metal layer and the bottom metal layer. The MTJ cell is electrically connected to the top metal layer through a top metal via and to the bottom metal layer through a bottom metal via. The reference circuit includes a reference resistor and a reference metal via. The reference resistor and the top electrode or bottom electrode of the MTJ cell are disposed on the same layer to be processed in the substrate silicon and are made of the same material as the corresponding electrode. The reference resistor is electrically connected to the top metal layer or the bottom metal layer through the reference metal via. The comparator circuit is used to determine the operating state of the MTJ cell based on the relationship between the resistance of the MTJ cell and the resistance of the reference circuit.

[0035] In this invention, both the MTJ unit and the reference circuit are disposed on the same silicon substrate. In other words, both the MTJ unit and the reference circuit are epitaxial layers disposed on different layers to be processed on the silicon substrate by patterning methods such as etching or printing. Furthermore, this invention specifies that the reference resistor is made of the same material as the top or bottom electrode, greatly improving the controllability of the reference resistor, reducing the error between the actual resistance value after patterning and the designed resistance value, and increasing the accuracy of the reference resistor setting. This invention also provides an electronic device with the above-mentioned beneficial effects and a method for fabricating an MRAM read circuit. Attached Figure Description

[0036] To more clearly illustrate the technical solutions of the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 A schematic diagram of the circuit structure of a specific embodiment of the MRAM read circuit provided by the present invention;

[0038] Figure 2 A schematic diagram of the circuit structure of another specific embodiment of the MRAM read circuit provided by the present invention;

[0039] Figure 3 A schematic diagram of a partial silicon substrate structure of a specific embodiment of the MRAM read circuit provided by the present invention;

[0040] Figure 4A schematic diagram of the circuit structure of another specific embodiment of the MRAM read circuit provided by the present invention;

[0041] Figure 5 A schematic diagram of the circuit structure of another specific embodiment of the MRAM read circuit provided by the present invention;

[0042] Figure 6 A schematic diagram of the circuit structure of another specific embodiment of the MRAM read circuit provided by the present invention;

[0043] Figure 7 This is a flowchart illustrating a specific embodiment of the method for fabricating an MRAM readout circuit provided by the present invention. Detailed Implementation

[0044] To enable those skilled in the art to better understand the present invention, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0045] The core of this invention is to provide an MRAM read circuit, the structural schematic diagram of one specific embodiment of which is shown below. Figure 1 As shown, this is referred to as Specific Implementation Method 1, which includes an MTJ unit, a comparator circuit 20, and a reference circuit;

[0046] The reference circuit and the MTJ unit are mounted on the same silicon substrate;

[0047] The substrate silicon includes a top metal layer 40 and a bottom metal layer 50, and the MTJ unit and reference circuit are disposed between the top metal layer 40 and the bottom metal layer 50.

[0048] The MTJ unit is electrically connected to the top metal layer 40 through the top metal through-hole 41 and to the bottom metal layer 50 through the bottom metal through-hole 51;

[0049] The reference circuit includes a reference resistor 31 and a reference metal via 32;

[0050] The reference resistor 31 and the top electrode 11 or bottom electrode 13 of the MTJ unit are disposed on the same layer to be processed in the substrate silicon and are made of the same material as the corresponding electrode.

[0051] Reference resistor 31 is electrically connected to top metal layer 40 or bottom metal layer 50 through reference metal via 32;

[0052] The comparator circuit 20 is used to determine the operating state of the MTJ unit based on the relationship between the resistance of the MTJ unit and the resistance of the reference circuit.

[0053] The specific structure of the MTJ unit and its connection relationship with other structures in the invention are explained in detail below:

[0054] The substrate silicon comprises, from top to bottom, a top metal layer 40, a top metal via 41, an MTJ unit, a bottom metal via 51, and a bottom metal layer 50.

[0055] The MTJ unit, from top to bottom, includes a top electrode 11, an MTJ structure layer 12, and a bottom electrode 13.

[0056] The MTJ structure layer 12 is electrically connected to the top metal layer 40 via the top electrode 11 and the top metal via 41, and is also electrically connected to the bottom metal layer 50 via the bottom electrode 13 and the bottom metal via 51. See details below. Figure 1 .

[0057] It should be noted that the reference resistor 31 can be connected to the top metal layer 40 through the reference metal via 32, or to the bottom metal layer 50 through the reference metal layer, as shown below. Figure 1 As shown, Figure 1 This refers to the reference resistor 31 (labeled BE in the figure), which is located on the same layer as the bottom electrode 13 and is connected to the top metal layer 40 through the reference metal via 32. Figure 1 The portion located by the dashed line on the left side of the circuit diagram is a partially enlarged schematic diagram of the circuit. Similarly, the reference resistor 31, which is located on the same layer to be processed as the top electrode 11, is also present. In other words, this invention does not limit the metal layer connected to the reference resistor. The circuit structure in this part of the other figures in this invention is similar to... Figure 1 The same applies to the Chinese text, so I will not elaborate further.

[0058] In this invention, the layer to be processed on the substrate silicon 60 refers to the thickness region within a single etching or printing operation on the substrate silicon 60, and is not an independent structure. Please refer to [the relevant context]. Figure 3 , Figure 3 for Figure 2 The circuit structure diagram shown corresponds to the silicon 60 substrate structure diagram. It can be seen that... Figure 3 The reference resistor 31 and the bottom electrode 13, the reference metal via 32 and the bottom metal via 51 are disposed on the same layer to be processed in the substrate silicon 60. Figure 3 The ellipsis in the text indicates that there may be other silicon structures between the MTJ cell and the reference circuit, which will not be drawn one by one here.

[0059] In view of the problem that the preparation process of the reference resistor 31 in the prior art is complicated and the doping time is long, which seriously slows down the production efficiency of the MRAM read circuit, as a preferred embodiment, the present invention further limits the reference resistor 31 to be simultaneously set on the same layer to be processed as the top electrode 11 or bottom electrode 13 of the MTJ cell in a single patterning process on the substrate silicon.

[0060] The reference resistor 31 is simultaneously printed on the same processing layer of the substrate silicon as the top electrode 11 or the bottom electrode 13 in a single process. The reference resistor 31 can be regarded as a structure of the same material in different regions of the same processing layer as the top electrode 11 or the bottom electrode 13. The setting of the reference resistor 31 is realized at the same time as setting the structure of the MTJ cell, which simplifies the production steps and thus greatly improves the production efficiency of the MRAM read circuit.

[0061] The sheet resistance of the reference resistor 31 ranges from 10Ω / Sq to 500Ω / Sq, including the endpoint values, such as any one of 10.0Ω / Sq, 236.5Ω / Sq, or 500.0Ω / Sq; the total resistance of the reference resistor 31 ranges from 3kΩ to 5kΩ, including the endpoint values, such as any one of 3.0kΩ, 3.6kΩ, or 5.0kΩ. Of course, it can also be adjusted accordingly based on the actual situation.

[0062] In addition, the absolute value of the temperature coefficient of the reference resistor 31 does not exceed 1000ppm / ℃. It should be noted that the temperature coefficient of the reference resistor 31 can be greater than zero or less than zero, as long as its absolute value does not exceed 1000ppm / ℃, so as to achieve high reliability of the MRAM read circuit under high temperature conditions during operation.

[0063] Specifically, the reference resistor 31 is a metal resistor. Compared with the poly resistors used in the prior art, the printing speed of the metal resistor is much higher than the doping speed of the poly resistor, which can further improve production efficiency. Furthermore, the reference resistor 31 is a nickel chromate alloy, or a compound including nickel chromate, wherein the proportion of nickel is 10% to 90%, including endpoint values, such as any one of 10.0%, 29.8% or 90.0%. Of course, it can also be adjusted according to the actual situation, such as constantan (copper-nickel alloy), manganese copper (copper-manganese-nickel alloy), or multi-component compounds containing elements such as Cu, Mn, and Ni.

[0064] The MRAM read circuit provided by this invention includes an MTJ cell, a comparator circuit 20, and a reference circuit. The reference circuit and the MTJ cell are disposed on the same substrate silicon. The substrate silicon includes a top metal layer 40 and a bottom metal layer 50, and the MTJ cell and the reference circuit are disposed between the top metal layer 40 and the bottom metal layer 50. The MTJ cell is electrically connected to the top metal layer 40 through a top metal via 41 and to the bottom metal layer 50 through a bottom metal via 51. The reference circuit includes a reference resistor 31 and a reference metal via 32. The reference resistor 31 and the top electrode 11 or bottom electrode 13 of the MTJ cell are disposed on the same layer to be processed in the substrate silicon and are made of the same material as the corresponding electrode. The reference resistor 31 is electrically connected to the top metal layer 40 or the bottom metal layer 50 through the reference metal via 32. The comparator circuit 20 is used to determine the operating state of the MTJ cell based on the relationship between the resistance of the MTJ cell and the resistance of the reference circuit. In this invention, the MTJ unit and the reference circuit are both disposed on the same substrate silicon. In other words, the MTJ unit and the reference circuit are epitaxial layers disposed on different layers to be processed on the substrate silicon by patterning methods such as etching or printing. Furthermore, this invention limits the reference resistor 31 to be made of the same material as the top electrode 11 or the bottom electrode 13, which greatly improves the controllability of the reference resistor 31, reduces the error between the actual resistance value after patterning and the designed resistance value, and increases the setting accuracy of the reference resistor 31.

[0065] In a preferred embodiment, when the reference resistor 31 and the top electrode 11 of the MTJ unit are disposed on the same layer to be processed, the reference metal via 32 and the top metal via 41 are simultaneously disposed on the same layer to be processed of the substrate silicon 60.

[0066] Reference resistor 31 is electrically connected to top metal layer 40 through reference metal via;

[0067] or

[0068] When the reference resistor 31 and the bottom electrode 13 of the MTJ unit are disposed on the same layer to be processed, the reference metal via 32 and the bottom metal via 51 are simultaneously disposed on the same layer to be processed of the substrate silicon 60.

[0069] The reference resistor 31 is electrically connected to the bottom metal layer 50 through a reference metal hole.

[0070] In the preferred embodiment described above, the reference resistor 31, which is simultaneously provided with the top electrode 11, is connected to the top metal layer 40; the reference resistor 31, which is simultaneously provided with the bottom electrode 13, is connected to the bottom metal layer 50. This allows the reference metal via 32, which connects the reference electrode to the corresponding metal layer, to be simultaneously provided with the corresponding metal via in the MTJ unit. Please see... Figure 2 , Figure 2 and Figure 1 Corresponding, and Figure 2The reference metal via 32 in the MRAM can be simultaneously disposed on the same substrate silicon 60 layer as the bottom metal via 51 in the MTJ cell, which further simplifies the fabrication process of the MRAM read circuit and improves production efficiency.

[0071] In a preferred embodiment, the resistance of the reference resistor 31 is the average of the parallel-state resistance and the anti-parallel-state resistance of the MTJ cell. The read accuracy of the MRAM chip is determined, in part, by the parallel-state resistance (R0) of the MTJ cell. p ), antiparallel state resistance (R) ap The value of R is determined by the statistical distribution standard deviation (σ) of both, i.e.: ap -R p >N*(σ(R p )+σ(R ap The size of N is determined by the different chip capacities; the larger the capacity, the higher the value of N. On the other hand, selecting a suitable reference resistor 31 has a significant impact on accurately reading the array's stored information. An ideal reference resistor 31R... ref For (R) p +R ap ) / 2.

[0072] As one specific embodiment, the comparator circuit 20 includes a differential amplifier, which is used to convert the electrical signals from the reference resistor 31 and the MTJ unit into unidirectional electrical signals.

[0073] It should be noted that the resistance of the reference metal via 32 in the reference circuit and the wire connected to the comparator circuit 20 is much smaller than that of the reference resistor 31, more specifically, less than 10 ohms, so as to ensure that the reference resistor 31 is the main factor determining the current in the circuit.

[0074] Based on the first specific implementation method, the reference resistor 31 is further improved to obtain the second specific implementation method. Its structural diagram is the same as that of the specific implementation method in the previous text, including the MTJ unit, the comparator circuit 20, and the reference circuit.

[0075] The reference circuit and the MTJ unit are mounted on the same silicon substrate;

[0076] The substrate silicon includes a top metal layer 40 and a bottom metal layer 50, and the MTJ unit and reference circuit are disposed between the top metal layer 40 and the bottom metal layer 50.

[0077] The MTJ unit is electrically connected to the top metal layer 40 through the top metal through-hole 41 and to the bottom metal layer 50 through the bottom metal through-hole 51;

[0078] The reference circuit includes a reference resistor 31 and a reference metal via 32;

[0079] The reference resistor 31 and the top electrode 11 or bottom electrode 13 of the MTJ unit are disposed on the same layer to be processed in the substrate silicon and are made of the same material as the corresponding electrode.

[0080] Reference resistor 31 is electrically connected to top metal layer 40 or bottom metal layer 50 through reference metal via 32;

[0081] The comparator circuit 20 is used to determine the operating state of the MTJ cell based on the relationship between the resistance of the MTJ cell and the resistance of the reference circuit.

[0082] Reference resistor 31 is a linear resistor extended according to a preset pattern.

[0083] In this specific embodiment, a metal wire with a defined cross-sectional area and shape is used as a reference resistor 31. Since the cross-section is fixed, the sheet resistance of the linear resistor is a constant. If the resistance value of the reference resistor 31 is to be changed, metal wires of different lengths can be directly set, making the resistance value of the reference resistor 31 more controllable. Furthermore, the reference resistor 31 is a linear resistor with multiple bends, which can save the space occupied by the reference resistor 31 while ensuring a large resistance, making the spatial arrangement of components on the substrate silicon 60 more flexible and improving the versatility of the invention.

[0084] Furthermore, the reference resistor 31 includes multiple line segment resistors;

[0085] Adjacent line segment resistors are electrically connected through a reference metal via 32 and a metal layer corresponding to the reference metal via 32.

[0086] For reference Figure 4 and Figure 5 ,Depend on Figure 4 As can be seen, the reference resistor 31 is divided into multiple segments, which are interconnected through reference metal vias 32 and the bottom metal layer 50. Of course, if the reference resistor 31 is a resistor located in the same processing layer as the top resistor, they can be interconnected through reference metal vias 32 and the top metal layer 40 (e.g., Figure 5 As shown, the resistor located in the same processing layer as the top resistor is marked as TE. Segmenting the reference resistor 31 avoids setting an excessively long section of reference resistor 31 at once. Since the reference resistor 31 is a linear resistor and is usually thin and has a small cross-sectional area in actual production, setting an excessively long section of reference resistor 31 at once could easily lead to breakage in the middle, resulting in defective parts. In this specific embodiment, segmenting the reference resistor 31 effectively avoids the possibility of breakage and improves the yield rate of the finished product.

[0087] Based on the second specific implementation method, the reference resistor 31 and the corresponding comparator circuit 20 are further improved to obtain the third specific implementation method, the structural schematic diagram of which is shown below. Figure 6As shown, it includes an MTJ unit, a comparator circuit 20, and a reference circuit;

[0088] The reference circuit and the MTJ unit are mounted on the same silicon substrate;

[0089] The substrate silicon includes a top metal layer 40 and a bottom metal layer 50, and the MTJ unit and reference circuit are disposed between the top metal layer 40 and the bottom metal layer 50.

[0090] The MTJ unit is electrically connected to the top metal layer 40 through the top metal through-hole 41 and to the bottom metal layer 50 through the bottom metal through-hole 51;

[0091] The reference circuit includes a reference resistor 31 and a reference metal via 32;

[0092] The reference resistor 31 and the top electrode 11 or bottom electrode 13 of the MTJ unit are disposed on the same layer to be processed in the substrate silicon and are made of the same material as the corresponding electrode.

[0093] Reference resistor 31 is electrically connected to top metal layer 40 or bottom metal layer 50 through reference metal via 32;

[0094] The comparator circuit 20 is used to determine the operating state of the MTJ cell based on the relationship between the resistance of the MTJ cell and the resistance of the reference circuit.

[0095] Reference resistor 31 is a linear resistor extended according to a preset pattern;

[0096] The reference resistor 31 includes a plurality of access points arranged at preset intervals on the reference resistor 31; the comparison circuit 20 includes a resistor selector 21;

[0097] The access point includes a reference metal via 32 and a contact of the metal layer corresponding to the reference metal via 32;

[0098] Resistor selector 21 is used to determine the connection point to comparator circuit 20 and change the resistance value of reference resistor 31 connected to the circuit.

[0099] In this specific embodiment, multiple access points are provided on the linear reference resistor 31, and the comparator circuit 20 includes a resistor selector 21, which can change the access points of the access circuit. In other words, the length of the reference resistor 31 can be adjusted, thereby changing the resistance value of the reference resistor 31. In actual production, the parallel state resistance and antiparallel state resistance of the finished MTJ component usually have errors compared with the resistance values ​​designed. Moreover, during operation, due to changes in ambient temperature, the parallel state resistance and antiparallel state resistance of the MTJ will also experience resistance value changes caused by temperature drift. All of these will cause the reference resistor 31 to deviate from its optimal resistance value (i.e., the average value of the parallel state resistance and antiparallel state resistance of the MTJ unit). In this specific embodiment, the reference resistor 31 can be adjusted during the operation of the MRAM read circuit to keep the reference resistor 31 at the optimal resistance value at all times, ensuring the working stability of the MRAM read circuit.

[0100] The present invention also provides an electronic device, which includes an MRAM read circuit as described above. The MRAM read circuit provided by the present invention includes an MTJ cell, a comparator circuit 20, and a reference circuit; the reference circuit and the MTJ cell are disposed on the same substrate silicon; the substrate silicon includes a top metal layer 40 and a bottom metal layer 50, and the MTJ cell and the reference circuit are disposed between the top metal layer 40 and the bottom metal layer 50; the MTJ cell is electrically connected to the top metal layer 40 through a top metal via 41 and to the bottom metal layer 50 through a bottom metal via 51; the reference circuit includes a reference resistor 31 and a reference metal via 32; the reference resistor 31 and the top electrode 11 or bottom electrode 13 of the MTJ cell are disposed on the same layer to be processed in the substrate silicon and are made of the same material as the corresponding electrode; the reference resistor 31 is electrically connected to the top metal layer 40 or the bottom metal layer 50 through the reference metal via 32; the comparator circuit 20 is used to determine the operating state of the MTJ cell based on the relationship between the resistance of the MTJ cell and the resistance of the reference circuit. In this invention, the MTJ unit and the reference circuit are both disposed on the same substrate silicon. In other words, the MTJ unit and the reference circuit are epitaxial layers disposed on different layers to be processed on the substrate silicon by patterning methods such as etching or printing. Furthermore, this invention limits the reference resistor 31 to be made of the same material as the top electrode 11 or the bottom electrode 13, which greatly improves the controllability of the reference resistor 31, reduces the error between the actual resistance value after patterning and the designed resistance value, and increases the setting accuracy of the reference resistor 31.

[0101] This invention also provides a method for fabricating an MRAM read circuit, and a flowchart of one specific embodiment is shown below. Figure 7 As shown, it includes:

[0102] S101: A bottom metal layer is formed on the substrate silicon.

[0103] S102: Bottom metal vias, MTJ cells and top metal vias are sequentially provided in the processing layer of the memory cell area on the bottom metal layer, and a reference resistor and a reference metal via are provided in the processing layer of the reference resistor area on the bottom metal layer to obtain the cover; wherein, the reference resistor and the top electrode or bottom electrode of the MTJ cell are provided in the same processing layer of the substrate silicon and are made of the same electrode material as the corresponding electrode.

[0104] S103: A top metal layer is provided above the part to be covered, so that the MTJ unit is electrically connected to the top metal layer through the top metal via, and the reference resistor is electrically connected to the top metal layer or the bottom metal layer through the reference metal via.

[0105] In a preferred embodiment, the reference resistor is simultaneously disposed on the same substrate silicon layer as the top or bottom electrode of the MTJ cell through a single patterning process.

[0106] The reference resistor 31 is simultaneously printed on the same processing layer of the substrate silicon as the top electrode 11 or the bottom electrode 13 in a single process. The reference resistor 31 can be regarded as a structure of the same material in different regions of the same processing layer as the top electrode 11 or the bottom electrode 13. The setting of the reference resistor 31 is realized at the same time as setting the structure of the MTJ cell, which simplifies the production steps and thus greatly improves the production efficiency of the MRAM read circuit.

[0107] The following is a specific implementation of a process flow for fabricating an MRAM read circuit on a silicon 60 substrate, including:

[0108] a) The memory cell area (i.e. the corresponding area of ​​the MTJ cell on the substrate silicon 60) and the reference resistor area 31 are simultaneously formed into the bottom metal layer 50;

[0109] b) A bottom metal via 51 is formed in the memory cell area, and the reference resistor 31 area may be selectively designed with or without a bottom via;

[0110] c) The bottom electrode 13 is formed simultaneously in the memory cell area and the reference resistor 31 area, and the reference resistor 31 area is not processed.

[0111] d) The memory cell area is etched to form a magnetic tunnel junction, and the reference resistor area 31 is left untreated;

[0112] e) The memory cell area and the reference resistor 31 area simultaneously form the top electrode 11 (i.e., the reference resistor 31), wherein the top electrode 11 of the reference resistor 31 area can be a whole segment or several discrete segments.

[0113] f) The memory cell area and the reference resistor 31 area simultaneously form a top metal via 41 and a top metal layer 40, wherein the top electrode 11 (i.e. the reference resistor 31) of the reference resistor 31 area is connected to an external circuit through the top metal via 41 and the top metal layer 40.

[0114] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.

[0115] It should be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.

[0116] The MRAM read circuit and electronic device provided by this invention have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this invention. The descriptions of the embodiments above are only for the purpose of helping to understand the method and core ideas of this invention. It should be noted that those skilled in the art can make several improvements and modifications to this invention without departing from the principles of this invention, and these improvements and modifications also fall within the protection scope of the claims of this invention.

Claims

1. An MRAM read circuit, characterized in that, Includes MTJ unit, comparator circuit, and reference circuit; The reference circuit and the MTJ unit are disposed on the same silicon substrate. The memory cell region of the substrate silicon includes, from bottom to top, a bottom electrical connection structure, the MTJ cell, and a top electrical connection structure. The MTJ cell is connected to an external circuit through the top electrical connection structure and the bottom electrical connection structure. The reference circuit is disposed in the reference resistance region of the substrate silicon and includes a reference resistor and a reference electrical connection structure. The reference resistor and the top or bottom electrode of the MTJ unit are disposed in the same layer to be processed as the substrate silicon, and are made of the same material as the corresponding electrode. The reference resistor is connected to an external circuit through the reference electrical connection structure; The comparison circuit is used to determine the operating state of the MTJ unit based on the relationship between the resistance of the MTJ unit and the resistance of the reference circuit. The reference resistor is simultaneously disposed on the same substrate silicon layer as the top or bottom electrode of the MTJ cell through a single patterning process.

2. The MRAM read circuit as described in claim 1, characterized in that, When the reference resistor and the top electrode of the MTJ unit are disposed on the same layer to be processed, the reference electrical connection structure and the top electrical connection structure are simultaneously disposed on the same layer to be processed of the substrate silicon.

3. The MRAM read circuit as described in claim 1, characterized in that, When the reference resistor and the bottom electrode of the MTJ unit are disposed on the same layer to be processed, the reference electrical connection structure and the bottom electrical connection structure are simultaneously disposed on the same layer to be processed of the substrate silicon.

4. The MRAM read circuit as described in claim 1, characterized in that, The top electrical connection structure, the bottom electrical connection structure, and the reference electrical connection structure are metal through holes.

5. The MRAM read circuit as described in claim 1, characterized in that, The reference resistor is a linear resistor extended according to a preset pattern.

6. The MRAM read circuit as described in claim 5, characterized in that, The reference resistor includes multiple line segment resistors; Adjacent line segment resistors are electrically connected through the reference electrical connection structure.

7. The MRAM read circuit as described in claim 5, characterized in that, The reference resistor includes a plurality of access points arranged at preset intervals on the reference resistor; the comparison circuit includes a resistor selector; The access point includes the reference electrical connection structure; The resistor selector is used to determine the access point connected to the comparison circuit and change the resistance value of the reference resistor connected to the circuit.

8. The MRAM read circuit as described in claim 1, characterized in that, The sheet resistance of the reference resistor ranges from 10Ω / Sq to 500Ω / Sq, including the endpoint values.

9. The MRAM read circuit as described in claim 1, characterized in that, The absolute value of the temperature coefficient of the reference resistor does not exceed 1000 ppm / ℃.

10. The MRAM read circuit as described in claim 1, characterized in that, The reference resistor is a metallic resistor.

11. The MRAM read circuit as described in claim 10, characterized in that, The reference resistor is a nickel chromate alloy.

12. The MRAM read circuit according to any one of claims 1 to 11, characterized in that, The resistance value of the reference resistor is the average value of the parallel state resistance and the antiparallel state resistance of the MTJ unit.

13. An electronic device, characterized in that, The electronic device includes an MRAM read circuit as described in any one of claims 1 to 12.

14. A method for fabricating an MRAM read circuit, characterized in that, include: A bottom electrical connection structure, an MTJ cell, and a top electrical connection structure are sequentially disposed in the unprocessed layer of the memory cell region of the substrate silicon. A reference resistor and a reference electrical connection structure are disposed in the unprocessed layer of the reference resistor region of the substrate silicon. The reference resistor and the top or bottom electrode of the MTJ cell are disposed in the same unprocessed layer of the substrate silicon and are made of the same material as the corresponding electrode. The reference resistor is connected to an external circuit through the reference electrical connection structure. A comparison circuit is set up and electrically connected to the MTJ unit and the reference resistor respectively, so that the comparison circuit is used to determine the working state of the MTJ unit according to the relationship between the resistance of the MTJ unit and the resistance of the reference circuit. The reference resistor is simultaneously disposed on the same substrate silicon layer as the top or bottom electrode of the MTJ cell through a single patterning process.

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