Heterojunction bipolar transistor and power amplifier
By adding a new signal input terminal and via connection to the base of the heterojunction bipolar transistor, the base resistance is reduced, solving the problem of the base resistance affecting the maximum operating frequency and improving high-frequency gain performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- WIN SEMICON
- Filing Date
- 2022-06-29
- Publication Date
- 2026-05-29
AI Technical Summary
Existing heterojunction bipolar transistors have high base resistance, which affects the maximum operating frequency and device performance, making it difficult to exhibit superior gain performance at high frequencies.
A new signal input terminal is added to the base terminal, adopting a dual signal input configuration, and the base resistance is reduced through the connection of vias and conductive layers.
It effectively reduces base resistance, extends the stability coefficient of maximum stable gain and maximum usable gain to higher frequencies, and improves the high-frequency gain performance of heterojunction bipolar transistors and power amplifiers.
Smart Images
Figure CN115548108B_ABST
Abstract
Description
Technical Field
[0001] This application relates to a heterojunction bipolar transistor (HBT) and a power amplifier (PA), particularly to the feature of dual signal inputs. Background Technology
[0002] A heterojunction bipolar transistor (HBT) is a bipolar junction transistor composed of two different materials with varying energy band gaps. The base resistance of a HBT can affect its maximum operating frequency and component performance (such as its maximum stable gain (MSG) or maximum available gain (MAG)). To achieve higher efficiency, higher output power, and higher linearity, it is necessary to further reduce the overall base resistance of the HBT. Therefore, addressing these issues requires the design and optimization of HBTs. Summary of the Invention
[0003] To further reduce the impact of the base resistance of heterojunction bipolar transistors on the maximum operating frequency and device performance, this application proposes the following technical solution:
[0004] In one embodiment, a heterojunction bipolar transistor includes: a substrate; a lower collector layer disposed on the substrate; an upper collector layer disposed on the lower collector layer; a collector layer disposed on the upper collector layer; and a base layer disposed on the collector layer, wherein the base layer, the collector layer, and the upper collector layer form a base mesa. From the top view, the base layer includes a first side and a second side, with the second side opposite to the first side. The heterojunction bipolar transistor further includes: an emitter layer disposed on the base layer; a first dielectric layer disposed on the lower collector layer and the base mesa; a base electrode disposed on the first dielectric layer and connected to the base layer through a first via disposed in the first dielectric layer; a second dielectric layer disposed on the base electrode; and a first conductive layer disposed on the second dielectric layer. The first conductive layer is connected to the base electrode through a second via, and the second via is disposed in the second dielectric layer and on the first side of the base layer. The first conductive layer is connected to the base electrode through a third via, which is disposed in the second dielectric layer and on the second side of the base layer. The second and third vias are laterally spaced from the base layer.
[0005] In another embodiment, a heterojunction bipolar transistor includes: a substrate; and a base mesa disposed on the substrate. The base mesa includes a collector layer and a base layer, the base layer being disposed on the collector layer, and wherein, from a top view, the base layer includes a first side and a second side, the second side being opposite to the first side. The heterojunction bipolar transistor further includes: an emitter layer disposed on the base layer; a base electrode disposed on the substrate and connected to the base layer; a dielectric layer disposed on the base electrode; and a conductive component disposed on the dielectric layer. A first via is formed in the dielectric layer on the first side of the base layer, and a second via is formed in the dielectric layer on the second side of the base layer. The conductive component is connected to the base electrode through the first via and the second via.
[0006] In another embodiment, a power amplifier includes the heterojunction bipolar transistor described in any of the above embodiments.
[0007] The heterojunction bipolar transistor or power amplifier of this application exhibits a reduction in base resistance by adding a new signal input terminal to the base terminal relative to the existing signal input terminal. With a dual signal input configuration, the stability coefficient of the maximum stable gain and / or the maximum usable gain (when k equals 1) can be extended to higher frequencies. In this way, the heterojunction bipolar transistor and power amplifier can exhibit superior gain performance at higher operating frequencies. Attached Figure Description
[0008] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. In the drawings:
[0009] Figure 1A and Figure 1C These are top views and cross-sectional views of a heterojunction bipolar transistor according to some embodiments of this application.
[0010] Figure 1B and Figure 1D These are top views and cross-sectional views of a heterojunction bipolar transistor according to some embodiments of this application.
[0011] Figure 2A and Figure 2B This is a top view of heterojunction bipolar transistors with different designs according to some embodiments of this application.
[0012] Figure 2C According to some embodiments of this application, Figure 2A The diagram shows a cross-sectional view of a heterojunction bipolar transistor.
[0013] Figure 3 This is a top view of a heterojunction bipolar transistor according to some embodiments of this application.
[0014] Figure 4 This is a top view of a heterojunction bipolar transistor according to some embodiments of this application.
[0015] Figure 5 This is a top view of a heterojunction bipolar transistor according to some embodiments of this application.
[0016] Figures 6A to 6C This is a top view of a power amplifier with various designs according to some embodiments of this application.
[0017] Figure 7A and Figure 7B This is a top view of heterojunction bipolar transistors with different designs according to some embodiments of this application.
[0018] Figure 8A and Figure 8B This is a top view of a power amplifier with a different design according to some embodiments of this application.
[0019] Figure 9 This is a top view of a heterojunction bipolar transistor according to some embodiments of this application.
[0020] Symbol explanation:
[0021] 10A: Heterojunction Bipolar Transistor
[0022] 10B: Heterojunction Bipolar Transistor
[0023] 20A: Heterojunction Bipolar Transistor
[0024] 20B: Heterojunction Bipolar Transistor
[0025] 30: Heterojunction bipolar transistor
[0026] 40: Heterojunction bipolar transistor
[0027] 50: Heterojunction bipolar transistor
[0028] 60A: Power Amplifier
[0029] 60B: Power Amplifier
[0030] 60C: Power Amplifier
[0031] 70A: Heterojunction Bipolar Transistor
[0032] 70B: Heterojunction Bipolar Transistor
[0033] 80A: Power Amplifier
[0034] 80B: Power Amplifier
[0035] 90: Heterojunction bipolar transistor
[0036] 100: Base
[0037] 110: Bottom Collector Layer
[0038] 120: Etching Stop Layer
[0039] 130: Base mesa
[0040] 132: Last collector layer
[0041] 134: Collector Layer
[0042] 136: Base layer
[0043] 136A: First side
[0044] 136B: Second side
[0045] 138: Emitter
[0046] 140: First dielectric layer
[0047] 145A: Guide Hole
[0048] 145B: Guide Hole
[0049] 150: Base electrode
[0050] 150A: Connecting part
[0051] 150B: Finger part
[0052] 150B-E: Tail section
[0053] 160: Collector electrode
[0054] 180: Second dielectric layer
[0055] 185A: Guide Hole
[0056] 185B: Guide Hole
[0057] 185C: Guide Hole
[0058] 200: First conductive layer
[0059] 200A: Connecting part
[0060] 200B: Transmission Section
[0061] 215A: Guide Hole
[0062] 215B: Guide Hole
[0063] 215C: Guide Hole
[0064] 215D: Guide Hole
[0065] 220: Second conductive layer
[0066] 220A: Conducting section
[0067] 220B: Transmission Section
[0068] A-A': Line segment
[0069] B-B': line segment
[0070] C-C': line segment
[0071] S: Signal Input
[0072] S1: Signal Input
[0073] S2: Signal Input
[0074] W1: First width
[0075] W2: Second width
[0076] Exemplary embodiments will be described in detail with reference to the accompanying drawings. In the drawings, similar reference numerals generally denote identical, functionally similar, and / or structurally similar elements. Detailed Implementation
[0077] The following provides many different embodiments or examples for implementing different components of the invention. Specific examples of components and configurations are described below to simplify this application. Of course, these are merely examples and are not intended to limit this application. For example, the description mentioning that a first component is formed on a second component may include embodiments in which the first and second components are in direct contact, or embodiments in which an additional component is formed between the first and second components such that the first and second components are not in direct contact.
[0078] It should be understood that additional operational steps may be performed before, during, or after the method, and in other embodiments of the method, some operational steps may be replaced or omitted.
[0079] Furthermore, spatial terms such as “below,” “below,” “lower,” “above,” “above,” “higher,” and similar terms may be used here to describe the relationship between one element or component and other elements or components as shown in the figure. These spatial terms attempt to encompass different orientations of the device in use or operation, as well as the orientations shown in the figure. When the device is rotated to other orientations (rotated 90° or other orientations), the spatial relative descriptions used here can also be interpreted according to the orientation after rotation.
[0080] In this application, the terms "about," "approximately," and "roughly" generally indicate that a given quantity is within ±20%, ±10%, ±5%, ±3%, ±2%, ±1%, or even ±0.5% of its value or range. The given quantity is an approximate amount. That is, even without specific mention of "about," "approximately," or "roughly," the meaning of "about," "approximately," or "roughly" may be implied.
[0081] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by those skilled in the art. It should be understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the relevant art and the background or context of this application, and should not be interpreted in an idealized or overly formal manner, unless specifically defined herein.
[0082] The different embodiments disclosed below may reuse the same reference numerals and / or designations. These repetitions are for the purpose of simplification and clarity and are not in themselves intended to limit the relationship between the various embodiments and / or structures discussed.
[0083] In high-frequency heterojunction bipolar transistors (HJBs) or power amplifiers incorporating HJBs, a small signal (such as a low voltage or a small current) can be input to the base terminal, which is then converted into a larger signal (such as a higher voltage or a larger current) and output from the collector terminal. Excessive base resistance can affect the signal input, thereby impacting component performance during operation. The inventors have discovered that the base resistance can be significantly reduced by adding a new signal input terminal to the base terminal relative to the existing signal input terminal. With a dual signal input configuration, the stability factor (when k equals 1) of the maximum stable gain and / or maximum usable gain can be extended to higher frequencies. This allows HJBs and power amplifiers to exhibit superior gain performance at higher operating frequencies.
[0084] Figure 1A and Figure 1CThese are top views and cross-sectional views of a heterojunction bipolar transistor 10A, according to some embodiments of this application. It is worth noting that... Figure 1C for Figure 1A A schematic diagram of the cross section obtained by the line segment A-A'.
[0085] Reference Figure 1A and Figure 1C The heterojunction bipolar transistor 10A may include a substrate 100, a lower collector layer 110, an etch stop layer 120, a base mesa 130, an emitter layer 138, a first dielectric layer 140, a via 145A, a base electrode 150, a collector electrode 160, a second dielectric layer 180, a via 185A, a first conductive layer 200, a via 215A, and a second conductive layer 220. The lower collector layer 110 may also be referred to as a collector mesa. The base mesa 130 may include an upper collector layer 132, a collector layer 134, and a base layer 136. The lower collector layer 110, the etch stop layer 120, the upper collector layer 132, the collector layer 134, the base layer 136, and the emitter layer 138 can be formed on the substrate 100 by an epitaxial process, and therefore can be considered together as an epitaxial structure. The base layer 136 may include a first side (or edge) 136A and a second side (or edge) 136B. Furthermore, the base electrode 150 may include a connection portion 150A and a plurality of finger portions 150B.
[0086] Reference Figure 1A and Figure 1CThe substrate 100 may be, for example, a wafer or a chip, but this application is not limited thereto. In some embodiments, the substrate 100 may be a semiconductor substrate, such as a silicon substrate. In addition, in some embodiments, the semiconductor substrate may also be: an elemental semiconductor, including germanium (Ge); a compound semiconductor, including gallium nitride (GaN), silicon carbide (SiC), gallium arsenide (GaAs), gallium phosphide (GaP), indium phosphide (InP), indium arsenide (InAs), and / or indium antimonide (InSb); an alloy semiconductor, including silicon-germanium (SiGe) alloy, gallium arsenide phosphide (GaAsP) alloy, aluminum indium arsenide (AlInAs) alloy, aluminum gallium arsenide (AlGaAs) alloy, and gallium indium arsenide (GaInAs) alloy. GaInAs alloys, gallium indium phosphide (GaInP) alloys, and / or gallium indium arsenide phosphide (GaInAsP) alloys; or combinations thereof.
[0087] In some embodiments, the substrate 100 may be of N-type or P-type conductivity. In some embodiments, N-type dopants may include phosphorus (P), arsenic (As), silicon, selenium (Se), and tellurium (Te), while P-type dopants may include boron (B), indium (In), aluminum (Al), carbon (C), magnesium (Mg), zinc (Zn), calcium (Ca), beryllium (Be), strontium (Sr), barium (Ba), and radium (Ra).
[0088] In some embodiments, substrate 100 may include an isolation structure (not shown) to define an active region and electrically isolate active region components within or above substrate 100.
[0089] As previously mentioned, a material film consisting of a lower collector layer 110, an etch stop layer 120, a higher collector layer 132, a collector layer 134, a base layer 136, and an emitter layer 138 can be epitaxially grown on the substrate 100. The epitaxial process may include metal-organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), molecular beam epitaxy (MBE), chemical vapor deposition (CVD), other similar methods, or combinations thereof. After the epitaxial growth process, the patternable material film becomes individual mesa regions. For example, the patternable emitter layer 138 is first patterned to become an emitter mesa. Then, the patternable base layer 136, collector layer 134, and higher collector layer 132 are patterned to become a base mesa 130. Subsequently, an implantation process can be performed on the bottom collector layer 110 to form active regions and insulating regions. Each active region of the bottom collector layer 110 can be defined as a collector mesa, which can be isolated from each other by insulating regions.
[0090] In some embodiments, the patterning process may include photolithography (e.g., photoresist coating, soft baking, exposure, post-exposure baking (e.g., cleaning and drying), development, other suitable techniques, or combinations thereof), etching (e.g., wet etching, dry etching, other suitable methods, or combinations thereof), other suitable processes, or combinations thereof. For example, when using a dry etching process, the base mesa 130 may have straight sidewalls, while when using a wet etching process, the base mesa 130 may have sloping sidewalls.
[0091] Continue to refer to Figure 1A and Figure 1CA secondary collector layer 110 can be formed on the substrate 100. According to some embodiments of this application, as previously described, the secondary collector layer 110 can be implanted to define a collector mesa and can form an ohmic contact with the subsequently formed collector electrode 160. For illustrative purposes, the top view of the heterojunction bipolar transistor 10A only shows one active region of the secondary collector layer 110. In some embodiments, the secondary collector layer 110 can be of P-type or N-type conductivity. The material of the secondary collector layer 110 can include III-V semiconductor compounds such as gallium nitride, aluminum gallium nitride (AlGaN), aluminum nitride (AlN), gallium arsenide, aluminum gallium arsenide, indium phosphide, indium aluminum arsenide (InAlAs), indium gallium arsenide (InGaAs), other similar materials, or combinations thereof.
[0092] In some embodiments, the lower collector layer 110 may be in-situ doped. The doping concentration of the lower collector layer 110 may be between 1 × 10⁻⁶. 18 cm -3 and 1×10 20 cm -3 Between, for example, in 5×10 18 cm -3 If the doping concentration of the lower collector layer 110 is too low, an ohmic contact may not be formed between the lower collector layer 110 and the collector electrode 160. The thickness of the lower collector layer 110 can be between 50 nm and 1500 nm, for example, between 100 nm and 1000 nm, or between 100 nm and 800 nm. If the lower collector layer 110 is too thick, implantation isolation may be difficult. If the lower collector layer 110 is too thin, the collector resistance may increase.
[0093] Reference Figure 1A and Figure 1COptionally, an etch stop layer 120 may be formed on the lower collector layer 110. According to some embodiments of this application, the etch stop layer 120 can protect the lower collector layer 110 from unwanted etching steps (such as over-etching of the overlying film), allowing the lower collector layer 110 to have a uniform thickness. The material of the etch stop layer 120 may include indium gallium phosphide (InGaP), indium gallium arsenide, gallium arsenide phosphide, aluminum gallium arsenide, indium aluminum arsenide, gallium antimonide (GaSb), other similar materials, or combinations thereof. In some embodiments, the doping profile of the etch stop layer 120 may be similar to the doping profile of the lower collector layer 110, for example, between 1 × 10⁻⁶. 18 cm -3 and 1×10 20 cm -3 The thickness of the etch stop layer 120 can be between 5 nm and 200 nm, for example, between 5 nm and 50 nm, or between 100 nm and 800 nm. If the doping concentration of the etch stop layer 120 is too high, the dopant may not be fully activated, potentially affecting reliability. If the doping concentration of the etch stop layer 120 is too low, it may increase the collector resistance. If the etch stop layer 120 is too thin, it may not provide sufficient protection for the underlying film.
[0094] Continue to refer to Figure 1A and Figure 1C The upper collector layer 132 can be formed on the etch stop layer 120 (if present) or on the lower collector layer 110. According to some embodiments of this application, the upper collector layer 132 may define the bottom of the base mesa 130. The material of the upper collector layer 132 may be similar to that of the lower collector layer 110, and details will not be repeated here. The thickness of the upper collector layer 132 may be between 50 nm and 1500 nm, for example, between 100 nm and 1000 nm, or between 100 nm and 800 nm. In some embodiments, the thickness of the upper collector layer 132 and the thickness of the lower collector layer 110 may be substantially the same. The thickness ratio of the upper collector layer 132 to the lower collector layer 110 can determine the shape and location of the subsequently formed collector electrode 160. In some embodiments, the doping concentration of the upper collector layer 132 may be between 1 × 10⁻⁶. 18 cm -3 and 1×10 20 cm -3 Between, for example, in 5×10 18 cm -3 In some embodiments, the doping concentration of the upper collector layer 132 and the lower collector layer 110 may be the same or different.
[0095] It should be understood that if the etch stop layer 120 is omitted, the lower collector layer 110 and the upper collector layer 132 can be formed simultaneously using the same material. In this case, the fabrication of the heterojunction bipolar transistor 10A can consume lower manufacturing costs and shorter process time. The upper collector layer 132 and the lower collector layer 110 can be considered together as the secondary collector layer.
[0096] Reference Figure 1A and Figure 1C A collector layer 134 can be disposed on the previous collector layer 132. According to some embodiments of this application, the collector layer 134 is located in the middle of the base mesa 130. The material of the collector layer 134 may include III-V semiconductor compounds, such as gallium nitride, aluminum gallium nitride, aluminum nitride, gallium arsenide, aluminum gallium arsenide, indium phosphide, indium aluminum arsenide, indium gallium arsenide, gallium antimonide, other similar materials, or combinations thereof. In some embodiments, the collector layer 134 may be of N-type conductivity. The doping concentration of the collector layer 134 may be higher than 0 cm⁻¹. -3 And it can be equal to or less than 1×10 18 cm -3 For example, between 1×10 14 cm -3 and 1×10 18 cm -3 Between, between 1×10 14 cm -3 and 1×10 17 cm -3 Between, between 1×10 14 cm -3 and 3×10 17 cm -3 Between, between 1×10 14 cm -3 and 5×10 17 cm -3 Between, or between 1×10 14 cm -3 and 8×10 17 cm -3 Between. Collector layer 134 can be a multi-layer structure with different doping profiles.
[0097] Continue to refer to Figure 1A and Figure 1CA base layer 136 can be disposed on the collector layer 134. According to some embodiments of this application, the base layer 136 defines the upper portion of the base mesa 130. As previously mentioned, the base layer 136 may include a first side 136A and a second side 136B. Signal inputs can be transmitted through the first side 136A and the second side 136B of the base layer 136 to achieve a dual signal input configuration, thereby reducing the base resistance. The material of the base layer 136 may include III-V semiconductor compounds, such as gallium nitride, aluminum gallium nitride, aluminum nitride, gallium arsenide, aluminum gallium arsenide, indium phosphide, indium aluminum arsenide, indium gallium arsenide, gallium antimonide, other similar materials, or combinations thereof. In some embodiments, the base layer 136 may be of P-type conductivity. The doping concentration of the base layer 136 may be between 1 × 10⁻⁶ and 1 × 10⁻⁶. 18 cm -3 and 1×10 20 cm -3 between.
[0098] Reference Figure 1A and Figure 1C An emitter layer 138 may be disposed on the base layer 136. According to some embodiments of this application, the emitter layer 138 may be considered as an emitter mesa. The material of the emitter layer 138 may include III-V semiconductor compounds, such as gallium nitride, aluminum gallium nitride, aluminum nitride, gallium arsenide, aluminum gallium arsenide, indium phosphide, indium aluminum arsenide, indium gallium arsenide, other similar materials, or combinations thereof. In some embodiments, the emitter layer 138 may be of N-type conductivity. In some embodiments, the emitter layer 138 may be a single-layer structure formed of N-type indium gallium phosphide. In some embodiments, the emitter layer 138 may be a multilayer structure (not shown) formed of N-type indium gallium phosphide at the bottom and N-type gallium arsenide at the top. It should be understood that the materials of the emitter layer 138 and the base layer 136 have different band gaps. Therefore, a heterojunction may be formed at the interface between the emitter layer 138 and the base layer 136.
[0099] Continue to refer to Figure 1A and Figure 1CA first dielectric layer 140 may be compliantly formed on the substrate 100 and the epitaxial structure (such as the lower collector layer 110, etch stop layer 120, upper collector layer 132, collector layer 134, base layer 136, and emitter layer 138). In some embodiments, the first dielectric layer 140 covers the substrate 100 and the epitaxial structure to provide mechanical protection and electrical insulation to the underlying structure. The material of the first dielectric layer 140 may include silicon nitride (SiN), aluminum nitride, silicon oxide (SiO), aluminum oxide (AlO), other similar materials, or combinations thereof. The first dielectric layer 140 can be formed by chemical vapor deposition, high-density plasma chemical vapor deposition (HDP-CVD), plasma-enhanced chemical vapor deposition (PECVD), flowable chemical vapor deposition (FCVD), sub-atmospheric chemical vapor deposition (SACVD), atomic layer deposition (ALD), other similar methods, or combinations thereof.
[0100] Reference Figure 1A and Figure 1C A via 145A can be formed in the first dielectric layer 140. According to some embodiments of this application, the via 145A can be considered as an opening within the first dielectric layer 140, allowing electrical connections between components below and above the first dielectric layer 140. In a particular embodiment of this application, the via 145A electrically connects the base layer 136 and a plurality of fingers 150B for signal transmission. From the top view, the via 145A can be provided on the base layer 136 of the base mesa 130. The via 145A can be formed by patterning the first dielectric layer 140, including any suitable photolithography and etching processes described above. Furthermore, vias 145B (illustrated in…) can also be formed in the first dielectric layer 140. Figure 1B and Figure 1D (in the middle), it can be disposed on the lower collector layer 110 to establish an electrical connection between the lower collector layer 110 and the subsequently formed collector electrode 160.
[0101] Continue to refer to Figure 1A and Figure 1CA base electrode 150 may be disposed on the first dielectric layer 140. According to some embodiments of this application, the base electrode 150 may serve as the base terminal of a heterojunction bipolar transistor 10A. As previously mentioned, the base electrode 150 may include a connection portion 150A and a plurality of fingers 150B. The term "connection portion" may hereafter be considered as a single component directly connecting the plurality of fingers 150B. In some embodiments, the connection portion 150A may be located on the substrate 100 and on a first side 136A of the base layer 136. The plurality of fingers 150B may extend from the connection portion 150A toward a second side 136B of the base layer 136. In a particular embodiment of this application, the plurality of fingers 150B climb onto the base mesa 130. According to some embodiments of this application, the length direction of the plurality of fingers 150B is substantially perpendicular to the first side 136A and / or the second side 136B of the base layer 136.
[0102] Multiple fingers 150B of the base electrode 150 may be configured to correspond to vias 145A. It should be understood that the first width W1 of each finger 150B may be greater than the critical dimension (CD) of each via 145A. If the first width W1 is less than the critical dimension of each via 145A, the via 145A may not be completely covered, and other subsequently formed components may inadvertently flow into the uncovered space of the via 145A, which may cause an electrical short circuit between the component and the underlying epitaxial structure.
[0103] The base electrode 150 may be made of metals such as cobalt (Co), ruthenium (Ru), aluminum, tungsten (W), copper (Cu), titanium, tantalum (Ta), silver (Ag), gold (Au), platinum (Pt), nickel (Ni), palladium (Pd), zinc, chromium (Cr), molybdenum (Mo), niobium (Nb), other similar materials, combinations thereof, or multiple layers thereof. The base electrode 150 may be formed by chemical vapor deposition, atomic layer deposition, physical vapor deposition (PVD), evaporation, plating, sputtering, other similar methods, or combinations thereof, but this application is not limited thereto.
[0104] Reference Figure 1AA collector electrode 160 may be disposed on the first dielectric layer 140. According to some embodiments of this application, the collector electrode 160 may serve as the collector terminal of a heterojunction bipolar transistor 10A. In some embodiments, the collector electrode 160 may be disposed on the top surface of the lower collector layer 110 (or on the collector mesa above the substrate 100). The collector electrode 160 may be disposed corresponding to a via 145B in the first dielectric layer 140 (illustrated in…). Figure 1B and Figure 1D (In the middle). As previously mentioned, the collector electrode 160 can be electrically connected to the lower collector layer 110 through the via 145B, and an ohmic contact is formed between the collector electrode 160 and the lower collector layer 110. The material and formation method of the collector electrode 160 can be similar to those of the base electrode 150, and the details will not be repeated here.
[0105] Continue to refer to Figure 1A and Figure 1C A second dielectric layer 180 may be compliantly formed on the first dielectric layer 140, the base electrode 150, and the collector electrode 160. In some embodiments, the second dielectric layer 180 covers the first dielectric layer 140, the base electrode 150, and the collector electrode 160 to provide mechanical protection and electrical insulation to the underlying structure. The material of the second dielectric layer 180 may include silicon oxide, silicon nitride, silicon carbide, silicon oxynitride (SiON), and silicon oxynitrocarbide (SiO2). x N y C 1-x-y The following materials can be used: (where x and y are in the range of 0 to 1), tetraethyl orthosilane (TES), undoped silicate glass, or doped silicon oxide (such as boron-doped phospho-silicate glass (BPSG), fused silica glass (FSG), phosphosilicate glass (PSG), boron-doped silicon glass (BSG)), polyimide (PI), polyamide (PA), low-k dielectric materials, other similar materials, or combinations thereof. It should be understood that using dielectric materials with lower dielectric constants can further reduce parasitic capacitance. The method for forming the second dielectric layer 180 is similar to that for forming the first dielectric layer 140, and its details will not be repeated here.
[0106] Reference Figure 1AVias 185A and 185C can be formed in the second dielectric layer 180. According to some embodiments of this application, vias 185A and 185C can be considered as openings within the second dielectric layer 180, allowing electrical connections between components below and above the second dielectric layer 180. In some embodiments, vias 185A and 185C are laterally spaced from the base layer 136. In a particular embodiment of this application, via 185A electrically connects the connection portion 150A of the base electrode 150 to the subsequently formed first conductive layer 200 for signal transmission. From a top view, via 185A can be provided on the connection portion 150A of the base electrode 150. According to some embodiments of this application, via 185A can extend in a direction perpendicular to the length direction of the plurality of fingers 150B. In a particular embodiment of this application, via 185C electrically connects the collector electrode 160 to the subsequently formed first conductive layer 200 for signal transmission. In some embodiments, a via 185C may be provided on the collector electrode 160. The vias 185A and 185C may be formed by patterning the second dielectric layer 180, and the patterning may include any suitable photolithography and etching processes described above.
[0107] Continue to refer to Figure 1A and Figure 1C A first conductive layer 200 may be disposed on the second dielectric layer 180. According to some embodiments of this application, the first conductive layer 200 may serve as a metal wire for electrical connection. Furthermore, the first conductive layer 200 may also be used to form capacitors, inductors, resistors, and other passive components (not shown). In some embodiments, the first conductive layer 200 may be disposed on the top surface of the connection portion 150A of the base electrode 150 and the top surface of the collector electrode 160. The first conductive layer 200 may be disposed corresponding to vias 185A and 185C in the second dielectric layer 180. As previously mentioned, the first conductive layer 200 may be electrically connected to the base electrode 150 and the collector electrode 160 through vias 185A and 185C, respectively. Notably, some portions of the first conductive layer 200 above the base electrode 150 and the collector electrode 160 may extend further outward to serve as a metal wire for signal transmission. The material and formation method of the first conductive layer 200 are similar to those of the base electrode 150, and the details will not be repeated here.
[0108] In some embodiments, another dielectric layer (not shown) may be formed on the second dielectric layer 180 and the first conductive layer 200. In some embodiments, the dielectric layer covers the second dielectric layer 180 and the first conductive layer 200 to provide mechanical protection and electrical insulation to the underlying structure. The material and formation method of the dielectric layer may be similar to those of the second dielectric layer 180, and the details will not be repeated here.
[0109] Reference Figure 1A and Figure 1C A via 215A can be formed in its dielectric layer. According to some embodiments of this application, the via 215A can be considered as an opening within its dielectric layer, allowing electrical connections to be established between components below and above its dielectric layer. In a particular embodiment of this application, the via 215A electrically connects the first conductive layer 200 and a subsequently formed second conductive layer 220 to couple the collector electrode 160. The via 215A can be formed on the first conductive layer 200. Specifically, the via 215A is located on the portion of the first conductive layer 200 where it is electrically connected to the collector electrode 160, and is located outside the collector mesa. The via 215A can be formed by patterning its dielectric layer, including any suitable photolithography and etching processes described above.
[0110] Continue to refer to Figure 1A A second conductive layer 220 may be disposed on its dielectric layer. According to some embodiments of this application, the second conductive layer 220 may serve as a metal wire for electrical connection. Furthermore, the first conductive layer 200 and the second conductive layer 220 may constitute a capacitor structure in other circuit regions (not shown). In some embodiments, the second conductive layer 220 may be disposed on the top surface of the substrate 100 and the top surface of the first conductive layer 200. The second conductive layer 220 may be disposed corresponding to a via 215A disposed in the dielectric layer between the first conductive layer 200 and the second conductive layer 220. As previously mentioned, the second conductive layer 220 may be electrically connected to the first conductive layer 200 through the via 215A. It is worth noting that the second conductive layer 220 may be electrically coupled to the collector electrode 160 adjacent to the base mesa 130. The material and formation method of the second conductive layer 220 may be similar to those of the first conductive layer 200, and the details will not be repeated here.
[0111] Reference Figure 1A and Figure 1C When operating the heterojunction bipolar transistor 10A, both signal input S1 and signal input S2 can be fed into the base layer 136 from the first side 136A and the second side 136B, respectively. More specifically, both signal input S1 and signal input S2 can be fed into the base electrode 150, thereby reducing the resistance of the base electrode 150. The reduced resistance of the base electrode 150 leads to a reduced base resistance. In a particular embodiment of this application, the dual signal input configuration reduces the base resistance by up to 20%. The improved base resistance allows the stability coefficient (k = 1) of the maximum stable gain and / or maximum usable gain to be extended to higher frequencies. In this way, the heterojunction bipolar transistor 10A can exhibit superior gain performance at higher operating frequencies.
[0112] Figure 1B and Figure 1DThese are top views and cross-sectional views of a heterojunction bipolar transistor 10B, according to some embodiments of this application. It is worth noting that... Figure 1D for Figure 1B A schematic diagram of the cross-section obtained from line segment B-B'. Compared to Figure 1A and Figure 1C The collector electrode 160 of the heterojunction bipolar transistor 10B may extend to the inclined sidewall of the base mesa 130. For illustrative purposes, the via 185C, the portion of the first conductive layer 200 electrically connected to the collector electrode 160, the via 215A, and the second conductive layer 220 are omitted. For simplicity, the features of elements having the same reference numerals are... Figure 1A and Figure 1C The components shown have similar characteristics, and their details will not be repeated here.
[0113] Reference Figure 1B and Figure 1D A portion of the via 145B and a portion of the collector electrode 160 may overlap with the base mesa 130. According to some embodiments of this application, the via 145B may be formed, simultaneously exposing the top surface of the lower secondary collector layer 110 and the sidewall surface of the base mesa 130 (e.g., the upper secondary collector layer 132). The subsequently formed collector electrode 160 may correspond to the via 145B. In some embodiments, the collector electrode 160 may extend from the top surface of the lower secondary collector layer 110 to the inclined sidewall of the base mesa 130. That is, the collector electrode 160 can be electrically connected to both the lower secondary collector layer 110 and the upper secondary collector layer 132 through the via 145B disposed in the first dielectric layer 140.
[0114] Similar to the heterojunction bipolar transistor 10A, the heterojunction bipolar transistor 10B can feed signal input S1 and signal input S2 into the base layer 136 via the first side 136A and the second side 136B, respectively. This dual signal input configuration reduces the base resistance. The improved base resistance allows the heterojunction bipolar transistor 10B to exhibit superior gain performance at higher operating frequencies.
[0115] Figure 2A and Figure 2B These are top views of heterojunction bipolar transistors 20A and 20B with different designs, according to some embodiments of this application. Compared to Figure 1A The heterojunction bipolar transistors 20A and 20B may include a connection portion 200A disposed on the second side 136B of the base layer 136. The connection portion 200A may be electrically connected to a plurality of fingers 150B via a via 185B. For simplicity, the features of elements having the same reference numerals are... Figure 1A The components shown in the figure have similar characteristics, and their details will not be repeated here.
[0116] Reference Figure 2A After forming the second dielectric layer 180, vias 185B can be formed in the second dielectric layer 180. Vias 185B can be provided on a plurality of fingers 150B of the base electrode 150. As seen in the top view, the critical dimensions of via 185B are similar to those of via 145A in the first dielectric layer 140; details will not be repeated here. The method for forming via 185B is similar to the method for forming vias 185A and 185C; details will not be repeated here.
[0117] Continue to refer to Figure 2A Similar to the connection portion 150A of the base electrode 150, the connection portion 200A of the first conductive layer 200 can be considered as a single component directly connecting multiple fingers 150B. The connection portion 200A can overlap the tail sections of the multiple fingers 150B. The connection portion 200A of the first conductive layer 200, the via 185B, and the base electrode 150 can form a closed loop, which can surround the emitter layer 138. In a specific embodiment of this application, signal input S1 and signal input S2 can be fed into the base layer 136 through vias 185A and 185B, respectively. When a dual signal input configuration is provided, the base resistance can be reduced. The improved base resistance allows the heterojunction bipolar transistor 20A to exhibit superior gain performance at higher operating frequencies.
[0118] Reference Figure 2B The diagram illustrates a heterojunction bipolar transistor 20B. Compared to... Figure 2A As shown in the figure, multiple fingers 150B of the base electrode 150 may be included in the tails 150B-E of the second side 136B of the base layer 136. The tails 150B-E may expand in the width direction of the fingers 150B. In this way, the second width W2 of the tails 150B-E may be greater than the first width W1 of the fingers 150B. The larger size of the tails 150B-E further ensures proper alignment between the via 185B and the base electrode 150. Similar to the heterojunction bipolar transistor 20A, signal input S1 and signal input S2 can be fed into the base layer 136 through vias 185A and 185B, respectively. When configured with dual signal inputs, the base resistance can be reduced. The improved base resistance allows the heterojunction bipolar transistor 20B to exhibit superior gain performance at higher operating frequencies.
[0119] Figure 2C According to some embodiments of this application, Figure 2A The diagram shows a cross-sectional view of the heterojunction bipolar transistor 20A. It is worth noting that... Figure 2C for Figure 2A A schematic diagram of the cross-section obtained from line segment C-C'. Compared to Figure 1CThe plurality of fingers 150B of the base electrode 150 can descend from the base mesa 130 to the lower collector layer 110, rather than stopping at the top surface of the base layer 136. For simplicity, the features of elements having the same reference numerals are... Figure 1C The components shown have similar characteristics, and their details will not be repeated here.
[0120] Reference Figure 2C An electrical connection can be established between the connection portion 200A of the first conductive layer 200 and the extended tails of the plurality of fingers 150B of the base electrode 150. As previously mentioned, signal input S1 and signal input S2 can be fed into the base layer 136 through vias 185A and 185B, respectively. When a dual signal input configuration is provided, the base resistance can be reduced. Furthermore, since both vias 185A and 185B are spaced apart from the base layer 136, the area of the base mesa 130 can be maintained within the desired size.
[0121] In traditional designs, vias (facilitating the electrical connection between the first conductive layer and the base electrode) are positioned on the top surface of the base mesa. Because the via placement needs to accommodate the extension of the first conductive layer from the outside towards the periphery of the base mesa and the extension of the base electrode from the inside towards the periphery of the base mesa, the area of the base mesa, as seen in the top view, must be adjusted according to the location of the via. This severely limits the design flexibility of the base mesa. For example, the area of the base mesa may need to be large enough to accommodate the via on its top surface. When the area of the base mesa is too large, the contact area between the base and collector may also increase. This increased contact area can lead to excessive parasitic capacitance between the base and collector, which can affect the operating performance of the heterojunction bipolar transistor.
[0122] In some embodiments, the positional constraints between the via and the base mesa can be removed. More specifically, the via can be designed to be located outside the periphery of the base mesa, thus eliminating the need for the base mesa's area to accommodate the via placement. The area of the base mesa can be reduced, allowing the via to be spaced apart from the base layer of the base mesa. Consequently, due to the reduced contact area between the base and collector, the parasitic capacitance between the base and collector of the heterojunction bipolar transistor can also be reduced. This improves the maximum stable gain of the heterojunction bipolar transistor.
[0123] Figure 3 This is a top view of a heterojunction bipolar transistor 30 according to some embodiments of this application. Compared to Figure 2AThe base electrode 150 of the heterojunction bipolar transistor 30 may include additional connection portions 150A. Two connection portions 150A may be located on a first side 136A and a second side 136B of the base layer 136, respectively. Multiple fingers 150B of the base electrode 150 may be directly connected to both the first side 136A and the second side 136B. It is worth noting that the base electrode 150 of the heterojunction bipolar transistor 30 may individually form a closed loop surrounding the emitter layer 138. For simplicity, elements having the same reference numerals are characterized by... Figure 2A The components shown have similar characteristics, and their details will not be repeated here.
[0124] Reference Figure 3 Since the tails of multiple fingers 150B are directly connected by additional connecting portions 150A, the original connecting portion 200A of the first conductive layer 200 no longer directly connects to the multiple fingers 150B, thus removing the "200A" designation. Because of the presence of the additional connecting portion 150A with a larger size, the via 185B can be adjusted. The via 185B can be designed as a single component with a relatively large area across the additional connecting portion 150A on the second side 136B of the base layer 136, instead of forming multiple vias 185B with relatively small areas. The vias 185A and 185B of the heterojunction bipolar transistor 30 can have substantially the same size, allowing signal input S1 and signal input S2 to have the same throughput. Signal input S1 and signal input S2 can be fed into the base layer 136 through vias 185A and 185B, respectively. When a dual signal input configuration is present, the base resistance can be reduced. The improved base resistance enables the heterojunction bipolar transistor 30 to exhibit superior gain performance at higher operating frequencies.
[0125] Figure 4 This is a top view of a heterojunction bipolar transistor 40 according to some embodiments of this application. Compared to Figure 3 The second conductive layer 220 may further include an additional portion that laterally surrounds the base mesa 130. This additional portion of the second conductive layer 220 may be presented as a closed loop that partially overlaps the first conductive layer 200. In some embodiments, the closed loop portion of the second conductive layer 220 may be electrically connected to portions of the first conductive layer 200 on the first side 136A and the second side 136B via vias 215B and 215C, respectively. For simplicity, elements having the same reference numerals are characterized by... Figure 3 The components shown have similar characteristics, and their details will not be repeated here.
[0126] Reference Figure 4The closed loop portion of the second conductive layer 220 can extend across the two connection portions 150A of the base electrode 150 (on the first side 136A and the second side 136B of the base layer 136) and adjacent to the two collector electrodes 160 of the base mesa 130. After forming the dielectric layer inserted between the first conductive layer 200 and the second conductive layer 220, vias 215B and 215C can be formed in the dielectric layer. Vias 215B and 215C can be respectively provided on the portions of the first conductive layer 200 on the first side 136A and the second side 136B of the base layer 136. The method of forming vias 215B and 215C can be similar to the method of forming via 215A, and the details will not be repeated here.
[0127] Continue to refer to Figure 4 As previously mentioned, portions of the first conductive layer 200 on the first side 136A and the second side 136B can be accessed through vias 185A and 185B (illustrated in...). Figure 3 The two connecting portions 150A, located on the first side 136A and the second side 136B respectively, are electrically connected. It is worth noting that vias 185A and 185B are located within the second dielectric layer 180 inserted between the base electrode 150 and the first conductive layer 200, while vias 215B and 215C are located within the dielectric layer inserted between the first conductive layer 200 and the second conductive layer 220. For simplicity, vias 185A and 185B are not shown. Figure 4 middle.
[0128] Reference Figure 4 The closed loop portion of the second conductive layer 220 in the sections of the first side 136A and the second side 136B can be electrically connected to portions of the underlying first conductive layer 200 via vias 215B and 215C, respectively. According to some embodiments of this application, the closed loop portion of the second conductive layer 220 in the sections of the first side 136A and the second side 136B can be considered as a conductive portion 220A, while the section of the closed loop portion of the second conductive layer 220 that crosses the collector electrode 160 can be considered as a transmission portion 220B. In some embodiments, the conductive portion 220A can conduct input signals through the structure below and / or above, while the transmission portion 220B can transmit input signals.
[0129] Continue to refer to Figure 4 When signal input S1 enters the heterojunction bipolar transistor 40, it can be sent to the first side 136A of the base layer 136 via a first path, and to the second side 136B of the base layer 136 via a second path. The first path allows signal input S1 to propagate through the portion of the first conductive layer 200 at the first side 136A of the base layer 136 and through the via 185A (shown in the diagram). Figure 3The second path allows the signal input S1 to propagate through the portion of the first conductive layer 200 on the first side 136A of the base layer 136, the via 215B, the conductive portion 220A of the second conductive layer 220 on the first side 136A of the base layer 136, the transmission portion 220B of the second conductive layer 220, the conductive portion 220A of the second conductive layer 220 on the second side 136B of the base layer 136, the via 215C, the portion of the first conductive layer 200 on the second side 136B of the base layer 136, and the via 185B (shown in the diagram). Figure 3 The base electrode 150 is connected to the second side 136B of the base layer 136, and the base layer 136. When a signal input S1 is brought in through the metal wire structure of the first conductive layer 200, the signal input S1 can propagate downward to the base layer 136 (e.g., the first path), and / or the signal input S1 can propagate upward and be carried by the second conductive layer 220 to the opposite side of the base layer 136 (e.g., the second path).
[0130] Reference Figure 4 It is worth noting that the second path can form another closed loop with any of the plurality of fingers 150B. In some embodiments, the heterojunction bipolar transistor 40 is configured such that signal input S1 is transmitted from the first side 136A of the base electrode 150 at the base layer 136 to the second side 136B of the base electrode 150 at the base layer 136, using a path (such as the second path) different from the path through the plurality of fingers 150B of the base electrode 150, thus reducing base resistance. Similarly, signal input S2 can also be transmitted in the opposite direction from the second side 136B of the base electrode 150 at the base layer 136 to the first side 136A of the base electrode 150 at the base layer 136 using a similar path to reduce base resistance. It is also worth noting that when the transmission portion 220B of the second conductive layer 220 overlaps the portion of the collector electrode 160 and the portion of the first conductive layer 200 above the collector electrode 160, less circuit space is consumed, which is advantageous for miniaturization of the overall component. The improved base resistor enables the heterojunction bipolar transistor 40 to exhibit superior gain performance at higher operating frequencies.
[0131] Figure 5 This is a top view of a heterojunction bipolar transistor 50 according to some embodiments of this application. Compared to Figure 4 The transport portion 220B of the second conductive layer 220 of the heterojunction bipolar transistor 50 may not overlap with the collector electrode 160. For simplicity, the features of elements having the same reference numerals are... Figure 4 The components shown have similar characteristics, and their details will not be repeated here.
[0132] Reference Figure 5 The transport portion 220B of the second conductive layer 220 can be disposed on the insulating region of the lower collector layer 110 above the substrate 100. Although extending the transport portion 220B beyond the collector mesa may lose the advantage for device miniaturization, it can reduce the parasitic capacitance between the second conductive layer 220 and the underlying structure (e.g., the collector electrode 160 and the portion of the first conductive layer 200 above the collector electrode 160). Furthermore, the inventors have found that extending the second conductive layer 220 may not cause a significant increase in inductance. Therefore, the heterojunction bipolar transistor 50 can still exhibit superior gain performance at higher operating frequencies.
[0133] Figures 6A to 6C This is a top view of power amplifiers 60A, 60B, and 60C with various designs according to some embodiments of this application. Compared to Figure 2A Power amplifiers 60A, 60B, and 60C are illustrated with two heterojunction bipolar transistors 20A placed together. Additionally, the closed-loop portion of the second conductive layer 220 (illustrated in...) can also be... Figure 4 and Figure 5 (In the middle) Heterojunction bipolar transistors integrated into power amplifiers 60A, 60B, and 60C. For simplicity, the characteristics of components with the same reference symbol are... Figure 2A The components shown have similar characteristics, and their details will not be repeated here.
[0134] Reference Figure 6A The heterojunction bipolar transistors are placed close to each other. Within each heterojunction bipolar transistor, a closed loop portion of the second conductive layer 220 can be incorporated (illustrated in...). Figure 4 (In the middle) surrounds the base mesa 130. As previously mentioned, the closed loop portion of the second conductive layer 220 facilitates signal input transmission between opposite sides of the base electrode 150, using a different path than the paths through the plurality of fingers 150B of the base electrode 150, thus reducing base resistance. Furthermore, when the closed loop portion of the second conductive layer 220 partially overlaps with the collector electrode 160, less circuit space is consumed, which is advantageous for the miniaturization of the overall component. The improved base resistance allows the power amplifier 60A to exhibit superior gain performance at higher operating frequencies.
[0135] Reference Figure 6B The diagram shows a power amplifier 60B. Compared to... Figure 6AThe heterojunction bipolar transistors are electrically coupled to each other by sharing one of their collector electrodes 160. Furthermore, the lower collector layer 110 can be a single structure shared by the two heterojunction bipolar transistors of the power amplifier 60B. Although the first conductive layer 200 is shown as having two separate portions on the shared collector electrode 160, it can also be modified to a single portion on the shared collector electrode 160, which is also shared by the two heterojunction bipolar transistors of the power amplifier 60B. As previously mentioned, the closed-loop portion of the second conductive layer 220 within each heterojunction bipolar transistor facilitates signal input transmission between opposite sides of the base electrode 150, using a different path than the path through the plurality of fingers 150B of the base electrode 150, thus reducing base resistance. Furthermore, when the closed-loop portion of the second conductive layer 220 partially overlaps with the collector electrode 160, less circuit space is consumed, which is advantageous for the miniaturization of the overall device. The improved base resistor allows the 60B power amplifier to exhibit superior gain performance at higher operating frequencies.
[0136] Reference Figure 6C The diagram shows a power amplifier 60C. Compared to... Figure 6A In each heterojunction bipolar transistor, the closed-loop portion of the second conductive layer 220 may not overlap with the collector electrode 160. As previously mentioned, this reduces the parasitic capacitance between the second conductive layer 220 and the underlying structure (e.g., the collector electrode 160 and the portion of the first conductive layer 200 above the collector electrode 160). Although the closed-loop portion of the second conductive layer 220 is extended within each heterojunction bipolar transistor, signal input can still be transmitted between opposite sides of the base electrode 150 via a different path than the paths through the multiple fingers 150B of the base electrode 150, thus reducing base resistance. The improved base resistance allows the power amplifier 60C to exhibit superior gain performance at higher operating frequencies.
[0137] Figure 7A and Figure 7B These are top views of heterojunction bipolar transistors 70A and 70B with different designs, according to some embodiments of this application. Compared to Figure 2A The heterojunction bipolar transistors 70A and 70B illustrate the closed-loop portion of the second conductive layer 220. Furthermore, compared to... Figure 5 There is only one signal input S, which can enter the heterojunction bipolar transistors 70A and 70B through the closed loop portion of the second conductive layer 220. For simplicity, the characteristics of elements with the same reference symbols are... Figure 2A The components shown have similar characteristics, and their details will not be repeated here.
[0138] Reference Figure 7AThe signal input S can be sent to the first side 136A of the base layer 136 via a third path, and can also be sent to the second side 136B of the base layer 136 via a fourth path. The third path allows the signal input S to propagate through the conductive portion 220A of the second conductive layer 220 on the first side 136A of the base layer 136, the via 215B, the portion of the first conductive layer 200 on the first side 136A of the base layer 136, and the via 185A (illustrated in...). Figure 3 The fourth path allows the signal input S to propagate through the transmission portion 220B of the second conductive layer 220, the via 215C, the portion of the first conductive layer 200 on the second side 136B of the base layer 136, and the via 185B (shown in the diagram). Figure 3 The base electrode 150 is connected to the second side 136B of the base layer 136, and the base layer 136.
[0139] Continue to refer to Figure 7A The signal input S is introduced through the metal wire structure of the second conductive layer 220, and the signal input S can reach the first side 136A and the second side 136B of the base layer 136 at almost the same time. Since the third and fourth paths can propagate through substantially the same components, phase delay and / or skin effect are reduced. The improvement in phase delay and / or skin effect is particularly significant at higher frequencies. The configuration of the heterojunction bipolar transistor 70A can deliver the signal input S to both the first side 136A and the second side 136B of the base layer 136. When there is a dual signal input configuration, the base resistance is reduced. The improved base resistance allows the heterojunction bipolar transistor 70A to exhibit superior gain performance at higher operating frequencies.
[0140] Reference Figure 7B The diagram illustrates a heterojunction bipolar transistor 70B. Compared to... Figure 7A The signal input S is placed in the middle of the transmission section 220B of the second conductive layer 220. This arrangement allows the amount of signal input S transmitted toward the first side 136A and the second side 136B of the base layer 136 to be evenly distributed. Furthermore, since the propagation paths toward the first side 136A and the second side 136B within the second conductive layer 220 are substantially equal, time delay can be eliminated. The configuration of the heterojunction bipolar transistor 70B allows the signal input S to be delivered to both the first side 136A and the second side 136B of the base layer 136. When a dual signal input configuration is provided, the base resistance can be reduced. The improved base resistance allows the heterojunction bipolar transistor 70B to exhibit superior gain performance at higher operating frequencies.
[0141] Figure 8A and Figure 8B These are top views of power amplifiers 80A and 80B with different designs, according to some embodiments of this application. Compared to Figure 7A Power amplifiers 80A and 80B are illustrated with two heterojunction bipolar transistors 70A placed together. For simplicity, components with the same reference numerals are characterized as... Figure 7A The components shown have similar characteristics, and their details will not be repeated here.
[0142] Reference Figure 8A The heterojunction bipolar transistors are placed close to each other. As previously mentioned, the signal input S can reach the first side 136A and the second side 136B of the base layer 136 at almost the same time. Furthermore, phase delay and / or skin effect can be improved, with the improvement being particularly significant at higher frequencies. The power amplifier 80A is configured to feed the signal input S to both the first side 136A and the second side 136B of the base layer 136. With a dual signal input configuration, the base resistance is reduced. The improved base resistance allows the power amplifier 80A to exhibit superior gain performance at higher operating frequencies.
[0143] Reference Figure 8B The diagram shows the 80B power amplifier. Compared to... Figure 8A The heterojunction bipolar transistors are electrically coupled to each other by sharing a transmission section 220B of one of the second conductive layers 220. When the closed loop portions of the two heterojunction bipolar transistors partially overlap, less circuit space is consumed, which is advantageous for the miniaturization of the overall device. Furthermore, a signal input S can be fed into both heterojunction bipolar transistors. As previously mentioned, the signal input S can reach the first side 136A and the second side 136B of the base layer 136 at almost the same time. In addition, phase delay and / or skin effect can be improved, with the improvement being particularly significant at higher frequencies. The power amplifier 80B is configured to feed the signal input S into both the first side 136A and the second side 136B of the base layer 136. When there is a dual signal input configuration, the base resistance can be reduced. The improved base resistance allows the power amplifier 80B to exhibit superior gain performance at higher operating frequencies.
[0144] Figure 9 This is a top view of a heterojunction bipolar transistor 90 according to some embodiments of this application. Compared to Figure 5 The transmission portion 200B of the first conductive layer 200 can replace the transmission portion 220B of the second conductive layer 220. In some embodiments, the conductive portion 220A of the second conductive layer 220 can be electrically connected to the transmission portion 200B of the first conductive layer 200 through a via 215D. For simplicity, the features of elements having the same reference numerals are... Figure 5 The components shown have similar characteristics, and their details will not be repeated here.
[0145] Reference Figure 9 After forming a dielectric layer inserted between the first conductive layer 200 and the second conductive layer 220, a via 215D can be formed in the dielectric layer. The via 215D can be provided on the transmission portion 200B of the first conductive layer 200. The method for forming the via 215D is similar to the method for forming the via 215A, and its details will not be repeated here.
[0146] Continue to refer to Figure 9 It is worth noting that a closed loop surrounding the base mesa 130 can be formed by both the first conductive layer 200 and the second conductive layer 220, rather than solely by the second conductive layer 220. As previously mentioned, although the closed loop portion of the heterojunction bipolar transistor 90 is formed by two different metal layers, the signal input can still be transmitted between the opposite sides of the base electrode 150, using a different path than the path through the multiple fingers 150B of the base electrode 150, thus reducing the base resistance. The improved base resistance allows the heterojunction bipolar transistor 90 to exhibit superior gain performance at higher operating frequencies.
[0147] The heterojunction bipolar transistor or power amplifier of this application exhibits a reduction in base resistance by adding a new signal input terminal to the base terminal relative to the existing signal input terminal. With a dual signal input configuration, the stability coefficient of the maximum stable gain and / or the maximum usable gain (when k equals 1) can be extended to higher frequencies. In this way, the heterojunction bipolar transistor and power amplifier can exhibit superior gain performance at higher operating frequencies.
[0148] The features of several embodiments have been summarized above to enable those skilled in the art to better understand the viewpoint of this application. Those skilled in the art should understand that other processes and structures can be easily designed or modified based on this application to achieve the same purpose and / or advantages as the embodiments described herein. Those skilled in the art should also understand that such equivalent structures do not depart from the spirit and scope of this application, and various changes, substitutions, and replacements can be made without departing from the spirit and scope of this application. Therefore, the scope of protection of this application should be determined by the claims. Furthermore, although this application has been disclosed above with reference to several preferred embodiments, it is not intended to limit the scope of this application.
[0149] References to features, advantages, or similar language throughout this specification do not imply that all features and advantages achievable using this application should or may be implemented in any single embodiment of this application. Rather, language relating to features and advantages is to be understood as meaning that a particular feature, advantage, or characteristic described in connection with an embodiment is included in at least one embodiment of this application. Thus, the discussion of features and advantages, as well as similar language, throughout this specification may, but does not necessarily, represent the same embodiments.
[0150] Furthermore, in one or more embodiments, the features, advantages, and characteristics described in this application may be combined in any suitable manner. Based on the description herein, those skilled in the art will recognize that this application may be implemented without one or more specific features or advantages of a particular embodiment. In other instances, additional features and advantages may be identified in certain embodiments that may not be present in all embodiments of this application.
Claims
1. A heterojunction bipolar transistor, characterized in that, The heterojunction bipolar transistor includes: One base; A bottom collector layer is disposed on the substrate; A higher collector layer is disposed on the lower collector layer; A collector layer is disposed on the previous collector layer; A base layer is disposed on the collector layer, wherein the base layer, the collector layer, and the upper collector layer form a base mesa, and wherein, from a top view, the base layer includes a first side and a second side, the second side being relative to the first side; An emitter layer is disposed on the base layer; A first dielectric layer is disposed on the bottom collector layer and the base mesa; A base electrode is disposed on the first dielectric layer and connected to the base layer through a first via, wherein the first via is disposed in the first dielectric layer; A second dielectric layer is disposed on the base electrode; and A first conductive layer is disposed on a second dielectric layer; wherein the first conductive layer is connected to the base electrode through a second via, the second via being disposed in the second dielectric layer and on the first side of the base layer; the first conductive layer is connected to the base electrode through a third via, the third via being disposed in the second dielectric layer and on the second side of the base layer; and the second via and the third via are laterally spaced from the base layer.
2. The heterojunction bipolar transistor as described in claim 1, characterized in that, The base electrode includes a first connection portion on the first side of the base layer, and a first finger and a second finger connected to the first connection portion.
3. The heterojunction bipolar transistor as described in claim 2, characterized in that, The first conductive layer is connected to the first connection portion of the base electrode through the second via on the first side of the base layer.
4. The heterojunction bipolar transistor as described in claim 2, characterized in that, The base electrode further includes a second connection portion on the second side of the base layer, and the first finger and the second finger are further connected to the second connection portion.
5. The heterojunction bipolar transistor as described in claim 4, characterized in that, The first conductive layer is connected to the first connection portion of the base electrode through the second via on the first side of the base layer, and is connected to the second connection portion of the base electrode through the third via on the second side of the base layer.
6. The heterojunction bipolar transistor as described in claim 4, characterized in that, The first connecting portion, the second connecting portion, the first finger portion, and the second finger portion of the base electrode form a closed loop.
7. The heterojunction bipolar transistor as described in claim 6, characterized in that, The closed loop surrounds the emitter layer.
8. The heterojunction bipolar transistor as described in claim 3, characterized in that, The first finger of the base electrode includes a first end on the second side of the base layer, the second finger of the base electrode includes a second end on the second side of the base layer, the first conductive layer includes a second connection portion, and the second connection portion of the first conductive layer is connected to the first end of the first finger through the third guide hole on the second side of the base layer.
9. The heterojunction bipolar transistor as described in claim 8, characterized in that, The second connection portion of the first conductive layer is further connected to the second end of the second finger portion through a fourth guide hole, the fourth guide hole being disposed in the second dielectric layer and on the second side of the base layer.
10. The heterojunction bipolar transistor as claimed in claim 9, characterized in that, The first connecting portion, the first finger, the second finger, and the second connecting portion of the first conductive layer of the base electrode form a closed loop.
11. The heterojunction bipolar transistor as claimed in claim 1, characterized in that, The heterojunction bipolar transistor further includes: A collector electrode is disposed on the substrate; wherein the collector electrode extends from the top surface of the lower collector layer to the inclined sidewall of the base mesa.
12. The heterojunction bipolar transistor as claimed in claim 11, characterized in that, The collector electrode is connected to the upper collector layer through a fourth via, which is disposed in the first dielectric layer.
13. A heterojunction bipolar transistor, characterized in that, The heterojunction bipolar transistor includes: One base; A base mesa is disposed on the substrate, wherein the base mesa includes a collector layer and a base layer, the base layer is disposed on the collector layer, and wherein, from a top view, the base layer includes a first side and a second side, the second side being relative to the first side; An emitter layer is disposed on the base layer; A base electrode is disposed on the substrate and connected to the base layer; A dielectric layer is disposed on the base electrode; wherein a first via is formed in the dielectric layer on the first side of the base layer, and a second via is formed in the dielectric layer on the second side of the base layer; and A conductive component is disposed on the dielectric layer; wherein the conductive component is connected to the base electrode through the first via and the second via.
14. The heterojunction bipolar transistor as described in claim 13, characterized in that, The conductive component and the base electrode form a closed circuit.
15. The heterojunction bipolar transistor as described in claim 13, characterized in that, The conductive component includes a closed loop on the dielectric layer.
16. The heterojunction bipolar transistor as claimed in claim 13, characterized in that, The first guide hole is laterally spaced from the base layer.
17. The heterojunction bipolar transistor as claimed in claim 16, characterized in that, The second guide hole is laterally spaced from the base layer.
18. The heterojunction bipolar transistor as claimed in claim 13, characterized in that, The base electrode includes a first connection portion and a plurality of fingers, the fingers being connected to the first connection portion, and the length direction of the fingers being substantially perpendicular to the first side of the base layer.
19. The heterojunction bipolar transistor as claimed in claim 13, characterized in that, The base mesa further includes a primary collector layer disposed between the substrate and the collector layer.
20. A power amplifier, characterized in that, The power amplifier includes the heterojunction bipolar transistor as described in claim 13.