Optically enhanced multi-chip package

Abstract

Optical chip-to-chip interconnects can use micro-LEDs as light sources. Interconnected chips can be on the same substrate. A pair of endpoint chips can each have an associated optical transceiver subsystem with transceiver circuitry in the transceiver chip. Optical communication can be provided between the optical transceiver subsystems, with the optical transceiver subsystems communicating with their associated endpoint chips through metal layers in the substrate.

Description

Technical Field

[0001] This invention generally relates to optical communication systems, and more generally to optical communication between chips using miniature LEDs. Background Technology

[0002] The demands for computing and networking performance appear to be constantly increasing. Key applications driving these demands include data center servers, high-performance computing clusters, artificial neural networks, and network switches.

[0003] For decades, reducing transistor size in conjunction with increasing die size has driven dramatic improvements in integrated circuit (IC) performance and cost, as outlined in Moore's Law. This has allowed billions of transistors to be packed onto a single system-on-a-chip (SoC), previously fragmented across multiple ICs.

[0004] However, Moore's Law appears to be reaching its limits, as shrinking feature sizes to below 10nm leads to diminishing marginal performance advantages with decreasing yields and increasing cost per transistor. In addition to these limitations, a single IC can contain only so many functionalities, and these functionalities are limited because the IC's process cannot be optimized simultaneously for different functionalities, such as logic, DRAM, and I / O.

[0005] Deintegrating SoCs into smaller "chiplets" has significant advantages, including:

[0006] The manufacturing process for each small chip can be optimized for its function, such as logic, DRAM, high-speed I / O, etc.

[0007] Small chips are ideal for reuse in multiple designs.

[0008] Small chips are inexpensive and faster to develop.

[0009] Smaller chips have higher yields because they contain fewer components.

[0010] However, chiplets have a major drawback compared to SoCs: using chiplets typically requires far more chip-to-chip connections. Chip-to-chip connections are generally much less dense and require far more power (e.g., energy normalized to per bit) compared to on-chip connections between functional blocks in an SoC. Summary of the Invention

[0011] Some embodiments provide optical chip-to-chip interconnects, wherein micro-LEDs serve as the light source. In some embodiments, the interconnect has a linear connection density of >10 Tbps / mm. In some embodiments, the interconnect has a linear connection density of >1 Pbps / cm. 2The interconnect density is [specifically, the interconnects]. In some embodiments, the interconnects have a power consumption of <100 fJ / bit. In some embodiments, the interconnects have an interconnect length of >10 cm, wherein there is no additional power dissipation. In some embodiments, the interconnects have a delay close to that limited by the speed of light.

[0012] In some embodiments, the micro-LEDs are modulated at a rate >1 Gbps. In some embodiments, the parallel optical link (POL) includes micro-LEDs as a light source. In some embodiments, the parallel optical link provides an interconnect network for high-performance processing and networking applications.

[0013] Some embodiments provide an optical interconnect integrated circuit, comprising: a substrate; a first integrated circuit (IC) chip including a logic circuit system, the first IC chip being mounted to the substrate; a first optical transceiver subsystem being mounted to the substrate; a second optical transceiver subsystem being mounted to the substrate; a second IC chip including a logic circuit system, the second IC chip being mounted to the substrate; the substrate including a metal signal layer connecting the first IC chip and the first optical transceiver subsystem, and connecting the second IC chip and the second optical transceiver subsystem; and a plurality of waveguide cores optically connected to the first optical transceiver subsystem and the second optical transceiver subsystem.

[0014] In some embodiments, the substrate includes a metal signal layer connecting the first IC chip and the second IC chip. In some embodiments, the substrate does not include a metal signal layer connecting the first IC chip and the second IC chip. In some embodiments, the substrate is in a package. In some such embodiments, the substrate is coupled to the package via solder balls. In some such embodiments, the substrate includes a first through-substrate path that connects at least some of the solder balls of the substrate and package to the first IC chip. In some such embodiments, the substrate includes a second through-substrate path that connects at least some of the other solder balls of the substrate and package to the second IC chip.

[0015] In some embodiments, the first optical transceiver subsystem includes a first array of microLEDs and photodetectors, a first microLED driver circuit system for driving the microLEDs of the first array of microLEDs and photodetectors to emit light according to information from the first IC chip, and a first receiver circuit system for processing signals received by the photodetectors of the first array of microLEDs and photodetectors to provide information to the first IC chip. In some such embodiments, the first microLED driver circuit system and the receiver circuit system are located within the first transceiver IC chip. In some such embodiments, the first microLED driver circuit system includes a first array of microLED driver circuit systems, and the first receiver circuit system includes a first array of receiver circuit systems. In some such embodiments, the microLEDs of the first array of microLEDs and photodetectors are bonded to the first transceiver IC chip. In some such embodiments, the photodetectors of the first array of microLEDs and photodetectors are monolithically integrated into the first transceiver IC chip. In some such embodiments, the first array of microLEDs and photodetectors is arranged in a chip configuration.

[0016] In some embodiments, the first optical transceiver subsystem includes a first array of micro-LEDs and photodetectors, a first micro-LED driver circuit system for driving the micro-LEDs of the first array of photodetectors to emit light according to information from the first IC chip, and a first receiver circuit system for processing signals received by the photodetectors of the first array of micro-LEDs and photodetectors to provide information to the first IC chip. The second optical transceiver subsystem includes a second array of micro-LEDs and photodetectors, a second micro-LED driver circuit system for driving the micro-LEDs of the second array of photodetectors to emit light according to information from the second IC chip, and a second receiver circuit system for processing signals received by the photodetectors of the second array of micro-LEDs and photodetectors to provide information to the second IC chip. In some such embodiments, the first micro-LED driver circuit system and the receiver circuit system are located in the first transceiver IC chip, and the second micro-LED driver circuit system and the receiver circuit system are located in the second transceiver IC chip. In some such embodiments, the second micro-LED driver circuit system includes a second array of micro-LED driver circuit systems, and the second receiver circuit system includes a second array of receiver circuit systems. In some such embodiments, the microLEDs of the second array of microLEDs and photodetectors are bonded to the second transceiver IC chip. In some such embodiments, the photodetectors of the second array of microLEDs and photodetectors are monolithically integrated into the second transceiver IC chip. In some such embodiments, the second array of microLEDs and photodetectors is arranged in a chip-like configuration.

[0017] In some embodiments, the plurality of waveguide cores are part of a multilayer planar waveguide stack.

[0018] In some embodiments, the first optical transceiver subsystem includes a first array of microLEDs and photodetectors, a first microLED driver circuitry for driving the microLEDs of the first array of microLEDs and photodetectors to emit light according to information from the first IC chip, and a first receiver circuitry for processing signals received by the photodetectors of the first array of microLEDs and photodetectors to provide information to the first IC chip, wherein the plurality of waveguide cores are the cores of a multi-core optical fiber. In some such embodiments, the multi-core optical fiber is a coherent imaging fiber. In some such embodiments, the cores are small and densely packed such that light from each microLED will form a spot of light spanning multiple cores.

[0019] In some embodiments, the first optical transceiver subsystem includes a first array of microLEDs and photodetectors, a first microLED driver circuitry for driving the microLEDs of the first array of microLEDs and photodetectors to emit light according to information from the first IC chip, and a first receiver circuitry for processing signals received by the photodetectors of the first array of microLEDs and photodetectors to provide information to the first IC chip, wherein the plurality of waveguide cores are the cores of a multi-core optical fiber, and further includes a steering mirror optically positioned between the first array of microLEDs and photodetectors and the multi-core optical fiber. Some such embodiments further include at least one lens optically positioned between the first array of microLEDs and photodetectors and the multi-core optical fiber.

[0020] These and other aspects of the invention will be more fully understood upon reading this disclosure. Attached Figure Description

[0021] Figure 1 This is a block diagram illustrating the electrical architecture of a first optical interconnect IC according to aspects of the present invention.

[0022] Figure 2a A substrate is shown that has an optoelectronic (OE) device coupled to a transceiver IC by direct bonding according to an aspect of the invention.

[0023] Figure 2b A substrate of an OE device having a solder ball coupled to a transceiver IC is shown according to an aspect of the present invention.

[0024] Figure 2c An OE device, according to aspects of the present invention, is monolithically integrated into a transceiver IC.

[0025] Figure 3a To c, we show different physical configurations for implementing the transceiver subsystem according to aspects of the present invention.

[0026] Figure 4 This demonstrates the integration of an in-package planar optical link according to aspects of the present invention.

[0027] Figure 5 This demonstrates the integration of an intermediary layer and an internal optical link within the package according to aspects of the present invention.

[0028] Figure 6a The diagram above illustrates various optoelectronic device configurations according to aspects of the present invention.

[0029] Figure 7a A cross-sectional view of a multi-core optical fiber according to an aspect of the present invention is shown.

[0030] Figure 7bA cross-sectional view of a coherent imaging fiber according to an aspect of the present invention is shown, along with an exploded view of the portion having the fiber.

[0031] Figure 7c A multilayer planar waveguide stack according to an aspect of the present invention is shown.

[0032] Figure 8a An aperture in the substrate, according to an aspect of the invention, is shown that allows an optical connection to extend across to the other side of the substrate.

[0033] Figure 8b Examples of the use of a transparent substrate according to aspects of the present invention are shown.

[0034] Figure 9a An optoelectronic (OE) subassembly according to an aspect of the present invention is shown.

[0035] Figure 9b The MW subassemblies according to aspects of the present invention are shown.

[0036] Figure 9c The invention demonstrates the use of a steering mirror for redirecting a light beam by ninety degrees.

[0037] Figure 9d The invention demonstrates the use of two steering mirrors for redirecting a light beam by 180 degrees. Detailed Implementation

[0038] Figure 1 This is a block diagram illustrating the electrical architecture of a first optical interconnect IC. The IC includes an IC circuitry system 111 for performing logic and / or other functions. A transceiver circuitry system 113 is coupled to the IC circuitry system. The transceiver circuitry system includes an array of miniature LED driver circuitry systems 115 and an array of receiver circuitry systems 117, and in some embodiments, is composed of said arrays. The transceiver circuitry system is part of a transceiver subsystem 119. The transceiver subsystem also includes an array of miniature LEDs 121 and photodetectors 123. In some embodiments, the transceiver circuitry system may be monolithically integrated into the same IC containing the endpoint IC circuitry system. In some embodiments, the transceiver circuitry system may be contained in one or more separate transceiver ICs. The miniature LED driver circuitry system drives the miniature LED array to emit light 125 to carry information provided from the endpoint IC circuitry system to the driver circuitry system. An N-bit wide unidirectional parallel bus connection can be used from the transceiver subsystem to a second IC ( Figure 1(Not shown in the diagram), or in some embodiments, N optical links of multiple second ICs are implemented. A corresponding unidirectional parallel bus can be implemented by adding N additional optical links from the transceiver subsystem of the second IC to the transceiver subsystem of the first IC. A photodetector receives light 127 from the corresponding parallel bus, the light carrying information from the second IC. The photodetector provides an electrical signal carrying the received information to a receiver circuit system, which processes the signal and provides the information to an endpoint IC circuit system.

[0039] Optoelectronic (OE) devices (such as microLEDs and photodetectors) can incorporate structures that enhance optical coupling efficiency. For example, microLEDs can incorporate various structures that improve light extraction efficiency (LEE), including surface roughening, specific LED shapes, and encapsulation in high-refractive-index materials. They can also include structures such as mirrors and lenses that collect light from the large intrinsic emission solid angle of the LED into a smaller solid angle that better matches the numerical aperture of the remainder of the optical link. MicroLEDs are well-suited for this reduction in pyramidal size due to their small size and therefore relatively small optical extension.

[0040] In some embodiments, OE devices can be integrated with transceiver ICs via hybrid integration technology. Figure 2a This demonstrates an example where the hybrid integration technology is directly coupled. In Figure 2a In this, the substrate with OE device 211 is coupled to transceiver IC 213 via direct bonding 215. Figure 2b This demonstrates an example of hybrid integration technology used in solder bump bonding. Figure 2b In this configuration, the substrate with OE device 211 is coupled to transceiver IC 213 via solder bumps 217. In some embodiments, OE device 221 can be monolithically integrated into transceiver IC 223, such as... Figure 2c The feasibility of monolithic integration largely depends on the IC materials and the source wavelength. Silicon typically supports monolithic integration of photodetectors with wavelengths <1µm, but due to its indirect bandgap, it may not be feasible for monolithic optical source integration. In contrast, GaAs, InP, and GaN support monolithic integration of both photodetectors and optical sources. It is possible to hybridize monolithic and hybrid integration on a single transceiver IC. For example, the transceiver IC may include a micro-LED, which is directly bonded to the IC along with a monolithically integrated photodiode.

[0041] The transceiver subsystem can be implemented in several different physical configurations, such as... Figure 3a See section c for details. The configuration includes a substrate, which can be rigid or flexible. Rigid substrate materials include silicon, glass, and laminates containing epoxy resin or resin. Flexible substrates can be made of various polymers.

[0042] exist Figure 3a In this configuration, a first transceiver IC 311a is mounted on top of a substrate 313 with the active side facing upwards. A first OE device 315a is located on top of the transceiver IC. In some embodiments, the first transceiver IC is a very thin "micro-IC," only a few tens of micrometers thick. From the first terminal IC ( Figure 3a The electrical connection from the first transceiver IC (not shown) to the first transceiver IC consists of a deposited metal trace 316 that traverses the top of the substrate and the side and top surfaces of the first transceiver. A first OE device is shown on the active side of the first transceiver IC. The first OE device receives signals from and / or supplies signals to the first transceiver IC. The first OE device is shown embedded in or encapsulated in a waveguide core 317. The waveguide core extends to the second transceiver IC 311b, wherein a waveguide cladding 319 is shown on top of the substrate between the first and second transceiver ICs. A second OE device 315b is shown on the active side of the second transceiver IC, wherein the second OE device is also shown embedded in or encapsulated in a waveguide core. The second transceiver IC and the second OE can be described as with respect to the first transceiver IC and the first OE. Regarding the first transceiver IC, the second transceiver IC has a connection from a second endpoint IC (…). Figure 3a Electrical connections (not shown in the image). The first and second transceiver ICs, OE devices, and waveguides can therefore essentially provide optical communication between the first endpoint IC and the second endpoint IC.

[0043] exist Figure 3b In this configuration, transceiver ICs 311a and 311b are placed within cavities in substrate 313. Material can be used to fill any gaps between the IC and the substrate. This, for example, allows for planar electrical connections from the substrate to the IC. Regarding... Figure 3a OE devices 315a and 315b are located on top of the transceiver IC.

[0044] exist Figure 3c In this configuration, transceiver ICs 311a and 311b are mounted to substrate 313 with their active sides facing down. This simplifies the electrical connections from the substrate to the transceiver ICs. Figure 3c In the transceiver IC containing OE devices 315a and 315b, a portion of each is suspended above a cavity in the substrate. The OE devices are located on the bottom of the transceiver IC, within the cavity in the substrate.

[0045] against Figure 3a In embodiment c, the waveguide core can be a planar optical waveguide array, for example, comprising a bottom cladding and a core array, each of which guides light from a microLED at one end to a photodetector at the other end. Alternatively, both the microLED and the photodetector can be positioned at both ends of each waveguide. This enables bidirectional transmission through each waveguide, thereby supporting a full-duplex link.

[0046] exist Figure 3a In embodiment c, the waveguide cladding layer is deposited in a suitable region of the substrate. A waveguide core is fabricated on top of the cladding layer in a manner appropriate to... Figure 3c (below), so that each OE device is encased in a separate waveguide core.

[0047] Figure 4 This demonstrates the integration of a planar optical link within the package. A first endpoint IC 411a is mounted to a pad in package 413 via solder bumps 415. Several pads connect to traces in the package's metallic signal layer 417 (or the package's substrate 418), providing connectivity to a first transceiver subsystem 419a. The first transceiver subsystem can be as previously described. One or more waveguide cores 421 couple the first transceiver subsystem to a second transceiver subsystem 419b, which can also be as previously described. For example, the waveguide cores can be decoupled from the substrate via a waveguide cladding 423. The second transceiver subsystem is also connected to the second endpoint IC 411b via traces in the package's metallic signal layer (or the package's substrate). Figure 4 In this embodiment, the encapsulated metal signal layer does not provide electrical communication between the first endpoint IC and the second endpoint IC, although such electrical communication may be provided separately in some embodiments.

[0048] Figure 5 This demonstrates the integration of the interposer and the planar optical links within the package. A first endpoint IC 511a is mounted to pads on an interposer 513 using solder bumps 515. Some pads connect to through-substrate vias (TSVs) 517, which in turn connect to the package 519 via solder bumps. Other pads in the interposer connect to traces in the metal signal layer 520 of the interposer, thereby providing connectivity to a first transceiver subsystem 521a. The first transceiver subsystem can be as previously described. One or more waveguide cores 523 couple the first transceiver subsystem to a second transceiver subsystem 521b, which can also be as previously described. The second transceiver subsystem is also connected to the second endpoint IC 511b via traces in the metal signal layer of the interposer. Figure 5 In this process, the metal signal layer of the interposer provides electrical communication between the first endpoint IC and the second endpoint IC, although this electrical communication is not provided in some embodiments.

[0049] Figure 2a Example c illustrates an optoelectronic device integrated on the active side of an IC. In a vertically emitting parallel optical link (VLPOL), a 2D array of OE devices is integrated with the IC. The optoelectronic (OE) device comprises a combination of micro-LEDs and photodetectors, and in some embodiments, is composed of said combination.

[0050] As discussed above, OE devices can be monolithically integrated or hybrid integrated with ICs. Typically, the feasibility of monolithic integration depends on the IC material and the link wavelength. In the case of heterogeneous integration, dies with large LED or photodetector arrays can be attached to the IC in a single attachment process.

[0051] Note that OE devices can typically be positioned anywhere on the IC surface. This ability to place optical I / O anywhere on the IC surface offers several benefits, including: interconnect density that scales with the IC area (rather than edge length), thereby enabling increased chip-to-chip interconnect density; and the ability to place off-chip interconnects very close to the associated processing logic, allowing for more flexible optimization of IC layout and reduced on-chip interconnect resources.

[0052] Links are often expected to be bidirectional. In the case of highly parallel bus-like optical connections, it is desirable for the two directions of the link to be physically close to each other. This can be achieved through, for example... Figure 6a The various optoelectronic device configurations shown in e are implemented. Figure 6a In the design, miniature LEDs 611 and photodetectors 613 alternate on a rectangular grid. Figure 6b In this configuration, miniature LEDs and photodetectors alternate on a hexagonal grid. Two of these configurations place each photodiode close to multiple miniature LEDs, which can introduce electrical and optical crosstalk problems. From a manufacturing / assembly perspective, these configurations may also be unattractive, as manufacturing and assembling monolithic arrays of OE devices may be easier.

[0053] Problems associated with these alternating configurations can be overcome or reduced by “tiling” an alternating array of micro-LEDs and photodetectors. Figure 6c The display features hexagonal panels of miniature LEDs and photodetectors, with individual devices mounted on a hexagonal grid. Figure 6d A rectangular panel displaying miniature LEDs and photodetectors, with individual devices on a rectangular grid. Figure 6e The display features approximately rectangular panels of miniature LEDs and photodetectors, with individual devices mounted on a hexagonal grid.

[0054] Two-dimensional OE device arrays can be docked to multi-core waveguide arrays. Various types of multi-core waveguides can be used. Figure 7a The diagram shows a cross-sectional view of a multi-core optical fiber, where each core can be coupled to a miniature LED at one end and to a photodetector at the other end. Figure 7a The multi-core optical fiber contains multiple waveguide cores 711, each of which is surrounded by a cladding 713.

[0055] Figure 7bThe diagram shows a cross-sectional view of a coherent imaging fiber, an exploded view of a portion of the fiber. The fiber comprises numerous very small-diameter "microcores" 721, each surrounded by a cladding 723. The term "coherent imaging fiber" refers to the fact that the optical density distribution at the fiber's input surface is approximately reproduced at the fiber's output surface. More precisely, the output optical distribution is a spatially sampled version of the input optical distribution, where the spatial sampling frequency is determined by the center-to-center spacing of the microcores. In some embodiments, the cores are small and dense enough that light from each microLED forms a spot across multiple cores, and the multiple cores thus deliver light from each input microLED to each photodetector. This arrangement is flexible enough to accommodate various optical configurations (e.g., different numbers of OE devices, different spot sizes from the microLEDs). Differential phase shift across the cores can cause output speckle problems due to spatially coherent input, but the low spatial and temporal coherence associated with the microLED source generally reduces or eliminates the speckle problem.

[0056] Figure 7c This demonstrates a multi-layer planar waveguide stack. The multi-layer planar waveguide stack comprises multiple planar layers, each containing multiple waveguide cores 731 surrounded by a waveguide cladding 733. Planar waveguides can typically be used in a single-layer configuration. Multiple layers can be stacked to implement a 2D array of waveguides. The waveguide array can be fabricated on a rigid or flexible planar substrate, but using a flexible substrate offers significant advantages, including: for highly interconnected architectures where ICs are located in a plane, many connections may intersect each other; and if we can freely distribute ICs across multiple substrates that may or may not be located in a single plane, then using flexible waveguides can traverse a third dimension.

[0057] Even with high-performance optical links, ICs typically still use numerous electrical connections for power, ground, and control lines. Therefore, optical links should coexist with the electrical package. High-performance packages typically use solder bumps or direct bonding to create dense connections with good electrical and thermal properties from the IC's active circuitry side to the substrate.

[0058] Optical connections from the same active circuitry side of the IC are advantageous. However, this can potentially create problems because the substrate is very close to the IC when using bumps or direct bonding. To allow sufficient space for optical connections, it is advantageous for the optical connections to traverse the substrate. Figure 8a This demonstrates a hole in the substrate that allows optical connections to extend across to the other side of the substrate. Both the optical coupling assembly and the multi-core waveguide assembly are mounted within the hole. (Example:) Figure 8aAs shown, IC 811 is mounted to substrate 813. The substrate includes vias 815, which are located above (or below) portions of the IC, depending on orientation. An OE device array 816 is mounted on the IC, within the volume of the vias. An optical coupling assembly 817 is on the OE device array, with a multi-core waveguide coupling assembly 819 coupled to the optical coupling assembly. Figure 8a In the embodiment described herein, both the optical coupling assembly and the multi-core waveguide coupling assembly are located within a hole in the substrate. The multi-core waveguide 821 extends from the multi-core waveguide coupling assembly through a side of the substrate opposite to the side of the IC.

[0059] An alternative method can be implemented using a substrate that is transparent at the wavelength of the link. Figure 8b Examples of the use of transparent substrates are shown. Figure 8b In this configuration, IC 811 is mounted on a transparent substrate 851. An optoelectronic (OE) device array 816 is mounted on the IC and coupled through the substrate to a multi-core waveguide assembly via optical coupling assemblies placed on either side of the substrate. Figure 8b This diagram illustrates an optical coupling assembly 853 on an OE device array and a multi-core waveguide coupling assembly 855 on the opposite side of a transparent substrate (towards the IC). A multi-core waveguide 821 extends from the multi-core waveguide coupling assembly and away from the substrate. Some embodiments may include cavities on the OE side of the substrate for accommodating the optical coupling assembly, such as... Figure 8b It is displayed in the middle.

[0060] Exemplary optical coupling assembly implementations include optoelectronic (OE) subassemblies and multi-waveguide (MW) subassemblies, and in some embodiments, are composed of said subassemblies. Figure 9a The OE subassembly is shown. In the OE subassembly, lens 911 can be positioned approximately one focal length away from the OE device array 913. Figure 9a In one example, the OE device array is shown as being mounted to IC 915 via solder bumps 917. Figure 9b The MW subassembly is shown. In the MW subassembly, lens 921 can be positioned approximately one focal length away from the multi-core waveguide (MW) array 923. The space between the two lenses can span a relatively large range, allowing for the use of two aforementioned substrates with varying substrate thicknesses arranged across the array. The large tolerance of the space between the lenses simplifies the assembly and allows for increased manufacturing yield.

[0061] The ability to accommodate large spaces between lenses also allows for the insertion of additional optical elements, such as steering mirrors. Figure 9cIn this configuration, the OE device array 951 is on IC 953. Light to or from the OE device array travels through a first lens 955. The first lens, and in some embodiments, the OE device array, can be considered as an OE coupling assembly 957. A deflector mirror 959 reflects or deflects light 90 degrees to or from a second lens 961, or reflects or deflects light from or from the second lens 961, by 90 degrees. Light traveling through the second lens reaches or originates from a multi-core waveguide 963. The second lens, and in some embodiments, the end face of the multi-core waveguide, can be considered as a MW coupler assembly 965. Figure 9c This demonstrates the use of a steering mirror to redirect the beam by 90°. This is a powerful technique for reducing the size of systems using vertically oriented parallel optical links (VLPOL). Figure 9d As shown, two steering mirrors 956a and b can be inserted between the first and second lenses 955 and 961 to redirect light by 180°, which is useful in various situations, such as when the emission orientation of the micro-LED is opposite to the direction of the desired signal path, or in various other situations.

[0062] Although the invention has been discussed with respect to various embodiments, it should be recognized that the invention includes novel and non-obvious claims supported by this disclosure.

Claims

1. An optically interconnected integrated circuit comprising: a substrate having a surface; a first integrated circuit (IC) chip including logic circuitry, the first integrated circuit (IC) chip mounted to the substrate; a first optical transceiver subsystem mounted at the surface of the substrate, wherein the first optical transceiver subsystem includes a first array of micro-LEDs and photodetectors, wherein the first optical transceiver subsystem further includes first micro-LED driver circuitry to drive the micro-LEDs of the first array of micro-LEDs and photodetectors to emit light in accordance with information from the first IC chip and first receiver circuitry to process signals received by the photodetectors of the first array of micro-LEDs and photodetectors to provide information to the first IC chip, wherein the first micro-LED driver circuitry and the first receiver circuitry are in a first transceiver IC chip, and wherein the micro-LEDs of the first array of micro-LEDs and photodetectors are bonded to the first transceiver IC chip; a second optical transceiver subsystem mounted at the surface of the substrate, wherein the second optical transceiver subsystem includes a second array of micro-LEDs and photodetectors; a second IC chip including logic circuitry, the second IC chip mounted to the substrate; the substrate including metal signal layers connecting the first IC chip and the first optical transceiver subsystem, and connecting the second IC chip and the second optical transceiver subsystem; and a plurality of waveguide cores optically connecting the first optical transceiver subsystem and the second optical transceiver subsystem.

2. The optically interconnected integrated circuit of claim 1, wherein the substrate includes metal signal layers connecting the first IC chip and the second IC chip.

3. The optically interconnected integrated circuit of claim 1, wherein the substrate does not include metal signal layers connecting the first IC chip and the second IC chip.

4. The optically interconnected integrated circuit of claim 1, wherein the substrate is in a package.

5. The optically interconnected integrated circuit of claim 4, wherein the substrate is coupled to the package by solder balls.

6. The optically interconnected integrated circuit of claim 5, wherein the substrate includes first through-substrate vias connecting at least some of the solder balls coupling the substrate and package to the first IC chip.

7. The optically interconnected integrated circuit of claim 6, wherein the substrate includes second through-substrate vias connecting at least some others of the solder balls coupling the substrate and package to the second IC chip.

8. The optically interconnected integrated circuit of claim 1, wherein the first micro-LED driver circuitry includes a first array of micro-LED driver circuitry, and the first receiver circuitry includes a first array of receiver circuitry. ​ 9. The optically interconnected integrated circuit of claim 1, wherein the photodetectors of the first array of micro-LEDs and photodetectors are monolithically integrated in the first transceiver IC chip.

10. The optically interconnected integrated circuit of claim 1, wherein the first array of micro-LEDs and photodetectors are arranged in a tile.

11. The optically interconnected integrated circuit of claim 1, wherein the second optical transceiver subsystem further comprises second micro-LED driver circuitry to drive the micro-LEDs of the second array of micro-LEDs and photodetectors to emit light in accordance with information from the second IC chip and second receiver circuitry to process signals received by the photodetectors of the second array of micro-LEDs and photodetectors to provide information to the second IC chip.

12. The optically interconnected integrated circuit of claim 11, wherein the first micro-LED driver circuitry and the receiver circuitry are in a first transceiver IC chip and the second micro-LED driver circuitry and the receiver circuitry are in a second transceiver IC chip.

13. The optically interconnected integrated circuit of claim 12, wherein the second micro-LED driver circuitry comprises a second array of micro-LED driver circuitry and the second receiver circuitry comprises a second array of receiver circuitry.

14. The optically interconnected integrated circuit of claim 12, wherein the micro-LEDs of the second array of micro-LEDs and photodetectors are bonded to the second transceiver IC chip.

15. The optically interconnected integrated circuit of claim 12, wherein the photodetectors of the second array of micro-LEDs and photodetectors are monolithically integrated in the second transceiver IC chip.

16. The optically interconnected integrated circuit of claim 12, wherein the second array of micro-LEDs and photodetectors are arranged in a tile.

17. The optically interconnected integrated circuit of claim 1, wherein the plurality of waveguide cores are cores of a multi-core optical fiber.

18. The optically interconnected integrated circuit of claim 17, wherein the multi-core optical fiber is a coherent imaging fiber.

19. The optically interconnected integrated circuit of claim 18, wherein light from each micro-LED will form a spot of light across multiple cores.

20. The optically interconnected integrated circuit of claim 1, wherein the plurality of waveguide cores are part of a multi-layer planar waveguide stack.

21. The optically interconnected integrated circuit of claim 17, further comprising turning mirrors optically interposed between the first array of micro-LEDs and photodetectors and the multi-core optical fiber.

22. The optically interconnected integrated circuit of claim 21, further comprising at least one lens optically interposed between the first array of micro-LEDs and photodetectors and the multi-core optical fiber.

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