Display substrate and display device

Abstract

The present disclosure provides a display substrate and a display device, the display substrate includes a middle display area, and a first peripheral display area and a second peripheral display area located on opposite sides of the middle display area, each pixel unit in the display area includes at least two sub-pixels emitting light of different colors, the opening shape of the sub-pixel is rectangular, including a long side and a short side; in at least one area of ​​the first peripheral display area and the second peripheral display area and the middle display area, each sub-pixel in each pixel unit is arranged in sequence along the extension direction of the short side of the sub-pixel; the extension direction of the first peripheral display area and the second peripheral display area is perpendicular to the extension direction of the short side of the sub-pixel in the middle display area, and the extension direction of the short side of the sub-pixel is perpendicular to the extension direction of the short side of the sub-pixel in the middle display area. The display substrate and the display device disclosed in the present disclosure can improve the problem of rainbow lines on the edges of narrow-framed products and improve product quality.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate and a display device. Background Art

[0002] In the related art, for display products with a narrow bezel design, taking spliced ​​screen products as an example, the bezel of the backlight module will block some pixels around the display panel. Due to the difference in the straightness of the bezel edge, the degree of pixel blocking will be different, resulting in inconsistent degrees of sub-pixel RGB loss of different pixels, which will lead to rainbow patterns on the edge of the screen, and the colors presented on the left and right sides are also different. Summary of the invention

[0003] The embodiments of the present disclosure provide a display substrate and a display device, which can improve the problem of rainbow patterns on the edges of narrow-frame products and improve product quality.

[0004] The technical solutions provided by the embodiments of the present disclosure are as follows:

[0005] The embodiment of the present disclosure provides a display substrate, comprising a middle display area, and a first peripheral display area and a second peripheral display area located on opposite sides of the middle display area, wherein the display area comprises a pixel unit array, each pixel unit comprises at least two sub-pixels emitting light of different colors, and the opening shape of the sub-pixel is a rectangle, and the rectangle comprises a long side and a short side; wherein,

[0006] In at least one of the first peripheral display area and the second peripheral display area, and the middle display area, the sub-pixels in each pixel unit are arranged in sequence along the short side extension direction of the sub-pixels, and the extension direction of the first peripheral display area and the second peripheral display area is perpendicular to the short side extension direction of the sub-pixels in the middle display area, and the short side extension direction of the sub-pixels in at least one of the first peripheral display area and the second peripheral display area is perpendicular to the short side extension direction of the sub-pixels in the middle display area.

[0007] Exemplarily, the pixel unit includes at least a first sub-pixel, a second sub-pixel and a third sub-pixel;

[0008] The first sub-pixel in the middle display area has the same pixel opening area as the first sub-pixel in the first peripheral display area and the first sub-pixel in the second peripheral display area;

[0009] The second sub-pixel in the middle display area has the same pixel opening area as the second sub-pixel in the first peripheral display area and the second peripheral display area;

[0010] The third sub-pixel in the middle display region has the same pixel opening area as the third sub-pixels in the first peripheral display region and the second peripheral display region.

[0011] Exemplarily, the display substrate further includes data lines and gate lines that are intersecting and insulated, and a thin film transistor and a pixel electrode are disposed in each sub-pixel, wherein the gate of the thin film transistor is connected to the gate line, the source is connected to the data line, and the drain is connected to the pixel electrode; wherein,

[0012] In a plurality of pixel units in the same row, sources of thin film transistors of sub-pixels of light of different colors are respectively connected to different data lines;

[0013] In multiple pixel units in the same row, the gates of the thin film transistors of each sub-pixel are connected to the same gate line adjacent to the pixel units in the row, or at least two gate lines adjacent to the pixel units in the row, and the gates of the thin film transistors of sub-pixels of the same color are connected to the same gate line.

[0014] Exemplarily, in at least one of the first peripheral display area and the second peripheral display area, the gate line is further provided with at least one gate line branch, and the gate line branch is cross-connected with the gate line; the source of the thin film transistor of at least one color sub-pixel in the pixel unit is connected to the gate line branch.

[0015] Exemplarily, when the gate electrodes of the sub-pixels in the same row of pixel units are connected to the same gate line adjacent to the row of pixel units, at least one gate line branch is provided on the gate line in the first peripheral display area and the second peripheral display area, the gate line branch is cross-connected to the gate line, and the gate electrode of the thin film transistor of a sub-pixel in the pixel unit closest to the gate line is connected to the gate line, and the gate electrode of the thin film transistor of the sub-pixel on the side of the pixel unit farthest from the gate line is connected to the gate line branch.

[0016] Exemplarily, when the gates of the sub-pixels in the same row of the pixel units are connected to at least two gate lines adjacent to the row of the pixel units, in the first peripheral display area and the second peripheral display area, one of the at least two gate lines adjacent to the row of the pixel units is a first gate line, and the other gate line is a second gate line;

[0017] At least one first gate line branch is provided on the first gate line, and the first gate line branch is cross-connected with the first gate line, or at least one second gate line branch is provided on the second gate line, and the second gate line branch is cross-connected with the second gate line;

[0018] A gate of a thin film transistor of a sub-pixel in the pixel unit closest to the first gate line is connected to the first gate line, a gate of a thin film transistor of a sub-pixel in the pixel unit closest to the second gate line is connected to the second gate line, and a gate of a thin film transistor of a sub-pixel in the pixel unit far from the first gate line and the second gate line is connected to the first gate line branch or the second gate line branch.

[0019] Exemplarily, in the first peripheral display area and the second peripheral display area, sub-pixels of the same color in the same column of the pixel units are connected to the same data line, and each of the data lines is arranged to cross the gate line vertically or to be arranged in a winding shape in a manner of bypassing the sub-pixels.

[0020] The embodiment of the present disclosure also provides a display device, including the display substrate provided by the embodiment of the present disclosure.

[0021] Exemplarily, the display device is a spliced ​​screen, comprising a plurality of single screens spliced ​​together, each of the single screen comprising the display substrate and a protective cover plate, wherein the protective cover plate is provided with a shading layer, the shading layer extending along the side of the protective cover plate, and a portion of the peripheral display area is blocked by the shading layer, while another portion is not blocked by the shading layer.

[0022] Exemplarily, the pixel unit array on each of the single screens is aligned with the pixel unit array in another single screen disposed adjacent to the single screen.

[0023] The beneficial effects brought by the embodiments of the present disclosure are as follows:

[0024] The display substrate and display device provided in the embodiments of the present disclosure improve the pixel arrangement structure, so that the sub-pixels of the pixel units in the middle display area located in the middle position of the display area are arranged in sequence along the short side extension direction, and the sub-pixels of the pixel units in at least one area of ​​the two peripheral display areas (i.e., the first peripheral display area and the second peripheral display area) located in the peripheral position and perpendicular to the short side extension direction of the sub-pixels in the middle display area are arranged in sequence along the short side extension direction, and the short sides of the sub-pixels in at least one area of ​​the first peripheral display area and the second peripheral display area are arranged perpendicular to the short side direction of the sub-pixels in the middle display area. In this way, when the display substrate is applied to a narrow frame structure, when the frame blocks the pixel units of the first peripheral display area and / or the second peripheral display area, a part of the pixel units of the first peripheral display area and the second peripheral display area are blocked by the frame, and the other part is not blocked by the frame, and the openings of each sub-pixel are lost in the same proportion, which can improve the problem of rainbow patterns and enhance product quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1A schematic diagram showing a cross-sectional structure of a spliced ​​screen product structure in the prior art;

[0026] Figure 2 express Figure 1 A schematic diagram of the shielding of some of the surrounding pixels by the border of the spliced ​​screen in the top view, in which only a corner of the spliced ​​screen is shown;

[0027] Figure 3 A schematic diagram showing a pixel arrangement structure in a display substrate provided by an embodiment of the present disclosure;

[0028] Figure 4 Indicates that the display substrate provided by the present disclosure has Figure 3 A wiring diagram of the C part in the middle;

[0029] Figure 5 Indicates that the display substrate provided by the present disclosure has Figure 3 Another wiring diagram of the C part in the middle;

[0030] Figure 6 Indicates that the display substrate provided by the present disclosure has Figure 3 Another wiring diagram of the C part in the middle;

[0031] Figure 7 Indicates that the display substrate provided by the present disclosure has Figure 3 Another wiring diagram of the C part in the middle;

[0032] Figure 8 Indicates that the display substrate provided by the present disclosure has Figure 3 Another wiring diagram of the C part in the middle. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0034] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0035] Before describing in detail the display substrate and the display device provided by the embodiments of the present disclosure, it is necessary to describe the related technologies as follows:

[0036] In the related art, for narrow-frame display products, taking a spliced ​​screen as an example, Figure 1 The figure shows the cross-sectional structure diagram of the splicing screen product structure. Figure 2 for Figure 1 A schematic diagram of the shielding of some pixels around the spliced ​​screen by the frame in the top view, with only one corner of the spliced ​​screen shown in the figure. Figure 1 and Figure 2 As shown, the frame 20 will block some pixels around the display substrate 10. Due to the difference in straightness of the frame edge, the degree of blocking will be different, and the degree of opening loss of the RGB sub-pixels 30 in different pixel units will be different, which will cause rainbow lines to appear on the edge of the screen, and the colors presented on the two opposite sides will also be different.

[0037] In order to improve the problem of rainbow patterns in the above-mentioned display products, the embodiments of the present disclosure provide a display substrate and a display device. By improving the pixel arrangement structure, the phenomenon of rainbow patterns in display products can be improved to enhance product quality.

[0038] Figure 3 FIG. 1 is a schematic diagram of a pixel arrangement structure in a display substrate provided by an embodiment of the present disclosure. Figure 3As shown, the display substrate provided by the embodiment of the present disclosure includes a middle display area A, and a first peripheral display area B1 and a second peripheral display area B2 located on opposite sides of the middle display area A. The display area includes a pixel unit array, and the pixel unit array includes a plurality of pixel units 300 distributed in an array. Each pixel unit 300 includes at least two sub-pixels emitting light of different colors. The opening shape of the sub-pixel is a rectangle, and the rectangle includes a long side 300b and a short side 300a.

[0039] In at least one of the first peripheral display area B1 and the second peripheral display area B2, and the intermediate display area A, the sub-pixels in each pixel unit 300 are arranged in sequence along the short side extension direction of the sub-pixels; and the extension direction of the first peripheral display area B1 and the second peripheral display area B2 is perpendicular to the short side extension direction of the sub-pixels in the intermediate display area A, and the short side extension direction of the sub-pixels in at least one of the first peripheral display area B1 and the second peripheral display area B2 is perpendicular to the short side extension direction of the sub-pixels in the intermediate display area A.

[0040] by Figure 3 Taking the drawing direction shown in as an example, the short side extension direction of each sub-pixel in the middle display area A is the row direction X of the pixel unit array, and the long side extension direction is the column direction Y of the pixel unit array. The first peripheral display area B1 is the peripheral display area located on the left side of the middle display area A; the second peripheral display area B2 is the peripheral display area located on the right side of the middle display area A, and each sub-pixel in the pixel unit 300 in the middle display area A is arranged in sequence along the short side extension direction, that is, arranged in sequence along the X direction; the short side extension direction of each sub-pixel of the pixel unit 300 in the first peripheral display area B1 and the second peripheral display area B2 is perpendicular to the short side extension direction of the sub-pixel in the middle display area, that is, it is arranged along the Y direction, and each sub-pixel in the pixel unit is arranged in sequence along the short side extension direction, that is, arranged in sequence along the Y direction.

[0041] When the display substrate provided by the embodiment of the present disclosure is applied to a narrow-frame display product, especially to a spliced ​​screen, the first peripheral display area B1 and the second peripheral display area B2 will be partially blocked by the corresponding four side frames on the frame.

[0042] By adopting the above scheme, by improving the pixel arrangement structure on the display substrate, the sub-pixels of the pixel unit 300 in the middle display area A located in the middle position of the display area are arranged in sequence along the extension direction of the short side, and the sub-pixels of the pixel unit 300 in at least one area of ​​the two peripheral display areas (i.e., the first peripheral display area B1 and the second peripheral display area B2) located in the peripheral position and perpendicular to the extension direction of the short side of the sub-pixels in the middle display area are designed to be arranged in sequence along the extension direction of the short side, and the short sides of the sub-pixels in at least one area of ​​the first peripheral display area B1 and the second peripheral display area B2 are arranged perpendicular to the short sides of the sub-pixels in the middle display area A. In this way, when the display substrate is applied to a narrow frame structure, the edge extension direction of the frame located on the first side 110 and the second side 120 will be consistent with the sub-pixel arrangement direction in each pixel unit 300 in the first peripheral display area B1 and the second peripheral display area B2. Therefore, when the frame blocks the pixel unit 300 of the first peripheral display area B1 and / or the second peripheral display area B2, a part of the pixel unit 300 of the first peripheral display area B1 and the second peripheral display area B2 is blocked by the frame, while the other part is not blocked by the frame. The sub-pixel openings in each blocked pixel unit 300 in the peripheral display area will be lost in the same proportion, thereby improving the problem of rainbow patterns and improving product quality.

[0043] It should be noted that if Figure 3 As shown, the first peripheral display area B1 may include only one column of pixel units 300 or at least two columns of pixel units 300; similarly, the second peripheral display area B2 may include only one column of pixel units 300 or at least two columns of pixel units 300.

[0044] In some embodiments, as shown in the figure, the pixel unit 300 includes at least a first sub-pixel 310, a second sub-pixel 320 and a third sub-pixel 330. For example, the first sub-pixel 310 is a red sub-pixel, the second sub-pixel 320 is a green sub-pixel, and the third sub-pixel 330 is a blue sub-pixel.

[0045] like Figure 3 As shown, the pixel opening area of ​​the first sub-pixel 310 in the middle display area A is the same as that of the first sub-pixel 310 in the first peripheral display area B1 and the second peripheral display area B2; the pixel opening area of ​​the second sub-pixel 320 in the middle display area A is the same as that of the second sub-pixel 320 in the first peripheral display area B1 and the second peripheral display area B2; the pixel opening area of ​​the third sub-pixel 330 in the middle display area A is the same as that of the third sub-pixel 330 in the first peripheral display area B1 and the second peripheral display area B2.

[0046] In the above solution, for sub-pixels of the same color, the sub-pixel opening area in the first peripheral display area B1 and the second peripheral display area B2 is the same as the sub-pixel opening area in the middle display area A.

[0047] In order to realize the pixel arrangement structure in the display substrate provided by the embodiment of the present disclosure, there may be multiple corresponding display driving circuit wiring modes in the display substrate in the embodiment of the present disclosure.

[0048] In the display substrate provided by the embodiment of the present disclosure, the base substrate 100 is provided with a data line 500 and a gate line 600 that are crossed and insulated, and a thin film transistor and a pixel electrode are provided in each sub-pixel, and the gate of the thin film transistor is connected to the gate line 600, the source is connected to the data line 500, and the drain is connected to the pixel electrode. Among them, in the multiple pixel units 300 in the same row, the sources of the thin film transistors of the sub-pixels of different color lights are respectively connected to different data lines 500; and in the multiple pixel units 300 in the same row, the gates of the thin film transistors of each sub-pixel are connected to the same gate line 600 adjacent to the pixel unit 300 in the row, or to at least two gate lines 600 adjacent to the pixel unit 300 in the row, and the gates of the thin film transistors of the sub-pixels of the same color are connected to the same gate line 600.

[0049] Since the arrangement direction of each sub-pixel of the pixel unit 300 in the first peripheral display area B1 and the second peripheral display area B2 is different from the arrangement direction of each sub-pixel of the pixel unit 300 in the middle display area A, for the pixel units 300 in the same row, the signal line wiring method in the first peripheral display area B1 and the second peripheral display area B2 will be different from the signal line wiring method in the middle display area A.

[0050] In the middle display area A, since the sub-pixels of each pixel unit 300 are sequentially arranged along the direction in which the short sides of the sub-pixels extend, that is, the X direction, and the gate line 600 extends along the X direction, the thin film transistors in each sub-pixel are at the same distance from the gate line 600, and the source of the thin film transistor can be directly connected to the gate line 600; and in the pixel units 300 in the first peripheral display area B1 and the second peripheral display area B2, since the sub-pixels are sequentially arranged along the direction perpendicular to the short sides of the sub-pixels in the middle display area, that is, the Y direction, the distances from each sub-pixel in the same pixel unit 300 to the gate line 600 are different. In order to make each sub-pixel in the same pixel unit 300 All sub-pixels are connected to the same or at least two gate lines 600 adjacent to the pixel unit 300. In at least one of the first peripheral display area B1 and the second peripheral display area B2, at least one gate line branch 600' is provided on the gate line 600. The gate line branch 600' is cross-connected with the gate line 600. The extension direction of the gate line branch 600' is the extension direction of the long side of the sub-pixel in the middle display area, that is, the Y direction, and can be extended from the gate line 600. The source of the thin film transistor of at least one color sub-pixel in the pixel unit 300 is connected to the gate line 600 through the gate line branch 600'.

[0051] As an exemplary embodiment, Figure 4 As shown, when the gates of the sub-pixels in the same row of the pixel units 300 are connected to the same gate line 600 adjacent to the row of pixel units 300, in the first peripheral display area B1 and the second peripheral display area B2, at least one gate line branch 600' is further provided on the gate line 600, and the gate line branch 600' is cross-connected with the gate line 600, and the gate of the thin film transistor of a sub-pixel in the pixel unit 300 closest to the gate line 600 is connected to the gate line 600, and the gate of the thin film transistor of the sub-pixel on the side of the pixel unit 300 away from the gate line 600 is connected to the gate line branch 600'.

[0052] For example, Figure 4Taking the display substrate shown as an example, the pixel unit 300 includes a first sub-pixel 310, a second sub-pixel 320 and a third sub-pixel 330, and the thin film transistors of the same row of pixel units 300 are all connected to the same gate line 600 located on the side of the pixel unit 300 of the row close to the fourth side 140 (that is, the same gate line 600 located below the pixel unit 300 shown in the figure). In the first peripheral display area B1 and the second peripheral display area B2, the first sub-pixel 310 of the pixel unit 300 is located on the side closest to the fourth side 140, and the third sub-pixel 330 is located on the side closest to the third side 130. Two gate line branches 600' are provided on the gate line 600. The thin film transistor in the first sub-pixel 310 is directly connected to the gate line 600, the thin film transistor of the second sub-pixel 320 is connected to the gate line 600 through one of the two gate line branches 600', and the thin film transistor of the third sub-pixel 330 is connected to the gate line 600 through the other gate line branch 600' of the two gate line branches 600'.

[0053] As another exemplary embodiment, Figure 5 As shown, when the gates of the sub-pixels in the same row of the pixel units 300 are connected to at least two gate lines 600 adjacent to the row of pixel units 300, in the first peripheral display area B1 and the second peripheral display area B2, one of the at least two gate lines 600 adjacent to the row of pixel units 300 is a first gate line 610, and the other gate line 600 is a second gate line 620;

[0054] At least one first gate line branch 610' is disposed on the first gate line 610, and the first gate line branch 610' is cross-connected with the first gate line 610, or at least one second gate line branch 620' is disposed on the second gate line 620, and the second gate line branch 620' is cross-connected with the second gate line 620;

[0055] The gate of the thin film transistor of a sub-pixel in the pixel unit 300 closest to the first gate line 610 is connected to the first gate line 610, the gate of the thin film transistor of a sub-pixel in the pixel unit 300 closest to the second gate line 620 is connected to the second gate line 620, and the gate of the thin film transistor of the sub-pixel in the pixel unit 300 far from the first gate line 610 and the second gate line 620 is connected to the first gate line branch 610' or the second gate line branch 620'.

[0056] For example, Figure 5Taking the display substrate shown in the figure as an example, the pixel unit 300 includes a first sub-pixel 310, a second sub-pixel 320 and a third sub-pixel 330, and the thin film transistors of the pixel units 300 in the same row are all connected to the first gate line 610 and the second gate line 620 adjacent to the pixel units 300 in the same row (that is, the two gate lines 600 located above and below the pixel unit 300 shown in the figure). In the first peripheral display area B1 and the second peripheral display area B2, the first sub-pixel 310 of the pixel unit 300 is located on the side closest to the fourth side 140, and the third sub-pixel 330 is located on the side closest to the third side 130, wherein the first sub-pixel 310 can be directly connected to the first gate line 610 or connected to the first gate line 610 through the first gate line branch 610', the third sub-pixel 330 can be directly connected to the second gate line 620 or connected to the second gate line 620 through the second gate line branch 620', and the second sub-pixel 320 can be connected to another first gate line branch 610' on the first gate line 610 or another second gate line branch 620' on the second gate line 620.

[0057] In addition, as an exemplary embodiment, Figure 4 As shown, in the middle display area A, sub-pixels of different colors are respectively connected to different data lines 500 , and sub-pixels of the same color in the same column of pixel units 300 are connected to the same data line 500 .

[0058] In the first peripheral display area B1 and the second peripheral display area B2, sub-pixels of the same color in the same column of the pixel units 300 are connected to the same data line 500, and each data line 500 is arranged to cross the gate line 600 vertically or to be arranged in a winding manner to bypass the sub-pixels.

[0059] by Figure 4 As shown in the figure, in the first peripheral display area B1 and the second peripheral display area B2, sub-pixels of different colors in the same pixel unit 300 are connected to different data lines 500, and the data lines 500 are perpendicular to the gate lines 600. The specific wiring method of the data lines 500 should ensure that different data lines 500 do not overlap.

[0060] As a specific embodiment, for example Figure 6As shown, in the first peripheral display area B1 and the second peripheral display area B2, the first data line 500 connected to the first sub-pixel 310 in the pixel unit 300 and the third data line 500 connected to the third sub-pixel 330 are respectively located on opposite sides of the pixel unit 300, namely, the side close to the middle display area A and the side away from the middle display area A, the second data line 500 connected to the second sub-pixel 320 is located in the middle of the pixel unit 300, and the pixel electrode of each sub-pixel is divided into a first part 300A and a second part 300B, the first part 300A and the second part 300B are connected by a connecting bridge 300C, and the orthographic projections of the first part and the second part on the substrate 100 do not overlap with the orthographic projection of the second data line 500 on the substrate 100, so as to reduce parasitic capacitance, etc.

[0061] As another specific example, for example Figure 5 As shown, in the first peripheral display area B1 and the second peripheral display area B2, the first data line 500 connected to the first sub-pixel 310 in the pixel unit 300 and the third data line 500 connected to the third sub-pixel 330 are respectively located on opposite sides of the pixel unit 300, that is, the side close to the middle display area A and the side away from the middle display area A, and the second data line 500 connected to the second sub-pixel 320 may be located on the side of the pixel unit 300 close to the middle display area A or the side away from the middle display area A.

[0062] As another specific example, for example Figure 7 As shown, in the first peripheral display area B1 and the second peripheral display area B2, the first data line 500 connected to the first sub-pixel 310 in the pixel unit 300 and the second data line 500 connected to the second sub-pixel 320 are respectively located on opposite sides of the pixel unit 300 or on the same side of the pixel unit, and are arranged perpendicular to the gate line 600, and the third data line 500 connected to the third sub-pixel 330 is arranged in a winding manner;

[0063] As another specific example, for example Figure 8 As shown, in the first peripheral display area B1 and the second peripheral display area B2, the first data line 500 connected to the first sub-pixel 310 in the pixel unit 300 and the third data line 500 connected to the third sub-pixel 330 are respectively located on opposite sides of the pixel unit 300 and are arranged perpendicular to the gate line 600, and the second data line 500 connected to the second sub-pixel 320 is arranged in a winding manner;

[0064] As another specific example, for example Figure 8As shown, in the first peripheral display area B1 and the second peripheral display area B2, the second data line 500 connected to the second sub-pixel 320 in the pixel unit 300 and the third data line 500 connected to the third sub-pixel 330 are located on the same side of the pixel unit 300 or on opposite sides of the pixel unit 300, and are arranged perpendicular to the gate line 600, and the second data line 500 connected to the first sub-pixel 310 is arranged in a winding manner.

[0065] It should be understood that the above is only an example of the wiring method of the gate line 600 and the data line 500, and in practical applications, it is not limited to this.

[0066] In addition, the embodiment of the present disclosure further provides a display device, including the display substrate provided by the embodiment of the present disclosure. The display device can be various display devices such as a computer, a mobile phone, and a television.

[0067] As an exemplary embodiment, the display device is a spliced ​​screen, including a plurality of single screens spliced ​​together, wherein a pixel unit array on each single screen is aligned with a pixel unit array in another single screen arranged adjacent to the single screen, and each single screen includes the display substrate and a protective cover plate, wherein a shading layer is provided on the protective cover plate, the shading layer extends along a side of the protective cover plate, and a portion of the peripheral display area is blocked by the shading layer, while another portion of the area is not blocked by the shading layer.

[0068] It should be noted that the pixel unit array on each of the single screens is aligned with the pixel unit array in another single screen arranged adjacent to the single screen, that is, for the multiple single screens spliced ​​in the X direction (i.e., the direction in which the short sides of the sub-pixels in the middle display area extend), the pixel units of the Nth row of each of the single screens are located on the same straight line. Similarly, for the multiple single screens spliced ​​in the Y direction (i.e., the direction perpendicular to the short sides of the sub-pixels in the middle display area), the pixel units of the Nth column of each of the single screens are located on the same straight line.

[0069] There are a few points to note:

[0070] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure, and other structures may refer to the general design.

[0071] (2) For the sake of clarity, in the drawings used to describe the embodiments of the present disclosure, the thickness of layers or regions is exaggerated or reduced, that is, these drawings are not drawn according to the actual scale. It is understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, the element may be "directly" "on" or "under" the other element or there may be intermediate elements.

[0072] (3) In the absence of conflict, the embodiments of the present disclosure and the features therein may be combined with each other to obtain new embodiments.

[0073] The above are only specific implementations of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and the protection scope of the present disclosure shall be based on the protection scope of the claims.

Claims

1. A display substrate, characterized in that: The display device comprises a middle display area, and a first peripheral display area and a second peripheral display area located on opposite sides of the middle display area. The display area comprises a pixel unit array, each pixel unit comprises at least two sub-pixels emitting light of different colors, and the opening shape of the sub-pixel is a rectangle, and the rectangle comprises a long side and a short side; wherein, In at least one of the first peripheral display area and the second peripheral display area, and the middle display area, the sub-pixels in each pixel unit are arranged in sequence along the extension direction of the short sides of the sub-pixels; and the extension directions of the first peripheral display area and the second peripheral display area are perpendicular to the extension direction of the short sides of the sub-pixels in the middle display area, and the extension direction of the short sides of the sub-pixels in at least one of the first peripheral display area and the second peripheral display area is perpendicular to the extension direction of the short sides of the sub-pixels in the middle display area; The display substrate further comprises data lines and gate lines which are intersecting and insulated, and a thin film transistor and a pixel electrode are arranged in each sub-pixel, the gate of the thin film transistor is connected to the gate line, the source is connected to the data line, and the drain is connected to the pixel electrode; In a plurality of pixel units in the same row, the sources of the thin film transistors of the sub-pixels of different color lights are respectively connected to different data lines, and in the first peripheral display area and the second peripheral display area, the sub-pixels of the same color in the pixel units in the same column are connected to the same data line, wherein each of the data lines is arranged to cross the gate line vertically, and at least one data line is located in the middle of the pixel unit, and the pixel electrode of each sub-pixel is divided into a first part and a second part, the first part and the second part are connected by a connecting bridge, and the orthographic projections of the first part and the second part on the substrate substrate do not overlap with the orthographic projection of the data line located in the middle of the pixel unit on the substrate substrate; or, the data line is arranged in a winding shape in a manner of bypassing the sub-pixels; In multiple pixel units in the same row, the gate of the thin film transistor of each sub-pixel is connected to the same gate line adjacent to the pixel units in the row, or at least two gate lines adjacent to the pixel units in the row, and the gates of the thin film transistors of sub-pixels of the same color are connected to the same gate line, and in at least one area of ​​the first peripheral display area and the second peripheral display area, at least one gate line branch is also provided on the gate line, and the gate line branch is cross-connected with the gate line, and the gate of the thin film transistor of the sub-pixel of at least one color in the pixel unit is connected to the gate line branch.

2. The display substrate according to claim 1, characterized in that: The pixel unit at least includes a first sub-pixel, a second sub-pixel and a third sub-pixel; The first sub-pixel in the middle display area has the same pixel opening area as the first sub-pixel in the first peripheral display area and the first sub-pixel in the second peripheral display area; The second sub-pixel in the middle display area has the same pixel opening area as the second sub-pixel in the first peripheral display area and the second peripheral display area; The third sub-pixel in the middle display region has the same pixel opening area as the third sub-pixels in the first peripheral display region and the second peripheral display region.

3. The display substrate according to claim 1, characterized in that: When the gates of the sub-pixels in the same row of the pixel units are connected to the same gate line adjacent to the row of pixel units, at least one gate line branch is provided on the gate line in the first peripheral display area and the second peripheral display area, the gate line branch is cross-connected with the gate line, and the gate of the thin film transistor of a sub-pixel in the pixel unit closest to the gate line is connected to the gate line, and the gate of the thin film transistor of the sub-pixel on the side of the pixel unit far from the gate line is connected to the gate line branch.

4. The display substrate according to claim 3, characterized in that: When the gates of the sub-pixels in the same row of the pixel units are connected to at least two gate lines adjacent to the row of the pixel units, in the first peripheral display area and the second peripheral display area, one of the at least two gate lines adjacent to the row of the pixel units is a first gate line, and the other gate line is a second gate line; At least one first gate line branch is provided on the first gate line, and the first gate line branch is cross-connected with the first gate line, or at least one second gate line branch is provided on the second gate line, and the second gate line branch is cross-connected with the second gate line; A gate of a thin film transistor of a sub-pixel in the pixel unit closest to the first gate line is connected to the first gate line, a gate of a thin film transistor of a sub-pixel in the pixel unit closest to the second gate line is connected to the second gate line, and a gate of a thin film transistor of a sub-pixel in the pixel unit far from the first gate line and the second gate line is connected to the first gate line branch or the second gate line branch.

5. A display device, characterized in that: The display substrate comprises the display substrate as claimed in any one of claims 1 to 4.

6. The display device according to claim 5, characterized in that: The display device is a spliced ​​screen, including multiple single screens spliced ​​together, each of the single screens includes the display substrate and a protective cover plate, wherein the protective cover plate is provided with a shading layer, the shading layer extends along the side of the protective cover plate, and a part of the peripheral display area is blocked by the shading layer, and another part of the area is not blocked by the shading layer.

7. The display device according to claim 6, characterized in that: The pixel unit array on each single screen is aligned with the pixel unit array in another single screen arranged adjacent to the single screen.

Images