Phase-locked loop parameter design method for grid-connected inverter based on back-ratio matrix reconstruction

Abstract

The present invention provides a method for designing phase-locked loop (PLL) parameters in a grid-connected inverter based on back-ratio matrix reconstruction. By reconstructing the back-ratio matrix, the stability analysis of the grid-connected inverter system is simplified. Based on the improved stability analysis, a relationship between the system stability margin and the PLL parameters is established, and the PLL parameters are designed. This method ensures the stability of the grid-connected inverter when connected to a weak power grid, while also ensuring good dynamic response of the PLL.

Description

Technical Field

[0001] The present invention relates to the field of new energy grid-connected power generation, and in particular to the stability of a three-phase inverter grid-connected system and parameter design of its phase-locked loop. Background Art

[0002] In recent years, renewable energy sources, such as wind and solar power, have been increasingly utilized to address energy crises and environmental pollution. Three-phase grid-connected inverters, serving as the interface between distributed renewable power generation units and the power grid, have become a hot topic of research for scholars both domestically and internationally.

[0003] In previous parameter design of grid-connected inverters, the phase-locked loop (PLL) bandwidth was often designed to be within twice the fundamental frequency for harmonic suppression considerations, significantly lower than the current loop bandwidth. Consequently, the PLL's impact was often overlooked when studying the interaction between the grid-connected inverter and grid impedance. However, with the increasing penetration of renewable energy in the power grid, the grid is increasingly exhibiting weak grid characteristics, with line impedances potentially varying widely. In this scenario, even if the system design is stable after accounting for the current loop's impact, the system may still experience instability. Current research on PLLs indicates that, when analyzing the stability of grid-connected inverter systems, the PLL can be equated with an admittance connected in parallel with the PCC. The real part of this admittance is negative, making the grid-connected inverter system potentially unstable. While reducing the PLL's bandwidth can mitigate its negative impact, it also reduces its dynamic response speed.

[0004] The admittance ratio (or back-ratio matrix) used to determine system stability—the ratio of the inverter output admittance to the grid admittance—is in matrix form. Therefore, the generalized Nyquist criterion is required to determine system stability. This involves analyzing whether the number of circles encompassed by the two characteristic trajectories of the back-ratio matrix equals the number of right-half-plane poles of the back-ratio matrix. However, due to the asymmetric structure of the phase-locked loop (PLL), the eigenvalues of the back-ratio matrix are irrational functions in the s-domain, which is the primary reason why PLL parameter design is difficult in weak grid conditions. Summary of the Invention

[0005] In response to the above technical problems, the present invention reconstructs the back-ratio matrix to simplify the stability analysis of the grid-connected inverter system, and designs the parameters of the phase-locked loop based on the relationship between the system stability margin and the phase-locked loop parameters.

[0006] In order to achieve the above object, the specific technical solutions of the present invention are as follows:

[0007] The present invention provides a method for designing phase-locked loop parameters in a grid-connected inverter based on back-ratio matrix reconstruction. The grid-connected inverter is connected to a power grid at a common coupling point. The grid-connected inverter includes a power output circuit and a control unit. The control unit includes a current loop unit and a phase-locked loop unit. The design method includes:

[0008] Step 1: Establish a mathematical model of the grid-connected inverter using the small signal modeling method, where the closed-loop transfer function of the phase-locked loop G PLL The expression of (s):

[0009]

[0010] Where V PCCd is the steady-state value of PCC voltage, G c (s) is the PI regulator of the phase-locked loop;

[0011] G c (s) = K p_PLL +K i_PLL / s (2)

[0012] Where K p_PLL , K i_PLL They are the proportional term coefficient and the integral term coefficient of the PI regulator of the phase-locked loop:

[0013] K p_PLL =2ξω n / V PCCd (3)

[0014]

[0015] Where ζ is the damping ratio, ω n is the natural frequency of the phase-locked loop. The closed-loop transfer function of the phase-locked loop is a second-order system. After conversion, the closed-loop transfer function of the phase-locked loop is G PLL (s) is further expressed as:

[0016]

[0017] Step 2: Simplify the mathematical model of the grid-connected inverter to obtain the equivalent mathematical model of the grid-connected inverter. The current reference in the model is and grid-connected current feedback and PCC voltage After the feedforward difference, through G x1 (s), G x1 The output of (s) is subtracted from the PCC voltage and passes through G x2 (s) can get the grid-connected current The grid current sampling coefficient is H i2 , PCC voltage feedforward coefficient is G ff_PLL(s), the loop gain T(s) of the grid-connected inverter current loop is expressed as:

[0018] T(s)=H i2 G x1 (s)G x2 (s) (6)

[0019] G x1 (s) and G x2 (s) are the transfer function matrices in the equivalent mathematical model of the grid-connected inverter;

[0020] Step 3: According to the grid-connected inverter equivalent mathematical model, the equivalent circuit of the grid-connected inverter system is determined. The grid-connected inverter system is equivalent to the equivalent current source and output admittance in parallel by Norton, where the effect of the phase-locked loop is equivalent to the admittance in parallel with the original output admittance; the original output admittance Y o_ori (s), the output admittance Y introduced by the phase-locked loop o_PLL (s) and equivalent current source The expressions are:

[0021] Y o_ori (s) = [E + T(s)] -1 G x2 (s) (7)

[0022] Y o_PLL (s) = [E + T(s)] -1 G x2 (s)G x1 (s)G ff_PLL (s) (8)

[0023]

[0024] Where, is the current reference;

[0025] Step 4: Based on the equivalent circuit of the grid-connected inverter system, the grid side is the equivalent voltage source and grid admittance Y g (s) in series, and the grid-connected current under weak grid is obtained The expression:

[0026]

[0027] in

[0028]

[0029]

[0030] is the grid-connected current without considering the grid impedance, and N(s) is the grid-connected current under weak grid conditions. Compared with the grid-connected current when the grid impedance is not considered According to the above formula, to analyze the stability of the grid-connected inverter system under weak power grid, it is only necessary to judge the stability of N(s);

[0031] Let N(s) be a forward path equal to 1, and the feedback path transfer function be For a closed-loop system, if the open-loop gain of N(s) is the ratio matrix of N(s) If the generalized Nyquist criterion is satisfied, the system is stable;

[0032] The feedback path disassembled and The transfer functions of the forward path and feedback path are The branches are merged, then the back-ratio matrix of N(s) is reconstructed as:

[0033]

[0034] Step 5: The non-zero eigenvalues of the reconstructed back-ratio matrix are λ PLL (s), and set the damping ratio ζ, and draw the natural frequency ω of the phase-locked loop under the condition of system amplitude margin constraint n and λ PLL (s) crossover frequency ω x The relationship curve ω n_GM , and the crossover frequency ω x The natural frequency of the phase-locked loop is ω n and λ PLL (s) crossover frequency ω x The relationship curve ω n_x , determine the intersection of the two curves, which is the natural frequency ω of the phase-locked loop n The maximum value that can be taken and the phase-locked loop parameter K is calculated p_PLL and K i_PLL .

[0035] Furthermore, in step 1, the influence of the phase-locked loop is equivalent to three feedforward paths from the PCC voltage to the coordinate transformation. The equivalent feedforward path expressions of the phase-locked loop at the coordinate transformation of the grid current, modulation signal, and capacitor current feedback are respectively:

[0036]

[0037] Where I gd , I gqare the d-axis component and q-axis component of the steady-state grid current, and their values can be obtained from the grid-connected inverter output power and grid voltage; V Md 、V Mq , I Cd , I Cq They are the d-axis component and q-axis component of the modulation signal and the steady-state value of the capacitor current respectively, and their values can be calculated through the circuit of the grid-connected inverter system.

[0038] Furthermore, in step 2, G in the equivalent mathematical model of the grid-connected inverter x1 (s), G x2 (s) and G ff_PLL The expressions of (s) are as follows:

[0039]

[0040]

[0041]

[0042] Where K PWM =V in / (2V tri ) is the transfer function of the inverter bridge, where V tri is the amplitude of the triangular carrier. G d (s)=e -1.5sTs Indicates a 1.5 beat digital control delay, T s is the sampling period. E is the unit matrix, Z L1 (s)=sL1E,Z L2 (s) = sL2E and Z C (s) = E / (sC) are the impedances of the inverter side inductor L1, the grid side inductor L2 and the capacitor C, respectively. G i (s) = K p_i +K i_i / s is a function of the current regulator, H i1 is the capacitor current sampling coefficient, H i2 is the grid current sampling coefficient.

[0043] Furthermore, in step 4, the grid admittance Y g The expression of (s) is:

[0044]

[0045] Among them L g is the grid inductance value, ω o is the grid reference angular frequency.

[0046] Furthermore, in step 5,

[0047] Under the condition of system amplitude margin constraint, the natural frequency ω of the phase-locked loop is obtained. n and λ PLL (s) crossover frequency ω x The relationship curve ω n_GM , the characteristics of the constraints are:

[0048]

[0049] At the crossover frequency ω x The natural frequency of the phase-locked loop is ω n and λ PLL (s) crossover frequency ω x The relationship curve ω n_x , the characteristics of the constraints are:

[0050]

[0051] λ ex_PLL (s) is the intermediate parameter, and its expression is:

[0052]

[0053] Where V PCCd is the steady-state value of the PCC voltage, T(s) is the loop gain of the grid-connected inverter current loop, G x1 (s) and G x2 (s) are the transfer function matrix in the equivalent model of the grid-connected inverter, G i (s) = K p_i +K i_i / s is a function of the current regulator, H i1 is the capacitor current sampling coefficient, H i2 is the grid current sampling coefficient, I gd , I gq are the d-axis component and q-axis component of the grid-connected current steady-state value, V Md 、V Mq are the d-axis component and q-axis component of the steady-state value of the modulation signal, respectively.

[0054] Furthermore, in step 5, the expression of the non-zero eigenvalues of the reconstructed back-ratio matrix is:

[0055]

[0056] Furthermore, in step 5, the system amplitude margin has a value range of 3 to 6 dB.

[0057] Furthermore, in step 5, the damping ratio ζ is selected as 0.707.

[0058] Furthermore, the circuit part of the control unit includes: a DSP chip, an A / D sampling module, a digital operation module and a pulse width modulation module.

[0059] Furthermore, the power output circuit includes: a DC side capacitor, a three-phase three-bridge arm, a three-phase LCL filter and a three-phase grid-connected switch. The DC side capacitor, the three-phase three-bridge arm, the three-phase LCL filter and the three-phase grid-connected switch are connected in sequence, wherein the LCL filter of each phase is composed of two inductors L1 and L2 and a capacitor C, the inductor L1, the inductor L2 and the grid-connected switch are connected in series, one end of the capacitor C is connected to the node between the inductors L1 and L2, and the other end is connected to the remaining nodes of the other two-phase capacitors.

[0060] Compared with the prior art, the main advantages and significant effects of the present invention are as follows:

[0061] 1. Traditional PLL design methods simplify the form of the back-to-back ratio matrix eigenvalues under certain conditions. For example, in the case of unity power factor, the back-to-back ratio matrix is simplified to a diagonal matrix, thereby simplifying the PLL parameter design process. However, this invention simplifies the PLL parameter design process by reconstructing the back-to-back ratio matrix. This implementation method is based on the inherent characteristics of the PLL and therefore has a wider range of applications.

[0062] 2. The phase-locked loop parameter design method of the present invention remains applicable when considering the influence of loops such as the power loop and voltage loop. The power loop and voltage loop provide the current reference amplitude of the grid-connected inverter. Because their structures are often asymmetric, traditional design methods are no longer applicable when considering their influence. However, the method proposed in this invention, because it is based on the inherent characteristics of the phase-locked loop, remains applicable even when the system includes other asymmetric loops.

[0063] 3. This invention balances system stability, robustness, and the dynamic response of the phase-locked loop. Compared to other design methods, this invention establishes a precise relationship between system stability margin and phase-locked loop bandwidth. This achieves a larger phase-locked loop bandwidth while maintaining the required system stability and robustness, thereby improving the dynamic response of the phase-locked loop. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1 Schematic diagram of the topology and control structure of the LCL type grid-connected inverter in the present invention;

[0065] Figure 2 It is the s-domain mathematical model of the LCL type grid-connected inverter in the present invention;

[0066] Figure 3 It is the equivalent mathematical model of the LCL type grid-connected inverter in the present invention;

[0067] Figure 4This is the equivalent circuit of the LCL type grid-connected inverter system in the present invention;

[0068] Figure 5 Schematic diagram of the process of reconstructing the ratio matrix in the present invention;

[0069] Figure 6 It is the process curve of the parameter design method of the present invention;

[0070] Figure 7 is the Bode diagram of the back-ratio matrix in the present invention;

[0071] Figure 8 (a) is the present invention ω n = Example waveform of the system steady-state experiment when 372rad / s;

[0072] Figure 8 (b) is the present invention ω n = Example waveform of the system steady-state experiment when 540rad / s;

[0073] Figure 9 (a) is the present invention ω n = Example waveform of grid-connected current reference jump when 372rad / s;

[0074] Figure 9 (b) is the present invention ω n =120rad / s Example waveform of grid-connected current reference jump. DETAILED DESCRIPTION

[0075] The specific implementation method will be described below.

[0076] like Figure 1 As shown, the circuit topology and control structure of the three-phase LCL type grid-connected inverter based on the method of the present invention include a power output circuit and a control unit.

[0077] Power output circuit, outputting grid-connected current;

[0078] The control unit includes a current loop unit and a phase-locked loop unit. The phase-locked loop unit detects the voltage v at the three-phase common coupling point. PCCa ,v PCCb ,v PCCc , and obtain its phase θ, the current loop unit calculates the grid current i in the synchronous rotating coordinate system ga ,i gb ,i gc Perform closed-loop control of active power and reactive power;

[0079] The switch tubes Q1 to Q6 and their anti-parallel diodes form a three-phase inverter bridge, and the filter inductors L1, L2 and filter capacitors C form an LCL filter. The grid current i is sampled by the A / D sampling module. gx(x=a,b,c), is converted to the dq synchronous rotating coordinate system through Park transformation and compared with the current reference standard i refdq Compare and send the error to the current regulator G i (s). G i (s) is the PI regulator, G i (s) = K p_i +K i_i / s. The capacitor current is sampled by the A / D sampling module and the difference between it and the output of the current regulator after Park transformation is obtained to obtain the modulation signal v in the dq synchronous rotating coordinate system. M_dq The modulation signal is subjected to SPWM modulation after Park inverse transformation to obtain the driving signal of the switching tube.

[0080] Here, a synchronous reference frame (SRF) phase-locked loop is used to obtain the phase of the PCC voltage. After sampling the three-phase PCC voltage, it is converted to the dq synchronous rotating coordinate system through Park transformation, and the q-axis component is sent to the regulator G of the phase-locked loop. c (s). G c (s) is the PI regulator, G c (s) = K p_PLL +K i_PLL / s. The output of the regulator and the grid reference angular frequency ω o After adding, and then passing through the integration link, the phase angle θ output by the phase-locked loop can be obtained.

[0081] The power output circuit includes a DC-side capacitor 1, a three-phase three-bridge arm 2, a three-phase LCL filter 3, and a three-phase grid-connected switch 4. The DC-side capacitor, three-phase three-bridge arm, three-phase LCL filter, and three-phase grid-connected switch are connected in sequence. Each phase's LCL filter consists of two inductors L1 and L2, and a capacitor C. Inductors L1 and L2, along with the grid-connected switch, are connected in series. One end of capacitor C is connected to the node between inductors L1 and L2, and the other end is connected to the remaining nodes of the other two phase capacitors.

[0082] The circuit part of the control unit includes: DSP chip, A / D sampling module 5, digital operation module 6 and pulse width modulation module 7, which is realized by writing software and loading the software module into the DSP chip. The DSP chip can adopt TMS320F2812 chip.

[0083] The A / D sampling module includes sampling of grid current, capacitor current and PCC voltage. i1 is the capacitor current sampling coefficient, H i2 is the grid current sampling coefficient, and the PCC voltage sampling coefficient is 1.

[0084] The digital operation module 6 is loaded with the following software modules:

[0085] 1) Phase-locked loop unit, which can adopt a phase-locked loop based on a synchronous rotating coordinate system, and the regulator G of the phase-locked loop c (s) is the PI regulator, K p_PLL , K i_PLL are the proportional and integral term coefficients respectively.

[0086] 2) The current loop unit is used to control the active damper to adjust the active power and reactive power in the synchronous rotating coordinate system dq. gd Tracking current reference i gd_ref , reactive grid-connected current i gq Tracking Benchmark i gq_ref , since the calculation is performed in a synchronous rotating coordinate system, the current regulator G i (s) PI regulator is usually used to achieve grid-connected current tracking current reference without static error. Current regulator G i (s) = K p_i +K i_i / s. K p_i , K i_i G i (s) are the proportional and integral coefficients.

[0087] The current loop unit also includes a coordinate transformation unit, which corresponds to abc / dq Parker coordinate transformation and dq / abc Parker inverse coordinate transformation.

[0088] Example 1:

[0089] The present invention provides a method for designing phase-locked loop parameters in a grid-connected inverter based on back-ratio matrix reconstruction as follows:

[0090] Step 1: Through the small signal modeling method, the mathematical model of the grid-connected inverter can be obtained, such as Figure 2 As shown in the figure. Among them, the equivalent mathematical model of the grid-connected inverter

[0091] are the matrix expressions of the small signal quantities of current reference, grid current and PCC voltage in the dq coordinate system. i1 is the capacitor current feedback coefficient, H i2 K is the grid current sampling coefficient. PWM =V in / (2V tri ) is the transfer function of the inverter bridge, where V tri is the amplitude of the triangular carrier. G d (s)=e -1.5sTs Indicates a 1.5 beat digital control delay, T s is the sampling period. E is the unit matrix, Z L1 (s)=sL1E,ZL2 (s) = sL2E and Z C (s) = E / (sC) are the impedances of the inverter-side inductor L1, the grid-side inductor L2, and the capacitor C, respectively. The effect of the phase-locked loop is equivalent to a feedforward path from the PCC voltage to the coordinate transformation point. The expressions of the three feedforward paths in the figure are:

[0092]

[0093] Where I gd , I gq are the d-axis component and q-axis component of the steady-state grid current, and their values can be obtained from the grid-connected inverter output power and grid voltage; V Md 、V Mq , I Cd , I Cq They are the d-axis component and q-axis component of the modulation signal and the steady-state value of the capacitor current, respectively. Their values can be calculated by the circuit of the grid-connected inverter system. PLL (s) is the closed-loop transfer function of the phase-locked loop, which is expressed as:

[0094]

[0095] Among them, V PCCd is the steady-state value of the PCC voltage, which can be calculated based on the parameters of the grid-connected inverter system. The closed-loop transfer function of the phase-locked loop shown in equation (8) is a second-order system, which is often expressed in terms of the damping ratio ζ and the natural frequency ω of the phase-locked loop. n To replace its parameters, that is, take K p_PLL =2ζω n / V PCCd , K i_PLL =ω n 2 / V PCCd In this way, the closed-loop transfer function of the phase-locked loop can be further expressed as:

[0096]

[0097] Among them, the damping ratio ζ is often taken as the optimal damping ratio of 0.707.

[0098] Step 2, Figure 2 The model shown is simplified to obtain Figure 3 The equivalent mathematical model of the grid-connected inverter shown in the figure simplifies the mathematical model of the grid-connected inverter to obtain the equivalent mathematical model of the grid-connected inverter. The current reference in the model is and grid-connected current feedback and PCC voltage After the feedforward difference, through G x1 (s), G x1The output of (s) is subtracted from the PCC voltage and passes through G x2 (s) can get the grid-connected current The grid current sampling coefficient is H i2 , PCC voltage feedforward coefficient is G ff_PLL (s);

[0099] Among them G x1 (s), G x2 (s) and G ff_PLL The expressions of (s) are:

[0100]

[0101]

[0102]

[0103] As can be seen from the figure, the loop gain of the grid-connected inverter current loop is

[0104] T(s)=H i2 G x1 (s)G x2 (s) (6)

[0105] according to Figure 3 The equivalent circuit diagram of the grid-connected inverter system can be obtained, such as Figure 4 As shown. Figure 3 From the mathematical model shown, it can be seen that the phase-locked loop can essentially be equivalent to an output admittance connected in parallel to the PCC. By performing Norton equivalent on the grid-connected inverter from the PCC port, a simplified equivalent current source and output impedance in parallel can be obtained. The original output admittance Y o_ori (s), the output admittance Y introduced by the phase-locked loop o_PLL (s) and equivalent current source The expressions are:

[0106] Y o_ori (s) = [E + T(s)] -1 G x2 (s) (7)

[0107] Y o_PLL (s) = [E + T(s)] -1 G x2 (s)G x1 (s)G ff_PLL (s) (8)

[0108]

[0109] The weak grid can be equivalent to a voltage source by Thevenin The form of series grid impedance, where the grid impedance is often resistive and inductive. Since the resistive component is beneficial to system stability, in order to analyze the worst case, the grid impedance is considered to be purely inductive during design, and its admittance is recorded as Y g (s), whose expression is

[0110]

[0111] Among them L g is the grid inductance value, ω o is the grid reference angular frequency.

[0112] Step 4, according to Figure 4 The equivalent circuit of the grid-connected inverter system shown in the figure (the grid side is the equivalent voltage source and grid admittance In series form), the grid-connected current under weak power grid can be obtained The expression is:

[0113]

[0114] in

[0115]

[0116]

[0117] This is the grid-connected current when the grid impedance is not considered. As long as the grid-connected inverter itself is designed to be stable, this part is stable. Therefore, to analyze the stability of the grid-connected inverter system under a weak grid, it is only necessary to determine the stability of N(s). N(s) is the grid-connected current under a weak grid. Compared with the grid-connected current when the grid impedance is not considered ratio.

[0118] Since N(s) can be regarded as a forward path with a value of 1, the feedback path transfer function is If the closed-loop system is N(s), then only the open-loop gain of N(s) is needed, that is, the ratio matrix of N(s) If the generalized Nyquist criterion is satisfied, then the system is stable.

[0119] However, in order for the back-ratio matrix N(s) to satisfy the generalized Nyquist criterion, the number of circles (-1, j0) enclosed by the loci of its two eigenvalues must be sufficient. However, the eigenvalues of this back-ratio matrix are irrational functions within the domain of two s, making parameter design based on these eigenvalues complex. Therefore, the back-ratio matrix can be restructured to simplify parameter design.

[0120] according to Figure 5The deformation steps shown deform the closed-loop system represented by N(s):

[0121] ① Such as Figure 5 As shown in step 1 of the disassembled and

[0122] ② If Figure 5 As shown in step 2, the transfer functions of the forward path and feedback path are Merge the branches.

[0123] After the above deformation, since each step of deformation is equivalent, the closed-loop transfer function of the system will remain unchanged, but the open-loop transfer function of the system, that is, the ratio matrix of N(s), is reconstructed as

[0124] In the reconstructed back-ratio matrix, Y o_PLL (s) is the output admittance introduced by the phase-locked loop. Since the phase-locked loop only tracks the q-axis component of the PCC voltage, Y o_PLL (s) The first column is 0, that is, Y o_PLL (s) is a singular matrix, so the reconstructed back-ratio matrix is also singular, meaning it has one eigenvalue of 0. Since the reconstructed back-ratio matrix is a second-order matrix, it will have only one non-zero eigenvalue. This simplifies the analysis of system stability; system stability can be determined by simply analyzing the relationship between system stability and this non-zero eigenvalue. This also simplifies the phase-locked loop parameter design process. Furthermore, since there is only one non-zero eigenvalue, an accurate relationship between the system stability margin and the phase-locked loop parameters can be established.

[0125] Step 5, the back-ratio matrix of N(s) is reconstructed as The non-zero eigenvalues of can be calculated, and the non-zero eigenvalues are denoted as λ PLL (s), whose expression is:

[0126]

[0127] The part that has nothing to do with the phase-locked loop parameters is denoted as λ ex_PLL (s), whose expression is

[0128]

[0129] Where V PCCd is the steady-state value of the PCC voltage, T(s) is the loop gain of the grid-connected inverter current loop, G x1 (s) and G x2(s) are the transfer function matrix in the equivalent model of the grid-connected inverter, G i (s) Function of the current regulator, H i1 is the capacitor current sampling coefficient, H i2 is the grid current sampling coefficient, I gd , I gq are the d-axis component and q-axis component of the grid-connected current steady-state value, V Md 、V Mq are the d-axis component and q-axis component of the steady-state value of the modulation signal respectively;

[0130] The following is a design method for the phase-locked loop parameters under weak power grid based on the non-zero eigenvalues of the back-ratio matrix. After determining the damping ratio (such as 0.707), the present invention establishes the relationship between the natural frequency of the phase-locked loop and the system amplitude margin, that is, it is necessary to ensure that the system has the expected amplitude margin at the crossover frequency, so that the robustness of the system can be guaranteed. After satisfying the system amplitude margin, the natural frequency of the phase-locked loop is taken as the maximum value within the desirable range, and the designed phase-locked loop parameter K is p_PLL and K i_PLL , you can ensure that the phase-locked loop has good dynamic characteristics. The detailed steps are as follows:

[0131] ① Determine the amplitude margin required by the system (usually 3 to 6 dB), and make the natural frequency ω of the phase-locked loop based on the constraints of the system amplitude margin. n and λ PLL (s) crossover frequency ω x The relationship curve ω n_GM , the constraint is characterized by

[0132]

[0133] ②Draw the crossover frequency ω x The natural frequency of the phase-locked loop is ω n and λ PLL (s) crossover frequency ω x The relationship curve ω n_x , the constraint is characterized by:

[0134]

[0135] ③Determine the curve ω n_x and ω n_GM The intersection point is the natural frequency ω of the phase-locked loop n Maximum possible value

[0136] ④ Calculate the two parameters of the phase-locked loop according to the following formula:

[0137] K p_PLL =2ξω n / V PCCd(3)

[0138]

[0139] Test example:

[0140] An application example of the present invention is given below.

[0141] This example is based on Figure 1 The circuit topology and control structure of a three-phase LCL-type grid-connected inverter are shown in Table 1. The grid-connected inverter is connected to the weak grid at the PCC to form a grid-connected system. The parameters are shown in Table 1, where a power factor of 1 is used as an example. The grid line impedance is purely inductive, with a grid inductance value of 7.6mH.

[0142] According to the method flow proposed by the present invention, the obtained curve diagram is as follows: Figure 6 As shown, it can be seen that the maximum value of the natural frequency of the phase-locked loop (the vertical coordinate corresponding to point A) is ω n_max =372rad / s, then according to equations (3) and (4), the phase-locked loop parameter K can be calculated. p_PLL =1.79, K i_PLL =476.

[0143] At the same time, it can be obtained that the natural frequency of the phase-locked loop (the vertical coordinate corresponding to point B) when the system is critically stable is ω n =540rad / s, the corresponding phase-locked loop parameter is K p_PLL =2.57, K i_PLL =982.

[0144] According to these two sets of phase-locked loop parameters, the Bode diagram of the eigenvalue of the back-contrast matrix can be drawn, as shown in Figure 7 As shown in the figure, when the phase-locked loop parameter design method proposed in the present invention is adopted, the system is stable and has a 3dB amplitude margin. If the phase-locked loop selects the parameters of the system critical stability determined by the method proposed in the present invention, the system is just critically stable.

[0145] The steady-state waveform of this specific example is as follows Figure 8(a) and 8(b)As shown in the figure, from top to bottom are the three-phase PCC voltage waveform and the inverter three-phase grid-connected current waveform. As can be seen from the figure, when the inverter adopts the phase-locked loop parameters designed by the method proposed in the present invention, as shown in Figure 8(a), the system is stable at this time. In the traditional phase-locked loop parameter design method, only the harmonic suppression effect is considered to design the phase-locked loop parameters, while the impact of the phase-locked loop on the stability of the grid-connected inverter system is ignored. As shown in Figure 8(b), when the natural frequency of the phase-locked loop increases to the critical value predicted by the method of the present invention, obvious distortion appears in the grid-connected current and PCC voltage, indicating that the system is unstable at this time. The above comparison shows that in a weak power grid, when the damping ratio is constant, the increase in the natural frequency of the phase-locked loop may cause system instability, but after adopting the method proposed in the present invention, the stability of the system can be effectively guaranteed.

[0146] The dynamic waveform of this specific embodiment is as follows Figure 9(a) and 9(b) As shown in the figure, from top to bottom are the three-phase PCC voltage waveform, the inverter three-phase grid-connected current waveform, and the PCC voltage q-axis component waveform. As can be seen from Figure 9(a), after adopting the parameter design method proposed in the present invention, after the current reference jumps, the PCC voltage only takes 15ms to return to the steady-state value. At this time, the phase-locked loop has better dynamic performance. However, if the existing parameter design method of the multi-input multi-output system is adopted, such as the design method based on the G norm, due to its conservative nature, the natural frequency of the phase-locked loop obtained is relatively small, only 120rad / s. As can be seen from Figure 9(b), the system is also stable at this time, but the system returns to the steady-state value after about 40ms. This shows that the design method proposed in the present invention can not only ensure the stability of the grid-connected inverter system, but also design a phase-locked loop with a faster dynamic response speed.

[0147] Table 1 Software and hardware parameters of three-phase LCL inverter

[0148]

Claims

1. A method for designing phase-locked loop parameters in a grid-connected inverter based on back-ratio matrix reconstruction. The grid-connected inverter is connected to the grid at a common coupling point. The grid-connected inverter includes a power output circuit and a control unit. The control unit includes a current loop unit and a phase-locked loop unit. The design method includes: Step 1: Establish a mathematical model of the grid-connected inverter using the small signal modeling method, where the closed-loop transfer function of the phase-locked loop G PLL The expression of (s): Where V PCCd is the steady-state value of PCC voltage, G c (s) is the PI regulator of the phase-locked loop; G c (s)=K p_PLL +K i_PLL / s (2) Where K p_PLL , K i_PLL They are the proportional term coefficient and the integral term coefficient of the PI regulator of the phase-locked loop: K p_PLL =2ξω n / V PCCd (3) Where ζ is the damping ratio, ω n is the natural frequency of the phase-locked loop. The closed-loop transfer function of the phase-locked loop is a second-order system. After conversion, the closed-loop transfer function of the phase-locked loop is G PLL (s) is further expressed as: Step 2: Simplify the mathematical model of the grid-connected inverter to obtain the equivalent mathematical model of the grid-connected inverter. The current reference in the model is and grid-connected current feedback and PCC voltage After the feedforward difference, through G x1 (s), G x1 The output of (s) is subtracted from the PCC voltage and passes through G x2 (s) can get the grid-connected current The grid current sampling coefficient is H i2 , PCC voltage feedforward coefficient is G ff_PLL (s), the loop gain T(s) of the grid-connected inverter current loop is expressed as: T(s)=H i2 G x1 (s)G x2 (s)(6) G x1 (s) and G x2 (s) are the transfer function matrices in the equivalent mathematical model of the grid-connected inverter; Step 3: According to the grid-connected inverter equivalent mathematical model, the equivalent circuit of the grid-connected inverter system is determined. The grid-connected inverter system is equivalent to the equivalent current source and output admittance in parallel by Norton, where the effect of the phase-locked loop is equivalent to the admittance in parallel with the original output admittance; the original output admittance Y o_ori (s), output admittance Y introduced by the phase-locked loop o_PLL (s) and equivalent current source The expressions are: Y o_ori (s)=[E+T(s)] -1 G x2 (s)(7) Y o_PLL (s)=[E+T(s)] -1 G x2 (s)G x1 (s)G ff_PLL (s)(8) Where, is the current reference; Step 4: Based on the equivalent circuit of the grid-connected inverter system, the grid side is the equivalent voltage source and grid admittance Y g (s) in series, and the grid-connected current under weak grid is obtained The expression: in is the grid-connected current without considering the grid impedance, and N(s) is the grid-connected current under weak grid conditions. Compared with the grid-connected current when the grid impedance is not considered According to the above formula, to analyze the stability of the grid-connected inverter system under weak power grid, it is only necessary to judge the stability of N(s); Let N(s) be a forward path equal to 1, and the feedback path transfer function be For a closed-loop system, if the open-loop gain of N(s) is the ratio matrix of N(s) If the generalized Nyquist criterion is satisfied, the system is stable; The feedback path disassembled and The transfer functions of the forward path and feedback path are The branches are merged, then the back-ratio matrix of N(s) is reconstructed as: Step 5: The non-zero eigenvalues of the reconstructed back-ratio matrix are λ PLL (s), and set the damping ratio ζ, and draw the natural frequency ω of the phase-locked loop under the condition of system amplitude margin constraint n and λ PLL (s) crossover frequency ω x The relationship curve ω n_GM , and the crossover frequency ω x The natural frequency of the phase-locked loop is ω n and λ PLL (s) crossover frequency ω x The relationship curve ω n_x , determine the intersection of the two curves, which is the natural frequency ω of the phase-locked loop n The maximum value that can be taken and the phase-locked loop parameter K is calculated based on p_PLL and K i_PLL .

2. According to the method for designing phase-locked loop parameters in a grid-connected inverter based on back-ratio matrix reconstruction according to claim 1, in step 1, the influence of the phase-locked loop is equivalent to three feedforward paths from the PCC voltage to the coordinate transformation. The equivalent feedforward path expressions of the phase-locked loop at the coordinate transformation of the grid current, modulation signal, and capacitor current feedback are respectively: Where I gd , I gq are the d-axis component and q-axis component of the grid-connected current steady-state value; V Md 、V Mq , I Cd , I Cq are the d-axis component and q-axis component of the modulation signal and the steady-state value of the capacitor current, respectively. i1 is the capacitor current sampling coefficient.

3. According to the method for designing phase-locked loop parameters in a grid-connected inverter based on back-ratio matrix reconstruction according to claim 1, in step 2, G in the equivalent mathematical model of the grid-connected inverter is x1 (s) and G x2 (s), G ff_PLL The expressions of (s) are as follows: Where K PWM =V in / (2V tri ) is the transfer function of the inverter bridge, V tri is the amplitude of the triangular carrier, G d (s)=e -1.5sTs Indicates a 1.5 beat digital control delay, T s is the sampling period, E is the unit matrix, Z L1 (s)=sL1E,Z L2 (s) = sL2E and Z C (s) = E / (sC) are the impedances of the inverter side inductor L1, the grid side inductor L2 and the capacitor C, respectively. G i (s) = K p_i +K i_i / s is a function of the current regulator, H i1 is the capacitor current sampling coefficient.

4. According to the method for designing phase-locked loop parameters in a grid-connected inverter based on back-ratio matrix reconstruction according to claim 1, in step 4, the grid admittance Y g The expression of (s) is: Among them L g is the grid inductance, ω o is the grid reference angular frequency.

5. The method for designing phase-locked loop parameters in a grid-connected inverter based on back-ratio matrix reconstruction according to any one of claims 1 to 4, wherein in step 5, Under the condition of system amplitude margin constraint, the natural frequency ω of the phase-locked loop is obtained. n and λ PLL (s) crossover frequency ω x The relationship curve ω n_GM , the characteristics of the constraints are: At the crossover frequency ω x The natural frequency of the phase-locked loop is ω n and λ PLL (s) crossover frequency ω x The relationship curve ω n_x , the characteristics of the constraints are: λ ex_PLL (s) is the intermediate parameter, and its expression is: Where V PCCd is the steady-state value of the PCC voltage, T(s) is the loop gain of the grid-connected inverter current loop, G x1 (s) and G x2 (s) are the transfer function matrix in the equivalent model of the grid-connected inverter, G i (s) = K p_i +K i_i / s is a function of the current regulator, H i1 is the capacitor current sampling coefficient, H i2 is the grid current sampling coefficient, I gd , I gq are the d-axis component and q-axis component of the grid-connected current steady-state value, V Md 、V Mq are the d-axis component and q-axis component of the steady-state value of the modulation signal, I Cd , I Cq They are the d-axis component and q-axis component of the steady-state value of the capacitor current respectively.

6. According to the method for designing phase-locked loop parameters in a grid-connected inverter based on back-ratio matrix reconstruction according to claim 5, in step 5, the expression of the non-zero eigenvalues of the reconstructed back-ratio matrix is:

7. According to the method for designing phase-locked loop parameters in a grid-connected inverter based on back-ratio matrix reconstruction as recited in claim 1, in step 5, the system amplitude margin has a value range of 3 to 6 dB.

8. According to the method for designing phase-locked loop parameters in a grid-connected inverter based on back-ratio matrix reconstruction as recited in claim 7, in step 5, the damping ratio ζ is selected as 0.

707.

9. According to the method for designing phase-locked loop parameters in a grid-connected inverter based on back-ratio matrix reconstruction as recited in claim 1, the circuit portion of the control unit comprises: DSP chip, A / D sampling module, digital operation module and pulse width modulation module.

10. According to the method for designing phase-locked loop parameters in a grid-connected inverter based on back-ratio matrix reconstruction as recited in claim 1, the power output circuit comprises: The DC side capacitor, the three-phase three-bridge arm, the three-phase LCL filter and the three-phase grid-connected switch are connected in sequence, wherein the LCL filter of each phase is composed of two inductors L1 and L2 and a capacitor C, the inductor L1, the inductor L2 and the grid-connected switch are connected in series, one end of the capacitor C is connected to the node between the inductors L1 and L2, and the other end is connected to the remaining nodes of the other two phase capacitors.

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