GGNMOS structure for electrostatic protection

Abstract

This invention provides a GGNMOS structure for electrostatic discharge (ESD) protection, comprising: a substrate, two sets of current discharge modules, and a ring-shaped heavily doped region. Each set of current discharge modules includes multiple discharge units; wherein each discharge unit includes: two source terminals, one drain terminal, two gate terminals, one floating heavily doped region, multiple lightly doped drain regions, and an isolation layer. In each discharge unit, this application forms a DN+ / Psub / P+ (Diode) by embedding a floating heavily doped region in the drain terminal. By adjusting the distance between the floating heavily doped region and the sub-drain terminal, the breakdown voltage of the Diode is made greater than VDD and less than the trigger voltage of the parasitic NPN. This allows the Diode to trigger before the parasitic NPN triggers, injecting a large number of electron-hole pairs into the substrate, increasing the substrate current, reducing the trigger voltage, and ensuring uniform device conduction, thereby improving the ESD protection performance of the GGNMOS.

Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, and more specifically to a GGNMOS structure for electrostatic discharge protection. Background Technology

[0002] GGNMOS (grounded-gate NMOS) devices are a common type of ESD protection device, typically appearing in a multi-finger configuration.

[0003] refer to Figure 1 , Figure 1 This is a schematic diagram of a traditional multi-fingered GGNMOS device. When the ESD voltage exceeds the breakdown voltage of DN+ / Psub (N+ drain / P-type substrate), a large amount of ESD current will flow through Psub into P+ring (P+ heavily doped ring region) and into VSS. When the product of the current and Rsub (substrate resistance) is greater than 0.7V (BE junction breakdown voltage), DN+ / Psub / SN+ (N+ drain / P-type substrate / N+ source, parasitic NPN) will be fully turned on to discharge the ESD current. However, since the distance of each parasitic NPN from P+ring is different, i.e., Rsub is different, the required turn-on current is different. Figure 1 Taking a GGNMOS with 2n interdigitated NPNs as an example, where n is an integer greater than or equal to 2, Rsub1>······>Rsubn-3>Rsubn-2>Rsubn-1>Rsubn, the parasitic NPN in the middle and the NPNs around the perimeter will turn on sequentially as the ESD voltage increases. In multi-interdigitated GGNMOS devices, there is a situation where the middle GGNMOS (parasitic NPN) burns out when it reaches the current limit while the surrounding GGNMOS devices do not turn on, thus reducing the device's ESD protection capability. Summary of the Invention

[0004] This application provides a GGNMOS structure for electrostatic discharge protection, which can solve the problem that in current GGNMOS devices, the middle GGNMOS (parasitic NPN) burns out when it reaches the current limit while the surrounding GGNMOS devices are not yet turned on, resulting in low ESD protection capability of the device.

[0005] On one hand, embodiments of this application provide a GGNMOS structure for electrostatic discharge protection, comprising: a substrate, two sets of current discharge modules located in the substrate, and a ring-shaped heavily doped region, wherein the two sets of current discharge modules are centrally symmetrical, and the ring-shaped heavily doped region is disposed around the two sets of current discharge modules; wherein,

[0006] Each group of current discharge modules includes: multiple discharge units arranged side by side; wherein,

[0007] The discharge unit includes: two source terminals, one drain terminal, two gate terminals, one floating heavily doped region, multiple lightly doped drain regions, and an isolation layer, wherein the two source terminals are located on both sides of the drain terminal; the lightly doped drain regions are located on both sides of the source terminal and the drain terminal, respectively; the floating heavily doped region is embedded in the drain terminal to divide the drain terminal into two sub-drain terminals; the isolation layer is located on the substrate and covers at least a portion of the surface of the sub-drain terminals and at least a portion of the surface of the floating heavily doped region to isolate the floating heavily doped region and the sub-drain terminals.

[0008] Optionally, in the GGNMOS structure for electrostatic protection, the isolation layer includes a metal silicide barrier layer that covers a portion of the surface of the floating heavily doped region, the sub-drain terminal, and the substrate surface between the floating heavily doped region and the sub-drain terminal.

[0009] Optionally, in the GGNMOS structure for electrostatic protection, the isolation layer includes a polysilicon layer that covers the substrate surface between the floating heavily doped region and the sub-drain.

[0010] Optionally, in the GGNMOS structure for electrostatic protection, the floating heavily doped region and the two sub-drain terminals on the floating heavily doped region side maintain a certain distance.

[0011] Optionally, in the GGNMOS structure for electrostatic protection, the GGNMOS structure further includes: a metal silicide barrier layer covering the surface of the lightly doped drain region between the gate and the sub-drain, and a portion of the surface of the sub-drain and a portion of the surface of the gate.

[0012] Optionally, in the GGNMOS structure for electrostatic protection, two adjacent discharge units share a source terminal, which is located between the two adjacent discharge units.

[0013] Optionally, in the GGNMOS structure for electrostatic protection, in the discharge unit, the source terminal has an N-type conductivity; the sub-drain terminal has an N-type conductivity; and the floating heavily doped region has a P-type conductivity.

[0014] Optionally, in the GGNMOS structure for electrostatic protection, the substrate has a P-type conductivity; the annular heavily doped region has a P-type conductivity.

[0015] Optionally, in the GGNMOS structure for electrostatic protection, the GGNMOS structure further includes a shallow trench isolation structure located between the annular heavily doped region and all the current discharge modules, the shallow trench isolation structure being arranged around the two sets of current discharge modules.

[0016] The technical solution of this application has at least the following advantages:

[0017] In each of the aforementioned discharge units, this application divides the drain terminal into two sub-drain terminals by embedding a floating heavily doped region in the drain terminal, forming DN+ / Psub / P+ (Diode). By adjusting the distance between the floating heavily doped region and the two sub-drain terminals, the breakdown voltage of the Diode is made greater than VDD and less than the trigger voltage of the parasitic NPN. This allows the Diode to be triggered in advance before the parasitic NPN is triggered, injecting a large number of electron-hole pairs into the substrate, increasing the substrate current, reducing the trigger voltage, and making the device conduct uniformly, thereby improving the ESD protection performance of GGNMOS. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the structure of a traditional multi-finger GGNMOS device;

[0020] Figure 2 This is a schematic diagram of the GGNMOS structure according to Embodiment 1 of the present invention;

[0021] Figure 3 This is a schematic diagram illustrating the working principle of the GGNMOS structure in Embodiment 1 of the present invention;

[0022] Figure 4 This is a schematic diagram of the GGNMOS structure according to Embodiment 2 of the present invention;

[0023] Figure 5 This is a schematic diagram illustrating the working principle of the GGNMOS structure in Embodiment 2 of the present invention;

[0024] Figure 6 This is a comparative schematic diagram of the traditional GGNMOS structure and the GGNMOS structure of Embodiment 1 or 2 of the present invention in TLP testing.

[0025] The reference numerals in the attached figures are explained as follows:

[0026] 10-Substrate, 11-Shallow trench isolation structure, 12-Ring heavily doped region, 13-Lightly doped drain region, 141-Source end, 142-Source end, 151-Sub-drain end, 16-Floating heavily doped region, 17-Gate, 18-Metal silicide barrier layer, 19-Isolation layer. Detailed Implementation

[0027] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0028] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0029] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0030] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0031] Example 1

[0032] Embodiment 1 of this application provides a GGNMOS structure for electrostatic discharge protection, referencing... Figure 2 , Figure 2This is a schematic diagram of the GGNMOS structure according to Embodiment 1 of the present invention. The GGNMOS structure includes: a substrate 10, two sets of current discharge modules located in the substrate 10, and a ring-shaped heavily doped region 12, wherein the two sets of current discharge modules are centrally symmetrical, and the ring-shaped heavily doped region 12 is arranged around the two sets of current discharge modules. Further, each set of current discharge modules includes: a plurality of discharge units arranged side by side.

[0033] In this embodiment, the discharge unit includes: two source terminals 141 / 142, one drain terminal, two gate terminals 17, one floating heavily doped region 16, multiple lightly doped drain regions 13, and an isolation layer 19. The two source terminals 141 / 142 are located on both sides of the drain terminal. The lightly doped drain regions 13 are located in the substrates 10 on both sides of the source terminal and the drain terminal, respectively. The floating heavily doped region 16 is embedded in the drain terminal to divide it into two sub-drain terminals 151. The isolation layer 19 is located on the substrate 10 and covers at least a portion of the surface of the sub-drain terminals 151 and at least a portion of the surface of the floating heavily doped region 16. The function of the isolation layer 19 is to isolate the floating heavily doped region 16 from the sub-drain terminals 151 on both sides, ensuring that the floating heavily doped region 16 is always floating.

[0034] Furthermore, two adjacent discharge units share a source terminal, which is located between the two adjacent discharge units. For example, the discharge unit to the right of the source terminal 142 (not shown) shares the source terminal 142 with the leftmost discharge unit.

[0035] In the discharge unit, the source terminals 141 / 142 are N-type; the sub-drain terminal 151 is N-type; the floating heavily doped region 16 is P-type; the substrate 10 is P-type; and the annular heavily doped region 16 is P-type. Specifically, in this embodiment, the source terminals 141 / 142 are SN+; the sub-drain terminal 151 is DN+; the floating heavily doped region 16 is P+; the substrate 10 is Psub; and the annular heavily doped region 16 is P+.

[0036] Furthermore, the GGNMOS structure may also include a shallow trench isolation structure 11 located between the annular heavily doped region 12 and all the current discharge modules, the shallow trench isolation structure 11 being arranged around the two sets of current discharge modules.

[0037] In this embodiment, as Figure 2As shown, the isolation layer 19 includes: a metal silicide barrier layer that covers the entire surface of the floating heavily doped region 16, a portion of the surface of the sub-drain terminal 151 near the floating heavily doped region 16, and the surface of the substrate 10 between the floating heavily doped region 16 and the sub-drain terminal 151.

[0038] Furthermore, the floating heavily doped region 16 and the two sub-drain terminals 151 on the side of the floating heavily doped region 16 maintain a certain distance. The inventors have discovered that adjusting the distance between the floating heavily doped region 16 and the two sub-drain terminals 151 on the side of the floating heavily doped region 16, i.e., adjusting the NP (DN+ and P+ distance), can adjust the breakdown voltage of the device. In this embodiment, the distance between the floating heavily doped region 16 and the sub-drain terminals 151 on the side of the floating heavily doped region 16 can be 0.1 μm to 0.5 μm; for example, adjusting the distance between the floating heavily doped region 16 and the sub-drain terminals 151 on the side of the floating heavily doped region 16 to 0.4 μm.

[0039] Preferably, the GGNMOS structure may further include: a metal silicide barrier layer 18, the metal silicide barrier layer 18 covering the surface of the lightly doped drain region 13 between the gate 17 and the sub-drain terminal 151, and a portion of the surface of the sub-drain terminal 151 and a portion of the surface of the gate 17. Further, the remaining surface of the gate 17 not covered by the silicide barrier layer 18 is electrically connected (leaded out) to VSS, and the remaining surface of the sub-drain terminal 151 not covered by the silicide barrier layer 18 is electrically connected (leaded out) to VDD.

[0040] In this embodiment, the sub-drain terminal (DN+) 151 is shorted to VDD; the annular heavily doped region (P+) 16, the source terminal (SN+) 141 / 142, and the gate 17 are all shorted to VSS.

[0041] refer to Figure 3 , Figure 3This is a schematic diagram illustrating the working principle of the GGNMOS structure according to Embodiment 1 of the present invention. In each discharge unit, the floating heavily doped region 16 is embedded in the drain terminal to divide the drain terminal into two sub-drain terminals 151, thereby forming DN+ / Psub / P+ (Diode); in addition, the source terminal (SN+) 141 / 142, the substrate (Psub) 10, and the sub-drain terminal (DN+) 151 constitute a parasitic NPN. In each discharge unit, there are two sets of parasitic NPN and Diode, which are centrally symmetrical (the center is the floating heavily doped region 16). This application can adjust the distance between the floating heavily doped region 16 and the two sub-drain terminals 151 so that the breakdown voltage of the Diode is greater than VDD and less than the trigger voltage of the parasitic NPN, thereby enabling the Diode to trigger before the parasitic NPN is triggered, injecting a large number of electron-hole pairs into the substrate, increasing the substrate current, reducing the trigger voltage, and making the device conduct uniformly, thereby improving the ESD protection performance of GGNMOS.

[0042] Example 2

[0043] In Example 2, reference Figure 4 , Figure 4 This is a schematic diagram of the GGNMOS structure according to Embodiment 2 of the present invention.

[0044] The GGNMOS structure includes: a substrate 10, two sets of current discharge modules located in the substrate 10, and a ring-shaped heavily doped region 12, wherein the two sets of current discharge modules are centrally symmetrical, and the ring-shaped heavily doped region 12 is arranged around the two sets of current discharge modules. Further, each set of current discharge modules includes: multiple discharge units arranged side-by-side.

[0045] In this embodiment, the discharge unit includes: two source terminals 141 / 142, one drain terminal, two gate terminals 17, one floating heavily doped region 16, multiple lightly doped drain regions 13, and an isolation layer 19, wherein the two source terminals 141 / 142 are located on both sides of the drain terminal; the lightly doped drain regions 13 are respectively located in the substrate 10 on both sides of the source terminal and the drain terminal; the floating heavily doped region 16 is embedded in the drain terminal to divide the drain terminal into two sub-drain terminals 151.

[0046] Furthermore, in Example 2, as Figure 4 As shown, the isolation layer 19 includes a polysilicon layer that covers the surface of the substrate 10 between the floating heavily doped region 16 and the sub-drain terminal 151. Preferably, the polysilicon layer can also extend to both sides for a certain length to cover part of the surface of the floating heavily doped region 16 and part of the surface of the sub-drain terminal 151.

[0047] refer to Figure 5 , Figure 5 This is a schematic diagram illustrating the working principle of the GGNMOS structure according to Embodiment 2 of the present invention. In each of the discharge units, the floating heavily doped region 16 is embedded in the drain terminal to divide the drain terminal into two sub-drain terminals 151, thereby forming DN+ / Psub / P+ (Diode); in addition, the source terminal (SN+) 141 / 142, the substrate (Psub) 10, and the sub-drain terminal (DN+) 151 constitute a parasitic NPN. In each discharge unit, there are two sets of parasitic NPN and Diode, which are centrally symmetrical (the center is the floating heavily doped region 16). This application can adjust the distance between the floating heavily doped region 16 and the two sub-drain terminals 151 to make the breakdown voltage of the Diode greater than VDD and less than the trigger voltage of the parasitic NPN. This allows the Diode to be triggered in advance before the parasitic NPN is triggered, injecting a large number of electron-hole pairs into the substrate, increasing the substrate current, reducing the trigger voltage, and making the device conduct uniformly, thereby improving the ESD protection performance of GGNMOS.

[0048] refer to Figure 6 , Figure 6 This is a comparative schematic diagram of a conventional GGNMOS structure and the GGNMOS structure of Embodiment 1 or 2 of the present invention in TLP testing. A repeating discharge unit from the GGNMOS structure of Embodiment 1 or 2 of the present invention and a repeating discharge unit from a conventional GGNMOS structure are simulated. In the TLP test, in the GGNMOS structure of Embodiment 1 or 2 of the present invention, the spacing between the floating heavily doped region 16 and the sub-drain terminal 151 on the side of the floating heavily doped region 16 is adjusted to 0.4 μm. In this case, the DN+ / Psub / P+ (diode) in the GGNMOS structure of Embodiment 1 or 2 of the present invention can break down before the parasitic NPN breaks down, injecting current into the substrate 10, reducing the trigger voltage, and promoting uniform conduction of the device, thereby improving the ESD protection performance of the device. Figure 6 As can be seen from the above, It2 of the GGNMOS structure in Embodiment 1 or 2 of the present invention is higher than It1 of the traditional GGNMOS structure. This indicates that the DN+ / Psub / P+ (diodes) in the GGNMOS structure in Embodiment 1 or 2 of the present invention break down in advance before the parasitic NPN breaks down, injecting current into the substrate 10, increasing the current of the substrate 10, reducing the trigger voltage, making the device conduct uniformly, and improving the ESD protection performance of GGNMOS.

[0049] For any parts not described in this second embodiment, please refer to the first embodiment accordingly. This second embodiment will not be repeated here.

[0050] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.

Claims

1. A GGNMOS structure for electrostatic discharge protection, characterized in that, include: The system comprises a substrate, two sets of current discharge modules located within the substrate, and a ring-shaped heavily doped region, wherein the two sets of current discharge modules are centrally symmetrical, and the ring-shaped heavily doped region surrounds the two sets of current discharge modules; wherein... Each group of current discharge modules includes: multiple discharge units arranged side by side; wherein, The discharge unit includes: two source terminals, one drain terminal, two gate terminals, one floating heavily doped region, multiple lightly doped drain regions, and an isolation layer, wherein the two source terminals are located on both sides of the drain terminal; the lightly doped drain regions are located on both sides of the source terminal and the drain terminal, respectively; the floating heavily doped region is embedded in the drain terminal to divide the drain terminal into two sub-drain terminals; the isolation layer is located on the substrate and covers at least a portion of the surface of the sub-drain terminals and at least a portion of the surface of the floating heavily doped region to isolate the floating heavily doped region and the sub-drain terminals; The isolation layer includes a metal silicide barrier layer or a polysilicon layer, wherein, when the isolation layer includes a metal silicide barrier layer, the metal silicide barrier layer covers a portion of the surface of the floating heavily doped region, the sub-drain terminal, and the substrate surface between the floating heavily doped region and the sub-drain terminal; when the isolation layer includes a polysilicon layer, the polysilicon layer covers the substrate surface between the floating heavily doped region and the sub-drain terminal. The floating heavily doped region and the two sub-drain terminals on the side of the floating heavily doped region maintain a certain distance.

2. The GGNMOS structure for electrostatic protection according to claim 1, characterized in that, The GGNMOS structure further includes: a metal silicide barrier layer covering the surface of the lightly doped drain region between the gate and the sub-drain, as well as a portion of the surface of the sub-drain and a portion of the surface of the gate.

3. The GGNMOS structure for electrostatic discharge protection according to claim 1, characterized in that, Two adjacent discharge units share a source terminal, which is located between the two adjacent discharge units.

4. The GGNMOS structure for electrostatic protection according to claim 1, characterized in that, In the discharge unit, the conductivity type of the source terminal is N-type; the conductivity type of the sub-drain terminal is N-type; and the conductivity type of the floating heavily doped region is P-type.

5. The GGNMOS structure for electrostatic protection according to claim 1, characterized in that, The substrate is P-type conductive; the annular heavily doped region is P-type conductive.

6. The GGNMOS structure for electrostatic protection according to claim 1, characterized in that, The GGNMOS structure further includes a shallow trench isolation structure located between the annular heavily doped region and all the current discharge modules, the shallow trench isolation structure being arranged around the two sets of current discharge modules.

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