A multi-phase and multi-level space vector modulation algorithm based on vector decomposition and decoupling

Through a multi-phase multi-level space vector modulation algorithm based on vector decoupling, the problem of large amount of calculation and difficult to utilize redundant switching states in the prior art is solved, and efficient multi-phase multi-level converter modulation is realized, which is suitable for converters of any phase and level.

CN115589167BActive Publication Date: 2025-05-16BEIJING INST OF TECH
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Patent Information

Application Number
CN202211245758.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-10-12
Publication Date
2025-05-16
Estimated Expiration
2042-10-12

AI Technical Summary

Technical Problem

When the space vector PWM algorithm of existing multi-phase multi-level converters has large calculation amounts, high storage requirements, and it is difficult to effectively utilize the redundant switching state, resulting in limited performance optimization of converter.

Method used

A multi-phase multi-level spatial vector modulation algorithm based on vector decomposition is adopted to obtain the offset vector and residual vector of each phase through vector decomposition, perform decoupling calculation, and select the optimal offset vector and residual vector combination through the dynamic reference zero mechanism, and combine the carrier-based PWM modulation method to realize carrier shift PWM modulation.

Benefits of technology

It simplifies the calculation process, reduces storage requirements, improves the flexibility and applicability of the algorithm, avoids complex duty cycle calculations and cumbersome programming of switch sequences, and is suitable for converters of any phase and level numbers.

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Abstract

The present invention provides a multi-phase multi-level space vector modulation algorithm based on vector decomposition and decoupling, which avoids the complex processing such as matrix operation, offline preprocessing, table lookup model, coordinate transformation, etc. required in the prior art, and can be implemented only through simple logical judgment and numerical calculation. In the algorithm, all available offset vectors and residual vector combinations can be obtained through the dynamic reference zero point mechanism, thereby providing higher flexibility; the organic combination of space vector decoupling and CBPWM mode avoids the complex calculation of duty cycle and the cumbersome programming of switching sequence, so that the implementation process can be greatly simplified. The algorithm of the present invention is well applicable to converters with any number of phases and levels, and the scalability will not be affected by the amount of calculation.
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Description

Technical Field

[0001] The invention belongs to the technical field of multi-phase multi-level converter modulation, and in particular relates to a multi-phase multi-level space vector modulation algorithm based on vector decomposition and decoupling. Background Art

[0002] The existing modulation technologies for multi-phase and multi-level converters can be mainly divided into two categories: carrier-based PWM (CBPWM) and space vector PWM (SVPWM). The CBPWM algorithm can avoid the complex calculation of duty cycle and the tedious programming of switch sequence, and is easy to expand. Compared with the CBPWM method, the SVPWM can achieve relatively higher voltage utilization and flexibility of switch combination. The SVPWM algorithm can be further divided into two categories: modulation based on vector space decomposition and modulation based on multi-dimensional space. The former decomposes the reference voltage vector into multiple two-dimensional planes for vector synthesis and duty cycle calculation, but its calculation amount and storage requirements will increase sharply with the increase of the number of phases and levels, and it is difficult to apply in occasions with a large number of phases or levels; the latter decomposes the reference voltage vector into integer part and decimal part and synthesizes it directly in multi-dimensional space. Although it can be extended to converters with any number of phases and levels in theory, the high-dimensional matrix calculation used in the process will seriously reduce the operation efficiency, and the coupled and uniquely determined integer part and decimal part make it impossible to effectively utilize the redundant switch state, so it is difficult to optimize the converter performance. In addition, for the generation of switching sequences, the SVPWM algorithm usually requires tedious comparison and judgment and complex logic programming, which limits the application of this modulation method when the number of phases and levels is large. Summary of the invention

[0003] In view of this, in order to solve the technical problems existing in the art, the present invention provides a multi-phase multi-level space vector modulation algorithm based on vector decomposition and decoupling, which specifically includes the following steps:

[0004] 1) Decomposing the reference voltage vector by using its coordinates in the multi-dimensional space to obtain the offset vector and the residual vector of each phase;

[0005] 2) Decoupling calculation is performed on the offset vector obtained by vector decomposition and the remaining vector to obtain two vectors after decoupling of each phase;

[0006] 3) According to the reference zero point displacement times n of the reference voltage vector s and phase number p, an offset n is applied to the reference voltage vector s / p, recalculate the decoupled offset vector and the residual vector in the same manner as steps 1) and 2) to obtain a redundant offset vector and residual vector combination;

[0007] 4) Establish zero point displacement times n s The relationship model between the converter optimization target and the converter optimization target is solved by solving the optimal n s To select the best offset vector and the remaining vector combination;

[0008] 5) Introduce a carrier-based PWM modulation method, and obtain a reference signal value compared with the carrier by injecting a zero-sequence component into the remaining vector; for the offset vector, directly regard the coordinates of each phase offset vector obtained in step 2) as the reference signal value compared with the carrier; add these two parts of the reference signal value to obtain the final reference value compared with the shifted carrier, and use the reference value to perform carrier shift PWM modulation.

[0009] Furthermore, in step 1), the coordinates S of each phase reference voltage vector in the multidimensional space are first calculated. x,ref :

[0010]

[0011] In the formula, v x,ref is the reference voltage of phase x, x={1,2,…,p}, and p is the number of phases; v min V is the minimum voltage that each phase can output relative to the reference zero point; dc is the DC voltage step size;

[0012] Then, the reference voltage vector coordinates are decomposed based on the following formula to obtain the offset vector and the residual vector of each phase:

[0013]

[0014] Where round is the center circle integral function; S x,nst and R x,nst are the coordinates of the offset vector and the coordinates of the remaining vector respectively; the switch vector closest to the reference voltage vector in the multi-dimensional space can be selected as the offset vector.

[0015] Furthermore, in step 2), the offset vector and the residual vector obtained in step 1) are decoupled using the following formula:

[0016]

[0017] In the formula, R sum is the sum of the offset vector coordinates; the sign function is the sign function, R sum Greater than zero is 1, less than zero is -1, otherwise it is zero; S x and R x are the coordinates of the decoupled offset vector and the residual vector respectively; f x is the correction factor, for R sum >0(R sum<0) and R x,nst For R nst The qth maximum (minimum) value in sum , f x =1, otherwise f x =0;

[0018] The coordinates of the decoupled phase offset vectors satisfy the following relationship:

[0019]

[0020] Where n is the number of levels.

[0021] Furthermore, in step 3), the relationship between the potential change of the reference zero point and its shift times is expressed based on the following formula:

[0022]

[0023] In the formula, Δv s The minimum shift potential difference of the reference zero point that enables the offset vector and the residual vector to remain decoupled;

[0024] Then, after applying an offset to the coordinates of the reference voltage vector, the coordinates change to:

[0025] S x,ref '=S x,ref -n s / p

[0026] Based on the changed reference voltage vector coordinates, the decoupled offset vector and the residual vector are recalculated in the same manner as steps 1) and 2) to obtain a redundant offset vector and residual vector combination; the obtained offset vector coordinates of each phase satisfy the following relationship:

[0027]

[0028] Furthermore, the reference modulation signal whose level is in the range of [-1,1] after the residual vector is injected with the zero-sequence component in step 5) is expressed as:

[0029] u x =r x +v z

[0030] In the formula,

[0031] r x =2R x

[0032] v z =(2λ-1)-λr max -(1-λ)r min

[0033] Where λ is the duty cycle allocation factor of the zero vector, 0≤λ≤1; r max and r min r x The maximum and minimum values ​​of ;

[0034] The reference modulation signal is adjusted to [0,1] by the following formula for comparison with the single carrier to output the residual vector:

[0035]

[0036] The reference modulation signals of each phase of the carrier shift PWM are synthesized by the offset vector selected in step 4):

[0037] C x =u x +S x .

[0038] The multi-phase multi-level space vector modulation algorithm based on vector decomposition and decoupling provided by the present invention avoids the complex processing such as matrix operations, offline preprocessing, table lookup model, coordinate transformation, etc. required in the prior art, and can be implemented only through simple logical judgment and numerical calculation. In the algorithm, all available offset vectors and residual vector combinations can be obtained through the dynamic reference zero point mechanism, thereby providing higher flexibility; the organic combination of space vector decoupling and CBPWM mode avoids the complex calculation of duty cycle and the cumbersome programming of switching sequence, so that the implementation process can be greatly simplified. The algorithm of the present invention is well applicable to converters with any number of phases and levels, and the scalability will not be affected by the amount of calculation. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 A schematic diagram of a topological structure of a cascaded half-bridge multi-phase multi-level converter applicable to the present invention;

[0040] Figure 2 A schematic diagram of the flow chart of the algorithm provided by the present invention;

[0041] Figure 3 It is a schematic diagram of the modulation principle of a five-phase five-level converter in an example of the present invention. DETAILED DESCRIPTION

[0042] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0043] The converter topology suitable for the algorithm provided by the present invention is as follows: Figure 1As shown in the figure, when the number of levels is p, the converter will consist of p parallel H-bridge branches. For an n-level converter, each phase will have (n-1) / 2 H-bridges connected in series. Depending on the gate drive signal, each H-bridge can output -V dc , 0, V dc There are three levels, recorded as 0, 1, and 2. Therefore, the n levels that can be generated by each phase are {0, 1, 2, ..., n-1}, and the combination of p phase levels constitutes n p The SVPWM algorithm based on multi-dimensional space selects p+1 (continuous modulation) or p (discontinuous modulation) switching states to directly synthesize the reference voltage vector in multi-dimensional space.

[0044] The overall process of the algorithm is as follows Figure 2 As shown, the specific steps include:

[0045] 1) Decomposing the reference voltage vector by using its coordinates in the multi-dimensional space to obtain the offset vector and the residual vector of each phase;

[0046] 2) Decoupling calculation is performed on the offset vector obtained by vector decomposition and the remaining vector to obtain two vectors after decoupling of each phase;

[0047] 3) According to the reference zero point displacement times n of the reference voltage vector s and phase number p, an offset n is applied to the reference voltage vector s / p, recalculate the decoupled offset vector and the residual vector in the same manner as steps 1) and 2) to obtain a redundant offset vector and residual vector combination;

[0048] 4) Establish zero point displacement times n s The relationship model between the converter optimization target and the converter optimization target is solved by solving the optimal n s To select the best offset vector and the remaining vector combination;

[0049] 5) Introduce a carrier-based PWM modulation method, and obtain a reference signal value compared with the carrier by injecting a zero-sequence component into the remaining vector; for the offset vector, directly regard the coordinates of each phase offset vector obtained in step 2) as the reference signal value compared with the carrier; add these two parts of the reference signal value to obtain the final reference value compared with the shifted carrier, and use the reference value to perform carrier shift PWM modulation.

[0050] In a preferred embodiment of the present invention, Figure 1 The five-phase five-level cascaded half-bridge converter shown in FIG. 1 is modulated using the algorithm provided by the present invention, wherein the reference voltage vector is V ref =(1.43V dc ,1.13V dc , -0.73Vdc , -1.58V dc , -0.25V dc ), perform the following steps in order:

[0051] 1) Decompose the reference voltage vector. First, calculate the coordinates of the reference voltage vector in multidimensional space and preselect Figure 1 Point G in is the reference zero point, that is, v min =-2V dc , the reference voltage vector coordinate S can be calculated ref =(3.43, 3.13, 1.27, 0.42, 1.75); By vector decomposing the reference voltage vector, the offset vector and the remaining vector coordinates are S nst =(3,3,1,0,2) and R nst =(0.43,0.13,0.27,0.42,-0.25);

[0052] 2) The decomposed offset vector can be obtained as R sum =0.43+0.13+0.27+0.42-0.25=1, where R 1,nst =0.43 is R nst The maximum value in , so the correction factor is set to f1 = 1, then the coordinate adjustment of the x = 1 phase can be calculated as:

[0053]

[0054] For other phases, f0=1, so the coordinates remain unchanged.

[0055] Therefore, the coordinates of the decoupled offset vector and the remaining vector are S off =(4,3,1,0,2) and R rmd =(0.57,0.13,0.27,0.42,-0.25).

[0056] 3) Based on the dynamic reference zero point mechanism provided by the present invention, the redundant offset vector and the residual vector combination are calculated. For this embodiment, p=5 and n=5, the relationship between the reference voltage vector and the offset vector is updated as follows:

[0057] S x,ref '=S x,ref -n s / 5

[0058]

[0059] Each n s The offset vector and the remaining vector coordinate combinations corresponding to the value of are shown in the following table:

[0060] Table 1 Available offset vector and remaining vector combinations

[0061] <![CDATA[n s ]]> Offset vector coordinates Remaining vector coordinates -4 (4,4,2,1,3) (0.23,-0.07,0.07,0.22,-0.45) -3 (4,4,2,1,2) (0.03,-0.27,-0.13,0.02,0.35) -2 (4,3,2,1,2) (-0.17,0.53,-0.33,-0.18,0.15) -1 (4,3,1,1,2) (-0.37,0.33,0.47,-0.38,-0.05) 0 (4,3,1,0,2) (-0.57,0.13,0.27,0.42,-0.25) 1 (3,3,1,0,2) (0.23,-0.07,0.07,0.22,-0.45) 2 (3,3,1,0,1) (0.03,-0.27,-0.13,0.02,0.35) 3 (3,2,1,0,1) (-0.17,0.53,-0.33,-0.18,0.15) 4 (3,2,0,0,1) (-0.37,0.33,0.47,-0.38,-0.05)

[0062] By establishing s The relationship between the converter optimization objective and the optimal n s Theoretically, any control target can be achieved. In this embodiment, it is calculated that when n s =1 is the optimal value, and the corresponding optimal shift vector and the remaining vector coordinates are S off =(3,3,1,0,2) and R rmd =(-0.23,-0.07,0.07,0.22,-0.45).

[0063] 5) Taking λ=0.5 as an example, the reference modulation signal obtained after injecting zero-sequence components into each phase is: (u1, u2, u3, u4, u5)=(0.84, 0.54, 0.68, 0.83, 0.16);

[0064] The remaining vectors can be synthesized by carrier-based PWM implementation methods, such as Figure 3 (a); the common mode voltage generated by the offset vector relative to each reference zero point is zero, which means that the voltage of each phase relative to the reference zero point defined by the offset vector is equal to the phase voltage of each phase. Therefore, the offset vector can be directly synthesized by outputting the voltage of each phase relative to the reference zero point, that is, it can be generated by a modulation method based on the phase voltage, such as Figure 3 (b) as shown.

[0065] Combination Figure 3 (a) and (b), the final modulation implementation method can be obtained as Figure 3 (c), which is obviously a carrier shift PWM algorithm. The reference value finally compared with the shifted carrier is calculated as: (C1, C2, C3, C4, C5) = (3.84, 3.54, 1.68, 0.83, 2.16).

[0066] It should be understood that the size of the serial numbers of the steps in the embodiment of the present invention does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present invention.

[0067] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A multi-phase multi-level space vector modulation method based on vector decomposition and decoupling, characterized in that: The specific steps include: 1) Decomposing the reference voltage vector by using its coordinates in the multi-dimensional space to obtain the corresponding offset vector and residual vector; 2) Decoupling calculation is performed on the offset vector and the remaining vector obtained by vector decomposition to obtain two decoupled vectors; 3) According to the reference zero point displacement times n of the reference voltage vector s and phase number p, an offset n is applied to the reference voltage vector s / p, recalculate the decoupled offset vector and the residual vector in the same manner as steps 1) and 2) to obtain a redundant offset vector and residual vector combination; 4) Establish zero point displacement times n s The relationship model between the converter optimization target and the converter optimization target is solved by solving the optimal n s To select the best offset vector and the remaining vector combination; 5) Introduce a carrier-based PWM modulation method, and obtain a reference signal value compared with the carrier by injecting a zero-sequence component into the remaining vector; for the offset vector, directly regard the coordinates of each phase offset vector obtained in step 2) as the reference signal value compared with the carrier; add these two parts of the reference signal value to obtain the final reference value compared with the shifted carrier, and use the reference value to perform carrier shift PWM modulation.

2. The method according to claim 1, characterized in that: In step 1), the coordinates S of each phase reference voltage vector in multidimensional space are first calculated. x,ref : In the formula, v x,ref is the reference voltage of phase x, x={1,2,…,p}, and p is the number of phases; v min V is the minimum voltage that each phase can output relative to the reference zero point; dc is the DC voltage step size; Then, the reference voltage vector coordinates are decomposed based on the following formula to obtain the offset vector and the residual vector of each phase: Where round is the center circle integral function; S x,nst and R x,nst are the coordinates of the offset vector and the coordinates of the remaining vector respectively; the switch vector closest to the reference voltage vector in the multidimensional space is selected as the offset vector.

3. The method according to claim 2, characterized in that: In step 2), the offset vector and the residual vector obtained in step 1) are decoupled using the following formula: In the formula, R sum is the sum of the offset vector coordinates; the sign function is the sign function, R sum Greater than zero is 1, less than zero is -1, otherwise it is zero; S x and R x are the coordinates of the decoupled offset vector and the residual vector respectively; f x is the correction factor, for R sum >0 and R x,nst For R nst The qth largest value in, or R sum <0 and R x,nst For R nst The qth minimum value in sum , f x =1, otherwise f x =0; The coordinates of the phase offset vectors after decoupling satisfy the following relationship: Where n is the number of levels.

4. The method according to claim 3, characterized in that: In step 3), the relationship between the potential change of the reference zero point and its shift times is expressed based on the following formula: In the formula, △v s The minimum shift potential difference of the reference zero point that enables the offset vector and the residual vector to remain decoupled; Then, after applying an offset to the coordinates of the reference voltage vector, the coordinates change to: S x,ref '=S x,ref -n s / p Based on the changed reference voltage vector coordinates, the decoupled offset vector and the residual vector are recalculated in the same manner as steps 1) and 2) to obtain a redundant offset vector and residual vector combination; the obtained offset vector coordinates of each phase satisfy the following relationship:

5. The method according to claim 4, characterized in that: The reference modulation signal whose level is in the range of [-1,1] after the residual vector is injected with the zero-sequence component in step 5) is expressed as: u x =r x +v z In the formula, r x =2R x v z =(2λ-1)-λr max -(1-λ)r min Where λ is the duty cycle allocation factor of the zero vector, 0≤λ≤1; r max and r min r x The maximum and minimum values ​​of ; The reference modulation signal is adjusted to [0,1] by the following formula for comparison with the single carrier to output the residual vector: The reference modulation signals of each phase of the carrier shift PWM are synthesized by the offset vector selected in step 4): C x =u x +S x 。