An optoelectronic device and a method of fabricating the same
By etching diffusion windows and performing ion diffusion doping in optoelectronic devices to form P-type diffusion regions and using ring electrodes, the problems of excessive PN junction capacitance and insufficient light absorption area are solved, thereby improving sensitivity and response time.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- QUANZHOU SANAN OPTICAL COMM TECH CO LTD
- Filing Date
- 2022-10-28
- Publication Date
- 2026-05-19
AI Technical Summary
In existing optoelectronic devices, the capacitance of the PN junction is too large, which affects the sensitivity and response time. At the same time, the light absorption area is reduced, resulting in a decrease in performance.
By etching a diffusion window and performing ion diffusion doping in the optoelectronic device, a P-type diffusion region is formed. Combined with a ring electrode, a light window is formed, which reduces the junction area of the PN junction and increases the light absorption area.
The capacitance of the PN junction was reduced, which improved the sensitivity and response time of the optoelectronic device, increased the light absorption area, and enhanced the device performance.
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Figure CN115621364B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and more specifically, to an optoelectronic device and a method for fabricating the same. Background Technology
[0002] Semiconductor optoelectronic devices refer to novel semiconductor devices that link the two physical quantities of light and electricity, enabling the interconversion of light and electricity. These devices utilize the photoelectric effect of semiconductors. Key types of optoelectronic devices include photoconductors that utilize the photosensitivity of semiconductors, photovoltaic cells that utilize the photovoltaic effect, and semiconductor light-emitting devices. Semiconductor optoelectronic devices include light guides, photovoltaic cells, photodiodes, and phototransistors. Among these, a photodiode, consisting of a PN junction, is a photoelectric sensor that converts light signals into electrical signals. Specifically, a photodiode operates under reverse voltage. In the absence of light, the reverse current is extremely weak, called dark current; under light, the reverse current rapidly increases to tens of microamps, called photocurrent. The greater the light intensity, the greater the reverse current. Changes in light cause changes in the photodiode current, thus converting the light signal into an electrical signal, making it a photoelectric sensor.
[0003] In existing technologies, commonly used optoelectronic devices typically employ the growth of intrinsic semiconductors on N-type semiconductors, and the formation of P-type semiconductor regions within these intrinsic semiconductors through diffusion. This allows the P-type semiconductor regions to form a PN junction with the N-type semiconductors. Specifically, Zn diffusion is commonly used. During Zn diffusion, the cross-sectional area of the P-type semiconductor region increases due to severe lateral diffusion, thereby increasing the junction area of the PN junction and consequently increasing the capacitance of the optoelectronic device. Capacitance significantly affects important parameters of optoelectronic devices such as sensitivity and response time. Furthermore, existing technologies often employ electrode fabrication within the diffusion window, covering the PN junction and reducing the light absorption area of the optoelectronic device. Summary of the Invention
[0004] The purpose of this application is to provide an optoelectronic device and its fabrication method, which can reduce the capacitance of the PN junction while increasing the light absorption area, thereby improving the performance of the optoelectronic device.
[0005] One embodiment of this application provides a method for fabricating an optoelectronic device, comprising: providing an epitaxial wafer, the epitaxial wafer including a substrate and an N-type layer, an intrinsic layer and a contact layer sequentially grown on the substrate; etching the contact layer to form a diffusion window and performing ion diffusion doping on the intrinsic layer through the diffusion window to form a P-type diffusion region within the intrinsic layer; etching the sidewalls of the diffusion window to enlarge it into a secondary window; forming a ring electrode on the contact layer, and the ring electrode is connected to the P-type diffusion region, the ring electrode enclosing a light window, the light window being coaxially arranged with the P-type diffusion region, and the inner diameter of the light window being larger than the outer diameter of the P-type diffusion region.
[0006] As an feasible approach, before forming a diffusion window in the etched contact layer and performing ion diffusion doping on the intrinsic layer through the diffusion window, the fabrication method of the optoelectronic device further includes: determining the cross-sectional area, diffusion medium, and diffusion time of the P-type diffusion region; calculating the lateral diffusion amount during ion diffusion based on the cross-sectional area, diffusion medium, and diffusion time of the P-type diffusion region; and determining the size of the diffusion window based on the lateral diffusion amount and the cross-sectional area of the P-type diffusion region.
[0007] As one possible implementation, the annular electrode includes an annular portion and a contact portion protruding toward the center of the annular portion, the other end of which is in contact with the P-type diffusion region.
[0008] As one feasible approach, etching the contact layer to form a diffusion window and performing ion diffusion doping on the intrinsic layer through the diffusion window to form a P-type diffusion region within the intrinsic layer includes: etching the contact layer to form a diffusion window; and performing P-type ion diffusion on the intrinsic layer through the diffusion window to form a P-type diffusion region, wherein the P-type ion diffusion includes diffusion along the stacking direction of the epitaxial wafer and lateral diffusion along the stacking direction perpendicular to the epitaxial wafer.
[0009] As an feasible approach, the ratio of the diameter of the secondary window to the diameter of the diffusion window is between 1.7:1 and 1.1:1.
[0010] As one feasible approach, after forming an annular electrode on the contact layer and connecting the annular electrode to the P-type diffusion region, the annular electrode encloses and forms an optical window, the optical window is coaxially arranged with the P-type diffusion region, and the inner diameter of the optical window is larger than the outer diameter of the P-type diffusion region, the method for fabricating the optoelectronic device further includes: passivating the surface of the optoelectronic device with the optical window formed; and performing anti-reflection treatment on the optical window.
[0011] Another embodiment of this application provides an optoelectronic device, which is fabricated using the above-described optoelectronic device fabrication method. It includes a substrate and an N-type layer, an intrinsic layer, and a contact layer sequentially grown on the substrate. A P-type diffusion region is formed in the intrinsic layer. An electrode connected to the P-type diffusion region is disposed on the contact layer. The electrode is a ring electrode, and the ring electrode surrounds and forms a light window. The light window is coaxially arranged with the P-type diffusion region, and the outer diameter of the light window is larger than the outer diameter of the P-type diffusion region.
[0012] As one possible implementation, the ring electrode includes a ring portion and a contact portion protruding toward the center of the ring portion, the other end of which is connected to a P-type diffusion region.
[0013] As one possible implementation, the contact portion includes two parts, and the two contact portions are arranged opposite to each other.
[0014] As an feasible approach, a transition layer is grown between the intrinsic layer and the contact layer, a passivation layer is formed on the contact layer, the electrode is disposed on the contact layer and exposed through the passivation layer, and an antireflection film is coated inside the optical window.
[0015] The beneficial effects of the embodiments of this application include:
[0016] The method for fabricating an optoelectronic device provided in this application includes: providing an epitaxial wafer, the epitaxial wafer including a substrate and an N-type layer, an intrinsic layer and a contact layer sequentially grown on the substrate; etching the contact layer to form a diffusion window and performing ion diffusion doping on the intrinsic layer through the diffusion window to form a P-type diffusion region within the intrinsic layer; etching the sidewalls of the diffusion window to enlarge it into a secondary window; forming a ring electrode on the contact layer, and the ring electrode is connected to the P-type diffusion region, the ring electrode enclosing a light window, the light window being coaxially arranged with the P-type diffusion region, and the inner diameter of the light window being larger than the outer diameter of the P-type diffusion region; forming the diffusion window and the secondary window through two etching processes, wherein the size of the diffusion window is set by taking into account the side diffusion during ion diffusion, making the diffusion window smaller, thereby making the P-type diffusion region formed after diffusion relatively smaller, thus making the area of the P-type diffusion region overlapping with the N-type layer smaller, thereby reducing the junction area of the PN junction, thereby reducing the capacitance of the optoelectronic device. A smaller capacitance can improve the sensitivity of the optoelectronic device, reduce the response time, and thus improve the performance of the optoelectronic device. Furthermore, under the same junction area of the PN junction, the secondary window can be set to be larger, thereby increasing the light absorption area, improving the responsivity and sensitivity of the optoelectronic device, and enhancing the performance of the optoelectronic device. Attached Figure Description
[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 A flowchart illustrating a method for fabricating an optoelectronic device according to an embodiment of this application;
[0019] Figure 2 This is one of the state diagrams for a method of fabricating an optoelectronic device provided in an embodiment of this application;
[0020] Figure 3 The second state diagram is provided for a method of fabricating an optoelectronic device according to an embodiment of this application.
[0021] Figure 4 The third state diagram of a method for fabricating an optoelectronic device provided in this application embodiment;
[0022] Figure 5 The fourth state diagram of a method for fabricating an optoelectronic device provided in this application embodiment;
[0023] Figure 6 The fifth state diagram of a method for fabricating an optoelectronic device provided in the embodiments of this application;
[0024] Figure 7 for Figure 6 Schematic diagram of the cross section along AA;
[0025] Figure 8 for Figure 6 Schematic diagram of the cross section along BB;
[0026] Figure 9 This is the sixth state diagram of a method for fabricating an optoelectronic device according to an embodiment of this application.
[0027] Icons: 10-Optoelectronic device; 11-Epipolar wafer; 111-Substrate; 112-Buffer layer; 113-N-type layer; 114-Intrinsic layer; 115-Transition layer; 116-Contact layer; 117-Passivation layer; 12-Diffusion window; 13-P-type diffusion region; 14-Secondary window; 15-Ring electrode; 151-Ring portion; 152-Contact portion; 16-Optical window; 17-Antireflection coating. Detailed Implementation
[0028] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0029] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.
[0030] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.
[0031] In the description of this application, it should be noted that the terms "center," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use. They are used only for the convenience of describing this application and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0032] This application provides a method for fabricating an optoelectronic device 10, such as... Figure 1 As shown, it includes:
[0033] S10: As Figure 2 As shown, an epitaxial wafer 11 is provided, the epitaxial wafer 11 includes a substrate 111 and an N-type layer 113, an intrinsic layer 114 and a contact layer 116 sequentially grown on the substrate 111;
[0034] The specific materials of each layer in the epitaxial wafer 11 are not specifically limited in this application embodiment. Those skilled in the art can make specific settings according to the actual situation. For example, common group IV semiconductors can be used, or common group III-V compound semiconductors, group II-VI semiconductors, or other semiconductor materials can be used.
[0035] The growth method of each layer on the epitaxial wafer 11 is not specifically limited in this embodiment. For example, chemical vapor deposition, physical vapor deposition, etc. can be used. For different material systems, those skilled in the art can choose a suitable growth method.
[0036] In addition, to ensure that the N-type layer 113 can bond tightly and stress-free with the substrate 111, a buffer layer 112 can be grown on the substrate 111 first, such as... Figure 1 As shown, the lattice constant of the buffer layer 112 is between that of the substrate 111 and the N-type layer 113, which can alleviate the excessive stress caused by lattice mismatch between the N-type layer 113 and the substrate 111, thus preventing the N-type layer from curling. A transition layer 115 can also be provided between the intrinsic layer 114 and the contact layer 116 to make the band gap between the intrinsic layer 114 and the contact layer 116 transition smoothly, thereby improving the stability of the electrode contact.
[0037] S20: As Figure 3 and Figure 4 As shown, the etched contact layer 116 forms a diffusion window 12 and the intrinsic layer 114 is ion-diffused and doped through the diffusion window 12, forming a P-type diffusion region 13 in the intrinsic layer 114. The projection of the diffusion window 12 on the substrate 111 is smaller than the projection of the P-type diffusion region 13 on the substrate 111.
[0038] Specifically, during ion diffusion doping, there is not only diffusion along the depth direction of the optoelectronic device 10, but also lateral diffusion from the center outwards. This makes the diffusion area of the P-type diffusion region 13 larger than the diffusion window 12 area. This application sets a smaller diffusion window 12, thereby making the cross-sectional area of the P-type diffusion region 13 smaller. The P-type diffusion region 13 and the N-type layer 113 form a PN junction. The area where the projections of the P-type diffusion region 13 and the N-type layer 113 on the substrate 111 overlap is the junction area of the PN junction. Since the N-type layer 113 is a layer material laid on the substrate 111, the junction area of the PN junction is the cross-sectional area of the P-type diffusion region 13. This embodiment of the application reduces the cross-sectional area of the P-type diffusion region 13, that is, reduces the junction area of the PN junction. The capacitance of the PN junction is proportional to the junction area of the PN junction. By reducing the junction area of the PN junction, the junction capacitance of the PN junction is reduced. A smaller capacitance can improve the sensitivity of the optoelectronic device 10 and reduce the response time, thereby improving the performance of the optoelectronic device 10.
[0039] In this embodiment, the specific dopant ions used for ion diffusion doping are not limited, as long as the dopant ions replace the original atoms in the intrinsic layer 114 after entering the intrinsic layer 114, resulting in a region in the intrinsic layer 114 where the majority carriers are holes, which is the P-type diffusion region 13. For example, Zn ions can be used, because Zn ions have two electrons on their outer periphery. When a Zn ion enters the intrinsic layer 114 and replaces an atom in the intrinsic layer 114, a hole is formed on the outer periphery of that atom, thus making the majority carriers in the doped region holes, forming the P-type diffusion region 13.
[0040] S30: As Figure 5 As shown, the sidewalls of the diffusion window 12 are etched to enlarge it into a secondary window 14;
[0041] When etching the diffusion window 12, the size of the diffusion window 12 can be set according to the cross-section of the P-type diffusion region 13, wherein the diffusion window 12 is smaller than the cross-sectional area of the P-type diffusion region 13; when etching the secondary window 14, the size of the secondary window 14 can be set according to the working area of the P-type diffusion region 13, wherein the secondary window 14 is larger than the cross-sectional area of the P-type diffusion region 13.
[0042] S40: As Figure 6 , Figure 7 and Figure 8As shown, an annular electrode 15 is formed in the contact layer 116 and is connected to the P-type diffusion region 13. The annular electrode 15 surrounds and forms an optical window 16. The optical window 16 is coaxially arranged with the P-type diffusion region 13, and the inner diameter of the optical window 16 is larger than the outer diameter of the P-type diffusion region, so that the projection of the P-type diffusion region 13 on the substrate 111 falls into the projection of the optical window 16 on the substrate 111.
[0043] The projection of the P-type diffusion region 13 onto the substrate 111 falls within the projection of the light window 16 onto the substrate 111, allowing more of the P-type diffusion region 13 to leak out through the light window 16. The P-type diffusion region 13 and the N-type layer 113 form a PN junction, which is the working area of the optoelectronic device 10. When more of the P-type diffusion region 13 leaks out through the light window 16, the working area of the optoelectronic device 10 is increased, thereby increasing the light absorption area of the optoelectronic device 10 and improving the responsivity and sensitivity of the optoelectronic device 10.
[0044] This application does not limit the specific type of optoelectronic device 10, as long as it is made of PN structure and has an optical window 16 for absorbing photons. For example, it can be a common photodiode, an avalanche photodiode, etc.
[0045] It should be noted that the ring electrode 15 in this application is only a general outline of the shape of the electrode, and is not a limitation on the shape of the electrode. This is because the projection of the P-type diffusion region 13 on the substrate 111 falls within the projection of the light window 16 formed by the ring electrode 15. The ring electrode 15 also needs to be connected to the PN junction to conduct the electrical signal formed after the optoelectronic device 10 receives the light signal. Therefore, a part of the ring electrode 15 needs to be connected to the P-type diffusion region 13.
[0046] The method for fabricating the optoelectronic device 10 provided in this application involves forming a diffusion window 12 and a secondary window 14 through two etching processes. The size of the diffusion window 12 is determined by considering lateral diffusion during ion diffusion, resulting in a smaller diffusion window 12. This leads to a relatively smaller P-type diffusion region 13 formed after diffusion, and consequently, a smaller overlap between the P-type diffusion region 13 and the N-type layer 113. This reduces the junction area of the PN junction, thereby reducing the capacitance of the optoelectronic device 10. A smaller capacitance improves the sensitivity of the optoelectronic device 10, reduces the response time, and thus enhances its performance. Furthermore, under the same PN junction area, the secondary window 14 can be set larger, increasing the light absorption area and further improving the responsivity and sensitivity of the optoelectronic device 10, thus enhancing its overall performance.
[0047] Optionally, a diffusion window 12 is formed in the etched contact layer 116, and the intrinsic layer 114 is ion-diffused and doped through the diffusion window 12 to form a P-type diffusion region 13 within the intrinsic layer 114. Before the projection of the diffusion window 12 onto the substrate 111 is smaller than the projection of the P-type diffusion region 13 onto the substrate 111, the fabrication method of the optoelectronic device 10 further includes:
[0048] S11: Determine the cross-sectional area, diffusion medium, and diffusion time of the P-type diffusion region 13;
[0049] The junction area of the PN junction, which is the cross-sectional area of the P-type diffusion region 13, is determined according to actual needs. During ion diffusion doping, the degree of lateral diffusion is related to the diffusion medium and the diffusion time. The diffusion medium is the material of the intrinsic layer 114. The degree to which the intrinsic layer 114 material accepts diffused ions determines the diffusion depth and the degree of lateral diffusion. The diffusion time also determines the degree of lateral diffusion.
[0050] S12: Calculate the lateral diffusion amount during ion diffusion based on the cross-sectional area of the P-type diffusion region 13, the diffusion medium, and the diffusion time;
[0051] S13: Determine the cross-sectional area of the diffusion window 12 based on the lateral diffusion amount and the cross-sectional area of the P-type diffusion region 13.
[0052] The cross-sectional area of the diffusion window 12 is the cross-sectional area of the P-type diffusion region 13 minus the lateral diffusion amount. It should be noted that since the lateral diffusion is isotropic within the intrinsic layer 114, the projections of the center of the P-type diffusion region 13 and the center of the diffusion window 12 onto the substrate 111 should coincide.
[0053] In one possible implementation of the embodiments of this application, such as Figure 6 As shown, the annular electrode 15 includes an annular portion 151 and a contact portion 152 protruding from the annular portion 151 toward the center. The other end of the contact portion 152 is connected to the P-type diffusion region 13.
[0054] As can be seen from the above, a portion of the annular electrode 15 needs to be connected to the P-type diffusion region 13. In this embodiment, the annular electrode 15 is configured as a circular portion 151 and a contact portion 152 protruding from the circular portion 151 toward the center. The contact portion 152 is used to connect to the P-type diffusion region 13, thereby reducing the contact area between the electrode and the P-type diffusion region 13. Since the electrode and the P-type diffusion region 13 are stacked, the reduced contact area between the electrode and the P-type diffusion region 13 increases the exposed area of the P-type diffusion region 13, thereby increasing the light absorption area of the optoelectronic device 10 and improving the responsivity and sensitivity of the optoelectronic device 10.
[0055] Optionally, the contact layer 116 is etched to form a diffusion window 12, and the intrinsic layer 114 is ion-diffused and doped through the diffusion window 12 to form a P-type diffusion region 13 within the intrinsic layer 114. The projection of the diffusion window 12 onto the substrate 111 is smaller than the projection of the P-type diffusion region 13 onto the substrate 111, including:
[0056] Etching the contact layer 116 forms a diffusion window 12;
[0057] The specific etching method is to coat the contact layer 116 with photoresist, use a mask to etch the photoresist to form the pattern of the corresponding diffusion window 12, and finally etch the contact layer 116 material to form the diffusion window 12.
[0058] P-type ion diffusion is performed on intrinsic layer 114 through diffusion window 12 to form P-type diffusion region 13, wherein P-type ion diffusion includes diffusion along the stacking direction of epitaxial wafer 11 and lateral diffusion along the stacking direction perpendicular to epitaxial wafer 11.
[0059] In one possible implementation of the embodiments of this application, such as Figure 4 , Figure 5 As shown, the ratio of the diameter of the secondary window 14 to the diameter of the diffusion window 12 is between 1.7:1 and 1.1:1.
[0060] The size of the diffusion window 12 is determined based on the cross-sectional area of the P-type diffusion region 13. Once the size of the diffusion window 12 is determined, the secondary window 14 can be determined based on the size of the annular portion 151 of the annular electrode. When the annular portion 151 has a larger width, the secondary window 14 can be set to be larger; when the annular portion 151 has a smaller width, the secondary window 14 can be set to be smaller. Specifically, the ratio of the diameter of the secondary window 14 to the diameter of the diffusion window 12 is between 1.7:1 and 1.1:1. For example, the ratio of the diameter of the secondary window 14 to the diameter of the diffusion window 12 is 1.4.
[0061] Optionally, an annular electrode 15 is formed on the contact layer 116, and the annular electrode 15 is connected to the P-type diffusion region 13. The annular electrode 15 encloses a light window 16, which is coaxially arranged with the P-type diffusion region 13. Furthermore, the inner diameter of the light window 16 is larger than the outer diameter of the P-type diffusion region. The fabrication method of the optoelectronic device 10 further includes:
[0062] The surface of the optoelectronic device 10 with the light window 16 is passivated.
[0063] Passivation treatment of the surface of optoelectronic device 10 can isolate the optoelectronic device 10 from contact with air. This is because the semiconductor material inside the optoelectronic device 10 is sensitive to water vapor and microparticles in the air. Passivation prevents the semiconductor material from contacting the air, thereby improving the stability of the optoelectronic device 10.
[0064] The light window 16 is subjected to anti-reflection treatment.
[0065] Anti-reflection treatment of the light window 16 can improve light transmittance, thereby allowing more light to enter the P-type diffusion region 13, increasing the light beam absorbed by the P-type diffusion region 13, and thus improving the responsivity and sensitivity of the optoelectronic device 10. The specific implementation of the anti-reflection treatment is not limited in this application embodiment; for example, an anti-reflection film 17 can be provided. The specific material of the anti-reflection film 17 is not limited in this application embodiment; for example, it can be AR glass material.
[0066] Another aspect of this application discloses an optoelectronic device 10, such as... Figure 9 As shown, the optoelectronic device 10 is fabricated using the above-described fabrication method. It includes a substrate 111 and an N-type layer 113, an intrinsic layer 114, and a contact layer 116 sequentially grown on the substrate 111. A P-type diffusion region 13 is formed in the intrinsic layer 114. An electrode connected to the P-type diffusion region 13 is disposed on the contact layer 116. The electrode is a ring electrode 15. The ring electrode 15 surrounds and forms a light window 16. The light window 16 is coaxially arranged with the P-type diffusion region 13, and the outer diameter of the light window 16 is larger than the outer diameter of the P-type diffusion region 13, so that the projection of the P-type diffusion region 13 on the substrate 111 falls within the projection of the light window 16 on the substrate 111.
[0067] The ring electrode 15 surrounds and forms an optical window 16. The projection of the P-type diffusion region 13 on the substrate 111 falls into the projection of the optical window 16 on the substrate 111, so that more P-type diffusion regions 13 are exposed through the optical window 16, which increases the working area of the optoelectronic device 10, thereby increasing the light absorption area of the optoelectronic device 10 and improving the responsivity and sensitivity of the optoelectronic device 10.
[0068] In addition, the cross-sectional area of the P-type diffusion region 13 in this embodiment is reduced, that is, the junction area of the PN junction is reduced. The capacitance of the PN junction is proportional to the junction area of the PN junction. By reducing the junction area of the PN junction, the junction capacitance of the PN junction is reduced. A smaller capacitance can improve the sensitivity of the optoelectronic device 10 and reduce the response time, thereby improving the performance of the optoelectronic device 10.
[0069] It should be noted that the optoelectronic device provided in this application embodiment is a low-capacitance device and its application scenarios are not limited. For example, it can be applied to optoelectronic sensors, photodetectors and other optoelectronic devices.
[0070] Optional, such as Figure 6 , Figure 7 and Figure 8As shown, the shaped electrode includes an annular portion 151 and a contact portion 152 protruding from the annular portion 151 toward the center. The other end of the contact portion 152 is connected to the P-type diffusion region 13.
[0071] In this embodiment, the annular electrode 15 is configured as an annular portion 151 and a contact portion 152 protruding from the annular portion 151 toward the center. The contact portion 152 is used to connect to the P-type diffusion region 13, thereby reducing the contact area between the electrode and the P-type diffusion region 13. Since the electrode and the P-type diffusion region 13 are stacked, the contact area between the electrode and the P-type diffusion region 13 is reduced, which increases the exposed area of the P-type diffusion region 13, thereby increasing the light absorption area of the optoelectronic device 10 and improving the responsivity and sensitivity of the optoelectronic device 10.
[0072] In one possible implementation of the embodiments of this application, such as Figure 6 As shown, the contact portion 152 includes two parts, and the two contact portions 152 are arranged opposite to each other.
[0073] As described above, the contact portion 152 is used to connect the P-type diffusion region 13. Those skilled in the art should know that the more contact portions 152 there are, the more stable the electrical connection will be. However, while connecting the P-type diffusion region 13, the contact portion 152 will also cover part of the P-type diffusion region 13, affecting the light absorption area of the optoelectronic device 10. Based on the above considerations, in this embodiment, the contact portion 152 is set to two, and the two contact portions 152 are arranged opposite to each other, so that the contact portion 152 can connect the opposite sides of the P-type diffusion, thereby improving the sensitivity of the optoelectronic device 10.
[0074] Optional, such as Figure 9 As shown, a transition layer 115 is grown between the intrinsic layer 114 and the contact layer 116, and a passivation layer 117 is formed on the contact layer 116. The electrode is disposed on the contact layer 116 and exposed through the passivation layer 117. An antireflection film 17 is also coated inside the light window 16.
[0075] The passivation layer 117 is used to isolate the optoelectronic device 10 from contact with air. Since semiconductor materials are sensitive to moisture and microparticles in the air, the passivation layer 117 prevents the semiconductor material from contacting air, thereby improving the stability of the optoelectronic device 10. Additionally, a transition layer 115 can be provided between the intrinsic layer 114 and the contact layer 116 to ensure a smooth transition of the band gap between the intrinsic layer 114 and the contact layer 116, thereby improving the stability of the electrode contact. Coating the optical window 16 with an antireflection film 17 allows more light to enter the P-type diffusion region 13, thereby increasing the light beam absorbed by the P-type diffusion region 13 and improving the responsivity and sensitivity of the optoelectronic device 10. The specific material of the antireflection film 17 is not limited in this embodiment; for example, it can be AR glass.
[0076] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.
Claims
1. A method for fabricating an optoelectronic device, characterized in that, include: An epitaxial wafer is provided, the epitaxial wafer comprising a substrate and an N-type layer, an intrinsic layer and a contact layer sequentially grown on the substrate; The contact layer is etched to form a diffusion window, and the intrinsic layer is doped with ions through the diffusion window to form a P-type diffusion region in the intrinsic layer. The sidewalls of the diffusion window are etched to enlarge it into a secondary window; An annular electrode is formed on the contact layer and connected to the P-type diffusion region. The annular electrode encloses and forms an optical window. The optical window is coaxially arranged with the P-type diffusion region, and the inner diameter of the optical window is larger than the outer diameter of the P-type diffusion region.
2. The method for fabricating the optoelectronic device according to claim 1, characterized in that, Before etching the contact layer to form a diffusion window and performing ion diffusion doping on the intrinsic layer through the diffusion window, and before forming a P-type diffusion region within the intrinsic layer, the method further includes: Determine the cross-sectional area, diffusion medium, and diffusion time of the P-type diffusion region; The lateral diffusion amount during ion diffusion is calculated based on the cross-sectional area of the P-type diffusion region, the diffusion medium, and the diffusion time. The size of the diffusion window is determined based on the lateral diffusion amount and the cross-sectional area of the P-type diffusion region.
3. The method for fabricating the optoelectronic device according to claim 1, characterized in that, The annular electrode includes an annular portion and a contact portion protruding toward the center of the annular portion, the other end of which is connected to the P-type diffusion region.
4. The method for fabricating the optoelectronic device according to claim 1, characterized in that, The etching of the contact layer to form a diffusion window and the ion diffusion doping of the intrinsic layer through the diffusion window, forming a P-type diffusion region within the intrinsic layer, includes: Etching the contact layer forms a diffusion window; P-type ion diffusion is performed on the intrinsic layer through the diffusion window to form a P-type diffusion region, wherein the P-type ion diffusion includes diffusion along the stacking direction of the epitaxial wafer and lateral diffusion along the stacking direction perpendicular to the epitaxial wafer.
5. The method for fabricating an optoelectronic device according to claim 1, characterized in that, The ratio of the diameter of the secondary window to the diameter of the diffusion window is between 1.7:1 and 1.1:
1.
6. The method for fabricating the optoelectronic device according to claim 1, characterized in that, After forming an annular electrode on the contact layer, and connecting the annular electrode to the P-type diffusion region, the annular electrode enclosing a light window, the light window being coaxially arranged with the P-type diffusion region, and the inner diameter of the light window being larger than the outer diameter of the P-type diffusion region, the method further includes: The surface of the optoelectronic device with the light window is passivated. The light window is subjected to anti-reflection treatment.
7. An optoelectronic device, characterized in that, The device is fabricated using the method described in any one of claims 1-6, comprising a substrate and an N-type layer, an intrinsic layer, and a contact layer sequentially grown on the substrate. A P-type diffusion region is formed in the intrinsic layer. An electrode connected to the P-type diffusion region is disposed on the contact layer. The electrode is a ring electrode, and the ring electrode surrounds and forms a light window. The light window is coaxially arranged with the P-type diffusion region, and the outer diameter of the light window is larger than the outer diameter of the P-type diffusion region.
8. The optoelectronic device according to claim 7, characterized in that, The annular electrode includes an annular portion and a contact portion protruding toward the center of the annular portion, the other end of which is connected to the P-type diffusion region.
9. The optoelectronic device according to claim 8, characterized in that, The contact portion includes two parts, and the two contact portions are arranged opposite to each other.
10. The optoelectronic device according to claim 7, characterized in that, A transition layer is grown between the intrinsic layer and the contact layer, a passivation layer is formed on the contact layer, the electrode is disposed on the contact layer and exposed through the passivation layer, and an antireflection film is coated inside the optical window.