A method and system for establishing a digital twin model based on a fractional order model

Abstract

This invention discloses a method and system for establishing a digital twin model based on a fractional-order model, which collects the inductor current i in real time when the physical experimental platform is turned on. L1.r The inductor current i during turn-off L2.r The capacitor voltage v when it is turned on C1.r and the capacitor voltage v at turn-off C2.r ; Collect the inductor current i when the digital twin platform is turned on L1.d The inductor current i during turn-off L2.d The capacitor voltage v when it is turned on C1.d and the capacitor voltage v at turn-off C2.d The fitness function is calculated using an intelligent optimization algorithm; when the number of iterations reaches the set number, the inductance L, capacitance C, and parasitic resistance R of the capacitance are output. c Parasitic resistance R of the inductor L Parasitic resistance R of the switching transistor dson The order α of the inductor current and the order β of the capacitor voltage are used to obtain the final digital twin model. This invention can effectively improve the accuracy of the model.

Description

Technical Field

[0001] This invention relates to the field of digital twin technology, specifically to a method and system for establishing a digital twin model based on a fractional-order model. Background Technology

[0002] A digital twin is a virtual representation of a physical system that shares the same characteristics as its physical peer. It enables customers to better understand, optimize, predict, and monitor the performance of their installed systems. The concept of digital twins has recently been applied to fault diagnosis of power converters, achieved by comparing the output signals of the digital twin and the physical twin in real time. Digital twin technology comprises two parts: a digital representation of the physical system and advanced algorithms for data analysis.

[0003] Fractional calculus was long considered a purely mathematical tool until it was successfully used to explain physical phenomena. Fractional transformations extend traditional calculus from integer to non-integer orders, greatly increasing the degrees of freedom of a system and enabling more accurate mathematical models. In practical applications, the dynamics of most mechanical and electrical systems inherently possess characteristics of non-integer integrals and differentials. Using fractional calculus for system modeling allows for the development of more accurate dynamic system models, thereby improving system performance. Summary of the Invention

[0004] Based on this, the present invention proposes a method and system for establishing a digital twin model based on a fractional-order model. The digital twin concept is used to estimate the health indicators of key components of the converter, thereby monitoring the degradation process of the converter.

[0005] The present invention solves the above problems through the following technical means:

[0006] In a first aspect, the present invention provides a method for establishing a digital twin model based on a fractional-order model, comprising the following steps:

[0007] First, ensure the stable operation of the physics experiment platform, and then collect the inductor current i when the boost circuit of the physics experiment platform is turned on in real time. L1.r The inductor current i during turn-off L2.r The capacitor voltage v when it is turned on C1.r And the capacitor voltage v when turned off C2.r ;

[0008] Simultaneously, the inductor current i of the digital twin platform's boost circuit during conduction is collected. L1.d The inductor current i during turn-off L2.d The capacitor voltage v when it is turned on C1.d And the capacitor voltage v when turned off C2.d ;

[0009] via i L1.r i L2.r v C1.r v C2.r i L1.d i L2.d v C1.d and v C2.d The fitness function is calculated using an intelligent optimization algorithm.

[0010] When the number of iterations reaches the set number, output the current values ​​of inductance L, capacitance C, and parasitic resistance R of the capacitance. c Parasitic resistance R of the inductor L Parasitic resistance R of the switching transistor dson The order α of the inductor current and the order β of the capacitor voltage;

[0011] And through the output inductor L, capacitor C, and parasitic resistance R of the capacitor. c Parasitic resistance R of the inductor L Parasitic resistance R of the switching transistor dson The order α of the inductor current and the order β of the capacitor voltage are used to obtain the final digital twin model.

[0012] Preferably, when the switching transistor is turned on, the fractional-order model of the converter is:

[0013]

[0014]

[0015] When the switching transistor is turned off, the fractional-order model of the converter is:

[0016]

[0017]

[0018] Among them, V in The input voltage, v C V is the capacitor voltage. o For the output voltage, i L R is the inductor current. dson R L and R C These are the parasitic resistances of the switching transistor, inductor, and capacitor, respectively; R is the output load; t is time; and α and β are fractional orders.

[0019] Preferably, from (1) and (2), the inductor current i when the switching transistor is turned on can be obtained. L1 (n+1) and capacitor voltage v C1 The fractional model expression for (n+1) is:

[0020]

[0021]

[0022] In the formula, p 1-α It is d after discretization. 1-α / dt 1-α Fractional differential function, T S For the switching period, i L (n) and v C (n) represents the inductor current and capacitor voltage at the beginning of the nth cycle, respectively;

[0023] From (3) and (4), we can obtain the inductor current i when the switching transistor is turned off. L2 (n+1) and capacitor voltage v C2 The fractional model expression for (n+1) is:

[0024]

[0025]

[0026] Preferably, the fractional-order conversion filter used is an IIR type filter, and its expression is:

[0027]

[0028] In the formula, a is the weighting coefficient, T is the sampling period of the converter, and G and z are the output and input of the IIR filter, respectively.

[0029] Preferably, the intelligent optimization algorithm is a differential evolution algorithm.

[0030] Preferably, the fitness function F is set as follows:

[0031]

[0032] In the formula, i L1.r i L2.r These represent the inductor currents of the BOOST circuit in the physics experiment platform when it is turned on and off; i L1.d i L2.d These represent the inductor currents of the digital twin platform's BOOST circuit during turn-on and turn-off, respectively; v C1.r v C2.r These represent the capacitor voltages of the BOOST circuit in the physics experiment platform when it is turned on and off; v C1.d v C2.dThese represent the capacitor voltages of the BOOST circuit in the digital twin platform when it is turned on and off, respectively; N is the number of samples obtained, and j is the number of sampling cycles.

[0033] Secondly, the present invention provides a digital twin model building system based on a fractional-order model, comprising:

[0034] The physics experiment platform sampling module is used to first maintain the stable operation of the physics experiment platform, and then collect the inductor current i when the boost circuit of the physics experiment platform is turned on in real time. L1.r The inductor current i during turn-off L2.r The capacitor voltage v when it is turned on C1.r And the capacitor voltage v when turned off C2.r ;

[0035] The digital twin platform sampling module is used to simultaneously acquire the inductor current i of the digital twin platform's boost circuit when it is turned on. L1.d The inductor current i during turn-off L2.d The capacitor voltage v when it is turned on C1.d And the capacitor voltage v when turned off C2.d ;

[0036] The fitness function calculation module is used to calculate the fitness function through i L1.r i L2.r v C1.r v C2.r i L1.d i L2.d v C1.d and v C2.d The fitness function is calculated using an intelligent optimization algorithm.

[0037] The threshold parameter output module is used to output the inductance L, capacitance C, and parasitic resistance R of the capacitance when the number of iterations reaches a set number. c Parasitic resistance R of the inductor L Parasitic resistance R of the switching transistor dson The order α of the inductor current and the order β of the capacitor voltage;

[0038] The digital twin model building module is used to establish the output inductor L, capacitor C, and the parasitic resistance R of the capacitor. c Parasitic resistance R of the inductor L Parasitic resistance R of the switching transistor dson The order α of the inductor current and the order β of the capacitor voltage are used to obtain the final digital twin model.

[0039] Preferably, the fitness function F is set as follows:

[0040]

[0041] In the formula, i L1.r i L2.r These represent the inductor currents of the BOOST circuit in the physics experiment platform when it is turned on and off; i L1.d i L2.d These represent the inductor currents of the digital twin platform's BOOST circuit during turn-on and turn-off, respectively; v C1.r v C2.r These represent the capacitor voltages of the BOOST circuit in the physics experiment platform when it is turned on and off; v C1.d v C2.d These represent the capacitor voltages of the BOOST circuit in the digital twin platform when it is turned on and off, respectively; N is the number of samples obtained, and j is the number of sampling cycles.

[0042] Thirdly, the present invention provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the steps of the method for establishing a digital twin model based on a fractional-order model as described in the first aspect of the present invention.

[0043] Fourthly, the present invention provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method for establishing a digital twin model based on a fractional-order model as described in the first aspect of the present invention.

[0044] Compared with the prior art, the beneficial effects of the present invention include at least the following:

[0045] Compared with traditional modeling methods, the modeling method proposed in this invention can effectively improve the accuracy of the model by applying the principles of fractional calculus to the establishment of the digital twin model; and by more accurately reflecting the state of the physical experimental platform, a more accurate digital twin model can be constructed. Attached Figure Description

[0046] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1 This is a flowchart of the method for establishing a digital twin model based on a fractional-order model according to the present invention;

[0048] Figure 2 This is the circuit switching state corresponding to the SiC MOSFET when the equivalent circuit diagram of the BOOST circuit of this invention is turned on;

[0049] Figure 3 This is the circuit switching state corresponding to the SiC MOSFET when the equivalent circuit diagram of the BOOST circuit of this invention is turned off;

[0050] Figure 4 This is a graph showing the fitness function transformation of the intelligent optimization algorithm of this invention;

[0051] Figure 5 This is a structural diagram of the digital twin model establishment system based on the fractional-order model of this invention;

[0052] Figure 6 This is a block diagram of the electronic device structure of the present invention. Detailed Implementation

[0053] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, the technical solutions of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the described embodiments are merely some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0054] Example 1

[0055] like Figure 1 As shown, this invention mainly consists of a physical experimental platform, a digital twin platform, and an intelligent optimization algorithm. This invention provides a method for establishing a digital twin model based on a fractional-order model, including the following steps:

[0056] S1. First, maintain the stable operation of the physics experiment platform and collect the inductor current i when the boost circuit of the physics experiment platform is turned on in real time. L1.r The inductor current i during turn-off L2.r The capacitor voltage v when it is turned on C1.r And the capacitor voltage v when turned off C2.r ;

[0057] S2. Simultaneously acquire the inductor current i of the digital twin platform boost circuit when it is turned on. L1.d The inductor current i during turn-off L2.d The capacitor voltage v when it is turned on C1.d And the capacitor voltage v when turned off C2.d ;

[0058] S3, via i L1.r i L2.r v C1.r v C2.r i L1.d i L2.d vC1.d and v C2.d The fitness function is calculated using an intelligent optimization algorithm.

[0059] S4. When the number of iterations reaches the set number, output the current values ​​of inductance L, capacitance C, and parasitic resistance R of the capacitance. c Parasitic resistance R of the inductor L Parasitic resistance R of the switching transistor dson The order α of the inductor current and the order β of the capacitor voltage;

[0060] S5, and through the output inductor L, capacitor C, and parasitic resistance R of the capacitor. c Parasitic resistance R of the inductor L Parasitic resistance R of the switching transistor dson The order α of the inductor current and the order β of the capacitor voltage are used to obtain the final digital twin model.

[0061] Figure 2-3 This is an equivalent circuit diagram of the present invention applied to the BOOST circuit. Figure 2 and 3 The circuit switching states are described when the SiCMOSFET is turned on and off, respectively.

[0062] When the switching transistor is turned on, the fractional-order model of the converter is:

[0063]

[0064]

[0065] When the switching transistor is turned off, the fractional-order model of the converter is:

[0066]

[0067]

[0068] Among them, V in The input voltage, v C V is the capacitor voltage. o For the output voltage, i L R is the inductor current. dson R L and R C These are the parasitic resistances of the switching transistor, inductor, and capacitor, respectively; R is the output load; t is time; and α and β are fractional orders.

[0069] From (1) and (2), we can obtain the inductor current i when the switching transistor is turned on. L1 (n+1) and capacitor voltage v C1 The fractional model expression for (n+1) is:

[0070]

[0071]

[0072] In the formula, p 1-α It is d after discretization. 1-α / dt 1-α Fractional differential function, T S For the switching period, i L (n) and v C (n) represents the inductor current and capacitor voltage at the beginning of the nth cycle, respectively;

[0073] From (3) and (4), we can obtain the inductor current i when the switching transistor is turned off. L2 (n+1) and capacitor voltage v C2 The fractional model expression for (n+1) is:

[0074]

[0075]

[0076] Since the converter is a discrete system, the fractional-order conversion filter used is an IIR type filter, and its expression is:

[0077]

[0078] In the formula, a is the weighting coefficient, T is the sampling period of the converter, and G and z are the output and input of the IIR filter, respectively.

[0079] The intelligent optimization algorithm used in this invention is the differential evolution algorithm. The differential evolution algorithm is an algorithm derived by simulating the evolutionary process of organisms in nature, possessing the characteristics of genetic evolution. To ensure that the twin system can accurately reflect the physical system, a fitness function needs to be constructed. In this invention, the fitness function F is set as follows:

[0080]

[0081] In the formula, i L1.r i L2.r These represent the inductor currents of the BOOST circuit in the physics experiment platform when it is turned on and off; i L1.d i L2.d These represent the inductor currents of the digital twin platform's BOOST circuit during turn-on and turn-off, respectively; v C1.r v C2.r These represent the capacitor voltages of the BOOST circuit in the physics experiment platform when it is turned on and off; v C1.d vC2.d These represent the capacitor voltages of the BOOST circuit in the digital twin platform when it is turned on and off, respectively; N is the number of samples obtained, and j is the number of sampling cycles.

[0082] Figure 4 This is the fitness function transformation curve of the intelligent optimization algorithm. As the number of iterations increases, the fitness function set by the system decreases. At this point, the digital twin model can better reflect the physical system.

[0083] Compared with traditional modeling methods, the modeling method proposed in this invention can effectively improve the accuracy of the model by applying the principles of fractional calculus to the establishment of the digital twin model; and by more accurately reflecting the state of the physical experimental platform, a more accurate digital twin model can be constructed.

[0084] Example 2

[0085] like Figure 5 As shown, the present invention provides a digital twin model building system based on a fractional-order model, including a physical experiment platform sampling module, a digital twin platform sampling module, a fitness function calculation module, a threshold parameter output module, and a digital twin model building module;

[0086] The sampling module of the physical experiment platform is used to first maintain the stable operation of the physical experiment platform, and then collect the inductor current i of the boost circuit of the physical experiment platform in real time when it is turned on. L1.r The inductor current i during turn-off L2.r The capacitor voltage v when it is turned on C1.r And the capacitor voltage v when turned off C2.r ;

[0087] The digital twin platform sampling module is used to simultaneously acquire the inductor current i of the digital twin platform boost circuit when it is turned on. L1.d The inductor current i during turn-off L2.d The capacitor voltage v when it is turned on C1.d And the capacitor voltage v when turned off C2.d ;

[0088] The fitness function calculation module is used to calculate the fitness function through i L1.r i L2.r v C1.r v C2.r i L1.d i L2.d v C1.d and v C2.d The fitness function is calculated using an intelligent optimization algorithm.

[0089] The threshold parameter output module is used to output the inductance L, capacitance C, and parasitic resistance R of the capacitance when the number of iterations reaches a set number. c Parasitic resistance R of the inductor L Parasitic resistance R of the switching transistor dson The order α of the inductor current and the order β of the capacitor voltage;

[0090] The digital twin model building module is used to output the inductor L, capacitor C, and parasitic resistance R of the capacitor. c Parasitic resistance R of the inductor L Parasitic resistance R of the switching transistor dson The order α of the inductor current and the order β of the capacitor voltage are used to obtain the final digital twin model.

[0091] Other features in this embodiment are the same as in Embodiment 1, so they will not be repeated here.

[0092] Example 3

[0093] Based on the same concept, the present invention also provides a schematic diagram of a physical structure, such as... Figure 6 As shown, the server may include a processor 810, a communications interface 820, a memory 830, and a communication bus 840. The processor 810, communications interface 820, and memory 830 communicate with each other via the communication bus 840. The processor 810 can call logical instructions stored in the memory 830 to execute the steps of the digital twin model establishment method based on the fractional-order model. For example, this includes:

[0094] S1. First, maintain the stable operation of the physics experiment platform and collect the inductor current i when the boost circuit of the physics experiment platform is turned on in real time. L1.r The inductor current i during turn-off L2.r The capacitor voltage v when it is turned on C1.r And the capacitor voltage v when turned off C2.r ;

[0095] S2. Simultaneously acquire the inductor current i of the digital twin platform boost circuit when it is turned on. L1.d The inductor current i during turn-off L2.d The capacitor voltage v when it is turned on C1.d And the capacitor voltage v when turned off C2.d ;

[0096] S3, via i L1.r i L2.r v C1.r v C2.r iL1.d i L2.d v C1.d and v C2.d The fitness function is calculated using an intelligent optimization algorithm.

[0097] S4. When the number of iterations reaches the set number, output the current values ​​of inductance L, capacitance C, and parasitic resistance R of the capacitance. c Parasitic resistance R of the inductor L Parasitic resistance R of the switching transistor dson The order α of the inductor current and the order β of the capacitor voltage;

[0098] S5, and through the output inductor L, capacitor C, and parasitic resistance R of the capacitor. c Parasitic resistance R of the inductor L Parasitic resistance R of the switching transistor dson The order α of the inductor current and the order β of the capacitor voltage are used to obtain the final digital twin model.

[0099] Furthermore, the logical instructions in the aforementioned memory 830 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, essentially, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0100] Example 4

[0101] Based on the same concept, the present invention also provides a non-transitory computer-readable storage medium storing a computer program containing at least one piece of code executable by a master device to control the master device to implement the steps of the method for establishing a digital twin model based on a fractional-order model. For example, it includes:

[0102] S1. First, maintain the stable operation of the physics experiment platform and collect the inductor current i when the boost circuit of the physics experiment platform is turned on in real time. L1.r The inductor current i during turn-off L2.r The capacitor voltage v when it is turned on C1.rAnd the capacitor voltage v when turned off C2.r ;

[0103] S2. Simultaneously acquire the inductor current i of the digital twin platform boost circuit when it is turned on. L1.d The inductor current i during turn-off L2.d The capacitor voltage v when it is turned on C1.d And the capacitor voltage v when turned off C2.d ;

[0104] S3, via i L1.r i L2.r v C1.r v C2.r i L1.d i L2.d v C1.d and v C2.d The fitness function is calculated using an intelligent optimization algorithm.

[0105] S4. When the number of iterations reaches the set number, output the current values ​​of inductance L, capacitance C, and parasitic resistance R of the capacitance. c Parasitic resistance R of the inductor L Parasitic resistance R of the switching transistor dson The order α of the inductor current and the order β of the capacitor voltage;

[0106] S5, and through the output inductor L, capacitor C, and parasitic resistance R of the capacitor. c Parasitic resistance R of the inductor L Parasitic resistance R of the switching transistor dson The order α of the inductor current and the order β of the capacitor voltage are used to obtain the final digital twin model.

[0107] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid-state drive).

[0108] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. This program can be stored in a computer-readable storage medium, and when executed, it can include the processes described in the above method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as ROM or random access memory (RAM), magnetic disks, or optical disks.

[0109] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A method for establishing a digital twin model based on a fractional-order model, characterized in that, Includes the following steps: First, ensure the stable operation of the physics experiment platform, and then collect the inductor current of the boost circuit of the physics experiment platform when it is turned on in real time. i L1.r Inductor current during shutdown i L2.r The capacitor voltage when it is turned on v C1.r and the capacitor voltage at turn-off v C2.r ; Simultaneously, the inductor current of the digital twin platform's boost circuit during conduction is collected. i L1.d Inductor current during shutdown i L2.d The capacitor voltage when it is turned on v C1.d and the capacitor voltage at turn-off v C2.d ; pass i L1.r , i L2.r , v C1.r , v C2.r , i L1.d , i L2.d , v C1.d as well as v C2.d The fitness function is calculated using an intelligent optimization algorithm. When the number of iterations reaches the set number, output the inductance value at that time. L ,capacitance C Parasitic resistance of capacitor R c Parasitic resistance of inductors R L Parasitic resistance of the switching transistor R dson Order of inductor current α And the order of capacitor voltage β ; And through the output inductance L ,capacitance C Parasitic resistance of capacitor R c Parasitic resistance of inductors R L Parasitic resistance of the switching transistor R dson Order of inductor current α And the order of capacitor voltage β The final digital twin model was obtained; When the switching transistor is turned on, the fractional-order model of the converter is: When the switching transistor is turned off, the fractional-order model of the converter is: in, V in Input voltage, v C The voltage across the capacitor. V o For output voltage, i L For inductor current, R dson , R L and R C These are the parasitic resistances of the switching transistor, inductor, and capacitor, respectively. R For output load, t For time, α and β It is a fractional order; From (1) and (2), we can obtain the inductor current when the switching transistor is turned on. i L1 ( n+1 ) and capacitor voltage v C1 ( n+1 The fractional-order model expression is: In the formula, p 1-α It is after discretization. d 1-α / dt 1-α Fractional differential function T S For the switching cycle, i L ( n )and v C ( n ( ) represent the inductor current and capacitor voltage at the beginning of the nth cycle, respectively; From (3) and (4), we can obtain the inductor current when the switching transistor is turned off. i L2 ( n+1 ) and capacitor voltage v C2 ( n+1 The fractional-order model expression is: .

2. The method for establishing a digital twin model based on a fractional-order model according to claim 1, characterized in that, The fractional-order conversion filter used is an IIR type filter, and its expression is: In the formula, , , where a is the weighting coefficient, T is the sampling period of the converter, and G and z are the output and input of the IIR filter, respectively.

3. The method for establishing a digital twin model based on a fractional-order model according to claim 1, characterized in that, The intelligent optimization algorithm is the differential evolution algorithm.

4. The method for establishing a digital twin model based on a fractional-order model according to claim 1, characterized in that, The fitness function F Established as: In the formula, i L1.r , i L2.r These represent the inductor currents of the BOOST circuit in the physics experiment platform when it is turned on and off, respectively. i L1.d , i L2.d These are the inductor currents of the BOOST circuit in the digital twin platform when it is turned on and off, respectively. v C1.r , v C2.r These represent the capacitor voltages of the BOOST circuit in the physical experiment platform when it is turned on and off, respectively. v C1.d , v C2.d These represent the capacitor voltages of the BOOST circuit in the digital twin platform when it is turned on and off, respectively; N is the number of samples obtained, and j is the number of sampling cycles.

5. A system for establishing a digital twin model based on a fractional-order model, characterized in that, include: The physics experiment platform sampling module is used to first maintain the stable operation of the physics experiment platform, and then collect the inductor current of the boost circuit of the physics experiment platform in real time when it is turned on. i L1.r Inductor current during shutdown i L2.r The capacitor voltage when it is turned on v C1.r and the capacitor voltage at turn-off v C2.r ; The digital twin platform sampling module is used to simultaneously acquire the inductor current of the digital twin platform's boost circuit when it is turned on. i L1.d Inductor current during shutdown i L2.d The capacitor voltage when it is turned on v C1.d and the capacitor voltage at turn-off v C2.d ; The fitness function calculation module is used to calculate the fitness function through... i L1.r , i L2.r , v C1.r , v C2.r , i L1.d , i L2.d , v C1.d as well as v C2.d The fitness function is calculated using an intelligent optimization algorithm. The threshold parameter output module is used to output the inductance value when the number of iterations reaches a set number. L ,capacitance C Parasitic resistance of capacitor R c Parasitic resistance of inductors R L Parasitic resistance of the switching transistor R dson Order of inductor current α And the order of capacitor voltage β ; Digital twin model building module, used to and through the output inductor L ,capacitance C Parasitic resistance of capacitor R c Parasitic resistance of inductors R L Parasitic resistance of the switching transistor R dson Order of inductor current α And the order of capacitor voltage β The final digital twin model was obtained; When the switching transistor is turned on, the fractional-order model of the converter is: When the switching transistor is turned off, the fractional-order model of the converter is: in, V in Input voltage, v C This is the capacitor voltage. V o For output voltage, i L For inductor current, R dson , R L and R C These are the parasitic resistances of the switching transistor, inductor, and capacitor, respectively. R For output load, t For time, α and β It is a fractional order; From (1) and (2), we can obtain the inductor current when the switching transistor is turned on. i L1 ( n+1 ) and capacitor voltage v C1 ( n+1 The fractional-order model expression is: In the formula, p 1-α It is after discretization. d 1-α / dt 1-α Fractional differential function T S For the switching cycle, i L ( n )and v C ( n ( ) represent the inductor current and capacitor voltage at the beginning of the nth cycle, respectively; From (3) and (4), we can obtain the inductor current when the switching transistor is turned off. i L2 ( n+1 ) and capacitor voltage v C2 ( n+1 The fractional-order model expression is: .

6. The digital twin model establishment system based on a fractional-order model according to claim 5, characterized in that, The fitness function F Established as: In the formula, i L1.r , i L2.r These represent the inductor currents of the BOOST circuit in the physics experiment platform when it is turned on and off, respectively. i L1.d , i L2.d These are the inductor currents of the BOOST circuit in the digital twin platform when it is turned on and off, respectively. v C1.r , v C2.r These represent the capacitor voltages of the BOOST circuit in the physical experiment platform when it is turned on and off, respectively. v C1.d , v C2.d These represent the capacitor voltages of the BOOST circuit in the digital twin platform when it is turned on and off, respectively; N is the number of samples obtained, and j is the number of sampling cycles.

7. An electronic device, characterized in that, It includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the steps of the method for establishing a digital twin model based on a fractional-order model as described in any one of claims 1-4.

8. A non-transitory computer-readable storage medium, characterized in that, It stores a computer program that, when executed by a processor, implements the steps of the method for establishing a digital twin model based on a fractional-order model as described in any one of claims 1-4.

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