A clamping voltage selectable lateral punch through SiC-TVS device

By inserting multiple lightly doped emitter regions into SiC-TVS devices to form a lateral N/P overlapping structure, the problem of increased design complexity and power consumption caused by the increased number of clamping voltage transistors in the circuit system is solved, realizing integrated modulation of multi-level clamping voltage and simplified circuit system design.

CN115632056BActive Publication Date: 2025-12-05WUHU RES INST OF XIAN UNIV OF ELECTRONIC SCI & TECH
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Patent Information

Application Number
CN202211138213.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-19
Publication Date
2025-12-05
Estimated Expiration
2042-09-19

AI Technical Summary

Technical Problem

In circuit systems where the operating voltage needs to be dynamically adjusted, the increased number of clamping voltage transistors in existing TVS devices leads to problems such as complex circuit topology design, increased size, and increased power consumption.

Method used

A laterally punch-through SiC-TVS device with selectable clamping voltage is designed. By inserting multiple lightly doped N+/N- or P+/P- emitter regions on the silicon carbide substrate to form a laterally overlapping N/P structure, multi-level clamping voltage selection is achieved, simplifying the protection topology design of the circuit system.

Benefits of technology

This invention achieves integrated modulation of multi-level clamping voltage on a single-tube TVS chip, which simplifies the design of the circuit system, saves system size and power consumption, and has good thermal conductivity and high temperature resistance.

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Abstract

The application relates to a clamping voltage-selectable lateral punch-through SiC-TVS device, which comprises a silicon carbide substrate layer, an epitaxial layer base region, a positive electrode and a plurality of negative electrodes, the epitaxial layer base region comprises two end emission region extension regions, a plurality of intermediate emission region extension regions, two end emission regions and a plurality of intermediate emission regions, the epitaxial layer base region, the end emission region extension region and the intermediate emission region extension region are lightly doped, and the end emission region and the intermediate emission region are heavily doped; the silicon carbide substrate layer, the end emission region extension region, the intermediate emission region extension region, the end emission region and the intermediate emission region are of a first conductive type, the epitaxial layer base region is of a second conductive type, and the first conductive type and the second conductive type are opposite. The application inserts a plurality of N+ or P+ emission regions on the surface of the base region of the planar NPN or PNP punch-through structure, and realizes the selection of a wider range of clamping voltages on a single-pipe TVS chip by optimizing the emission region structure parameters and the base region concentration.
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Description

TECHNICAL FIELD

[0001] The application belongs to the field of microelectronics, and particularly relates to a lateral punch-through SiC-TVS device with selectable clamping voltage. BACKGROUND

[0002] The instantaneous high-energy surge impact represented by lightning and electromagnetic pulse can cause electronic components and downstream electronic systems to fail or even be damaged. In particular, in the fields of aerospace, rail transportation, high-voltage power grid, advanced weapon systems and the like where circuit miniaturization and integration are widely applied, it is necessary to focus on protecting the device level or circuit system level damage caused by the above-mentioned abnormal high-energy surge impact. Transient voltage suppression diode (TVS) has the advantages of high power absorption, fast response speed and stable clamping voltage, and is a commonly used protective device. Usually, it is connected in parallel to the working circuit at both ends. When a transient surge impact occurs, the TVS will conduct in a short time and absorb the surge power, clamping the terminal voltage to a preset value, thereby ensuring that the electronic components / systems are not damaged by overvoltage or overcurrent impact.

[0003] Wide bandgap semiconductor silicon carbide (SiC) material has superior material physical properties. Compared with traditional Si-based TVS devices, the TVS device prepared therefrom has the following advantages: 1) The bandgap of SiC is 3 times that of Si, and the extremely low intrinsic carrier concentration makes the leakage current of SiC-TVS much smaller than that of Si-TVS, thereby exhibiting excellent blocking characteristics, rigid clamping effect and high temperature resistance advantage; 2) The critical breakdown field of SiC is about 10 times that of Si, so under the same breakdown voltage, SiC-TVS has a smaller drift region thickness, thereby effectively reducing the on-resistance and improving the response speed; 3) The thermal conductivity of SiC is about 3 times that of Si, and the good heat conduction property ensures that the device can dissipate heat faster at high temperature, thereby improving the reliability; 4) Compared with the series-parallel component form commonly used in Si-TVS, SiC-TVS can obtain the same current or voltage with a single core, thereby saving system space and improving reliability. Therefore, SiC-TVS with the advantages of low leakage, fast response, good heat conduction, small size and the like is getting more and more attention in the field of extreme complex working environment such as high temperature and strong electromagnetic interference.

[0004] For a specific circuit system, when its working voltage is determined, the TVS needs to have a precise clamping voltage preset value corresponding thereto. For a circuit system application requiring adjustment of dynamic changes of working voltage (for example, the circuit system needs to reduce or increase the voltage according to the environmental temperature or the working frequency), a plurality of TVSs need to clamp and mark different working voltage states. At this time, the increase in the number of TVS single tubes will cause the increase in the complexity of the topological design of the entire circuit system, the increase in size, and the increase in power consumption and other problems. SUMMARY

[0005] In order to solve the above problems existing in the prior art, the present application provides a lateral punch-through type SiC-TVS device with selectable clamping voltage. The technical problem to be solved by the present application is realized by the following technical scheme:

[0006] One embodiment of the present application provides a lateral punch-through type SiC-TVS device with selectable clamping voltage, which comprises a silicon carbide substrate layer, an epitaxial layer base region, a positive electrode and a plurality of negative electrodes, wherein:

[0007] The epitaxial layer base region is located on the silicon carbide substrate layer;

[0008] The epitaxial layer base region comprises two end emission region extension regions, a plurality of intermediate emission region extension regions, two end emission regions and a plurality of intermediate emission regions, wherein the two end emission region extension regions are respectively arranged at the two ends of the epitaxial layer base region, the plurality of intermediate emission region extension regions are uniformly and spacedly distributed between the two end emission region extension regions, the two end emission regions are respectively arranged in the two end emission region extension regions, and the side of the end emission region extension region and the side of the end emission region correspondingly flush with the side of the epitaxial layer base region, and each intermediate emission region extension region is provided with one intermediate emission region;

[0009] The positive electrode is located on the end emission region at one end;

[0010] The plurality of negative electrodes are located on the end emission region at the other end and on the plurality of intermediate emission regions;

[0011] The epitaxial layer base region, the end emission region extension region and the intermediate emission region extension region are lightly doped, and the end emission region and the intermediate emission region are heavily doped.

[0012] The silicon carbide substrate layer, the end emission region extension region, the intermediate emission region extension region, the end emission region and the intermediate emission region are of a first conductivity type, the epitaxial layer base region is of a second conductivity type, and the first conductivity type and the second conductivity type are opposite.

[0013] In one embodiment of the present application, if the first conductivity type of the SiC substrate layer is N type, the second conductivity type of the epitaxial layer base region is P type, and the first conductivity type of the end-emitter extension region, the middle-emitter extension region, the end-emitter region and the middle-emitter region is N type.

[0014] If the first conductivity type of the SiC substrate layer is P type, the second conductivity type of the epitaxial layer base region is N type, and the first conductivity type of the end-emitter extension region, the middle-emitter extension region, the end-emitter region and the middle-emitter region is P type.

[0015] In one embodiment of the present application, the lateral punch-through SiC-TVS device is a symmetric structure.

[0016] In one embodiment of the present application, the doping concentration of the epitaxial layer base region ranges from 1×1018cm-3to 1×1020cm-3. 15 17 -3

[0017] In one embodiment of the present application, the thickness of the epitaxial layer base region is [(3+n)~(5+n)]μm, where n is the number of the middle-emitter regions, and n≥1.

[0018] In one embodiment of the present application, the junction depth of the end-emitter region and the middle-emitter region is the same, and the junction depth of the end-emitter region and the middle-emitter region ranges from 0.8μm to 1.2μm.

[0019] In one embodiment of the present application, the junction depth of the end-emitter extension region and the middle-emitter extension region is the same, and is greater than the junction depth of the end-emitter region and the middle-emitter region, and the junction depth of the end-emitter extension region and the middle-emitter extension region ranges from 1.2μm to 1.8μm.

[0020] In one embodiment of the present application, the doping concentration of the end-emitter extension region and the middle-emitter extension region is the same, and is greater than the doping concentration of the epitaxial layer base region, and the doping concentration of the end-emitter extension region and the middle-emitter extension region ranges from 1×1018cm-3to 1×1020cm-3. 16 18 -3

[0021] In one embodiment of the present application, the middle-emitter region is located in the middle of the middle-emitter extension region, and the width of the middle-emitter extension region is greater than the width of the middle-emitter region, and the width of the middle-emitter extension region ranges from 2μm to 5μm.

[0022] ​​​​​​In one embodiment of the present application, the interval between two adjacent intermediate emission region extension regions ranges from 1 to 4 μm.

[0023] Compared with the prior art, the present application has the following advantages:

[0024] The present application inserts a plurality of N+ or P+ emission regions laterally into the base region surface of a planar NPN or PNP punchthrough structure, and realizes a wider range of clamping voltage selection on a single TVS chip by optimizing the emission region structure parameters and the base region concentration, so as to solve the problems of complex protection circuit topology design, increased system size and power consumption of the circuit system facing dynamic adjustment of working voltage. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 A structure schematic diagram of a clamping voltage selectable lateral punchthrough type SiC-TVS device provided by the embodiment of the present application is shown in the figure.

[0026] Figure 2 A structure schematic diagram of another clamping voltage selectable lateral punchthrough type SiC-TVS device provided by the embodiment of the present application is shown in the figure.

[0027] Figure 3 A structure schematic diagram of still another clamping voltage selectable lateral punchthrough type SiC-TVS device provided by the embodiment of the present application is shown in the figure.

[0028] Figure 4 A structure schematic diagram of still another clamping voltage selectable lateral punchthrough type SiC-TVS device provided by the embodiment of the present application is shown in the figure.

[0029] Figure 5 A clamping characteristic curve diagram of a clamping voltage selectable lateral punchthrough type SiC-TVS device provided by the embodiment of the present application is shown in the figure.

[0030] Figure 6 An electric field distribution diagram and a corresponding electric field distribution curve diagram of a clamping voltage selectable lateral punchthrough type SiC-TVS device provided by the present application are shown in the figures. DETAILED DESCRIPTION

[0031] The present application will be further described in detail below in combination with specific embodiments, but the embodiments of the present application are not limited thereto.

[0032] It should be noted that the "upper", "lower", "left", "right" mentioned in the embodiments are the positional relationships of the SiC-TVS device structure in the illustrated state, "long" is the lateral dimension of the SiC-TVS device structure in the illustrated state, and "deep" is the longitudinal dimension of the SiC-TVS device structure in the illustrated state.

[0033] Embodiment one

[0034] Please refer to Figure 1 , Figure 1 A structure diagram of a clamping voltage selectable lateral punch-through SiC-TVS device provided by an embodiment of the present application. The embodiment of the present application provides a clamping voltage selectable lateral punch-through SiC-TVS device, which comprises a silicon carbide substrate layer 101, an epitaxial layer base region 102, a positive electrode 107 and a plurality of negative electrodes 108, wherein:

[0035] The epitaxial layer base region 102 is located on the silicon carbide substrate layer 101;

[0036] The epitaxial layer base region 102 comprises two end emission region extension regions 103, a plurality of intermediate emission region extension regions 104, two end emission regions 105 and a plurality of intermediate emission regions 106, wherein the two end emission region extension regions 103 are respectively arranged at two ends of the epitaxial layer base region 102, the plurality of intermediate emission region extension regions 104 are uniformly and spacedly distributed between the two end emission region extension regions 103, the two end emission regions 105 are respectively arranged in the two end emission region extension regions 103, and a side of the end emission region extension region 103 and the end emission region 105 corresponds to a side of the epitaxial layer base region 102 flush, and each of the intermediate emission region extension regions 104 is provided with an intermediate emission region 106;

[0037] The positive electrode 107 is located on the end emission region 105 at one end;

[0038] The plurality of negative electrodes 108 are located on the end emission region 105 at the other end and on the plurality of intermediate emission regions 106;

[0039] Among them, the epitaxial layer base region 102, the end emission region extension region 103 and the intermediate emission region extension region 104 are lightly doped, the end emission region 105 and the intermediate emission region 106 are heavily doped, and the lightly doped emission region extension region is arranged between the heavily doped emission region and the lightly doped epitaxial layer base region, which is beneficial to alleviate the edge electric field concentration problem of the abrupt PN junction (N+ / P or P+ / N) formed by the heavily doped emission region and the lightly doped epitaxial layer base region;

[0040] The silicon carbide substrate layer 101, the end emission region extension region 103, the intermediate emission region extension region 104, the end emission region 105 and the intermediate emission region 106 are of a first conductivity type, the epitaxial layer base region 102 is of a second conductivity type, and the first conductivity type and the second conductivity type are opposite, so that a reverse-biased PN junction can be formed after an external voltage is applied.

[0041] In one embodiment, if the first conductivity type of the SiC substrate layer is N-type, the second conductivity type of the epitaxial layer base region is P-type, and the first conductivity type of the end-emitter extension region, the middle-emitter extension region, the end-emitter region, and the middle-emitter region is N-type; if the first conductivity type of the SiC substrate layer is P-type, the second conductivity type of the epitaxial layer base region is N-type, and the first conductivity type of the end-emitter extension region, the middle-emitter extension region, the end-emitter region, and the middle-emitter region is P-type. Specifically, a layer of epitaxial layer base region 102 is grown on the SiC substrate layer 101 by epitaxial technology, and then two end-emitter extension regions 103, a plurality of middle-emitter extension regions 104, two end-emitter regions 105, and a plurality of middle-emitter regions 106 are formed by ion implantation process. The two end-emitter extension regions 103 are located at symmetrical positions on both sides of the epitaxial layer base region 102, all the middle-emitter extension regions 104 are uniformly distributed between the two end-emitter extension regions 103, the two end-emitter regions 105 are located within the two end-emitter extension regions 103, and all the middle-emitter regions 106 are located within the middle-emitter extension regions 104. Please refer to FIG. 1 and FIG. 2. Figure 2 , Figure 2 In one embodiment, if the first conductivity type of the SiC substrate layer is N-type, the second conductivity type of the epitaxial layer base region is P-type, and the first conductivity type of the end-emitter extension region, the middle-emitter extension region, the end-emitter region, and the middle-emitter region is N-type; if the first conductivity type of the SiC substrate layer is P-type, the second conductivity type of the epitaxial layer base region is N-type, and the first conductivity type of the end-emitter extension region, the middle-emitter extension region, the end-emitter region, and the middle-emitter region is P-type. Specifically, a layer of epitaxial layer base region 102 is grown on the SiC substrate layer 101 by epitaxial technology, and then two end-emitter extension regions 103, a plurality of middle-emitter extension regions 104, two end-emitter regions 105, and a plurality of middle-emitter regions 106 are formed by ion implantation process. The two end-emitter extension regions 103 are located at symmetrical positions on both sides of the epitaxial layer base region 102, all the middle-emitter extension regions 104 are uniformly distributed between the two end-emitter extension regions 103, the two end-emitter regions 105 are located within the two end-emitter extension regions 103, and all the middle-emitter regions 106 are located within the middle-emitter extension regions 104. Please refer to FIG. 1 and FIG. 2. Figure 3 , Figure 3 In one embodiment, if the first conductivity type of the SiC substrate layer is N-type, the second conductivity type of the epitaxial layer base region is P-type, and the first conductivity type of the end-emitter extension region, the middle-emitter extension region, the end-emitter region, and the middle-emitter region is N-type; if the first conductivity type of the SiC substrate layer is P-type, the second conductivity type of the epitaxial layer base region is N-type, and the first conductivity type of the end-emitter extension region, the middle-emitter extension region, the end-emitter region, and the middle-emitter region is P-type. Specifically, a layer of epitaxial layer base region 102 is grown on the SiC substrate layer 101 by epitaxial technology, and then two end-emitter extension regions 103, a plurality of middle-emitter extension regions 104, two end-emitter regions 105, and a plurality of middle-emitter regions 106 are formed by ion implantation process. The two end-emitter extension regions 103 are located at symmetrical positions on both sides of the epitaxial layer base region 102, all the middle-emitter extension regions 104 are uniformly distributed between the two end-emitter extension regions 103, the two end-emitter regions 105 are located within the two end-emitter extension regions 103, and all the middle-emitter regions 106 are located within the middle-emitter extension regions 104. Please refer to FIG. 1 and FIG. 2. Figure 2 and Figure 3 In one embodiment, if the first conductivity type of the SiC substrate layer is N-type, the second conductivity type of the epitaxial layer base region is P-type, and the first conductivity type of the end-emitter extension region, the middle-emitter extension region, the end-emitter region, and the middle-emitter region is N-type; if the first conductivity type of the SiC substrate layer is P-type, the second conductivity type of the epitaxial layer base region is N-type, and the first conductivity type of the end-emitter extension region, the middle-emitter extension region, the end-emitter region, and the middle-emitter region is P-type. Specifically, a layer of epitaxial layer base region 102 is grown on the SiC substrate layer 101 by epitaxial technology, and then two end-emitter extension regions 103, a plurality of middle-emitter extension regions 104, two end-emitter regions 105, and a plurality of middle-emitter regions 106 are formed by ion implantation process. The two end-emitter extension regions 103 are located at symmetrical positions on both sides of the epitaxial layer base region 102, all the middle-emitter extension regions 104 are uniformly distributed between the two end-emitter extension regions 103, the two end-emitter regions 105 are located within the two end-emitter extension regions 103, and all the middle-emitter regions 106 are located within the middle-emitter extension regions 104. Please refer to FIG. 1 and FIG. 2.

[0042] The above-provided lateral punch-through SiC-TVS device is based on a planar NPN (as shown in FIG. 1) or PNP (as shown in FIG. 2). Figure 2 Figure 3 ​The device is inserted with multiple N+ / N- or P+ / P- emitter regions with lightly doped extension regions in the middle P-type or N-type base region (epitaxial layer base region), forming a lateral N / P overlap device structure. The heavily doped N+ or P+ region surface in each N+ / N- or P+ / P- region can be prepared as an independent electrode. For a given NPN or PNP type TVS, the punch-through voltage of the NPN or PNP cell formed by the adjacent emitter regions mainly depends on the spacing and doping concentration between the N- or P- extension regions. Therefore, when the N+ / N- emitter region or P+ / P- emitter region at one end is fixed as the positive or negative electrode of the TVS, the clamping voltage will increase with the increase in the number of middle N+ / N- emitter regions or P+ / P- emitter regions. In practical applications, the P-type or N-type base region concentration and the parameters and number of N+ / N- emitter regions or P+ / P- emitter regions can be designed according to the dynamic range of the circuit system operating voltage to achieve the target wide range of clamping voltage selection.

[0043] In this embodiment, the lateral punch-through type SiC-TVS device is a symmetrical structure, and the positive and negative electrodes are interchangeable.

[0044] Further, the conductivity type of the epitaxial layer base region 102 is opposite to that of the emitter regions (including the end emitter region extension region 103, the middle emitter region extension region 104, the end emitter region 105, and the middle emitter region 106), and the doping concentration ranges from 1×10 15 to 1×10 17 cm -3 .

[0045] Further, the thickness of the epitaxial layer base region 102 is [(3+n)~(5+n)]μm, where n is the number of middle emitter regions, n≥1, because as the number of middle N+ / N- regions or P+ / P- regions increases, the depletion region expands longitudinally and deepens. If the depletion region expands to the interface between the epitaxial layer base region and the heavily doped substrate, the substrate will form a shunt effect on the current flowing through the depletion region of the lateral punch-through type TVS, resulting in a decrease in the target clamping voltage and clamping failure. Therefore, in order to avoid the depletion region from contacting the interface between the substrate and the epitaxial layer base region, the thickness of the epitaxial layer base region 102 is set to [(3+n)~(5+n)]μm.

[0046] Further, the junction depth of the end emitter region 105 and the middle emitter region 106 is the same, and the junction depth of the end emitter region 105 and the middle emitter region 106 ranges from 0.8 to 1.2μm.

[0047] Further, the doping concentration of the end emitter region 105 and the middle emitter region 106 is the same, and ranges from 1×10 18 to 1×10 19 cm -3 .

[0048] Further, the end-emitter-area extension region 103 and the middle-emitter-area extension region 104 respectively wrap the end-emitter-area 105 and the middle-emitter-area 106, the junction depth of the end-emitter-area extension region 103 and the middle-emitter-area extension region 104 is the same, and is greater than the junction depth of the end-emitter-area 105 and the middle-emitter-area 106, the range of the junction depth of the end-emitter-area extension region 103 and the middle-emitter-area extension region 104 is 1.2-1.8 μm. The effect of the emitter-area extension region is to alleviate the electric field concentration of the junction edge of the emitter area, and the range of the junction depth of the end-emitter-area extension region 103 and the middle-emitter-area extension region 104 is set in consideration of the fact that when the depth of the emitter-area extension region is 1.5 times the junction depth of the emitter area, a better effect of alleviating the electric field concentration can be achieved.

[0049] Further, the doping concentration of the end-emitter-area extension region 103 and the middle-emitter-area extension region 104 is the same, and is greater than the doping concentration of the epitaxial layer base region 102, the range of the doping concentration of the end-emitter-area extension region 103 and the middle-emitter-area extension region 104 is 1×10 16 ~1×10 18 cm -3 .

[0050] Further, the middle-emitter-area 106 is located in the middle of the middle-emitter-area extension region 104, and the width of the middle-emitter-area extension region 104 is greater than the width of the middle-emitter-area 106, so as to ensure that the concentration gradient on both sides of the PN junction formed by the emitter area and the epitaxial layer base region is small, thereby alleviating the excessive concentration of the junction edge electric field caused by the direct contact of the heavily doped middle-emitter-area with the epitaxial layer base region to form an N+ / P or P+ / N junction. The width range of the middle-emitter-area extension region 104 is 2-5 μm. First, the width range of the emitter-area extension region is set by simulation according to the above-mentioned parameter range to achieve the effect of alleviating the electric field concentration, thereby obtaining the width range of the extension region base region.

[0051] Further, the spacing range between the two adjacent middle-emitter-area extension regions 104 is 1-4 μm. The spacing range between the two adjacent middle-emitter-area extension regions 104 determines the voltage difference between the two adjacent clamping voltages.

[0052] The above-provided lateral punch-through SiC-TVS device is a lateral structure, and the lateral structure has symmetry, therefore, the SiC-TVS device provided by the present application can realize bidirectional clamping, and when it is connected in parallel to both ends of a circuit, it can simultaneously protect the device from the impact of forward high-voltage pulses and reverse high-voltage pulses, and realize the effect of bidirectional clamping; in addition, due to the symmetry, the positions of the positive electrode and the negative electrode at both ends of the SiC-TVS device provided by the present application can be exchanged.

[0053] The SiC-TVS device provided by the application can act as an emission region when the middle N+ / N- structure or P+ / P- structure is connected to an electrode loop, and can act as a terminal similar to a field limiting ring when the electrode loop is disconnected, that is, the concentration effect of the junction edge electric field of the two-end emission region when reverse biased is relieved by the several N+ / N- structures or P+ / P- structures distributed in the middle, the lateral electric field distribution on the current path of the device is optimized, and the withstand voltage characteristic of the NPN tube or the PNP tube of the lateral multi-stage punch-through structure is ensured.

[0054] The SiC-TVS device provided by the application realizes the multi-stage clamping voltage integrated modulation on a single-tube TVS chip by uniformly inserting a plurality of N+ / N- or P+ / P- emission regions on the surface of the base region, is suitable for a circuit system whose working voltage needs to be dynamically adjusted, simplifies the protection system topology design of the circuit system, saves the size and power consumption of the system, and has the advantages of simple preparation process.

[0055] Considering the advantages of the SiC material characteristics, the clamping voltage selectable lateral punch-through type SiC-TVS device provided by the application can realize the accurate target clamping voltage at a smaller emission region interval. Compared with the same type of lateral Si-TVS, the area of the single tube of the TVS is not significantly increased.

[0056] Embodiment two

[0057] Please refer to Figure 4 , the application provides a specific clamping voltage selectable lateral punch-through type SiC-TVS device based on embodiment one, and the lateral punch-through type SiC-TVS device comprises:

[0058] The silicon carbide substrate layer 101 is doped with N type and has a doping concentration of 5*10 18 cm -3 .

[0059] The epitaxial layer base 102 has a thickness of 9um, is doped with P type, and has a doping concentration of 1*10 16 cm -3 .

[0060] The end emission region extension region 103 is formed by ion implantation process, has a junction depth of 1.2um, is doped with N type, and has a doping concentration of 1*10 18 cm -3 .

[0061] The intermediate emission area extension region 104 is formed by ion implantation process, 5 intermediate emission area extension regions 104 are formed, the width of the intermediate emission area extension region 104 is 4 μm, the junction depth is 1.2 μm, the doping type is N type, and the doping concentration is 1×10 18 cm -3 . The interval between adjacent intermediate emission area extension regions is 2 μm.

[0062] The end emission area 105 is formed by ion implantation process, the junction depth of the end emission area 105 is 0.8 μm, the doping type is N type, and the doping concentration is 1×10 19 cm -3 .

[0063] The intermediate emission area 106 is formed by ion implantation process, 5 intermediate emission areas 106 are formed, the width of the intermediate emission area 106 is 2 μm, the junction depth is 0.8 μm, the doping type is N type, and the doping concentration is 1×10 19 cm -3 .

[0064] Based on the basic structure of the clamping voltage optional lateral punch-through SiC-TVS device of the embodiment, the sentaurus TCAD software is used for simulation.

[0065] Please refer to Figure 5 , Figure 5 , the dynamic simulation clamping graph of the clamping voltage optional lateral punch-through SiC-TVS device based on the structure of embodiment two is provided. Figure 5 It can be seen from the figure that the clamping voltage of 55V can be achieved by turning on the first negative electrode (Cathode1, that is, the negative electrode located in the first intermediate emission area), the clamping voltage of 125V can be achieved by turning on the second negative electrode (Cathode2, that is, the negative electrode located in the second intermediate emission area), the clamping voltage of 200V can be achieved by turning on the third negative electrode (Cathode3, that is, the negative electrode located in the third intermediate emission area), the clamping voltage of 287V can be achieved by turning on the fourth negative electrode (Cathode4, that is, the negative electrode located in the fourth intermediate emission area), the clamping voltage of 369V can be achieved by turning on the fifth negative electrode (Cathode5, that is, the negative electrode located in the fifth intermediate emission area), and the clamping voltage of 466V can be achieved by turning on the sixth negative electrode (Cathode6, that is, the negative electrode located in the right end emission area).

[0066] Please refer to Figure 6 , Figure 6A two-dimensional electric field distribution diagram and a transverse electric field distribution curve along the main junction edge tangent of a clamped voltage optional lateral punch-through SiC-TVS device based on the structure of embodiment two when the sixth negative electrode is turned on. It can be seen that the maximum peak electric field is located at the left end of the emitter junction edge, and the maximum peak electric field value is 1.68 MV / cm, which is much smaller than the critical breakdown field value of 2.5 MV / cm of SiC material. The N+ / N- structure distributed in the middle plays a terminal role of field limiting ring, which relieves the electric field concentration of the junction edge of the two ends of the emitter through step-by-step pressure sharing, and ensures the voltage withstand characteristic of the lateral punch-through NPN tube.

[0067] Embodiment three

[0068] The application provides a specific preparation method of a clamped voltage optional lateral punch-through SiC-TVS device based on the above embodiments, comprising:

[0069] S1: selecting a silicon carbide substrate layer 101, the thickness of the silicon carbide substrate layer 101 is 350 μm, and the silicon carbide substrate layer 101 is composed of N-type SiC material with a doping concentration of 5*10 18 cm -3 .

[0070] S2: epitaxially forming an epitaxial layer base region 102 on the silicon carbide substrate layer 101, the thickness of the epitaxial layer base region 102 is 9 μm, and the epitaxial layer base region 102 is composed of P-type SiC material with a doping concentration of 1*10 16 cm -3 .

[0071] S3: using ion implantation process to simultaneously form N-type end emitter extension region 107 and middle emitter extension region 108 on the surface of the epitaxial layer base region 102 for the first time, the implantation depth is 1.2 μm, the implantation concentration is 1*10 18 cm -3 , and the implantation impurity is nitrogen or phosphorus.

[0072] S4: using ion implantation process to simultaneously form N+ type end emitter region 103 and middle emitter region 104 on the surface of the end emitter extension region 107 and the middle emitter extension region 108 for the second time, the implantation depth is 0.8 μm, the implantation concentration is 1*10 19 cm -3 , and the implantation impurity is nitrogen or phosphorus.

[0073] S5: simultaneously preparing a positive electrode 105 and a negative electrode 106 on the surface of the end emitter 103 and the middle emitter 104. The selected metal material of the electrode is one of Ni, Ti and Al or a multi-layer composite layer, and ohmic contact is formed through rapid annealing.

[0074] In the description of the application, the terms "first", "second", "third", etc. are used only to describe different embodiments and do not imply or suggest relative importance or a specific number of the technical features indicated. Therefore, the features defined with "first", "second", etc. can explicitly or implicitly include one or more of the features. In the description of the application, the meaning of "a plurality of" is two or more, unless otherwise specifically limited.

[0075] In the description of the present application, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" and the like means that the specific features, structures, materials or specific data points described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present application, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or specific data points described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in the present application.

[0076] The above is a further detailed description of the present application in combination with specific preferred embodiments, and cannot be considered as limiting the specific implementation of the present application to these descriptions. For those skilled in the art, without departing from the concept of the present application, a number of simple deductions or substitutions can be made, which should be considered as falling within the protection scope of the present application.

Claims

1. A clamp voltage selectable lateral punch through SiC-TVS device, characterized in that, The lateral pass-through SiC-TVS device comprises a silicon carbide substrate layer, an epitaxial layer base region, a positive electrode and a plurality of negative electrodes, wherein: The epitaxial layer base region is located on the silicon carbide substrate layer; The epitaxial layer base region comprises two end emission region extension regions, a plurality of intermediate emission region extension regions, two end emission regions and a plurality of intermediate emission regions, wherein the two end emission region extension regions are respectively arranged at two ends of the epitaxial layer base region, the plurality of intermediate emission region extension regions are uniformly and spacedly arranged between the two end emission region extension regions, the two end emission regions are respectively arranged in the two end emission region extension regions, and a side of the end emission region extension region and the end emission region corresponds to a side of the epitaxial layer base region which is flush with the side. The positive electrode is located on the end emission region at one end; The plurality of negative electrodes are located on the end emission region at the other end and on the plurality of intermediate emission regions; The epitaxial layer base region, the end emission region extension region and the intermediate emission region extension region are lightly doped, and the end emission region and the intermediate emission region are heavily doped. The silicon carbide substrate layer, the end emission region extension region, the intermediate emission region extension region, the end emission region and the intermediate emission region are of a first conductivity type, the epitaxial layer base region is of a second conductivity type, and the first conductivity type and the second conductivity type are opposite.

2. The clamp voltage selectable lateral punch through SiC-TVS device of claim 1, wherein, If the first conductivity type of the silicon carbide substrate layer is N type, the second conductivity type of the epitaxial layer base region is P type, and the first conductivity type of the end emission region extension region, the intermediate emission region extension region, the end emission region and the intermediate emission region is N type; If the first conductivity type of the silicon carbide substrate layer is P type, the second conductivity type of the epitaxial layer base region is N type, and the first conductivity type of the end emission region extension region, the intermediate emission region extension region, the end emission region and the intermediate emission region is P type.

3. The clamp voltage selectable lateral punch through SiC-TVS device of claim 1, wherein, The lateral pass-through SiC-TVS device is of a symmetric structure.

4. The clamp voltage selectable lateral punch through SiC-TVS device of claim 1, wherein, The doping concentration of the epitaxial layer base region ranges from 1 x 1016 15 to 1 x 1018 17 cm -3 -3.

5. The clamp voltage selectable lateral punch through SiC-TVS device of claim 1, wherein, The thickness of the epitaxial layer base region is [(3+n)~(5+n)]μm, wherein n is the number of the intermediate emission regions, and n≥1.

6. The clamp voltage selectable lateral punch through SiC-TVS device of claim 1, wherein, The junction depths of the end emission region and the intermediate emission region are the same, and the range of the junction depths of the end emission region and the intermediate emission region is 0.8~1.2μm.

7. The clamp voltage selectable lateral punch through SiC-TVS device of claim 1 or 6, wherein, The junction depths of the end emission region extension region and the intermediate emission region extension region are the same and greater than the junction depths of the end emission region and the intermediate emission region, and the range of the junction depths of the end emission region extension region and the intermediate emission region extension region is 1.2~1.8μm.

8. The clamp voltage selectable lateral punch through SiC-TVS device of claim 1, wherein, The doping concentration of the end emission area extension region and the middle emission area extension region is the same, and is greater than the doping concentration of the epitaxial layer base region, and the doping concentration of the end emission area extension region and the middle emission area extension region ranges from 1x10 16 to 1x10 18 cm -3 .

9. The clamp voltage selectable lateral punch through SiC-TVS device of claim 1, wherein, The intermediate emission region is located in the middle of the intermediate emission region extension region, and the width of the intermediate emission region extension region is greater than the width of the intermediate emission region, and the range of the width of the intermediate emission region extension region is 2~5μm.

10. The clamp voltage selectable lateral punch through SiC-TVS device of claim 1, wherein, The spacing between two adjacent intermediate emission region extension regions ranges from 1 to 4μm.