Method for manufacturing a semiconductor structure and semiconductor structure

Abstract

The embodiment of the present application belongs to the technical field of semiconductor manufacturing, and particularly relates to a semiconductor structure manufacturing method and a semiconductor structure. The embodiment of the present application is used to solve the problem that the connecting layer of the connecting hole is prone to generating a gap in the related art. Specifically, a substrate is provided, and the substrate has a connecting hole; the hole wall of the connecting hole has annular protrusions and annular grooves which are alternately arranged along a direction parallel to the center line of the connecting hole; a blocking block is filled in each annular groove; the annular protrusions are removed along a direction perpendicular to the hole wall of the connecting hole; the blocking block is removed; and a connecting layer is formed in the connecting hole. After the annular protrusions are removed, the roughness of the hole wall of the connecting hole is reduced, the conductive seed layer is prevented from having a fault, and thus the gap in the connecting layer is avoided, and the performance of the semiconductor structure is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a method for fabricating a semiconductor structure and a semiconductor structure. Background Technology

[0002] Electronic devices such as memory typically have semiconductor structures. A semiconductor structure includes a substrate and wiring layers disposed on the substrate. The wiring layers are circuit patterns with a certain shape. Contact pads are generally disposed on the side of the substrate opposite to the wiring layers. Connecting holes are disposed on the substrate, and connecting layers are disposed within the connecting holes. The connecting layers are used to connect the wiring layers and contact pads disposed on both sides of the substrate.

[0003] However, in related technologies, the walls of the interconnects are relatively rough, which affects the performance of subsequent interconnects and more seriously affects the performance of the overall semiconductor structure. Summary of the Invention

[0004] This invention provides a method for fabricating a semiconductor structure and a semiconductor structure, in order to solve the problem that voids are easily generated in the connection layer of the interconnecting holes in related technologies.

[0005] On one hand, embodiments of the present invention provide a method for fabricating a semiconductor structure, comprising:

[0006] A substrate is provided, the substrate having a connecting hole; the wall of the connecting hole has annular protrusions and annular grooves alternately arranged along a direction parallel to the center line of the connecting hole;

[0007] Fill each of the annular grooves with blocking blocks;

[0008] Remove the annular protrusion along a direction perpendicular to the wall of the connecting hole;

[0009] Remove the blocking block;

[0010] A connecting layer is formed within the connecting hole.

[0011] In one possible implementation, filling the annular grooves with blocking blocks includes:

[0012] A blocking material is filled into the connection hole, and the blocking material completely fills the connection hole.

[0013] A portion of the blocking material is removed to form a through hole, the centerline of which is collinear with the centerline of the connecting hole, and the wall of the through hole engages with the annular protrusion.

[0014] In one possible implementation, while removing a portion of the blocking material to form a through hole, the end of the annular protrusion facing the centerline of the connecting hole is also removed.

[0015] In one possible implementation, the blocking material includes a photoresistor.

[0016] In one possible implementation, a portion of the blocking material is removed by exposure and development to form the through-hole.

[0017] In one implementation, filling the connection hole with the barrier material, wherein filling the connection hole with the barrier material includes:

[0018] The barrier material also covers the surface of the substrate;

[0019] Before etching the annular protrusion along a direction perpendicular to the wall of the connecting hole, the process further includes removing the blocking material located on the surface of the substrate.

[0020] In one possible implementation, etching the annular protrusion along a direction perpendicular to the wall of the connecting hole includes:

[0021] The annular protrusion is etched along a direction perpendicular to the wall of the connecting hole to form an annular recess on the wall of the connecting hole, such that the depth of the recess and the annular groove is not greater than a preset depth.

[0022] In one possible implementation, the annular protrusion is removed by wet etching.

[0023] In one possible implementation, the preset depth is 1nm-10nm.

[0024] In one possible implementation, forming the connection layer within the connection hole includes:

[0025] A conductive seed layer is formed inside the connecting hole;

[0026] The connecting layer is formed by electroplating the conductive seed layer onto the hole wall of the connecting hole.

[0027] In one possible implementation, forming the conductive seed layer on the wall of the connecting hole includes:

[0028] The conductive seed layer is formed by a sputtering process.

[0029] In one possible implementation, a substrate is provided having connection holes, including:

[0030] A mask layer is formed on the substrate, the mask layer having etched holes;

[0031] The substrate is etched using the mask layer as a mask to form a groove on the substrate;

[0032] A protective layer is formed on the bottom and walls of the groove;

[0033] Using the mask layer as a mask, the protective layer and the substrate corresponding to the bottom of the groove are etched to increase the depth of the groove;

[0034] The protective layer and the substrate corresponding to the bottom of the groove are repeatedly formed and etched until the groove penetrates the substrate to form the connection hole.

[0035] In one possible implementation, after forming the connection layer within the connection hole, the following is further included:

[0036] A wiring layer is formed on one side of the substrate to engage with the connection layer.

[0037] In one possible implementation, after forming the connection layer within the connection hole, the following is further included:

[0038] A contact pad is formed on the other side of the substrate to engage with the connecting layer.

[0039] On the other hand, embodiments of the present invention also provide a semiconductor structure, which is fabricated by the above-described semiconductor structure fabrication method.

[0040] The semiconductor structure fabrication method and semiconductor structure provided in this invention specifically include: providing a substrate with connecting holes; the walls of the connecting holes having alternately arranged annular protrusions and annular grooves along a direction parallel to the center line of the connecting holes; filling each annular groove with a blocking block; removing the annular protrusions along a direction perpendicular to the walls of the connecting holes; removing the blocking blocks; and forming a connecting layer within the connecting holes. Removing the annular protrusions reduces the roughness of the connecting hole walls, preventing discontinuity in the conductive seed layer, thereby avoiding voids in the connecting layer and improving the performance of the semiconductor structure. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 A schematic flowchart illustrating a method for fabricating a semiconductor structure according to an embodiment of the present invention;

[0043] Figure 2 A cross-sectional schematic diagram of a connection hole in a semiconductor structure provided in an embodiment of the present invention;

[0044] Figure 3This is a cross-sectional schematic diagram of filling a connecting hole with a barrier material, provided by an embodiment of the present invention;

[0045] Figure 4 A cross-sectional schematic diagram of a blocking block formed in a connecting hole, provided by an embodiment of the present invention;

[0046] Figure 5 A cross-sectional schematic diagram of removing annular protrusions provided in an embodiment of the present invention;

[0047] Figure 6 This is a cross-sectional schematic diagram of a method for removing a blocking block, provided in an embodiment of the present invention.

[0048] Explanation of reference numerals in the attached figures:

[0049] 10. Substrate; 11. Connecting hole; 111. Barrier material; 112. Barrier block; 113. Annular groove; 115. Annular protrusion; 117. Recess; 119. Remaining part; 12. Membrane structure; 13. Through hole. Detailed Implementation

[0050] To clearly understand the technical solution of this application, the solutions of related technologies will be described in detail first.

[0051] In related technologies, Bosch etching processes are typically used to fabricate interconnects. Specifically, this involves first forming a mask layer with etchable holes on a substrate, then using the mask layer as a mask to etch the substrate, forming a groove. Next, a protective layer is deposited on the sidewalls and bottom of the groove. Then, using the mask layer as a mask, the protective layer at the bottom of the groove and a portion of the substrate extending towards the bottom of the groove are etched to increase the groove depth. This alternating etching and deposition process increases the groove depth. After forming the interconnect, a combination layer is formed on the hole wall to connect the wiring layers and contact pads in the semiconductor structure. This combination layer includes, but is not limited to, sequentially forming an insulating layer, a barrier layer, and a conductive seed layer. The conductive seed layer is then electroplated onto the hole wall to form the interconnect layer.

[0052] However, alternating etching and deposition to form interconnects results in interconnect walls with alternating annular protrusions and annular grooves along the centerline of the interconnect, leading to high roughness. High roughness of the interconnect walls increases the difficulty of forming the composite layer, which in turn causes the composite layer to break. This allows the subsequently electroplated interconnect layer to enter the break, affecting the performance of the semiconductor structure.

[0053] To address the aforementioned problems, embodiments of the present invention provide a method for fabricating a semiconductor structure and a semiconductor structure. By removing the annular protrusions on the walls of the connecting holes, the roughness of the connecting hole walls is reduced, preventing discontinuity in the conductive seed layer and thus avoiding voids in the connecting layer.

[0054] To make the above-mentioned objectives, features, and advantages of the embodiments of the present invention more apparent and understandable, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0055] like Figure 1 As shown, the method for fabricating a semiconductor structure provided in this embodiment of the invention includes:

[0056] Step S101: Provide a substrate with a connecting hole; the wall of the connecting hole has annular protrusions and annular grooves alternately arranged along a direction parallel to the center line of the connecting hole.

[0057] Please refer to Figure 2 In this embodiment, the substrate 10 can be a semiconductor substrate, such as single-crystal silicon, polycrystalline silicon, or amorphous silicon or silicon germanium (SiGe). It can also be a mixed semiconductor structure, such as silicon carbide, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide or gallium antimonide, alloy semiconductor or a combination thereof. This embodiment does not limit it.

[0058] The surface of the substrate 10 is covered with a film structure 12, which can be formed after the connection hole 11 is formed. The film structure 12 may include, for example, an insulating layer that protects the microcircuit from scratches, contamination, and moisture.

[0059] For example, continue to refer to Figure 2 The connecting hole 11 is provided perpendicular to the extension direction of the substrate 10 and penetrates the substrate 10. In this embodiment, the connecting hole 11 can be formed using Bosch etching process. Of course, in some examples, the connecting hole 11 can also be formed using conventional wet etching, conventional dry etching, photo-assisted electrochemical etching, laser drilling, etc., without specific limitations.

[0060] Optionally, in an embodiment where the connector hole 11 is formed using a Bosch etching process, a substrate 10 is provided. The step of having the connector hole 11 on the substrate 10 includes: forming a mask layer on the substrate 10, the mask layer having etch holes to remove the substrate 10 opposite to the etch holes, thereby forming the connector hole 11. The material of the mask layer may include photoresist, amorphous carbon, silicon dioxide, etc.

[0061] After forming the etched hole, the step of forming the connecting hole 11 further includes: etching the substrate 10 using a mask layer as a mask to form a groove on the substrate 10. Specifically, an etching gas can be introduced into the etched hole, and the etching gas is decomposed into plasma to etch the substrate 10 opposite the etched hole to form the groove. The etching gas can be, for example, SF6.

[0062] After forming the groove on the substrate 10, the step of forming the connecting hole 11 further includes forming a protective layer on the bottom and walls of the groove. Specifically, a deposition gas can be introduced into the groove, and the deposition gas is decomposed into plasma, thereby forming a polymer on the bottom and walls of the groove. This polymer serves as a protective layer that protects the groove walls from subsequent etching. The deposition gas may, for example, include C4F8.

[0063] After forming the protective layer, the step of forming the connecting hole 11 further includes: etching the protective layer and the substrate 10 corresponding to the bottom of the groove using the mask layer as a mask, so as to increase the depth of the groove. Specifically, the above-described etching process can be used to remove the protective layer covering the bottom of the groove and part of the substrate 10 covering the bottom of the groove, thereby further increasing the depth of the groove.

[0064] After etching the protective layer and substrate 10 corresponding to the bottom of the groove, the step of forming the connecting hole 11 further includes: repeatedly forming the protective layer and etching the protective layer and substrate 10 corresponding to the bottom of the groove until the groove penetrates the substrate 10 to form the connecting hole 11. By repeating the above deposition and etching process, the depth of the groove can be gradually increased until it penetrates the substrate 10 to form the connecting hole 11. Of course, the connecting hole 11 may not penetrate the substrate 10, and this is not limited here. It should be noted that the depth of the groove can be controlled by controlling the number of deposition and etching cycles, thereby forming a connecting hole 11 of a certain depth according to actual process requirements.

[0065] like Figure 2 As shown, the wall of the connecting hole 11 has multiple annular curved surfaces. The centerline of each curved surface coincides with the centerline of the connecting hole 11, and the center of each curved surface is located inside the connecting hole 11. These curved surfaces are sequentially connected along the centerline of the connecting hole 11, such that the end of each curved surface closest to the centerline of the connecting hole 11 forms an annular protrusion 115, and the end of each curved surface furthest from the centerline of the connecting hole 11 forms an annular groove 113. The annular protrusion 115 and the annular groove 113 are alternately arranged in a direction parallel to the centerline of the connecting hole 11. Specifically, the centerlines of both the annular protrusion 115 and the annular groove 113 coincide with the centerline of the connecting hole 11. A first distance L1 exists between the farthest and nearest ends of the curved surfaces along a direction perpendicular to the wall of the connecting hole 11 from the centerline of the connecting hole 11.

[0066] Step S102: Fill each annular groove with a blocking block.

[0067] In this embodiment, there are multiple blocking blocks 112, each blocking block 112 covering its corresponding annular groove 113 to expose the annular protrusion 115. For example, see... Figure 4 The blocking block 112 is also a ring structure. The center line of the blocking block 112 coincides with the center line of the connecting hole 11. The end of the blocking block 112 near the side wall of the connecting hole 11 has a curved surface that matches the annular groove 113. The center of the curved surface is located inside the connecting hole 11.

[0068] Step S103: Remove the annular protrusion along the direction perpendicular to the wall of the connecting hole.

[0069] Reference Figure 5 The removed annular protrusion 115 extends from the wall of the connecting hole 11 outward in a direction perpendicular to the center line of the connecting hole 11.

[0070] Optionally, the annular protrusion 115 can be removed by wet etching. Specifically, wet etching is a method of removing material using chemical reagents. In this embodiment, the chemical reagents can be hot phosphoric acid, hot SC1 cleaning solution, fluorine-containing liquids, and gases, etc. Removing the annular protrusion 115 by wet etching helps reduce operational difficulty and production costs, thereby facilitating mass production.

[0071] It should be noted that the annular protrusion 115 has a high etch selectivity relative to the blocking block 112, so that when the annular protrusion 115 is removed by wet etching, the annular protrusion 115 is etched away before the blocking block 112, so that the blocking block 112 can always cover the annular groove 113, thereby avoiding the etching of the annular groove 113 and reducing the roughness of the hole wall of the connecting hole 11.

[0072] Step S104: Remove the blocking block.

[0073] After removing the blocking block 112, the blocking material 111 covering the wall of the connecting hole 11 is removed, thus exposing the entire wall of the connecting hole 11. (Refer to...) Figure 6 The wall of the connecting hole 11 is relative to Figure 2 The roughness of the hole wall is reduced. Specifically, the hole wall of the connecting hole 11 has multiple annular curved surfaces, the centerlines of which all coincide with the centerline of the connecting hole 11. The center of each curved surface is located inside the connecting hole 11, and the multiple curved surfaces are connected sequentially along the centerline of the connecting hole 11. The distance between the farthest and nearest ends of the curved surfaces from the centerline of the connecting hole 11 in a direction perpendicular to the hole wall is less than a first distance L1, which is beneficial for subsequently covering the hole wall with other materials and reducing the manufacturing difficulty.

[0074] Step S105: Form a connecting layer inside the connecting hole.

[0075] The material of the connecting layer may include a conductive material to electrically connect the structures at both ends of the connecting hole 11 through the connecting hole 11. In one possible implementation, a conductive seed layer may first be formed on the hole wall of the connecting hole 11, and then the connecting layer may be formed by electroplating using the conductive seed layer as an electrode.

[0076] Optionally, before forming the connection layer within the connection hole 11, the method further includes forming an insulating layer on the hole wall of the connection hole 11. In one possible implementation, the insulating layer can be formed on the hole wall of the connection hole 11 by a deposition process. The material of the insulating layer may include, for example, an oxide such as silicon dioxide. Alternatively, the silicon atoms on the surface of the hole wall of the connection hole 11 can be completely reacted into silicon dioxide under high temperature conditions through thermal oxidation diffusion.

[0077] After forming an insulating layer on the wall of the connecting hole 11, the process further includes forming a diffusion barrier layer that covers the insulating layer. The diffusion barrier layer is used to prevent material from the connecting layer from diffusing through the insulating layer. The diffusion barrier layer can be formed using an ion implantation process, employing one or more materials such as Ta, TaN, Ti, and TiN as the target. When using multiple materials, a single target can contain multiple materials simultaneously, or multiple targets can be used, each containing one or more materials.

[0078] Optionally, in this embodiment, the step of forming a connection layer in the connection hole 11 after forming the diffusion barrier layer includes: forming a conductive seed layer in the connection hole 11 to facilitate the subsequent formation of the connection layer.

[0079] In one possible implementation, a conductive seed layer can be formed using a sputtering process, allowing a subsequent interconnect layer to be formed on top of the conductive seed layer. In another possible implementation, the conductive seed layer can be made of materials such as copper, silver, titanium, or nickel.

[0080] After forming the conductive seed layer, the step of forming the connection layer within the connection hole 11 further includes: electroplating the connection layer within the connection hole 11 using the conductive seed layer. It should be noted that electroplating is a fast and low-cost process, and the thickness of the electroplated material can be easily controlled by adjusting the process parameters. It should also be noted that when forming the connection layer using electroplating, the material of the connection layer is the same as that of the conductive seed layer. For example, in an embodiment where the conductive seed layer is a copper seed layer, the copper seed layer is used as the electrode, and copper is electroplated to form the connection layer. Of course, in some other examples, chemical plating or vacuum evaporation plating processes can also be used to form the connection layer.

[0081] The method for fabricating a semiconductor structure provided in this embodiment of the invention specifically includes: providing a substrate 10, on which a connection hole 11 is provided; the wall of the connection hole 11 has annular protrusions 115 and annular grooves 113 alternately arranged along a direction parallel to the center line of the connection hole 11; filling each annular groove 113 with a blocking block 112; removing the annular protrusions 115 along a direction perpendicular to the wall of the connection hole 11; removing the blocking blocks 112; and forming a connection layer in the connection hole 11. The roughness of the hole wall of the connection hole 11 is reduced after removing the annular protrusions 115, preventing discontinuity in the conductive seed layer, thereby avoiding voids in the connection layer and improving the performance of the semiconductor structure.

[0082] Optionally, in the semiconductor structure fabrication method provided in this embodiment, filling the blocking blocks 112 in each annular groove 113 includes: filling the connection hole 11 with blocking material 111, wherein the blocking material 111 fills the connection hole 11 completely.

[0083] By filling the blocking material 111, it is easier to remove part of the blocking material 111 to form the blocking block 112. In this embodiment, a coating process can be used to fill the connecting hole 11 with the blocking material 111, so that the blocking material 111 fits against the hole wall of the connecting hole 11.

[0084] For example, such as Figure 3 As shown, the connection hole 11 is filled with a blocking material 111. While the blocking material 111 fills the connection hole 11, it also covers the surface of the substrate 10.

[0085] When the barrier material 111 is filled using a coating process, the barrier material 111 can be directly formed on the surface of the substrate 10. This allows the barrier material 111 to fill both the connection hole 11 and the surface of the substrate 10 outside the connection hole 11, which is beneficial for improving processing efficiency, reducing processing difficulty, and enabling large-scale production.

[0086] Optionally, the blocking material 111 includes photoresist. The subsequent removal of the photoresist material is simple and facilitates the formation of the through hole 13, thereby improving processing efficiency.

[0087] Optionally, after filling the connecting hole 11 with the blocking material 111, filling the annular groove 113 with the blocking block 112 further includes: removing part of the blocking material 111 to form a through hole 13, the center line of the through hole 13 being collinear with the center line of the connecting hole 11, and the hole wall of the through hole 13 engaging with the annular protrusion 115.

[0088] For example, annular protrusions 115 are spaced apart on the wall of the through hole 13. By forming the through hole 13, it is beneficial to subsequently flatten the wall of the connecting hole 11 by removing part of the wall of the through hole 13.

[0089] Optionally, while removing part of the blocking material 111 to form the through hole 13, the method further includes removing the end of the annular protrusion 115 facing the center line of the connecting hole 11 to form the remaining portion 119. For example, see [reference needed]. Figure 4 The end of the remaining portion 119 near the center line of the connecting hole 11 is flush with the wall of the through hole 13, and the end of the remaining portion 119 near the center line of the connecting hole 11 is flush with the end of the blocking block 112 near the center line of the connecting hole 11. That is, the remaining portion 119 is exposed between two adjacent blocking blocks 112, which is conducive to the subsequent removal of the remaining portion 119.

[0090] In embodiments where the annular protrusion 115 has a high etch selectivity relative to the blocking block 112, the end of the annular protrusion 115 facing the center line of the connecting hole 11 may not be removed. In this case, the end of the annular protrusion 115 facing the center line of the connecting hole 11 extends from between two adjacent blocking blocks on the wall of the formed through hole 13. During subsequent removal of the annular protrusion 115, due to the high etch selectivity relative to the blocking block 112, the annular protrusion 115 is etched away before the blocking block 112, ensuring that the blocking block 112 always covers the annular groove 113, thereby preventing etching of the annular groove 113 and reducing the roughness of the hole wall of the connecting hole 11.

[0091] Optionally, in embodiments where the blocking material 111 includes photoresist, a portion of the blocking material 111 can be removed by exposure and development to form the through-hole 13.

[0092] Specifically, the blocking material 111 is a positive photoresist. A photomask with a positive pattern is formed on the surface of the photoresist, and the opening of the positive pattern exposes part of the connection hole 11. Furthermore, the projection of the opening of the positive pattern onto the substrate 10 covers part of the connection hole 11. The positive photoresist is exposed by the photomask, that is, part of the blocking material 111 inside the connection hole 11 is exposed and melted into the positive developer, thereby forming the through hole 13.

[0093] Optionally, in the embodiment where the end of the annular protrusion 115 facing the center line of the connecting hole 11 is removed, before etching the remaining portion 119 in a direction perpendicular to the wall of the connecting hole 11, the method further includes: removing the blocking material 111 on the surface of the substrate 10 so as to affect the removal of the remaining portion 119. Removing the blocking material 111 on the surface of the substrate 10 also helps to avoid the subsequent formation of other film layers on the surface of the substrate 10.

[0094] Optionally, in the embodiment where the end of the annular protrusion 115 facing the center line of the connecting hole 11 is removed, etching the remaining portion 119 in a direction perpendicular to the hole wall of the connecting hole 11 includes: etching the remaining portion 119 in a direction perpendicular to the hole wall of the connecting hole 11 to form an annular recess 117 on the hole wall of the connecting hole 11; such that the depth of the recess 117 and the annular groove 113 is not greater than a preset depth.

[0095] Reference Figure 5 and Figure 6 For example, the annular recess 117 is an annular curved surface, the centerline of which coincides with the centerline of the connecting hole 11. The center of the curved surface is located inside the connecting hole 11. Multiple curved surfaces are connected sequentially along the centerline of the connecting hole 11. The curved surface of the recess 117 has a third distance L3 between its farthest and nearest ends from the centerline of the connecting hole 11 in a direction perpendicular to the hole wall. The third distance L3 is the depth of the recess 117. Similarly, the curved surface of the annular groove 113 has a second distance L2 between its farthest and nearest ends from the centerline of the connecting hole 11 in a direction perpendicular to the hole wall. The second distance L2 is the depth of the annular groove 113. It should be noted that the depths of the recess 117 and the annular groove 113 are not greater than a preset depth to avoid affecting the subsequent formation of other film layers on the hole wall.

[0096] Optionally, the preset depth is 1nm-10nm, which further avoids affecting the fabrication of other processes on the hole wall, thereby further improving the performance of the connection hole 11.

[0097] Optionally, after forming the connection layer within the connection hole 11, the method further includes forming a wiring layer bonded to the connection layer on one side of the substrate 10. The wiring layer can be formed by electroplating or deposition, and the wiring layer electrically connects the semiconductor structure to external devices, thereby realizing the function of the semiconductor structure.

[0098] Optionally, after forming the connection layer within the connection hole 11, the method further includes forming a contact pad that engages with the connection layer on the other side of the substrate 10. The contact pad may be made of materials such as tungsten or copper, and can serve as solder points for chip packaging.

[0099] In embodiments where the connection hole 11 does not penetrate the substrate 10, after forming the connection hole 11 to a certain depth, the side of the substrate 10 away from the connection hole 11 can be thinned to expose the connection layer within the connection hole 11. Then, a contact pad that engages with the connection layer is formed on the other side of the substrate 10, so that the contact pad connects to the wiring layer through the connection layer. Specifically, the substrate 10 can be thinned by etching or chemical mechanical polishing.

[0100] This invention also provides a semiconductor structure fabricated using the semiconductor structure fabrication method described above.

[0101] The semiconductor structure includes a substrate 10 with a connection hole 11. The wall of the connection hole 11 has alternating recesses 117 and annular grooves 113 arranged parallel to the centerline of the connection hole 11. A connection layer is also present on the wall of the connection hole 11. The formation process of the recess 117 is as follows: The wall of the connection hole 11 has alternating annular protrusions 115 and annular grooves 113 arranged parallel to the centerline of the connection hole 11. A blocking block 112 is filled into each annular groove 113. The annular protrusions 115 on the connection hole 11 are removed in a direction perpendicular to the wall of the connection hole 11, and then the blocking blocks 112 are removed to form the recess 117. Removing the annular protrusions 115 reduces the roughness of the connection hole wall, preventing discontinuity in the conductive seed layer, thereby avoiding voids in the connection layer and improving the performance of the semiconductor structure.

[0102] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional modules is merely an example. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. The specific working process of the device described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0103] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method of fabricating a semiconductor structure, the method comprising: The method comprises: providing a substrate having a connection hole thereon, wherein a hole wall of the connection hole has annular protrusions and annular grooves alternately arranged along a direction parallel to a center line of the connection hole; filling a blocking block in each of the annular grooves; removing the annular protrusions along a direction perpendicular to the hole wall of the connection hole; removing the blocking block; forming a connection layer in the connection hole; wherein filling a blocking block in each of the annular grooves comprises: filling a blocking material in the connection hole, the blocking material filling the connection hole; removing part of the blocking material to form a through hole, a center line of the through hole being collinear with the center line of the connection hole, a hole wall of the through hole being engaged with the annular protrusion.

2. The method according to claim 1, wherein: the annular protrusion end towards the center line of the connection hole is removed while removing part of the blocking material to form the through hole.

3. The method according to claim 1, wherein: the blocking material comprises a photoresist.

4. The method according to claim 3, wherein: part of the blocking material is removed by exposure and development to form the through hole.

5. The method according to claim 1, wherein: filling the blocking material in the connection hole, the blocking material filling the connection hole comprises: the blocking material also covers the surface of the substrate; before etching the annular protrusion along a direction perpendicular to the hole wall of the connection hole, the blocking material on the surface of the substrate is removed.

6. The method according to claim 1, wherein: etching the annular protrusion along a direction perpendicular to the hole wall of the connection hole comprises: etching the annular protrusion along a direction perpendicular to the hole wall of the connection hole to form an annular recess on the hole wall of the connection hole, so that the depth of the recess and the annular groove is not greater than a preset depth.

7. The method according to claim 6, wherein: the annular protrusion is removed by wet etching.

8. The method according to claim 6, wherein: the preset depth is 1-10 nm.

9. The method according to claim 1, wherein: forming the connection layer in the connection hole comprises: forming a conductive seed layer in the connection hole by sputtering; electroplating the connection layer on the hole wall of the connection hole with the conductive seed layer as an electrode.

10. The method according to claim 1, wherein: providing a substrate having a connection hole thereon comprises: forming a mask layer on the substrate, the mask layer having an etching hole; etching the substrate with the mask layer as a mask to form a groove on the substrate; forming a protective layer on the groove bottom and groove wall; etching the protective layer and the substrate corresponding to the groove bottom with the mask layer as a mask to increase the depth of the groove; Repeating forming the protection layer and etching the protection layer and the substrate corresponding to the groove bottom of the groove until the groove penetrates through the substrate to form the connecting hole.

11. The method of claim 1, wherein: after forming the connecting layer in the connecting hole, further comprising: forming a wiring layer on one side of the substrate and engaging with the connecting layer.

12. The method of claim 11, wherein: after forming the connecting layer in the connecting hole, further comprising: forming a contact pad on another side of the substrate and engaging with the connecting layer.

13. A semiconductor structure, wherein: the semiconductor structure is manufactured by the method of any one of claims 1-12.

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