Charging circuit and electronic device

Abstract

Embodiments of the present application provide a charging circuit and an electronic device, the charging circuit comprising an input port, an output port, a capacitor switching circuit, a first switch, an inductive voltage conversion circuit, a voltage stabilizing circuit and a controller; the capacitor switching circuit comprising a first capacitor and a plurality of transistors, the first capacitor being coupled between the input port and a common ground through the plurality of transistors; the first switch and the inductive voltage conversion circuit being coupled in parallel between an output end of the capacitor switching circuit and the output port; the controller controlling a voltage output by the capacitor switching circuit based on a voltage of the output port, and outputting the voltage to the output port through one of the first switch and the inductive voltage conversion circuit; the voltage stabilizing circuit being coupled to two poles of the first capacitor, and being configured to stabilize the voltage across the first capacitor within a first preset voltage range when the voltage output by the capacitor switching circuit is output to the output port through the inductive voltage conversion circuit, so that the charging circuit can improve the charging efficiency of the electronic device.

Description

Technical Field

[0001] This application relates to the field of circuit technology, and more particularly to a charging circuit and an electronic device. Background Technology

[0002] With the development of electronic technology, the performance of electronic devices has been continuously improved. More and more users prefer to use electronic devices to complete various tasks, which leads to excessive power consumption and the need for timely charging. Therefore, electronic devices with high charging power and high charging efficiency have become the development direction.

[0003] Current charging technologies for electronic devices typically employ DC-DC conversion circuits such as buck converters and buck-boost converters, or circuits using a parallel configuration of switched capacitors and buck circuits to charge batteries, chips, and other loads within electronic devices. However, buck circuits (or buck-boost circuits) generally have low energy conversion efficiency; circuits using a parallel configuration of switched capacitors and buck circuits usually require numerous switching devices and more complex control timing to achieve parallel power supply, resulting in high circuit complexity and difficulty in implementation. Consequently, existing technologies have not yet solved the problem of poor charging efficiency in charging circuits. Summary of the Invention

[0004] By employing the charging circuit and electronic device shown in this application, the charging efficiency of the charging circuit can be improved.

[0005] To achieve the above objectives, this application adopts the following technical solution:

[0006] In a first aspect, embodiments of this application provide a charging circuit, which includes an input port, an output port, a capacitor switching circuit, a first switch, an inductive voltage conversion circuit, a voltage regulator circuit, and a controller. The capacitor switching circuit includes a first capacitor and a plurality of transistors, the first capacitor being coupled between the input port and a common ground through the plurality of transistors. The first switch is coupled between the output terminal of the capacitor switching circuit and the output port. The inductive voltage conversion circuit is coupled between the output terminal of the capacitor switching circuit and the output port. The controller, based on the voltage of the output port, controls the voltage output by the capacitor switching circuit, and outputs it to the output port through one of the first switch and the inductive voltage conversion circuit to supply power to a load. The voltage regulator circuit is coupled to the two poles of the first capacitor and is used to stabilize the voltage of the first capacitor within a first preset voltage range.

[0007] The charging circuit provided in this application embodiment allows the electrical energy output from the capacitor switching circuit to be directly output to the load through the first switch without needing to pass through an inductive voltage conversion circuit when the load power consumption is high, thereby improving the charging speed and efficiency. Furthermore, when the load power consumption is low and an inductive voltage conversion circuit is used to supply power to the load, the voltage regulator circuit can stabilize the voltage across the first capacitor in the capacitor switching circuit at a preset input voltage, thus realizing a three-level inductive voltage conversion circuit (e.g., a three-level Buck circuit or a three-level Buckboost circuit), thereby improving the energy conversion efficiency of the inductive voltage conversion circuit. Therefore, the charging circuit provided in this application embodiment can improve the charging efficiency of electronic devices.

[0008] The charging circuit provided in this application embodiment can include multiple charging modes.

[0009] In one possible implementation, the voltage input to the input port can be directly output to the output port via the first switch without passing through the first capacitor. In this case, the controller is specifically configured to: respond to the voltage at the output port being less than a first preset threshold, and when the voltage at the input port minus the voltage at the output port is within a second preset voltage range, control the on / off state of the plurality of transistors to bypass the first capacitor, and output the voltage input to the input port to the output port via the first switch.

[0010] In one possible implementation, the voltage output from the capacitor switching circuit can be output to the output port via the first switch by charging and discharging the first capacitor. In this case, the controller is specifically configured to: respond to a voltage at the output port being less than a first preset threshold, and when the voltage at the input port minus the voltage at the output port is outside a second preset voltage range, control the on / off state of the plurality of transistors to control the input port to charge the first capacitor, or the first capacitor to discharge to the output port via the first switch.

[0011] The lower limit of the second preset voltage range described in this application embodiment can be 0, or the lower limit can be a preset threshold. For example, the second preset voltage range can be a range of (0, 2).

[0012] In both of the above possible implementations, the voltage input at the input port is output to the output port through a capacitor switch circuit and a first switch, enabling the charging circuit to provide constant current charging to the load. Therefore, by setting the first switch, this embodiment of the application can quickly charge the load through the output port when the voltage at the output port is too low, improving the charging speed and efficiency.

[0013] In one possible implementation, the voltage input at the input port can also be output to the output port via a capacitor switching circuit and an inductive voltage conversion circuit, thereby enabling the charging circuit to provide constant voltage charging to the load. In this case, the controller is configured to: respond to a voltage at the output port being greater than or equal to a first preset threshold, control the voltage output by the capacitor switching circuit to be output to the output port via the inductive voltage conversion circuit.

[0014] In one possible implementation, the voltage regulator circuit includes a first resistor, a second resistor, a second capacitor, a third capacitor, a first transistor, and a second transistor; a first terminal of the first resistor is coupled to an input port, a second terminal of the first resistor is coupled to the first terminal of the second resistor, and a second terminal of the second resistor is coupled to a common ground; a first terminal of the second capacitor is coupled to the input port, a second terminal of the second capacitor and a first terminal of the third capacitor are both coupled to the second terminal of the first resistor, and a second terminal of the third capacitor is coupled to a common ground; a first electrode of the first transistor and a second electrode of the second transistor are both coupled to the second terminal of the first resistor, a second electrode of the first transistor is coupled to the first electrode of the first capacitor, and a first electrode of the second transistor is coupled to the second electrode of the first capacitor.

[0015] In the voltage regulator circuit, the first resistor and the second resistor have the same resistance value, and the second capacitor and the third capacitor have the same capacitance value. By setting the first resistor, the second resistor, the first capacitor, and the second capacitor, the voltage at the connection point of the first resistor and the second resistor can be stabilized within a first preset voltage range, thereby stabilizing the voltage across the first capacitor within the first preset voltage range.

[0016] The first transistor and the second transistor provided in the embodiments of this application include various implementation methods.

[0017] In one possible implementation, both the first transistor and the second transistor are diodes.

[0018] In one possible implementation, the first transistor is a diode and the second transistor is a field-effect transistor.

[0019] In one possible implementation, the first transistor is a field-effect transistor and the second transistor is a diode.

[0020] In one possible implementation, both the first transistor and the second transistor are field-effect transistors.

[0021] Based on the above multiple possible implementations of the first transistor and the second transistor, if the first transistor is a diode, the first electrode of the first transistor is the anode and the second electrode of the first transistor is the cathode; if the second transistor is a diode, the first electrode of the second transistor is the anode and the second electrode of the second transistor is the cathode.

[0022] In one possible implementation, the capacitor switching circuit includes a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor; the first terminal of the third transistor is coupled to an input port, the second terminal of the third transistor and the first terminal of the fourth transistor are coupled to the first terminal of the first capacitor, the second terminal of the fourth transistor and the first terminal of the fifth transistor are coupled to the output terminal of the capacitor switching circuit, the second terminal of the fifth transistor and the first terminal of the sixth transistor are coupled to the second terminal of the first capacitor, and the second terminal of the sixth transistor is coupled to a common ground.

[0023] In one possible implementation, the inductive voltage conversion circuit includes an inductor, a seventh transistor, an eighth transistor, and a fourth capacitor; the first end of the inductor is coupled to the output of the capacitor switching circuit, the second end of the inductor is coupled to the second terminal of the seventh transistor and the first terminal of the eighth transistor, the first terminal of the seventh transistor is coupled to the output port, and the second terminal of the eighth transistor is coupled to a common ground; the fourth capacitor is coupled between the output and the common ground.

[0024] In one possible implementation, the load includes a battery, and the charging circuit further includes a ninth transistor; the first terminal of the ninth transistor is coupled to the output port, and the second terminal of the ninth transistor is used to couple the battery.

[0025] The ninth transistor, also known as the battery path transistor (Batfet), is located between the output port and the battery. This provides power isolation between the battery in the load and the system chip, improving the stability of the charging circuit when charging the load.

[0026] The first switch provided in this application embodiment has multiple connection methods.

[0027] In one possible implementation, the first terminal of the first switch is coupled to the output terminal of the capacitor switching circuit, and the second terminal of the first switch is coupled to the first terminal of the ninth transistor. In this case, the voltage input to the input port of the charging circuit or the voltage discharged by the first capacitor is directly output to the system components through the output port; the voltage input to the input port of the charging circuit or the voltage discharged by the capacitor needs to charge the battery through the ninth transistor.

[0028] In one possible implementation, the first terminal of the first switch is coupled to the output terminal of the capacitor switch circuit, and the second terminal of the first switch is coupled to the output port through the ninth transistor. In this case, when the charging circuit operates in direct charging mode or capacitor switch charging mode, the voltage input to the input port of the charging circuit or the voltage discharged by the first capacitor is directly output to the battery to charge it; the voltage input to the input port of the charging circuit or the voltage discharged by the first capacitor needs to supply power to the system components through the ninth transistor.

[0029] Based on the two possible implementations described above, when the first switch is connected to the first terminal of the ninth transistor, the voltage can flow directly to the system components, improving the efficiency of power supply to the system components. However, when charging the battery, the voltage needs to pass through the ninth transistor, which, being a power device, experiences power dissipation, resulting in lower charging efficiency. When the first switch is connected to the second terminal of the ninth transistor, the voltage can flow directly to the battery through the first switch to power the battery, improving the charging or discharging efficiency. However, when supplying power to the system components, the voltage needs to pass through the ninth transistor, resulting in lower power supply efficiency to the system components. Therefore, in this embodiment, the position of the first switch can be set according to the needs of the scenario.

[0030] If the first end of the first switch is coupled to the output end of the capacitor switch circuit and the second end of the first switch is coupled to the output port through the ninth transistor, in one possible implementation, the charging circuit further includes a second switch; the second switch is coupled between the input port and the output port.

[0031] By setting a second switch, the voltage input to the charging circuit's input port can be directly output to the battery and system components without passing through the ninth transistor, passing through the first and second switches respectively, thus reducing power loss. In addition, the voltage input to the charging circuit's input port can be bypassed by power devices such as the third and fourth transistors, which can further improve the efficiency of the electrical energy output from the output port.

[0032] In one possible implementation, the controller controls the on / off states of the plurality of transistors to bypass the first capacitor and output the voltage input at the input port to the output port via the first switch. Specifically, it controls the first switch to turn on and the seventh and eighth transistors to turn off when the voltage value at the output port is less than a first preset threshold; in response to detecting that the voltage at the input port minus the voltage at the output port is within a second preset voltage range, it controls the third and fourth transistors to turn on, and controls the fifth and sixth transistors. This implementation allows the voltage input at the input port to be directly output to the output port, improving the charging speed of the load.

[0033] In one possible implementation, the controller controls the on / off states of the plurality of transistors to control the input port to charge the first capacitor or the first capacitor to discharge to the output port through the first switch. Specifically, it controls the first switch to turn on and the seventh and eighth transistors to turn off when the voltage value at the output port is less than a first preset threshold; in response to detecting that the voltage at the input port minus the voltage at the output port is outside a second preset voltage range, it alternately controls the third and fifth transistors, and the fourth and sixth transistors to turn on or off. This implementation can raise the voltage at the output port by charging and discharging the first capacitor when the load power consumption is too high and the input voltage at the input port is low, and can charge the load with a constant current.

[0034] Based on the first aspect, in one possible implementation, the controller controls the voltage output by the capacitor switching circuit to be output to the output port through the inductor voltage conversion circuit. Specifically, this is used to: control the first switch to turn off when the voltage value at the output port is greater than or equal to the first preset threshold; and based on a pre-stored ratio of the output voltage to the input voltage, when the ratio is greater than a second preset threshold, control the third and fourth transistors to turn on, control the fifth and sixth transistors to turn off, and alternately control the seventh and eighth transistors to turn on or off. This method can achieve constant voltage charging of the load through a Boost circuit.

[0035] Based on the first aspect, in one possible implementation, the controller controls the voltage output by the capacitor switching circuit to be output to the output port through the inductor voltage conversion circuit. Specifically, this is used to: control the seventh transistor to turn on and the eighth transistor to turn off when the ratio is less than the second preset threshold; and control the on and off states of the third, fourth, fifth, and sixth transistors based on a preset control timing sequence. This method can achieve constant voltage charging of the load through a Buck circuit.

[0036] In one possible implementation, the controller is further configured to cooperate with the voltage regulator circuit to stabilize the voltage across the first capacitor within a first preset voltage range. Specifically, the controller is configured to: detect the voltage across the first capacitor, and when the voltage across the first capacitor is outside the first preset range, adjust the duty cycles of the third, fourth, fifth, and sixth transistors.

[0037] Based on the first aspect, in one possible implementation, the controller adjusts the duty cycles of the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor, specifically for: responding to a voltage across the first capacitor exceeding the upper limit of the first preset voltage range, performing at least one of the following operations: decreasing the duty cycle of the third transistor while simultaneously increasing the duty cycle of the sixth transistor, increasing the duty cycle of the fourth transistor while simultaneously decreasing the duty cycle of the fifth transistor; and responding to a voltage across the first capacitor falling below the lower limit of the first preset voltage range, performing at least one of the following operations: increasing the duty cycle of the third transistor while simultaneously decreasing the duty cycle of the sixth transistor, decreasing the duty cycle of the fourth transistor while simultaneously increasing the duty cycle of the fifth transistor.

[0038] Based on the first aspect, in one possible implementation, the first transistor or the second transistor is a field-effect transistor; the controller is further configured to: control the sixth transistor and the first transistor to be turned on or off simultaneously based on the preset control timing; and control the third transistor and the second transistor to be turned on or off simultaneously based on the preset control timing.

[0039] In a second aspect, embodiments of this application provide an electronic device, which includes a load and a charging circuit as described in the first aspect; the load is coupled to the output port of the charging circuit.

[0040] It should be understood that the second aspect of this application is consistent with the technical solution of the first aspect of this application, and the beneficial effects achieved by each aspect and the corresponding feasible implementation are similar, so they will not be repeated here. Attached Figure Description

[0041] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 This is a schematic diagram of an application scenario for the charging circuit provided in the embodiments of this application;

[0043] Figures 2A-2B This is yet another schematic diagram illustrating an application scenario of the charging circuit provided in the embodiments of this application;

[0044] Figures 3A-3B This is yet another schematic diagram illustrating an application scenario of the charging circuit provided in the embodiments of this application;

[0045] Figure 4This is a schematic diagram of the charging circuit provided in an embodiment of this application;

[0046] Figure 5 This is yet another structural schematic diagram of the charging circuit provided in the embodiments of this application;

[0047] Figures 6A-6D The embodiments provided in this application are as follows Figure 5 The equivalent circuit diagram of the charging circuit shown;

[0048] Figure 7A This is a timing diagram provided in an embodiment of this application for driving transistors Q1 to Q4;

[0049] Figure 7B This is yet another timing diagram provided in the embodiments of this application for driving transistors Q1 to Q4;

[0050] Figure 8A This is yet another structural schematic diagram of the charging circuit provided in the embodiments of this application;

[0051] Figure 8B This is yet another structural schematic diagram of the charging circuit provided in the embodiments of this application;

[0052] Figure 9 This is yet another structural schematic diagram of the charging circuit provided in the embodiments of this application;

[0053] Figure 10A This is yet another structural schematic diagram of the charging circuit provided in the embodiments of this application;

[0054] Figure 10B This is yet another structural schematic diagram of the charging circuit provided in the embodiments of this application;

[0055] Figure 11 This is yet another structural schematic diagram of the charging circuit provided in the embodiments of this application;

[0056] Figure 12 This is yet another structural schematic diagram of the charging circuit provided in the embodiments of this application;

[0057] Figure 13 This is yet another structural schematic diagram of the charging circuit provided in the embodiments of this application;

[0058] Figure 14 This is a flowchart of a charging method provided in an embodiment of this application;

[0059] Figure 15 This is a flowchart of an adjustment method for adjusting the duty cycle of transistors Q1 to Q4 provided in an embodiment of this application. Detailed Implementation

[0060] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0061] The terms "first," "second," and similar terms used in this article do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, "a" or "one" and similar terms do not indicate a quantity limitation, but rather indicate the existence of at least one. Terms such as "connection" or "coupling" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect, equivalent to connectivity in a broad sense.

[0062] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design solutions. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner. In the description of the embodiments of this application, unless otherwise stated, "multiple" means two or more.

[0063] In traditional charging circuits, to improve the charging efficiency of electronic devices, the industry has proposed a circuit structure using a parallel connection of a switched capacitor circuit and a Buck circuit. In this structure, the switched capacitor and inductor operate in parallel, allowing energy to flow from the capacitor switching circuit to the load and the Buck circuit to provide a stable output voltage. However, this solution requires the switched capacitor and Buck circuit to operate in the same cycle and to cooperate with each other to achieve efficient energy output. Therefore, in addition to the switch for charging and discharging the capacitor in the switched capacitor circuit, this circuit structure includes several other switches, each requiring individual timing control. This necessitates significant effort in circuit control and debugging, increasing the complexity of the circuit operation. Consequently, traditional charging circuits have not fully solved the problem of poor charging efficiency in electronic devices.

[0064] The charging circuit provided in this application embodiment can, when the load power consumption is high, allow the electrical energy output from the capacitor switching circuit or the electrical energy input to the charging circuit to be directly output to the load through the first switch without passing through the inductive voltage conversion circuit, thereby improving the charging speed and efficiency. Furthermore, when the load power consumption is low and an inductive voltage conversion circuit is used to supply power to the load, the voltage regulator circuit can stabilize the voltage across the first capacitor in the capacitor switching circuit at a preset input voltage, thus realizing a three-level inductive voltage conversion circuit (e.g., a three-level Buck circuit or a three-level Buckboost circuit), thereby improving the energy conversion efficiency of the inductive voltage conversion circuit. Therefore, the charging circuit provided in this application embodiment can improve the charging efficiency of electronic devices.

[0065] The charging circuit shown in this application embodiment can be installed in an electronic device to charge the battery, electronic components, and chips in the electronic device. The electronic device may include, but is not limited to, mobile phones, wearable devices, tablets, personal computers (PCs), virtual reality (VR) devices, or augmented reality (AR) devices.

[0066] Please refer to Figure 1 This illustrates a schematic diagram of an application scenario for the charging circuit provided in an embodiment of this application. Figure 1The illustrated application scenario diagram includes devices 100 and 200. Device 100 includes a charging system, and the charging circuit 1 described in this embodiment is disposed in the charging system of device 100. Furthermore, device 100 also includes a load 3, which includes, but is not limited to, at least one of the following: a battery, a processor, a chip, and other types of devices. The processor can be various types of processors that drive device 100, such as a graphics processing unit (GPU), a central processing unit (CPU), an artificial intelligence processor, a tensor processor, or a computing accelerator. The other types of devices can include various digital circuits and analog circuits. The chip includes, but is not limited to, artificial intelligence chips and image processing chips. Device 100 can include an interface, which can be, for example, at least one of a power interface and a universal serial bus (USB) interface. Device 100 can be connected to device 200 through one of these interfaces. The input terminal in of charging circuit 1 is coupled to at least one interface of device 100, and the output terminal out of charging circuit 1 is coupled to load 3. It should be noted that the connection between device 100 and device 200 via an interface can mean that the interface of device 100 is connected to the interface of device 200 via a transmission line; or it can mean that the interface of device 100 is connected to the interface of device 200 via an adapter.

[0067] based on Figure 1 The application scenarios shown above indicate that the device 200 can be of various types. The following will illustrate this further. Figure 2A and Figure 2B Describe it.

[0068] In the first scenario, device 200 can be a power supply, and device 100 can be any of the aforementioned types of electronic devices, such as... Figure 2A As shown, Figure 2A The illustration shows an electronic device 100 that is a mobile phone. The power supply may include a power grid and a voltage conversion circuit (e.g., a power adapter). The charging circuit 1 is coupled to the power grid via the voltage conversion circuit. The voltage conversion circuit converts the AC power supplied by the power grid into DC power and outputs it to the power source. Figure 1 The charging circuit 1 is shown. Furthermore, the power source may also include a battery, which can directly supply DC power to the charging circuit 1. Thus, the charging circuit 1 outputs the received electrical energy to the load 3 to charge the load 3.

[0069] In the second scenario, device 200 can be an electronic device such as a mobile phone, tablet, or wearable device. Device 200 can be any of these types of electronic devices. When device 200 is connected to device 100 via an interface, the battery in load 3 can charge device 200 through charging circuit 1. This situation can also be referred to as device 100 reverse charging device 200. Figure 2B As shown, Figure 2B This illustrates a scenario where device 100 is mobile phone 1 and device 200 is mobile phone 2. In Figure 2B In the middle, the battery in mobile phone 2 is transmitted through, for example, Figure 1 The charging circuit 1 shown charges the mobile phone 1. Furthermore, in other possible scenarios, device 200 is a mobile phone and device 100 is a PC; when the mobile phone is connected to the PC, the battery in the PC can charge the mobile phone.

[0070] As above Figures 1-2B In the various scenarios described, it is shown that device 100 is connected to other devices via a transmission line to charge the load 3 in device 100 or to reverse charge other devices. The charging circuit 1 described in this application embodiment can also be applied to wireless charging scenarios. In wireless charging scenarios, device 100 can be any of the aforementioned electronic devices, and the charging circuit 1 and load 3 are disposed in device 100. Figure 3A As shown, Figure 3A This is a schematic diagram illustrating another application scenario of the charging circuit 1 provided in the embodiments of this application. Figure 3A The diagram schematically illustrates a scenario where device 100 is a mobile phone. Figure 3A The wireless charging scenario shown also includes a charging base. When a phone needs to be charged, the user can place it on the charging base to charge. Figure 3A In the scenario shown, the charging base includes a transmitting circuit, and the device 100 includes a receiving circuit, such as... Figure 3B As shown. The receiving circuit includes charging circuit 1, LC series resonant circuit 2, and a rectifier. LC series resonant circuit 2 is coupled to the rectifier, and charging circuit 1 is located at the output of the rectifier. The transmitting circuit includes inverter 1 and LC series resonant circuit 1. When the electronic device is placed on the charging base, coil L2 on the electronic device is coupled to coil L1 on the charging base; based on the principle of electromagnetic induction, the charging base transfers the obtained electrical energy to the electronic device. The rectifier in the electronic device converts the obtained AC power into DC power to provide to charging circuit 1. Charging circuit 1 further processes this DC power (e.g., boost or buck) before charging the load.

[0071] based on Figures 1-3B The application scenarios shown below, combined with Figure 4-Figure 10. This section provides a detailed description of the charging circuit provided in the embodiments of this application. Please continue reading... Figure 4 , Figure 4 This is a schematic diagram of the charging circuit 1 provided in an embodiment of this application. Figure 4 In the circuit, charging circuit 1 includes an input terminal in and an output terminal out. The input terminal in of charging circuit 1 is connected to... Figure 1 The interface of the device 100 shown is coupled (or coupled to the rectifier output terminal as shown in Figure 3), and the output terminal out of the charging circuit 1 is coupled to the load 3. Thus, the charging circuit 1 receives electrical energy through its input terminal in and outputs the input electrical energy to the load 3 through its output terminal out to charge the load 3 (or outputs electrical energy through its input terminal in to charge an external device). Furthermore, the charging circuit 1 also includes a capacitor switching circuit 10, an inductive voltage conversion circuit 11, and a switch 13. The inductive voltage conversion circuit 11 and the switch 13 are coupled in parallel between the output terminal oc1 of the capacitor switching circuit 10 and the output terminal out of the charging circuit 1; that is, the voltage output by the capacitor switching circuit 10 can be output to the output terminal out of the charging circuit 1 through the inductive voltage conversion circuit 11 to charge the load 3, and can also be output to the output terminal out of the charging circuit 1 through the switch 13 to charge the load 3. The capacitor switching circuit 10 includes a capacitor Cf and multiple switching transistors. The capacitor Cf is coupled to the output terminal oc1 through the multiple switching transistors. The multiple switching transistors are used to control the charging and discharging of the capacitor Cf to provide power to the load 3. Furthermore, the multiple switching transistors are also used to bypass the capacitor Cf, directly outputting the voltage input at the input terminal in to the output terminal oc1. The inductive voltage conversion circuit 11 described in this application embodiment may include, but is not limited to, a buck circuit, a boost circuit, or a boost-buck circuit. The specific choice of which type of circuit to use, such as a buck circuit, a boost circuit, or a boost-buck circuit, is determined based on the capacity of the battery connected to the output terminal out and the power supply voltage required for the operation of the electronic device system. In addition, the inductive voltage conversion circuit 11 may be a three-level inductive voltage conversion circuit, that is, the voltage output at the output terminal oc1 of the capacitor switching circuit 10 includes three voltage states: high voltage, low voltage, and zero voltage (for example, the voltage at the output terminal oc1 includes the input voltage, half of the input voltage, and zero voltage). To implement the three-level inductive voltage conversion circuit, the charging circuit 1 provided in this application embodiment also includes a voltage regulator circuit 12 (for details on the specific structure and working principle of the voltage regulator circuit 12, please refer to...). Figure 5(See the related description of the illustrated embodiment). A voltage regulator circuit 12 is coupled across the first and second terminals of capacitor Cf. When the inductive voltage converter circuit 11 is operating, the voltage regulator circuit 12 stabilizes the voltage across capacitor Cf at a preset voltage value. This preset voltage value can, for example, be half of the input voltage Vin at the input terminal in. In actual circuits, due to current or voltage input delays, power dissipation of components in the circuit, etc., the voltage across capacitor Cf may not be stable at the desired preset voltage value and may fluctuate around the preset voltage value. Therefore, the preset voltage value described in this embodiment can be a voltage range that fluctuates around the preset voltage value. For example, the preset voltage value can be 1 / 2Vin-Vt1 to 1 / 2Vin+Vt1, and the threshold Vt1 can be set based on the needs of the actual circuit.

[0072] In the charging circuit 1 shown in this embodiment, when the power consumption of the load 3 is high, the electrical energy output by the capacitor switching circuit 10 or the electrical energy input at the input terminal in of the charging circuit 1 can be directly output to the load 3 through the switch 13 without going through the inductive voltage conversion circuit 11, thereby improving the charging speed and charging efficiency of the load 3. In addition, when the power consumption of the load 3 is low, the inductive voltage conversion circuit 11 is used to supply power to the load 3. At this time, the voltage regulator circuit 12 stabilizes the voltage across the capacitor Cf in the capacitor switching circuit 10 at a preset input voltage (e.g., 1 / 2Vin), which can realize a three-level inductive voltage conversion circuit (e.g., a three-level Buck circuit or a three-level Buckboost circuit, etc.), thereby improving the power conversion efficiency of the inductive voltage conversion circuit.

[0073] The above describes the scenario where charging circuit 1 receives electrical energy from input terminal in to charge load 3. For example... Figure 4 The charging circuit 1 shown can also be applied to, for example... Figure 2B In the scenario shown. When Figure 4 The charging circuit 1 shown is applied to, for example Figure 2BIn the scenario shown, the battery in load 3 outputs electrical energy through input terminal in, which is then supplied to mobile phone 1 to charge it. The voltage output from the battery in load 3 can be supplied to the input terminal in of charging circuit 1 via inductor-type voltage conversion circuit 11 to charge mobile phone 1, or via switch 13 to the input terminal in of charging circuit 1 to charge mobile phone 1. When the power consumption of mobile phone 1 is high or the battery level is low, switch 13 is turned on, and multiple switches in capacitor switching circuit 10 control the charging and discharging of capacitor Cf to provide power to mobile phone 1; furthermore, these multiple switches also bypass capacitor Cf, directly supplying the battery voltage to input terminal in. When the power consumption of mobile phone 1 is low or the battery level is high, switch 13 is turned off, and the battery in load 3 outputs electrical energy to input terminal in via inductor-type voltage conversion circuit 11 to charge mobile phone 2. At this time, the voltage regulator circuit 12 stabilizes the voltage across the capacitor Cf at a preset voltage value, so that the inductor voltage converter circuit 11 is a three-level inductor voltage converter circuit.

[0074] based on Figure 4 The charging circuit 1 shown below uses an inductive voltage conversion circuit as an example of a boost-buck circuit, combined with... Figure 5 The illustrated embodiment provides a more detailed description of the circuit structure and operating principle of charging circuit 1. Please refer to [link / reference needed]. Figure 5 , Figure 5 Is it like this? Figure 4 A more detailed circuit diagram of charging circuit 1 is shown. (See attached diagram.) Figure 5 As shown, the capacitor switching circuit 10 includes, in addition to Figure 4In addition to the capacitor Cf shown, the circuit includes transistors Q1, Q2, Q3, and Q4. The first terminal of transistor Q1 is coupled to the input terminal in; the second terminals of transistor Q1, Q2, and Cf are coupled together to form node a2; the second terminals of transistors Q2 and Q3 are coupled to the output terminal oc1 of the capacitor switching circuit 10; the second terminals of transistors Q3, Q4, and Cf are coupled together to form node a3; and the second terminal of transistor Q4 is coupled to the common ground Gnd. The inductor-type voltage conversion circuit 11 includes an inductor L, a capacitor C3, transistors Q5 and Q6. The first terminal of inductor L is coupled to the output terminal oc1 of the capacitor switching circuit 10; the second terminal of inductor L, the second terminal of transistor Q5, and the first terminal of transistor Q6 are coupled together; the first terminal of transistor Q5 is coupled to the output terminal out of the charging circuit 1; the second terminal of transistor Q6 is coupled to the common ground Gnd; and capacitor C3 is coupled between the output terminal out of the charging circuit 1 and the common ground Gnd. The voltage regulator circuit 12 includes resistors R1 and R2, capacitors C1 and C2, transistors D1 and D2. The first terminal of resistor R1 is coupled to the input terminal in of the charging circuit 1. The second terminal of resistor R1 is coupled to the first terminal of resistor R2 to form node a1. The second terminal of resistor R2 is coupled to the common ground Gnd. The first electrode of capacitor C1 is coupled to the input terminal in of the charging circuit 1. The second electrodes of capacitor C1 and the first electrodes of capacitor C2 are coupled to node a1. The second electrode of capacitor C2 is coupled to the common ground Gnd. Transistors D1 and D2 can both be diodes. In this case, the anode of transistor D1 and the cathode of transistor D2 are both coupled to node a1. The cathode of transistor D1 is coupled to the first plate of capacitor Cf, and the anode of transistor D2 is coupled to the second plate of capacitor Cf. The switch 13 includes transistors Q7 and Q8. The first electrode of transistor Q7 is coupled to the output terminal oc1 of the capacitor switching circuit 10, and the first electrode of transistor Q8 is coupled to the output terminal out of the charging circuit 1. The second electrodes of transistors Q7 and Q8 are coupled together. It should be noted that transistors Q1 through Q8 can be either NMOS or PMOS transistors. The figure schematically illustrates transistors Q1 through Q8 as NMOS transistors. When transistors Q1 through Q8 are NMOS transistors, the first electrode of each transistor is the drain, and the second electrode is the source.

[0075] The charging circuit 1 shown in this embodiment can include multiple operating modes. The following describes its operation in conjunction with... Figure 5 The charging circuit 1 shown here will introduce its various operating modes.

[0076] Charging circuit 1 can operate in a first charging mode, also known as direct charging mode. In this first operating mode, neither capacitor Cf nor inductor L participates in charging load 3. At this time, switch 13, transistor Q1, and transistor Q2 are in the on state, and the input terminal in of charging circuit 1 is directly connected to load 3, as shown below. Figure 6A As shown, Figure 6A This is the equivalent circuit diagram for the first charging mode. The current input to the input terminal in of the charging circuit 1 passes through the current transmission path formed by transistor Q1, transistor Q2 and switch 13, and outputs the current to the load 3 to charge the load 3.

[0077] Charging circuit 1 can also operate in a second charging mode, also known as capacitor charging and discharging mode. Capacitor switch circuit 10 uses capacitor Cf as the charging and discharging device, and can output electrical energy through capacitor Cf. In the second charging mode, switch 13 is in the ON state, such as... Figure 6B As shown, Figure 6B This is the equivalent circuit diagram for the second charging mode. The second charging mode can include multiple operating cycles, each of which includes two operating periods. Specifically, in the first operating period, transistors Q1 and Q3 are turned on, while transistors Q2 and Q4 are turned off. At this time, the voltage input at the input terminal in is applied to the plates of capacitor Cf to charge capacitor Cf. The charge stored in capacitor Cf can also be output through the output terminal oc1, and this output charge is sent to load 3, thereby charging load 3. In the second operating period, transistors Q2 and Q4 are turned on, while transistors Q1 and Q3 are turned off. Capacitor Cf discharges, and the charge stored in capacitor Cf is output through the output terminal oc1, and this output charge is sent to load 3, thereby charging load 3.

[0078] The charging circuit 1 can also operate in a third charging mode, also known as Boost mode. In this mode, the inductor-type voltage conversion circuit 11 uses inductor L as the charging / discharging device, and can output electrical energy through inductor L. In the third charging mode, switch 13 is in the off state, and transistors Q1 and Q2 are in the on state, such as... Figure 6C As shown, Figure 6CThis is the equivalent circuit diagram for the third charging mode. This third charging mode includes multiple operating cycles, each consisting of two operating periods. Specifically, in the first operating period, transistor Q5 is off and transistor Q6 is on, and the charge input at input terminal in is stored in inductor L, i.e., charging inductor L. In the second operating period, transistor Q6 is on and transistor Q5 is off, and the charge input at input terminal in and the charge stored in inductor L are combined and input to output terminal out, causing the voltage at output terminal out to rise. This risen voltage is higher than the voltage input at input terminal in. The inductor-type voltage conversion circuit 11 outputs the risen voltage to load 3 through output terminal out, thereby charging load 3.

[0079] The charging circuit 1 can also operate in a fourth charging mode, also known as a three-level Buck mode. In this mode, the inductor-type voltage conversion circuit 11 uses inductor L as the charging / discharging device, and can output electrical energy through inductor L. In the fourth charging mode, switch 13 is in the off state, transistor Q5 is in the on state, and transistor Q6 is in the off state, as shown below. Figure 6D As shown, Figure 6D This is the equivalent circuit diagram for the fourth charging mode. The fourth charging mode can include multiple operating cycles, and each operating cycle can include multiple operating periods. Depending on whether the ratio D (i.e., the duty cycle of transistors Q1 and Q2) between the output voltage Vout and the input voltage Vin (i.e., the ratio of the voltage Vout at the output terminal out to the input voltage Vin at the input terminal in) is greater than 0.5 or less than 0.5, the switching state of each transistor within one operating cycle can be categorized into several cases.

[0080] When the ratio D is greater than 0.5 and less than 1, please refer to [the relevant documentation]. Figure 7A , Figure 7AThis is the operating timing sequence of one cycle of charging circuit 1 when it operates in three-level Buck mode. During time period t1, transistors Q1 and Q2 are turned on, while transistors Q3 and Q4 are turned off. The first terminal of inductor L is connected to the input terminal in through transistors Q1 and Q2. The power supply provides power to load 3, and the voltage at the output terminal out is the power supply voltage. Simultaneously, the power supply charges inductor L, storing energy during this time period. During time period t2, transistors Q1 and Q3 are turned on, while Q2 and Q4 are turned off. The first terminal of inductor L is connected to the second plate of capacitor Cf through transistor Q3. The power supply charges capacitor Cf, and inductor L releases energy. The voltage at the output terminal out is the power supply voltage. The voltage across capacitor Cf is reduced. During time period t3, transistors Q1 and Q2 are turned on, while transistors Q3 and Q4 are turned off. The first terminal of inductor L is connected to the input terminal in through transistors Q1 and Q2. The power supply supplies power to load 3, and the voltage at the output terminal out is the power supply voltage. At the same time, the power supply charges inductor L, and inductor L stores energy during this time period. During time period t4, transistors Q2 and Q4 are turned on, while transistors Q1 and Q3 are turned off. Capacitor Cf charges load 3, and inductor L releases energy. The voltage at the output terminal out is the power supply voltage minus the voltage across capacitor Cf.

[0081] When the ratio D is greater than 0 and less than 0.5, please refer to [the relevant documentation]. Figure 7B , Figure 7B This is the operating timing sequence of one cycle of charging circuit 1 when it operates in three-level Buck mode. In the first period, transistors Q1 and Q3 are turned on, while transistors Q2 and Q4 are turned off. The first terminal of inductor L is connected to the second plate of capacitor Cf through transistor Q3. The power supply charges capacitor Cf, and inductor L stores energy. The voltage at the output terminal out is the power supply voltage minus the voltage across capacitor Cf. In the second period, transistors Q3 and Q4 are turned on, while transistors Q1 and Q2 are turned off. The first terminal of inductor L is coupled to the common ground Gnd through transistors Q3 and Q4. Inductor L releases energy, and the voltage at the output terminal out... In the third period, transistors Q2 and Q4 are turned on, while transistors Q1 and Q3 are turned off. The first terminal of inductor L is connected to the first plate of capacitor Cf through transistor Q2. Capacitor Cf supplies power to load 3, and inductor L stores energy. The voltage at the output terminal out is the voltage across capacitor Cf. In the fourth period, transistors Q3 and Q4 are turned on, while transistors Q1 and Q2 are turned off. The first terminal of inductor L is coupled to the common ground Gnd through transistors Q3 and Q4. Inductor L releases energy, and the voltage at the output terminal out is 0.

[0082] In summary, in the inductive voltage conversion circuit 11, electrical energy output is achieved by charging and discharging the inductor L0. The output voltage can be regulated by controlling the value of the inductor L0 and the duty cycles of transistors Q1 to Q4. For example, increasing the duty cycles of transistors Q1 and Q2 and decreasing the duty cycles of transistors Q3 and Q4 increases the output voltage; conversely, decreasing the duty cycles of transistors Q1 and Q2 and increasing the duty cycles of transistors Q3 and Q4 decreases the output voltage. It should be noted that the duty cycles of transistors Q1 and Q4 are complementary, as are the duty cycles of transistors Q2 and Q3. Complementarity here means that the sum of the duty cycles of transistors Q1 and Q4 is 100%, and the sum of the duty cycles of transistors Q2 and Q3 is 100%. For example, when the duty cycle of transistor Q1 is 60%, the duty cycle of transistor Q4 is 40%.

[0083] Furthermore, in the aforementioned fourth charging mode, the voltage at the first terminal of inductor L includes the following states: the voltage Vin at input terminal in, the voltage Vin at input terminal in minus the voltage Vcf across capacitor Cf, 0 voltage, and the voltage across capacitor Cf. When the voltage Vcf across capacitor Cf is 1 / 2 Vin, the voltage at the first terminal of inductor L includes three voltage states: the voltage Vin at input terminal in, 1 / 2 Vin, and 0 voltage. When the voltage at the first terminal of inductor L only includes these three voltage states, the inductor-type voltage conversion circuit 11 can have a higher energy conversion efficiency. Therefore, in this embodiment, by setting a voltage regulator circuit 12, when the charging circuit 1 operates in the fourth charging mode, the voltage Vcf across capacitor Cf can be 1 / 2 Vin.

[0084] In one possible implementation, by adjusting the duty cycles of transistors Q1 to Q4, the voltage regulator circuit 12 can stabilize the voltage across capacitor Cf at 1 / 2Vin. It should be noted that to stabilize the voltage across capacitor Cf at 1 / 2Vin, the step size of the duty cycle adjustment for each transistor is very small, and the change in duty cycle has a negligible impact on the output voltage at the output terminal OUT. Depending on whether the voltage Vcf across capacitor Cf is greater than or less than 1 / 2Vin, the adjustment of the duty cycles of transistors Q1 to Q4 can be divided into several cases. When the voltage Vcf across capacitor Cf is greater than 1 / 2Vin, at least one of decreasing the duty cycle of transistor Q1 and increasing the duty cycle of transistor Q2 can be performed; when the voltage Vcf across capacitor Cf is less than 1 / 2Vin, at least one of increasing the duty cycle of transistor Q1 and decreasing the duty cycle of transistor Q2 can be performed. After several cycles, the voltage across capacitor Cf stabilizes at 0.5Vin. Understandably, since transistors Q1 and Q4 are a pair of transistors with complementary duty cycles, when the duty cycle of transistor Q1 increases, the duty cycle of transistor Q4 decreases, and when the duty cycle of transistor Q1 decreases, the duty cycle of transistor Q4 increases. The step size for adjusting the duty cycle of transistor Q4 is the same as the step size for adjusting the duty cycle of transistor Q1. Similarly, transistors Q2 and Q3 are a pair of transistors with complementary duty cycles. When the duty cycle of transistor Q2 increases, the duty cycle of transistor Q3 decreases, and when the duty cycle of transistor Q2 decreases, the duty cycle of transistor Q4 increases. The step size for adjusting the duty cycle of transistor Q4 is the same as the step size for adjusting the duty cycle of transistor Q1.

[0085] The above describes how to stabilize the voltage Vcf across capacitor Cf at 1 / 2Vin by adjusting the duty cycle of transistors Q1 to Q4. In another possible implementation of this application, when the voltage Vcf across capacitor Cf is less than 1 / 2Vin, during the charging and discharging process of capacitor Cf, the voltage Vcf across capacitor Cf can also be stabilized at 1 / 2Vin by changing the capacitors C1 and C2 connected in parallel with capacitor Cf. In this case, the duty cycle of transistors Q1 to Q4 can remain unchanged. Since resistors R1 and R2, and capacitors C1 and C2 in the voltage regulator circuit 12 are symmetrically arranged, the voltage at node a1 is stabilized at 1 / 2Vin, thereby stabilizing the voltage across capacitor Cf at 1 / 2Vin.

[0086] The above introduces Figure 2A The working principle of charging circuit 1 when the power source charges the mobile phone, as shown in the scenario. When charging circuit 1 is applied... Figure 2BIn the scenario shown, that is, when the mobile phone 2, which includes the charging circuit 1 provided in the embodiment of this application, charges the mobile phone 1, the charging circuit 1 may also include four charging modes.

[0087] The first reverse charging mode can also be called the reverse direct charging mode. In this first reverse charging mode, switch 13, transistor Q1, and transistor Q2 are in the on state, and the input terminal in of charging circuit 1 is directly connected to load 3. The current input to the input terminal in of charging circuit 1 passes through the current transmission path formed by transistor Q1, transistor Q2, and switch 13, and is output to mobile phone 1 through the battery in load 3 to charge mobile phone 1.

[0088] The second reverse charging mode can also be called the capacitor charging and discharging mode. In the second reverse charging mode, switch 13 is in the on state. The second charging mode can include multiple operating cycles, and each operating cycle includes two operating periods. Specifically, in the first operating period, transistors Q1 and Q3 are turned on, and transistors Q2 and Q4 are turned off; in the second operating period, transistors Q2 and Q4 are turned on, and transistors Q1 and Q3 are turned off.

[0089] The charging circuit 1 can also operate in a third reverse charging mode, also known as Buck mode. In the third reverse charging mode, switch 13 is off, and transistors Q1 and Q2 are on. This third reverse charging mode includes multiple operating cycles, each consisting of two operating periods. Specifically, in the first operating period, transistor Q5 is off and transistor Q6 is on; in the second operating period, transistor Q6 is on and transistor Q5 is off.

[0090] The charging circuit 1 can also operate in a fourth reverse charging mode, which can also be called a three-level Boost mode. In the fourth reverse charging mode, switch 13 is in the off state, transistor Q5 is in the on state, and transistor Q6 is in the off state. Transistors Q1 to Q4 are periodically turned on or off according to a preset control timing sequence. In addition, in the fourth charging mode, the voltage regulator circuit 12 operates, at which time the voltage regulator circuit 12 stabilizes the voltage Vcf across capacitor Cf at 1 / 2Vin.

[0091] It should be noted that, in Figure 2B In the scenario shown, the first reverse charging mode and the second reverse charging mode of charging circuit 1 are... Figure 2AThe working principles of the first and second charging modes in the scenario shown are similar. The third reverse charging mode of charging circuit 1 is similar to the fourth charging mode, and the fourth reverse charging mode of charging circuit 1 is similar to the third charging mode. For detailed working principles of the first to fourth reverse charging modes, please refer to the relevant descriptions in the first to fourth charging modes, which will not be repeated here.

[0092] like Figure 5 In the charging circuit 1 shown, both transistors D1 and D2 in the voltage regulator circuit 12 are diodes. In one possible implementation, one of transistors D1 and D2 in the voltage regulator circuit 12 is a diode, and the other is a field-effect transistor, such as... Figure 8A and Figure 8B As shown. In Figure 8A The diagram schematically illustrates the case where transistor D1 is a diode and transistor D2 is a field-effect transistor; Figure 8B The diagram illustrates a scenario where transistor D1 is a field-effect transistor and transistor D2 is a diode. Figure 8A and Figure 8B In the middle, the structure and working principle of the capacitor switching circuit 10 and the inductive voltage conversion circuit 11 are similar to those of the capacitor switching circuit 10 and the inductive voltage conversion circuit 11. Figure 5 The capacitor switching circuit 10 and the inductive voltage conversion circuit 11 shown have the same structure and working principle. See reference [link / reference] for details. Figure 5 The relevant descriptions in the illustrated embodiments will not be repeated. When transistor D2 is a field-effect transistor, as... Figure 8A As shown, the first terminal of transistor D2 is coupled to node a1, and the second terminal of transistor D2 is coupled to node a3; when transistor D1 is a field-effect transistor, as... Figure 8B As shown, the first terminal of transistor D1 is coupled to node a1, and the second terminal of transistor D1 is coupled to node a2. Furthermore, in Figure 8A and Figure 8B In the circuit, each voltage regulator circuit 12 includes resistors R1 and R2, capacitors C1 and C2, and their specific connection relationships are shown in the reference. Figure 5 The relevant descriptions in the illustrated embodiments will not be repeated here. Figure 8A and Figure 8B In the charging circuit 1 shown, the voltage across capacitor Cf can also be stabilized at 1 / 2Vin by adjusting the duty cycles of transistors Q1 to Q4. Furthermore, when the voltage Vcf across capacitor Cf is less than 1 / 2Vin, the duty cycles of transistors Q1 to Q4 can be kept constant, and the voltage across capacitor Cf can be stabilized at 1 / 2Vin by changing the capacitors C1 and C2 connected in parallel with capacitor Cf. See details... Figure 5 The related description of the illustrated embodiments. Figure 5 The embodiment shown differs from the one described above in that... Figure 8A In the charging circuit 1 shown, it is necessary to control the on and off states of transistor D2; Figure 8B In the charging circuit 1 shown, it is necessary to control the on and off states of transistor D1. Specifically, when charging circuit 1 is in the following state... Figure 8A In the structure shown, the on and off states of transistor D2 are consistent with those of transistor Q1. That is, when transistor Q1 is on, transistor D2 is on; when transistor Q1 is off, transistor D2 is off. When charging circuit 1 is as shown... Figure 8B In the structure shown, the on and off states of transistor D1 are consistent with those of transistor Q4. That is, when transistor Q4 is on, transistor D1 is on; when transistor Q4 is off, transistor D1 is off. When transistor D1 is a field-effect transistor, the control timing of transistor D1 is as follows: Figure 7A (The ratio of output out to input in is greater than 0.5) and Figure 7B (The ratio of output terminal out to input terminal in is less than 0.5) is shown in D1; when transistor D2 is a field-effect transistor, the control timing of transistor D2 is shown in [reference needed]. Figure 7A and Figure 7B As shown in D2 in the diagram.

[0093] like Figures 5 to 8B In the charging circuit 1 shown, at least one of the transistors D1 and D2 in the voltage regulator circuit 12 is a diode. In one possible implementation of this application embodiment, both transistors D1 and D2 in the voltage regulator circuit 12 are field-effect transistors, such as... Figure 9 As shown. In Figure 9 In the middle, the structure and working principle of the capacitor switching circuit 10 and the inductive voltage conversion circuit 11 are similar to those of the capacitor switching circuit 10 and the inductive voltage conversion circuit 11. Figure 5 The capacitor switching circuit 10 and the inductive voltage conversion circuit 11 shown have the same structure and working principle. See reference [link / reference] for details. Figure 5 The relevant descriptions in the illustrated embodiments will not be repeated. Figure 9 In the diagram, the first terminal of transistor D1 is coupled to node a1, and the second terminal of transistor D1 is coupled to node a2; the first terminal of transistor D2 is coupled to node a1, and the second terminal of transistor D2 is coupled to node a3. Transistors D1 and D2 can be either NMOS or PMOS type transistors. Figure 7A and Figure 7BIn the charging circuit 1 shown, the voltage across capacitor Cf can also be stabilized at 1 / 2Vin by adjusting the duty cycles of transistors Q1 to Q4. Furthermore, when the voltage Vcf across capacitor Cf is less than 1 / 2Vin, the duty cycles of transistors Q1 to Q4 can be kept constant, and the voltage across capacitor Cf can be stabilized at 1 / 2Vin by changing the capacitors C1 and C2 connected in parallel with capacitor Cf. See details... Figure 5 The related description of the illustrated embodiments. Figure 5 The embodiment shown differs from the one described above in that... Figure 9 In the charging circuit 1 shown, the on and off states of transistors D1 and D2 need to be controlled. Specifically, the on and off states of transistor D1 are consistent with those of transistor Q4, and the on and off states of transistor D2 are consistent with those of transistor Q1. That is, when transistor Q1 is on, transistor D2 is on; when transistor Q1 is off, transistor D2 is off; when transistor Q4 is on, transistor D1 is on; when transistor Q4 is off, transistor D1 is off. The control timing for transistor D1 is shown below. Figure 7A and Figure 7B The timing diagram for transistor D1 is shown in Figure 1; the control timing of transistor D2 is shown in Figure 2. Figure 7A and Figure 7B As shown in D2 in the diagram.

[0094] based on Figures 4-9 The charging circuit 1 shown, as described in the above embodiments, may include a battery Ba and system components in the load 3. These system components may include components that require power to operate, such as processors, memory, or sensors. The system components can be directly coupled to the output terminal out. Furthermore, the charging circuit 1 also includes a transistor B, and the output terminal out of the charging circuit 1 is coupled to the battery Ba through the transistor B. Specifically, the first terminal of the transistor B is coupled to the output terminal out, the second terminal of the transistor B is used for coupling to the anode of the battery Ba, and the cathode of the battery Ba is coupled to the common ground Gnd, as shown. Figure 10A As shown. From Figure 10A As can be seen, transistor B separates the battery Ba from the charging path of the system components, thereby improving the stability of the system components. It should be noted that transistor B can also be called a battery path transistor (Batfet), which is a special type of field-effect transistor. Transistor B can achieve charging isolation between the battery and system components, improving the stability of power supply from charging circuit 1 to the load. The specific structure and operation of transistor B are the same as those of traditional Batfet transistors, and will not be described further.

[0095] based on Figure 10A As shown in the load 3, the switch 13 described in this application embodiment has multiple connection methods.

[0096] In the first possible implementation, switch 13 is connected between the output terminal oc1 of capacitor switch circuit 10 and the output terminal out of charging circuit 1, as follows: Figure 10A As shown. In this possible implementation, when the charging circuit 1 operates in direct charging mode or capacitor switching charging mode, the voltage input to the input terminal in of the charging circuit 1 or the voltage discharged by the capacitor Cf is directly output to the system component through the output terminal out; the voltage input to the input terminal in of the charging circuit 1 or the voltage discharged by the capacitor Cf needs to charge the battery Ba through the transistor B; furthermore, when the charging circuit 1 is applied to Figure 2B In the scenario shown, battery Ba charges mobile phone 1 via transistor B and switch 13.

[0097] In the second possible implementation, switch 13 is connected between the output terminal oc1 of capacitor switch circuit 10 and the second terminal of transistor B, as follows: Figure 10B As shown. In this possible implementation, when the charging circuit 1 operates in direct charging mode or capacitor switching charging mode, the voltage input to the input terminal in of the charging circuit 1 or the voltage discharged by the capacitor Cf is directly output to the battery Ba to charge the battery Ba; the voltage input to the input terminal in of the charging circuit 1 or the voltage discharged by the capacitor Cf needs to supply power to the system components through the transistor B; in addition, when the charging circuit 1 is applied to Figure 2B In the scenario shown, battery Ba directly charges mobile phone 2 via switch 13.

[0098] contrast Figure 10A and Figure 10B It can be seen that when switch 13 is connected to the output terminal out, electrical energy can flow directly to the system components, which can improve the efficiency of power supply to the system components. However, when charging the battery Ba, the voltage needs to pass through transistor B. Since transistor B is a power device, there is a certain power dissipation, resulting in a lower efficiency of charging the battery Ba. When switch 13 is connected to the second terminal of transistor B, electrical energy can flow directly to the battery Ba through switch 13 to power the battery Ba, or the battery Ba can charge the device connected to the input terminal in through switch 13, improving the efficiency of battery charging or discharging. However, when supplying power to the system components, the voltage needs to pass through transistor B, resulting in a lower efficiency of power supply to the system components. Therefore, in this embodiment, the position of switch 13 can be set according to the needs of the scenario.

[0099] exist Figure 10B Based on the charging circuit 1 shown, in a further possible implementation of this application embodiment, the charging circuit 1 may also include a switch 14, which is coupled between the input terminal in and the output terminal out of the charging circuit 1, such as... Figure 11As shown. The structure of switch 14 can be the same as that of switch 13. Specifically, switch 14 may include transistor Q9 and transistor Q10. The first terminal of transistor Q9 is coupled to the input terminal in, the second terminal of transistor Q9 is coupled to the first terminal of transistor Q10, and the second terminal of transistor Q10 is coupled to the output terminal out. Transistors Q9 and Q10 can be either NMOS or PMOS transistors. Based on... Figure 11 The structure of the charging circuit 1 shown is such that when the charging circuit 1 operates in the first charging mode, switch 14 is turned on; when the charging circuit 1 operates in the second or third charging mode, switch 14 is turned off. By setting switch 14, the voltage input to the input terminal in of the charging circuit 1 can be directly output to the battery Ba and system components through switches 13 and 14 respectively without passing through transistor B, reducing power loss; in addition, the electrical energy input to the input terminal in of the charging circuit 1 can also be output without passing through power devices such as transistors Q1 and Q2, which can further improve the efficiency of the electrical energy output to the output terminal out.

[0100] based on Figures 4 to 11 The structure of the charging circuit 1 shown in this embodiment of the application is as follows: Figures 4 to 11 Based on the circuit structure included in the charging circuit 1 shown in any embodiment, the charging circuit 1 further includes a controller 15, such as... Figure 12 As shown. Controller 15 is used to configure the electrical parameters output to load 3. These electrical parameters may include, but are not limited to, voltage, current, and power. Controller 15 is also used to acquire at least one of the electrical parameters of input terminal in, output terminal out, node a1, node a2, and node a3, and output control signals to transistors Q1 to Q8 based on the acquired electrical parameters to control the transistors to turn on or off. Furthermore, controller 15 is also used to acquire the voltage across capacitor Cf and adjust the duty cycle of transistors Q1 to Q4 based on the voltage across capacitor Cf. In this embodiment, controller 15 can be an integrated controller. In specific implementations, controller 104 can be various digital logic devices or circuits, including but not limited to: central processing unit, microcontroller, microprocessor, or digital signal processor (DSP). Controller 15 can be controlled via I... 2The C-bus is coupled to the output terminal out, input terminal in, node a1, node a2, and node a3 of the charging circuit 1 to obtain the aforementioned electrical parameters. The controller 15 also includes multiple output terminals, each coupled to the gate of a transistor in the charging circuit 1. For example, the controller 15 includes output terminals C1 to C8, which are coupled to the gates of transistors Q1 to Q8, respectively. Furthermore, the controller 15 includes an output terminal C9, which is coupled to the gate of transistor B. Further, when at least one of transistors D1 and D2 in the voltage regulator circuit 12 is a field-effect transistor (FET), the controller 15 includes additional output terminals coupled to the gate of at least one of transistors D1 and D2 that is a FET. For example, when both transistors D1 and D2 in the voltage regulator circuit 12 are FETs, the controller 15 also includes output terminals C9 and C10, which are coupled to the gates of transistors D1 and D2, respectively. Figure 12 This schematically illustrates what happens when charging circuit 1 is as follows: Figure 5 The diagram shown illustrates the coupling relationship between the controller 15 and the components in the charging circuit 1. Figure 12 The controller 15 shown in this embodiment can obtain the voltage across capacitor Cf in multiple ways. When both transistors D1 and D2 are diodes, controller 15 can acquire the voltages at nodes a2 and a3, and the voltage difference between nodes a2 and a3 is the voltage across capacitor Cf. Alternatively, when the ratio between the voltage at output terminal out and the voltage at input terminal in is greater than 0.5, controller 15 acquires the voltage at node a3 and determines the voltage across capacitor Cf based on the voltage at node a3. Alternatively, when the ratio between the voltage at output terminal out and the voltage at input terminal in is less than 0.5, controller 15 acquires the voltage at node a2 and determines the voltage across capacitor Cf based on the voltage at node a2. When at least one of transistors D1 and D2 is a field-effect transistor, controller 15 can acquire the voltage at node a1 and determine the voltage across capacitor Cf based on the voltage at node a1. Alternatively, controller 15 can acquire the voltage at input terminal in and the voltage at node a1, and determine the voltage across capacitor Cf based on the voltage difference between the voltage at input terminal in and the voltage at node a1.

[0101] like Figures 4-12In the charging circuit 1 shown, the charging circuit 1 includes one capacitor switching circuit. In other possible implementations of this application embodiment, the charging circuit 1 may include more capacitor switching circuits, such as 2, 3, or 4. This application embodiment does not specifically limit the number of receiving circuits. Correspondingly, the voltage regulator circuit also includes more circuits, wherein the number of voltage regulator circuits is equal to the number of capacitor switching circuits, and the voltage regulator circuits and capacitor switching circuits are respectively coupled. The following example uses a charging circuit 1 including three capacitor switching circuits and a voltage regulator circuit, combined with... Figure 13 The following description further details the case where charging circuit 1 includes more capacitor switching circuits and voltage regulation circuits. Figure 13 In the charging circuit 1, there are capacitor switching circuits 101, 102, and 103, voltage regulator circuits 121, 122, and 123, an inductive voltage conversion circuit 11, and a switch 13. Voltage regulator circuit 121 is coupled to the two ends of capacitor Cf1 in capacitor switching circuit 101, voltage regulator circuit 122 is coupled to the two ends of capacitor Cf2 in capacitor switching circuit 102, and voltage regulator circuit 123 is coupled to the two ends of capacitor Cf3 in capacitor switching circuit 103. Furthermore, capacitor switching circuits 101, 102, and 103, voltage regulator circuits 121, 122, and 123 are all coupled to the input terminal in and the common ground Gnd of charging circuit 1. The structure and working principle of capacitor switching circuits 101, 102, and 103 are similar to those of capacitor switching circuits 104 and 105. Figure 5 The structure of the capacitor switching circuit 10 shown is the same, and the structures and working principles of the voltage regulator circuits 121, 122, and 123 are also the same. Figure 5 The structure of the voltage regulator circuit 12 shown is the same as that of the inductor-type voltage converter circuit 11 and the switch 13. Figure 5 The inductive voltage conversion circuit 11 and switch 13 shown have the same structure and working principle. See reference [link / reference] for details. Figure 5 The relevant circuit structure and working principle will not be described in detail here. In addition, the output terminal oc1 of the capacitor switch circuit 103 is coupled to the inductive voltage conversion circuit 11 and the switch 13, and is used to provide power to the output terminal out through the inductive voltage conversion circuit 11 or the switch 13.

[0102] The above has been approved. Figures 4-13 The illustrated embodiments describe the structure and working principle of the charging circuit 1 described in this application. In this application, the charging circuit 1 can include multiple charging stages such as constant current charging and constant voltage charging for the electronic device. The following examples illustrate this. Figure 2A Taking the example of a power source charging a mobile phone, combined with... Figure 12 The circuit shown and Figure 14The flowchart shown describes the control of each transistor in the charging circuit 1 by the controller 15 according to the embodiments of this application, as well as the operation mode of the charging circuit 1. Among them, Figure 14 The process shown is applied to Figure 12 The controller 15 is shown. When the mobile phone is connected to a power source, the controller 15 performs the following steps:

[0103] Step 1401: Detect the voltage at the output terminal out and determine whether the voltage at the output terminal out is lower than the preset threshold Vth1. When the voltage at the output terminal out is detected to be lower than the preset threshold Vth1, constant current charging is used and step 1402 is executed. When the voltage at the output terminal out is detected to be greater than or equal to the preset threshold Vth1, constant voltage charging is used and step 1406 is executed.

[0104] Step 1402: Control transistors Q7 and Q8 to be turned on, while keeping transistors Q5 and Q6 off. Detect whether the voltage at input terminal in of charging circuit 1 minus the voltage at output terminal out is within a second preset voltage range. When the voltage at input terminal in minus the voltage at output terminal out is within the second preset voltage range, charging is performed in direct-flow mode, and step 1403 is executed. When the voltage at input terminal in minus the voltage at output terminal out is outside the second preset voltage range, charging is performed in capacitor charging / discharging mode, and step 1404 is executed. The lower limit of the second preset voltage range can be 0, and the upper limit can be a preset value. For example, the second preset voltage range can be (0, 2). In some scenarios, the voltage input from the power supply to the charging circuit 1 may not reach the charging voltage of the mobile phone. For example, the voltage input from the power supply to the charging circuit 1 may be 8V, while the charging voltage of the mobile phone is 10V. That is, the voltage input at the input terminal in does not match the charging voltage of the mobile phone. In this case, the capacitor charging and discharging mode needs to be used for charging. In other scenarios, the voltage input from the power supply to the charging circuit 1 can reach the charging voltage of the mobile phone. In this case, the input terminal in and the output terminal out of the charging circuit 1 can be directly connected to enable the direct charging mode.

[0105] Step 1403: Control transistors Q1 and Q2 to be turned on, and keep transistors Q3 and Q4 in the off state.

[0106] After step 1403, load 3 is directly coupled to the input terminal in of charging circuit 1 through transistors Q1, Q2, Q7, and Q8, as follows: Figure 2A The power source shown directly charges load 3.

[0107] Step 1404: Based on the duty cycles of transistors Q1 to Q4, alternately control transistors Q1 and Q3, as well as transistors Q2 and Q4, to be turned on or off.

[0108] Specifically, the controller 15 pre-stores the first duty cycles of transistors Q1 to Q4. These first duty cycles are the duty cycles of each transistor when the charging circuit 1 charges the load 3 using a capacitor charging / discharging mode. Transistors Q1 and Q3 have the same duty cycle, as do transistors Q2 and Q4. For example, the duty cycle of each transistor can be 50%. That is, within one operating cycle, transistors Q1 and Q3 are simultaneously turned on and off, transistors Q2 and Q4 are simultaneously turned on and off, transistors Q1 and Q2 are time-divisionally turned on and off, and transistors Q3 and Q4 are time-divisionally turned on and off. The on and off durations of each transistor are determined based on its duty cycle and the duration of one cycle.

[0109] When the charging circuit 1 charges the load 3 using the capacitor charging and discharging mode, the controller 15 can first control transistors Q2 and Q4 to turn on, while keeping transistors Q1 and Q3 in the off state. The load 3 is coupled across the two ends of capacitor Cf, and capacitor Cf discharges, outputting electrical energy to the load 3. Next, the controller 15 can control transistors Q1 and Q3 to turn on and transistors Q2 and Q4 to turn off. The load 3 is coupled between the lower plate of capacitor Cf and the common ground Gnd, and the upper plate of capacitor Cf is coupled to the input terminal in of the charging circuit 1. The power supply charges capacitor Cf and supplies power to the load 3. Then, the controller 15 controls transistors Q2 and Q4 to turn on and controls transistors Q1 and Q3 to turn off. Again, the controller 15 controls transistors Q1 and Q3 to turn on and controls transistors Q2 and Q4 to turn off, repeating this process sequentially. By charging and discharging capacitor Cf, a constant current output is achieved, charging the load 3 with a constant current.

[0110] If constant current charging is used, step 1405 is further performed.

[0111] Step 1405: Detect whether the voltage at the output terminal out is less than a preset threshold Vth2. If the voltage at the output terminal out is lower than the preset threshold Vth2, proceed to step 1402; if the voltage at the output terminal out is greater than or equal to the preset threshold Vth2, proceed to step 1401. The preset threshold Vth2 is greater than the preset threshold Vth1.

[0112] Step 1406: Control transistors Q7 and Q8 to turn off. Based on the ratio D between the voltage at the output terminal out and the voltage at the input terminal in, determine whether the ratio D is greater than 1. If the ratio is greater than 1, use the boost circuit and execute step 1407; if the ratio is less than 1, use the buck circuit and execute step 1408.

[0113] Step 1407: Control transistors Q1 and Q2 to turn on, and alternately control transistors Q5 and Q6 to turn on or off.

[0114] After step 1407, the voltage output at the output terminal out of the charging circuit 1 is higher than the voltage input at the input terminal in, that is, a constant voltage higher than the input voltage at the input terminal in is used to charge the load 3.

[0115] Step 1408: Control transistor Q5 to turn on and transistor Q6 to turn off, stabilize the voltage across capacitor Cf within the first preset voltage range, and control the on / off state of transistors Q1 to Q4 based on the preset control timing.

[0116] After step 1408, the voltage output at the output terminal out of the charging circuit 1 is lower than the voltage input at the input terminal in, that is, a constant voltage lower than the input voltage at the input terminal in is used to charge the load 3.

[0117] If constant voltage charging is used, further perform step 1409.

[0118] Step 1409: Detect whether the voltage at the output terminal out is less than a preset threshold Vth3. If the voltage at the output terminal out is greater than or equal to the preset threshold Vth3, proceed to step 1401; if the voltage at the output terminal out is less than the preset threshold Vth3, proceed to step 1410. The preset threshold Vth3 is less than the preset threshold Vth1.

[0119] Step 1410: Detect whether the voltage at the output terminal out reaches the preset threshold Vth4. When the voltage at the output terminal out reaches the preset threshold Vth4, it means that the phone is fully charged and the charging ends. When the voltage at the output terminal out does not reach the preset threshold Vth4, proceed to step 1406.

[0120] In this embodiment of the application, step 1408, which involves stabilizing the voltage across capacitor Cf within a first preset voltage range and controlling the on / off states of transistors Q1 to Q4 based on a preset control timing sequence, specifically includes... Figure 15 Steps 14081 to 14087 are shown below for details.

[0121] Step 14081: Detect whether the voltage across capacitor Cf is within the first preset voltage range. If the voltage across capacitor Cf is higher than the upper limit of the first preset voltage range, execute step 14082. If the voltage across capacitor Cf is lower than the lower limit of the first preset voltage range, execute step 14083. If the voltage across capacitor Cf is within the first preset voltage range, execute step 14084.

[0122] In actual circuits, due to factors such as current or voltage input delay and power dissipation of various components in the circuit, the voltage across capacitor Cf may not be stable at half the input voltage and may fluctuate around the half input voltage value. Therefore, in this embodiment, the first preset voltage range can be a voltage range that fluctuates around the half input voltage value. For example, the first preset voltage range can be (half input voltage - preset threshold Vth5, half input voltage + preset threshold Vth5), where threshold Vth5 can be set based on the needs of the actual circuit. By setting the preset threshold Vth5, the circuit can be prevented from switching back and forth between steps 14082, 14083, and 14084 due to a slight deviation, thus improving the stability of the charging circuit.

[0123] Step 14082: Decrease the duty cycle of transistor Q1 while increasing the duty cycle of transistor Q4, or increase the duty cycle of transistor Q2 while decreasing the duty cycle of transistor Q3, and then proceed to step 14084.

[0124] Step 14083: Increase the duty cycle of transistor Q1 while decreasing the duty cycle of transistor Q4, or decrease the duty cycle of transistor Q2 while increasing the duty cycle of transistor Q3, and then execute step 14084.

[0125] Step 14084: Determine whether the ratio D is greater than 0.5. If the ratio D is greater than 0.5, proceed to step 14085; if the ratio D is less than 0.5, proceed to step 14086.

[0126] Step 14085, using Figure 7A The control timing shown controls the on / off states of transistors Q1 to Q4.

[0127] Step 14086, using Figure 7B The control timing shown controls the on / off states of transistors Q1 to Q4.

[0128] Step 14087: After a preset period, detect whether the voltage across capacitor Cf is within the third preset voltage range. If so, proceed to step 1409. If the voltage across capacitor Cf is detected to be greater than the upper limit of the third preset voltage range, proceed to step 14082. If the voltage across capacitor Cf is detected to be less than the lower limit of the third preset voltage range, proceed to step 14083.

[0129] The third preset voltage range can be (1 / 2 input voltage - preset threshold Vth6, 1 / 2 input voltage + preset threshold Vth6), where the preset threshold Vth6 is greater than the preset threshold Vth5. The principle of setting the third preset voltage range is similar to that of setting the first preset voltage range, and will not be repeated here.

[0130] The above describes a charging method for the charging circuit 1 provided in the embodiments of this application. It should be noted that the charging method provided in the embodiments of this application may also include... Figure 14 The steps shown may include more or fewer steps. In one possible implementation, when at least one of transistors D1 and D2 is a field-effect transistor, step 1408 of this embodiment further includes a step of controlling transistor D1 or transistor D2 to conduct. For example, when both transistors D1 and D2 are field-effect transistors, in the case of... Figure 15 In steps 14085 and 14086 shown, based on Figure 7A and Figure 7B The timing shown indicates that when control transistor Q1 is turned on, control transistor D2 is also turned on; when control transistor Q1 is turned off, control transistor D2 is also turned off. When control transistor Q4 is turned on, control transistor D1 is also turned on; when control transistor Q4 is turned off, control transistor D1 is also turned off.

[0131] In addition, such as Figure 14 In the charging method shown, when at least one of transistors D1 and D2 is a diode, when the voltage across capacitor Cf is lower than the lower limit of the first preset voltage range, in addition to using the method shown in step 14083, that is, by adjusting the duty cycle of transistors Q1 to Q4 to stabilize capacitor Cf within the first preset voltage range, the duty cycle of transistors Q1 to Q4 can also be kept constant, and the voltage across capacitor Cf can be automatically adjusted to the first preset voltage range using the symmetrical resistors and symmetrical capacitors in the voltage regulator circuit 12. Furthermore, when both transistors D1 and D2 are field-effect transistors, in addition to using the methods shown in steps 14082 and 14083, that is, by adjusting the duty cycle of transistors Q1 to Q4 to stabilize capacitor Cf within the first preset voltage range, the duty cycle of transistors Q1 to Q4 can also be kept constant, and the voltage across capacitor Cf can be automatically adjusted to the first preset voltage range using the symmetrical resistors and symmetrical capacitors in the voltage regulator circuit 12.

[0132] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A charging circuit, characterized by, Includes input ports, output ports, capacitor switching circuit, first switch, inductive voltage conversion circuit, voltage regulator circuit and controller; The capacitor switching circuit includes a first capacitor and a plurality of transistors, wherein the first capacitor is coupled between the input port and the common ground through the plurality of transistors; The first switch is coupled between the output terminal of the capacitor switch circuit and the output port, and the first switch includes a bidirectional switching transistor; The inductive voltage conversion circuit is coupled between the output terminal of the capacitor switching circuit and the output port. The controller, based on the voltage at the output port, controls the voltage output by the capacitor switching circuit, and outputs it to the output port through one of the first switch and the inductive voltage conversion circuit to supply power to the load; The voltage regulator circuit is coupled to the two poles of the first capacitor and is used to stabilize the voltage across the first capacitor within a first preset voltage range when the voltage output by the capacitor switching circuit is output to the output port through the inductive voltage conversion circuit.

2. The charging circuit of claim 1, wherein, The controller is specifically used for: In response to the voltage at the output port being less than a first preset threshold, when the voltage at the input port minus the voltage at the output port is within a second preset voltage range, the on / off state of the plurality of transistors is controlled to bypass the first capacitor, and the voltage input at the input port is output to the output port through the first switch.

3. The charging circuit according to claim 1 or 2, characterized in that, The controller is specifically used for: In response to the voltage at the output port being less than a first preset threshold, when the voltage at the input port minus the voltage at the output port is outside a second preset voltage range, the on / off state of the plurality of transistors is controlled to control the input port to charge the first capacitor, or the first capacitor to discharge to the output port through the first switch.

4. The charging circuit according to claim 1 or 2, characterized in that, The controller is specifically used for: In response to the voltage at the output port being greater than or equal to a first preset threshold, the voltage output by the capacitor switching circuit is controlled and output to the output port through the inductor-type voltage conversion circuit.

5. The charging circuit according to claim 1 or 2, characterized by The voltage regulator circuit includes a first resistor, a second resistor, a second capacitor, a third capacitor, a first transistor, and a second transistor; The first end of the first resistor is coupled to the input port, the second end of the first resistor is coupled to the first end of the second resistor, and the second end of the second resistor is coupled to the common ground. The first end of the second capacitor is coupled to the input port, the second end of the second capacitor and the first end of the third capacitor are both coupled to the second end of the first resistor, and the second end of the third capacitor is coupled to the common ground; The first terminal of the first transistor and the second terminal of the second transistor are both coupled to the second terminal of the first resistor. The second terminal of the first transistor is coupled to the first terminal of the first capacitor, and the first terminal of the second transistor is coupled to the second terminal of the first capacitor.

6. The charging circuit of claim 5, wherein, The first transistor or the second transistor is a diode; If the first transistor is a diode, the first electrode of the first transistor is the anode and the second electrode of the first transistor is the cathode. If the second transistor is a diode, the first electrode of the second transistor is the anode and the second electrode of the second transistor is the cathode.

7. The charging circuit of claim 6, wherein, The capacitor switching circuit includes a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor; The first terminal of the third transistor is coupled to the input port, the second terminal of the third transistor and the first terminal of the fourth transistor are coupled to the first terminal of the first capacitor, the second terminal of the fourth transistor and the first terminal of the fifth transistor are coupled to the output terminal of the capacitor switching circuit, the second terminal of the fifth transistor and the first terminal of the sixth transistor are coupled to the second terminal of the first capacitor, and the second terminal of the sixth transistor is coupled to the common ground.

8. The charging circuit of claim 7, wherein, The inductive voltage conversion circuit includes an inductor, a seventh transistor, an eighth transistor, and a fourth capacitor; The first end of the inductor is coupled to the output end of the capacitor switching circuit, the second end of the inductor is coupled together with the second terminal of the seventh transistor and the first terminal of the eighth transistor, the first terminal of the seventh transistor is coupled to the output port, and the second terminal of the eighth transistor is coupled to the common ground; The fourth capacitor is coupled between the output port and the common ground.

9. The charging circuit according to any one of claims 1 to 2, 6 to 8, characterized by, The load includes a battery, and the charging circuit further includes a ninth transistor; The first terminal of the ninth transistor is coupled to the output port, and the second terminal of the ninth transistor is coupled to the battery.

10. The charging circuit of claim 9, wherein, The first end of the first switch is coupled to the output end of the capacitor switch circuit, and the second end of the first switch is coupled to the first electrode of the ninth transistor.

11. The charging circuit of claim 9, wherein, The first end of the first switch is coupled to the output end of the capacitor switch circuit, and the second end of the first switch is coupled to the output port through the ninth transistor.

12. The charging circuit of claim 11, wherein, The charging circuit also includes a second switch; The second switch is coupled between the input port and the output port.

13. The charging circuit of claim 8, wherein, The controller controls the on / off states of the plurality of transistors to bypass the first capacitor and outputs the voltage input to the input port to the output port through the first switch, specifically for: When the voltage value at the output port is less than a first preset threshold, the first switch is turned on and the seventh transistor and the eighth transistor are turned off. In response to detecting that the voltage at the input port minus the voltage at the output port is within a second preset voltage range, the third transistor and the fourth transistor are turned on, and the fifth transistor and the sixth transistor are turned off.

14. The charging circuit of claim 8, wherein, The controller controls the on / off states of the plurality of transistors to control the input port to charge the first capacitor or the first capacitor to discharge to the output port through the first switch, specifically for: When the voltage value at the output port is less than a first preset threshold, the first switch is turned on and the seventh transistor and the eighth transistor are turned off. In response to detecting that the voltage at the input port minus the voltage at the output port is outside a second preset voltage range, the third transistor and the fifth transistor, as well as the fourth transistor and the sixth transistor, are alternately controlled to be turned on or off.

15. The charging circuit of claim 8, wherein, The controller controls the voltage output from the capacitor switching circuit to be output to the output port through the inductive voltage conversion circuit, specifically for: When the voltage value at the output port is greater than or equal to a first preset threshold, the first switch is controlled to turn off. Based on the ratio between the voltage at the output port and the voltage at the input port, when the ratio is greater than a second preset threshold, the third and fourth transistors are controlled to turn on, the fifth and sixth transistors are controlled to turn off, and the seventh and eighth transistors are alternately controlled to turn on or off.

16. The charging circuit of claim 15, wherein, The controller controls the voltage output from the capacitor switching circuit to be output to the output port through the inductive voltage conversion circuit, specifically for: When the ratio is less than the second preset threshold, the seventh transistor is turned on and the eighth transistor is turned off. Based on a preset control timing sequence, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are controlled to turn on and off.

17. The charging circuit of claim 16, wherein, The controller is also used for: In conjunction with the voltage regulator circuit, the voltage across the first capacitor is stabilized within the first preset voltage range.

18. The charging circuit of claim 17, wherein, The controller, in conjunction with the voltage regulator circuit, stabilizes the voltage across the first capacitor within the first preset voltage range. Specifically, it is used to: detect the voltage across the first capacitor, and when the voltage across the first capacitor is outside the first preset voltage range, adjust the duty cycle of the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor.

19. The charging circuit of claim 18, wherein, The controller adjusts the duty cycles of the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor, specifically for: In response to the voltage across the first capacitor being higher than the upper limit of the first preset voltage range, at least one of the following operations is performed: decreasing the duty cycle of the third transistor while increasing the duty cycle of the sixth transistor, increasing the duty cycle of the fourth transistor while decreasing the duty cycle of the fifth transistor; In response to the voltage across the first capacitor being lower than the lower limit of the first preset voltage range, at least one of the following operations is performed: increasing the duty cycle of the third transistor while decreasing the duty cycle of the sixth transistor, decreasing the duty cycle of the fourth transistor while increasing the duty cycle of the fifth transistor.

20. The charging circuit of any of claims 16-19, wherein, The first transistor or the second transistor is a field-effect transistor; the controller is further configured to: If the first transistor is a field-effect transistor, based on the preset control timing, the sixth transistor and the first transistor are controlled to be turned on or off simultaneously; If the second transistor is a field-effect transistor, based on the preset control timing, the third transistor and the second transistor are controlled to be turned on or off simultaneously.

21. An electronic device, comprising: Includes a load and a charging circuit as described in any one of claims 1-20; The load is coupled to the output port of the charging circuit to supply power to the load.

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