A heuristic search-based boundary scan test pattern generation method

Abstract

The application discloses a boundary scan test matrix generation method based on heuristic search, which comprises the following steps: firstly, counting the number of networks in the measured circuit board and calculating the normalized distance between any two networks; then, calculating the short-circuit probability between the networks through the normalized distance between any two networks, so as to construct a short-circuit probability matrix between the networks; then, setting a test matrix and generating a plurality of row test matrices according to the test matrix; finally, searching for the test matrix with the minimum cost through the establishment of a search tree based on the test cost and the heuristic function value.

Description

Technical Field

[0001] This invention belongs to the field of circuit fault diagnosis and testing technology, and more specifically, relates to a boundary scan test matrix generation method based on heuristic search. Background Technology

[0002] With the application and development of large-scale integrated circuits (LSI), circuit structures are becoming increasingly complex, the number of pins on a single integrated circuit is growing larger, its size is shrinking, and the physical distance between pins is becoming closer. This situation renders some traditional fault detection methods, such as flying probes and physical probes, almost unusable. The requirements for the testability, reliability, and maintenance costs of LSI have led LSI manufacturers and researchers to seek new fault diagnosis methods. Boundary scan technology, which pre-builds the boundary scan link structure during the LSI manufacturing stage to quickly locate faults in each pin and the interconnection network between pins, provides a strong guarantee for solving the fault diagnosis problem of LSI. The generation of test vectors for boundary scan testing is a hot topic and a difficult point in this technology research.

[0003] Boundary scan testing is primarily used to detect idling faults in integrated circuit pins, open circuit faults in interconnections between pins, and short circuit faults in interconnections between pins. The 0-1 vector loaded onto the entire test link in each boundary scan test is called the Parallel Test Vector (PTV), while the vector composed of all 0-1 values ​​loaded onto a particular pin during the entire test process is called the Serial Test Vector (STV). All test vectors form the test matrix (MTV), where STV is the row vector of the MTV and PTV is the column vector of the MTV. To ensure the detection of pairwise short circuit faults between pins, idling faults within the pin itself, and open circuit faults in interconnections, all STVs must be distinct and cannot be rows of all 0s or all 1s. Meanwhile, when a short circuit fault occurs between the pin interconnection networks, it manifests as an OR-AND operation of the STV phases (the OR-AND operation is related to the electrical implementation of the circuit itself); when the result of an OR-AND operation of a certain group of STV phases is the same as that of a single STV, it is called a symptom misjudgment; when the result of an OR-AND operation of a certain group of STV phases is the same as that of another group of STV phases, it is called symptom confusion; under the condition of a fixed compactness index (STV length), minimizing the misjudgment rate and confusion rate of the entire MTV is a major direction of research on boundary scan test vector generation algorithms.

[0004] Currently, algorithms for evaluating the confusion rate and false positive rate of MTVs can be divided into two categories: unrestricted fault models and restricted fault models. The former does not fully utilize the physical and electrical information of the circuit, but only calculates and evaluates based on the mathematical properties of the MTV matrix itself. The latter combines physical information such as the distance between circuit pins to calculate the probability of short-circuit faults between different pins, and then incorporates the probability information into the calculation to obtain the false positive rate and confusion rate in the expected form. Currently, algorithms for unrestricted fault models include binary counting sequence algorithms, improved counting sequence algorithms, and equal-weighted algorithms. For restricted fault models, genetic algorithms, neural networks, and other generation methods are used to search for MTVs with the minimum expected confusion rate and false positive rate. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide a boundary scan test matrix generation method based on heuristic search. The method generates a test vector matrix quickly by combining forward heuristic search and backward backtracking verification. The test vector matrix has the minimum confusion rate and false positive rate, and overcomes the shortcomings of other algorithms such as genetic algorithms that cannot obtain the optimal global solution under certain conditions.

[0006] To achieve the above-mentioned objectives, the present invention provides a boundary scan test matrix generation method based on heuristic search, characterized by comprising the following steps:

[0007] (1) Count the number of networks in the circuit board under test;

[0008] A topology model of the circuit board under test is established using the netlist file. Each pair of connected chip pins in the topology model is then treated as a network. The number of networks is counted, and the network formed by the i-th pair of connected chip pins is denoted as N. i ;

[0009] (2) Calculate the normalized distance L between any two networks. ij ;

[0010] Using printed circuit board design software, the coordinates of the center positions of each component on the circuit board under test are exported. Combined with the pin spacing given in the chip datasheet, the N values ​​for each pair of network groups are then determined. i With N j Physical distance Lc ij ;

[0011] Find the maximum physical distance among all network physical distances, denoted as Lc. max Then, the physical distance Lc between any two networks is calculated using the following formula. ij Convert to normalized distance L ij ;

[0012]

[0013] (3) Construct the short-circuit probability matrix P between networks;

[0014] Let m be the number of networks counted in step (1). Then the short-circuit probability matrix P is an m×m symmetric matrix, and the elements p in matrix P... ij Representing network N i With N j The probability of a short circuit occurring between them;

[0015] (4) Construct the test matrix M;

[0016]

[0017] Among them, a ij The value of can be 0 or 1, but it must satisfy that the elements in each row cannot all be 0 or 1, and the elements between rows cannot be exactly the same; i = 1, 2, ..., m; j = 1, 2, ..., n, where n represents the number of times the vector is injected into the network during the entire boundary scan test;

[0018] (5) Generate multiple row test matrices M based on the test matrix M. i ;

[0019] The first row of test matrix M is used as the first row test matrix M1, the first and second rows of test matrix M are used as the second row test matrix M2, and so on, generating the i-th row test matrix M from the first row to the i-th row of test matrix M. i In the end, a total of m rows of test matrices are generated;

[0020] (6) Determine the test matrix M and calculate the test cost;

[0021] (6.1) Set the line test cost function f(M) i );

[0022] f(M i )=1-F1·F2·F3

[0023]

[0024]

[0025] Where F1 represents the row test matrix M i The probability of no first-order misclassification, F2 represents the row test matrix M. i The probability of no second-order misclassification, where F3 represents the row test matrix M. i The probability of no confusion occurring; k ij Representing network N iand network N j The value of k is determined by whether a short-circuit fault would lead to misjudgment. If it would, then k... ij =1 otherwise =0; k ijt Representing network N i N j N t The value of k is determined by whether a short circuit would cause a second-order misjudgment. If it would cause a misjudgment, then... ijt It is 1 if it is true, otherwise it is 0; Represents network and Short circuit and network and Whether short circuits between them will cause confusion in the value of the parameter; if so, then... It is 1 if it is true, otherwise it is 0;

[0026] (6.2) Take values ​​for each element in the test matrix M;

[0027] With min[f(M1)] as the objective, randomly select values ​​for the elements in the first row of the test matrix M1 to determine the elements in the first row of the test matrix M;

[0028] With min[f(M2)] as the objective, keep the elements in the first row of the second row of the test matrix M2 unchanged, and randomly select values ​​for the elements in the second row to determine the elements in the second row of the test matrix M;

[0029] Then, following this pattern, min[f(M) i With the objective of [], maintain the test matrix M in the i-th row. i The elements of the first i-1 rows remain unchanged, and the elements of the i-th row are randomly selected to determine the elements of the i-th row in the test matrix M.

[0030] Finally, the value of the element in the m-th row of the test matrix M is obtained;

[0031] (6.3) Calculate the test cost of test matrix M;

[0032] Substitute the test matrix M obtained in step (6.2) into the test cost function in step (6.1) to obtain the test cost of the test matrix M, denoted as D;

[0033] (7) Construct a heuristic function for each row of the test matrix;

[0034]

[0035] Where η represents the type of fault, C j M represents i R is the ratio of the number of 1s to the number of 0s in the j-th row of a given set of elements. τ N represents the impact when the τth type of failure occurs.j M represents i The number of 1s in the j-th row of the array;

[0036] (8) Build a search tree and search for the test matrix with the minimum cost;

[0037] (8.1) Create the root node;

[0038] Randomly initialize a node, denoted as P0; set the root node P0's number to 1, set the root node P0's parent node's number to 0, set the root node P0's child node numbers to null, and set the test matrix layer number corresponding to the root node P0 to 1.

[0039] (8.2) Fill the root node content;

[0040] (8.2.1) Transfer integers 1 to 2 n The binary code corresponding to -2 is converted into a 1×n matrix, where the l-th matrix is ​​denoted as F. l l = 1, 2, ..., 2 n -2;

[0041] (8.2.2) Traversing matrix F l , matrix F l Substituting these values ​​into the test cost function and heuristic function, we obtain the test cost f(F). l ) and heuristic function value h(F l Then calculate matrix F. l The corresponding total cost g(F) l )=f(F l )×h(F l );

[0042] (8.2.3) Compare the total cost g(F) l The size of the test cost D will be greater than the g(F) of D. l Discard the remaining g(F) l ) and the corresponding F l Stored in the root node P0;

[0043] (8.2.4) Select g(F) l The smallest corresponding F l , use F l Replace row test matrix M1 and use it as the test matrix for root node P0;

[0044] (8.3) Root node expansion;

[0045] Create a child node for the root node P0, denoted as P1; the number of the child node P1 is the current total number of nodes plus 1, and the test matrix level corresponding to the child node P1 is set to the test matrix level corresponding to its parent node plus 1, thus completing the expansion of the root node P0;

[0046] (8.4) Fill in the content of the child nodes;

[0047] (8.4.1) Establish 2 n -2 2×n matrices F l The first row contains the test matrix MF1 of its parent node, and the second row contains integers from 1 to 2. n The binary code corresponding to -2;

[0048] (8.4.2) Calculate the total cost g(F) of each matrix according to the method described in step (8.2.2). l ), and then g(F) which is greater than D l Discard the values ​​of g(F) that are greater than D. l Discard the remaining g(F) l ) and the corresponding F l Stored in child node P1;

[0049] (8.4.3) Select g(F) l The smallest corresponding F l Then use F l Replace row test matrix M2 and use it as the test matrix for child node P1;

[0050] (8.5) Perform backtracking correction on the root node;

[0051] (8.5.1) Replace the total cost g(M1) corresponding to the row test matrix M1 with the total cost g(M2) corresponding to the row test matrix M2, that is, use ming(F) in the child node P1. l Replace ming(F) in the root node P0 l );

[0052] (8.5.2) Compare all g(F) stored under the root node P0. l If the replaced g(M2) is still the minimum value, proceed to step (8.6); otherwise, create another child node for the root node P0, denoted as P2, and then return to step (8.3), and continue to expand the root node P0 according to the methods described in steps (8.3)-(8.5);

[0053] (8.6) With child node P1 as the root node, expand child node P1 and fill it with content according to the methods described in steps (8.3)-(8.4), and then perform backtracking correction according to the method described in step (8.5), but ensure that each round backtracks to the root node P0;

[0054] (8.7) Similarly, when the test matrix level corresponding to a certain child node is m, stop expanding the search tree, and during the process of filling the content of that child node, record the matrix corresponding to the minimum total cost, denoted as the row test matrix M. m The corresponding total cost is denoted as g(M). m );

[0055] (8.8) Compare the total cost g(M) m The magnitude of the test cost D, if D > g(M) m If the test cost D is changed to g(M), then the test cost D will be changed to g(M). m Otherwise, keep the test cost D unchanged.

[0056] (8.9) Starting from the child node with a test matrix layer number of m, backtracking correction is performed as described in step (8.5). During the backtracking process to the root node P0, the row test matrix of each parent node does not change. At this point, the search ends, and the final test matrix M is output.

[0057] The objective of this invention is achieved as follows:

[0058] This invention presents a boundary scan test matrix generation method based on heuristic search. First, the number of networks in the circuit board under test is counted and the normalized distance between any two networks is calculated. Then, the probability of a short circuit between the networks is calculated using the normalized distance between any two networks, thereby constructing a short circuit probability matrix between the networks. Next, a test matrix is ​​set, and multiple row test matrices are generated based on the test matrix. Finally, based on the test cost and the heuristic function value, a search tree is built to search for the test matrix with the minimum cost.

[0059] Meanwhile, the boundary scan test matrix generation method based on heuristic search of the present invention also has the following beneficial effects:

[0060] (1) Using the heuristic search with backtracking correction structure, compared with the test vectors obtained by genetic algorithm, particle swarm algorithm and ant colony algorithm, a test matrix with lower false positive rate and confusion rate can be obtained.

[0061] (2) Using a heuristic function defined in conjunction with fault information, the search speed is faster and the running efficiency is higher compared with unheuristic search.

[0062] (3) During the search process, the rows of the matrix are restricted to not being all 0s or all 1s, and no two rows can be identical. This avoids a large number of invalid search steps, narrows the search range, and shortens the search time. Attached Figure Description

[0063] Figure 1This is a flowchart of the boundary scan test matrix generation method based on heuristic search of the present invention;

[0064] Figure 2 This is a schematic diagram of the circuit under test;

[0065] Figure 3 This is a partial diagram of the search tree. Detailed Implementation

[0066] The specific embodiments of the present invention will now be described with reference to the accompanying drawings to enable those skilled in the art to better understand the invention. It should be particularly noted that in the following description, detailed descriptions of known functions and designs that might obscure the main content of the invention will be omitted here.

[0067] Example

[0068] Figure 1 This is a flowchart of the boundary scan test vector generation method based on heuristic search of the present invention.

[0069] In this embodiment, as Figure 1 As shown, the present invention provides a boundary scan test matrix generation method based on heuristic search, comprising the following steps:

[0070] S1. Count the number of networks in the circuit board under test;

[0071] In this embodiment, the connection relationship of the circuit under test is as follows: Figure 2 As shown, a topology model of the circuit board under test is established using the netlist file. Each pair of connected chip pins in the topology model is then treated as a network. The number of networks is counted, resulting in a total of 7 networks. The network formed by the i-th pair of connected chip pins is denoted as N. i ;

[0072] S2. Calculate the normalized distance L between any two networks. ij ;

[0073] Using printed circuit board design software, the coordinates of the center positions of each component on the circuit board under test are exported. Combined with the pin spacing given in the chip datasheet, the N values ​​for each pair of network groups are then determined. i With N j Physical distance Lc ij ;

[0074] Find the maximum physical distance among all network physical distances, denoted as Lc. max Then, the physical distance Lc between any two networks is calculated using the following formula. ij Convert to normalized distance L ij ;

[0075]

[0076] S3. Construct the short-circuit probability matrix P between networks;

[0077] Let m be the number of networks counted in step S1. Then the short-circuit probability matrix P is an m×m symmetric matrix, and the elements p in matrix P... ij Representing network N i With N j The probability of a short circuit occurring between them;

[0078] Wherein, the short-circuit probability p ij The calculation formula is:

[0079]

[0080] Where a0 is the short-circuit probability between the two nearest neighbors, and A is the decay function.

[0081] In this embodiment, it is assumed that there are 7 networks in the circuit under test. Taking a 7-network circuit as an example, according to the above steps, its probability matrix P can be constructed as shown in Table 1.

[0082] network N1 N2 N3 N4 N5 N6 N7 N1 1 0.061783258 0.075318697 0.085031965 0.050552996 0.029817872 0.08084529 N2 0.061783258 1 0.072801058 0.026705668 0.025944653 0.064864699 0.075078608 N3 0.075318697 0.072801058 1 0.07523036 0.087872554 0.072212597 0.075621341 N4 0.085031965 0.026705668 0.07523036 1 0.070043736 0.041351637 0.027647403 N5 0.050552996 0.025944653 0.087872554 0.070043736 1 0.056854733 0.035707438 N6 0.029817872 0.064864699 0.072212597 0.041351637 0.056854733 1 0.05503421 N7 0.08084529 0.075078608 0.075621341 0.027647403 0.035707438 0.05503421 1

[0083] Table 1S4, Construct the test matrix M;

[0084]

[0085] Among them, a ij The value of can be 0 or 1, but it must satisfy that the elements in each row cannot all be 0 or 1, and the elements between rows cannot be exactly the same; i = 1, 2, ..., m; j = 1, 2, ..., n, where n represents the number of times the vector is injected into the network during the entire boundary scan test;

[0086] In this embodiment, a test matrix M with a size of 7×4 is constructed;

[0087] S5. Generate multiple row test matrices M based on the test matrix M. i ;

[0088] The first row of test matrix M is used as the first row test matrix M1, the first and second rows of test matrix M are used as the second row test matrix M2, and so on, generating the i-th row test matrix M from the first row to the i-th row of test matrix M. i In the end, a total of m rows of test matrices are generated;

[0089] S6. Determine the test matrix M and calculate the test cost;

[0090] S6.1, Set the line test cost function f(M)i );

[0091] f(M i )=1-F1·F2·F3

[0092]

[0093]

[0094] Where F1 represents the row test matrix M i The probability of no first-order misclassification, F2 represents the row test matrix M. i The probability of no second-order misclassification, where F3 represents the row test matrix M. i The probability of no confusion occurring; k ij Representing network N i and network N j The value of k is determined by whether a short-circuit fault would lead to misjudgment. If it would, then k... ij =1 otherwise =0; k ijt Representing network N i N j N t The value of k is determined by whether a short circuit would cause a second-order misjudgment. If it would cause a misjudgment, then... ijt It is 1 if it is true, otherwise it is 0; Represents network and Short circuit and network and Whether short circuits between them will cause confusion in the value of the parameter; if so, then... It is 1 if it is true, otherwise it is 0;

[0095] S6.2. Take values ​​for each element in the test matrix M;

[0096] With min[f(M1)] as the objective, randomly select values ​​for the elements in the first row of the test matrix M1 to determine the elements in the first row of the test matrix M;

[0097] With min[f(M2)] as the objective, keep the elements in the first row of the second row of the test matrix M2 unchanged, and randomly select values ​​for the elements in the second row to determine the elements in the second row of the test matrix M;

[0098] Then, following this pattern, min[f(M) i With the objective of [], maintain the test matrix M in the i-th row. i The elements of the first i-1 rows remain unchanged, and the elements of the i-th row are randomly selected to determine the elements of the i-th row in the test matrix M.

[0099] Finally, the value of the element in the m-th row of the test matrix M is obtained;

[0100] In this embodiment, according to step S6, the final test matrix M is generated as follows:

[0101]

[0102] S6.3 Calculate the test cost of test matrix M;

[0103] Substitute the test matrix M obtained in step S6.2 into the test cost function in step S6.1 to obtain the test cost of the test matrix M, denoted as D;

[0104] In this embodiment, the cost of the matrix is ​​calculated to be 0.4064, i.e., D = 0.4064.

[0105] S7. Construct a heuristic function for each row of the test matrix;

[0106]

[0107] Where η represents the type of fault, C j M represents i R is the ratio of the number of 1s to the number of 0s in the j-th row of a given set of elements. τ N represents the impact when the τth type of failure occurs. j M represents i The number of 1s in the j-th row of the array;

[0108] S8. Construct a search tree to search for the test matrix with the minimum cost;

[0109] S8.1, Create the root node;

[0110] Randomly initialize a node, denoted as P0; set the root node P0's number to 1, set the root node P0's parent node's number to 0, set the root node P0's child node numbers to null, and set the test matrix layer number corresponding to the root node P0 to 1.

[0111] In this embodiment, the root node numbering signal is shown in Table 2:

[0112] Number of matrix layers Node number child nodes Parent node 1 1 0

[0113] Table 2

[0114] S8.2, Fill the root node content;

[0115] S8.2.1, Transfer integers 1 to 2 n The binary code corresponding to -2 is converted into a 1×n matrix, where the l-th matrix is ​​denoted as F. l l = 1, 2, ..., 2 n -2;

[0116] S8.2.2, Traversing Matrix F l , matrix F l Substituting these values ​​into the test cost function and heuristic function, we obtain the test cost f(F). l ) and heuristic function value h(F l Then calculate matrix F. l The corresponding total cost g(F) l )=f(F l )×h(F l );

[0117] S8.2.3, Compare the total cost g(F) l The size of the test cost D will be greater than the g(F) of D. l Discard the remaining g(F) l ) and the corresponding F l Stored in the root node P0;

[0118] S8.2.4, Select g(F) l The smallest corresponding F l , use F l Replace row test matrix M1 and use it as the test matrix for root node P0;

[0119] In this embodiment, the binary codes of integers 1 to 14 are converted into 1×4 matrices respectively, and the test cost of each matrix is ​​shown in Table 3.

[0120]

[0121] Table 3

[0122] S8.3, Root node expansion;

[0123] Create a child node for the root node P0, denoted as P1; the number of the child node P1 is the current total number of nodes plus 1, and the test matrix level corresponding to the child node P1 is set to the test matrix level corresponding to its parent node plus 1, thus completing the expansion of the root node P0;

[0124] S8.4, Fill in the content of child nodes;

[0125] S8.4.1, Establish 2 n -2 2×n matrices F l The first row contains the test matrix MF1 of its parent node, and the second row contains integers from 1 to 2. n The binary code corresponding to -2;

[0126] S8.4.2 Calculate the total cost g(F) of each matrix according to the method described in step S8.2.2. l ), and then g(F) which is greater than D l Discard the values ​​of g(F) that are greater than D.l Discard the remaining g(F) l ) and the corresponding F l Stored in child node P1;

[0127] S8.4.3, Select g(F) l The smallest corresponding F l Then use F l Replace row test matrix M2 and use it as the test matrix for child node P1;

[0128] By expanding, the numbering information of the root node and its child nodes is obtained as shown in Table 4;

[0129]

[0130] Table 4

[0131] S8.5, Perform backtracking correction on the root node;

[0132] S8.5.1 Replace the total cost g(M1) corresponding to row test matrix M1 with the total cost g(M2) corresponding to row test matrix M2, that is, use ming(F) in child node P1. l Replace ming(F) in the root node P0 l );

[0133] S8.5.2, Compare all g(F) stored under the root node P0 l If the replaced g(M2) is still the minimum value, proceed to step S8.6; otherwise, create another child node for the root node P0, denoted as P2, and then return to step S8.3, and continue to expand the root node P0 according to the method described in steps S8.3-S8.5.

[0134] S8.6. With child node P1 as the root node, expand child node P1 and fill it with content according to the methods described in steps S8.3-S8.4. Then perform backtracking correction according to the method described in step S8.5, but ensure that each round of backtracking leads to the root node P0. For example, if we divide the nodes of the search tree into layers from top to bottom, then during the backtracking process, for example, the node of the third layer needs to backtrack to the parent node of the second layer first, and then backtrack to the root node of the first layer.

[0135] S8.7. Following this pattern, when the test matrix level corresponding to a child node reaches m, stop expanding the search tree. During the process of filling in the content of that child node, record the matrix corresponding to the minimum total cost, denoted as the row test matrix M. m The corresponding total cost is denoted as g(M). m );

[0136] In this embodiment, we will use the following... Figure 3The following is a detailed explanation using the search tree shown and the node numbering information shown in Table 5 as examples:

[0137] 1) Expand node 1 to obtain node 2;

[0138] 2) Backtrack the cost of node 1 to node 2. At this time, the test matrix type of node 1 does not change, so expand node 2 to obtain node 3;

[0139] 3) Backtrack the cost of node 3 to node 2. At this time, the test matrix type of node 2 does not change, but node 2 is not the root node. Therefore, backtrack the cost of node 3 to node 1.

[0140] 4) The test matrix type of node 1 has changed, so node 1 is expanded again to obtain node 4;

[0141] 5) Backtrack the cost of node 4 to node 1. At this time, the test matrix type of node 1 does not change, so expand node 4 to obtain node 5.

[0142] 6) And so on. When the test matrix level corresponding to a certain child node reaches 4, stop expanding the search tree, and while filling in the content of that child node, record the matrix corresponding to the minimum total cost.

[0143]

[0144] Table 5

[0145] S8.8, Compare the total cost g(M) m The magnitude of the test cost D, if D > g(M) m If the test cost D is changed to g(M), then the test cost D will be changed to g(M). m Otherwise, keep the test cost D unchanged.

[0146] In this embodiment, the row test matrix M is used. m For example, it is a matrix with 7 layers. The calculated test cost is 0.0261, which is less than the upper bound of cost D, which is 0.4064. Therefore, the upper bound of cost is modified to 0.0261.

[0147]

[0148] S8.9 Starting from the child node with a test matrix layer number of m, backtrack and correct as described in step S8.5. If the row test matrix of each parent node does not change during the backtracking process to the root node P0, then the search ends and the final test matrix M is output.

[0149] In this embodiment, starting with the child node with a test matrix layer number of 4, the final search output test cost is 0.0137, which is the test matrix M;

[0150]

[0151] Although the illustrative specific embodiments of the present invention have been described above to enable those skilled in the art to understand the invention, it should be understood that the invention is not limited to the scope of the specific embodiments. For those skilled in the art, various changes are obvious as long as they are within the spirit and scope of the invention as defined and determined by the appended claims, and all inventions utilizing the concept of the present invention are protected.

Claims

1. A method for generating a boundary scan test matrix based on heuristic search, characterized in that, Includes the following steps: (1) Count the number of networks in the circuit board under test; A topology model of the circuit board under test is established using the netlist file. Each pair of connected chip pins in the topology model is then treated as a network. The number of networks is counted, and the network formed by the i-th pair of connected chip pins is denoted as N. i ; (2) Calculate the normalized distance L between any two networks ij ; Using printed circuit board design software, the coordinates of the center positions of each component on the circuit board under test are exported. Combined with the pin spacing given in the chip datasheet, the N values ​​for each pair of network groups are then determined. i With N j Physical distance Lc ij ; Find the maximum physical distance among all network physical distances, denoted as Lc. max Then, the physical distance Lc between any two networks is calculated using the following formula. ij Convert to normalized distance L ij ; (3) Construct the short-circuit probability matrix P between networks; Let m be the number of networks counted in step (1). Then the short-circuit probability matrix P is an m×m symmetric matrix, and the elements p in matrix P... ij Representing network N i With N j The probability of a short circuit occurring between them; (4) Construct the test matrix M; Among them, a ij The value of can be 0 or 1, but it must satisfy that the elements in each row cannot all be 0 or 1, and the elements between rows cannot be exactly the same; i = 1, 2, ..., m; j = 1, 2, ..., n, where n represents the number of times the vector is injected into the network during the entire boundary scan test; (5) Generate multiple row test matrices M based on the test matrix M. i ; The first row of test matrix M is used as the first row test matrix M1, the first and second rows of test matrix M are used as the second row test matrix M2, and so on, generating the i-th row test matrix M from the first row to the i-th row of test matrix M. i In the end, a total of m rows of test matrices are generated; (6) Determine the test matrix M and calculate the test cost; (6.1) Set the line test cost function f(M) i ); f(M i )=1-F1·F2·F3 Where F1 represents the row test matrix M i The probability of no first-order misclassification, F2 represents the row test matrix M. i The probability of no second-order misclassification, where F3 represents the row test matrix M. i The probability of no confusion occurring; k ij Representing network N i and network N j The value of k is determined by whether a short-circuit fault would lead to misjudgment. If it would, then k... ij =1 otherwise =0; k ijt Representing network N i N j N t The value of k is determined by whether a short circuit would cause a second-order misjudgment. If it would cause a misjudgment, then... ijt It is 1 if it is true, otherwise it is 0. Represents network With N j1 Short circuit and network and Whether short circuits between them will cause confusion in the value of the parameter; if so, then... It is 1 if it is true, otherwise it is 0. (6.2) Take values ​​for each element in the test matrix M; With min[f(M1)] as the objective, randomly select values ​​for the elements in the first row of the test matrix M1 to determine the elements in the first row of the test matrix M; With min[f(M2)] as the objective, keep the elements in the first row of the second row of the test matrix M2 unchanged, and randomly select values ​​for the elements in the second row to determine the elements in the second row of the test matrix M; Then, following this pattern, min[f(M) i With the objective of [], maintain the test matrix M in the i-th row. i The elements of the first i-1 rows remain unchanged, and the elements of the i-th row are randomly selected to determine the elements of the i-th row in the test matrix M. Finally, the value of the element in the m-th row of the test matrix M is obtained; (6.3) Calculate the test cost of test matrix M; Substitute the test matrix M obtained in step (6.2) into the test cost function in step (6.1) to obtain the test cost of the test matrix M, denoted as D; (7) Construct a heuristic function for each row of the test matrix; Where η represents the type of fault, C j M represents i R is the ratio of the number of 1s to the number of 0s in the j-th row of a given set of elements. τ N represents the impact when the τth type of failure occurs. j M represents i The number of 1s in the j-th row of the array; (8) Build a search tree and search for the test matrix with the minimum cost; (8.1) Create the root node; Randomly initialize a node, denoted as P0; set the root node P0's number to 1, set the root node P0's parent node's number to 0, set the root node P0's child node numbers to null, and set the test matrix layer number corresponding to the root node P0 to 1. (8.2) Fill the root node content; (8.2.1) Transfer integers 1 to 2 n The binary code corresponding to -2 is converted into a 1×n matrix, where the l-th matrix is ​​denoted as F. l l = 1, 2, ..., 2 n -2; (8.2.2) Traversing matrix F l , matrix F l Substituting these values ​​into the test cost function and heuristic function, we obtain the test cost f(F). l ) and heuristic function value h(F l Then calculate matrix F. l Corresponding total cost (8.2.3) Compare the total cost g(F) l The size of the test cost D will be greater than the g(F) of D. l Discard the remaining g(F) l ) and the corresponding F l Stored in the root node P0; (8.2.4) Select g(F) l The smallest corresponding F l , use F l Replace row test matrix M1 and use it as the test matrix for root node P0; (8.3) Root node expansion; Create a child node for the root node P0, denoted as P1; the number of the child node P1 is the current total number of nodes plus 1, and the test matrix level corresponding to the child node P1 is set to the test matrix level corresponding to its parent node plus 1, thus completing the expansion of the root node P0; (8.4) Fill in the content of child nodes; (8.4.1) Establish 2 n -2 2×n matrices F l The first row contains the test matrix MF1 of its parent node, and the second row contains integers from 1 to 2. n The binary code corresponding to -2; (8.4.2) Calculate the total cost g(F) of each matrix according to the method described in step (8.2.2). l ), and then g(F) which is greater than D l Discard the values ​​of g(F) that are greater than D. l Discard the remaining g(F) l ) and the corresponding F l Stored in child node P1; (8.4.3) Select g(F) l The smallest corresponding F l Then use F l Replace row test matrix M2 and use it as the test matrix for child node P1; (8.5) Perform backtracking correction on the root node; (8.5.1) Replace the total cost g(M1) corresponding to the row test matrix M1 with the total cost g(M2) corresponding to the row test matrix M2, that is, use ming(F) in the child node P1. l Replace ming(F) in the root node P0 l ); (8.5.2) Compare all g(F) stored under the root node P0. l If the replaced g(M2) is still the minimum value, proceed to step (8.6); otherwise, create another child node for the root node P0, denoted as P2, and then return to step (8.3), and continue to expand the root node P0 according to the methods described in steps (8.3)-(8.5); (8.6) With child node P1 as the root node, expand child node P1 and fill it with content according to the methods described in steps (8.3)-(8.4), and then perform backtracking correction according to the method described in step (8.5), but ensure that each round backtracks to the root node P0; (8.7) Similarly, when the test matrix level corresponding to a certain child node is m, stop expanding the search tree, and during the process of filling the content of that child node, record the matrix corresponding to the minimum total cost, denoted as the row test matrix M. m The corresponding total cost is denoted as g(M). m ); (8.8) Compare the total cost g(M) m The magnitude of the test cost D, if D > g(M) m If the test cost D is changed to g(M), then the test cost D will be changed to g(M). m Otherwise, keep the test cost D unchanged. (8.9) Starting from the child node with a test matrix layer number of m, backtracking correction is performed as described in step (8.5). During the backtracking process to the root node P0, the row test matrix of each parent node does not change. At this point, the search ends, and the final test matrix M is output.

2. The boundary scan test matrix generation method based on heuristic search according to claim 1, characterized in that, The short-circuit probability p ij The calculation formula is: Where a0 is the short-circuit probability between the two nearest neighbors, and A is the decay function.

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